hal_com.c 14 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #define _HAL_COM_C_
  21. #include <drv_types.h>
  22. #include "../hal/OUTSRC/odm_precomp.h"
  23. void dump_chip_info(HAL_VERSION ChipVersion)
  24. {
  25. int cnt = 0;
  26. u8 buf[128];
  27. if(IS_81XXC(ChipVersion)){
  28. cnt += sprintf((buf+cnt), "Chip Version Info: %s_", IS_92C_SERIAL(ChipVersion)?"CHIP_8192C":"CHIP_8188C");
  29. }
  30. else if(IS_92D(ChipVersion)){
  31. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192D_");
  32. }
  33. else if(IS_8723_SERIES(ChipVersion)){
  34. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723A_");
  35. }
  36. else if(IS_8188E(ChipVersion)){
  37. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8188E_");
  38. }
  39. else if(IS_8812_SERIES(ChipVersion)){
  40. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8812_");
  41. }
  42. else if(IS_8192E(ChipVersion)){
  43. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8192E_");
  44. }
  45. else if(IS_8821_SERIES(ChipVersion)){
  46. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8821_");
  47. }
  48. else if(IS_8723B_SERIES(ChipVersion)){
  49. cnt += sprintf((buf+cnt), "Chip Version Info: CHIP_8723B_");
  50. }
  51. cnt += sprintf((buf+cnt), "%s_", IS_NORMAL_CHIP(ChipVersion)?"Normal_Chip":"Test_Chip");
  52. if(IS_CHIP_VENDOR_TSMC(ChipVersion))
  53. cnt += sprintf((buf+cnt), "%s_","TSMC");
  54. else if(IS_CHIP_VENDOR_UMC(ChipVersion))
  55. cnt += sprintf((buf+cnt), "%s_","UMC");
  56. else if(IS_CHIP_VENDOR_SMIC(ChipVersion))
  57. cnt += sprintf((buf+cnt), "%s_","SMIC");
  58. if(IS_A_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "A_CUT_");
  59. else if(IS_B_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "B_CUT_");
  60. else if(IS_C_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "C_CUT_");
  61. else if(IS_D_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "D_CUT_");
  62. else if(IS_E_CUT(ChipVersion)) cnt += sprintf((buf+cnt), "E_CUT_");
  63. else cnt += sprintf((buf+cnt), "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
  64. if(IS_1T1R(ChipVersion)) cnt += sprintf((buf+cnt), "1T1R_");
  65. else if(IS_1T2R(ChipVersion)) cnt += sprintf((buf+cnt), "1T2R_");
  66. else if(IS_2T2R(ChipVersion)) cnt += sprintf((buf+cnt), "2T2R_");
  67. else cnt += sprintf((buf+cnt), "UNKNOWN_RFTYPE(%d)_", ChipVersion.RFType);
  68. cnt += sprintf((buf+cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
  69. DBG_871X("%s", buf);
  70. }
  71. #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
  72. u8 //return the final channel plan decision
  73. hal_com_get_channel_plan(
  74. IN PADAPTER padapter,
  75. IN u8 hw_channel_plan, //channel plan from HW (efuse/eeprom)
  76. IN u8 sw_channel_plan, //channel plan from SW (registry/module param)
  77. IN u8 def_channel_plan, //channel plan used when the former two is invalid
  78. IN BOOLEAN AutoLoadFail
  79. )
  80. {
  81. u8 swConfig;
  82. u8 chnlPlan;
  83. swConfig = _TRUE;
  84. if (!AutoLoadFail)
  85. {
  86. if (!rtw_is_channel_plan_valid(sw_channel_plan))
  87. swConfig = _FALSE;
  88. if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
  89. swConfig = _FALSE;
  90. }
  91. if (swConfig == _TRUE)
  92. chnlPlan = sw_channel_plan;
  93. else
  94. chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
  95. if (!rtw_is_channel_plan_valid(chnlPlan))
  96. chnlPlan = def_channel_plan;
  97. return chnlPlan;
  98. }
  99. BOOLEAN
  100. HAL_IsLegalChannel(
  101. IN PADAPTER Adapter,
  102. IN u32 Channel
  103. )
  104. {
  105. BOOLEAN bLegalChannel = _TRUE;
  106. if (Channel > 14) {
  107. if(IsSupported5G(Adapter->registrypriv.wireless_mode) == _FALSE) {
  108. bLegalChannel = _FALSE;
  109. DBG_871X("Channel > 14 but wireless_mode do not support 5G\n");
  110. }
  111. } else if ((Channel <= 14) && (Channel >=1)){
  112. if(IsSupported24G(Adapter->registrypriv.wireless_mode) == _FALSE) {
  113. bLegalChannel = _FALSE;
  114. DBG_871X("(Channel <= 14) && (Channel >=1) but wireless_mode do not support 2.4G\n");
  115. }
  116. } else {
  117. bLegalChannel = _FALSE;
  118. DBG_871X("Channel is Invalid !!!\n");
  119. }
  120. return bLegalChannel;
  121. }
  122. u8 MRateToHwRate(u8 rate)
  123. {
  124. u8 ret = DESC_RATE1M;
  125. switch(rate)
  126. {
  127. // CCK and OFDM non-HT rates
  128. case IEEE80211_CCK_RATE_1MB: ret = DESC_RATE1M; break;
  129. case IEEE80211_CCK_RATE_2MB: ret = DESC_RATE2M; break;
  130. case IEEE80211_CCK_RATE_5MB: ret = DESC_RATE5_5M; break;
  131. case IEEE80211_CCK_RATE_11MB: ret = DESC_RATE11M; break;
  132. case IEEE80211_OFDM_RATE_6MB: ret = DESC_RATE6M; break;
  133. case IEEE80211_OFDM_RATE_9MB: ret = DESC_RATE9M; break;
  134. case IEEE80211_OFDM_RATE_12MB: ret = DESC_RATE12M; break;
  135. case IEEE80211_OFDM_RATE_18MB: ret = DESC_RATE18M; break;
  136. case IEEE80211_OFDM_RATE_24MB: ret = DESC_RATE24M; break;
  137. case IEEE80211_OFDM_RATE_36MB: ret = DESC_RATE36M; break;
  138. case IEEE80211_OFDM_RATE_48MB: ret = DESC_RATE48M; break;
  139. case IEEE80211_OFDM_RATE_54MB: ret = DESC_RATE54M; break;
  140. // HT rates since here
  141. //case MGN_MCS0: ret = DESC_RATEMCS0; break;
  142. //case MGN_MCS1: ret = DESC_RATEMCS1; break;
  143. //case MGN_MCS2: ret = DESC_RATEMCS2; break;
  144. //case MGN_MCS3: ret = DESC_RATEMCS3; break;
  145. //case MGN_MCS4: ret = DESC_RATEMCS4; break;
  146. //case MGN_MCS5: ret = DESC_RATEMCS5; break;
  147. //case MGN_MCS6: ret = DESC_RATEMCS6; break;
  148. //case MGN_MCS7: ret = DESC_RATEMCS7; break;
  149. default: break;
  150. }
  151. return ret;
  152. }
  153. void HalSetBrateCfg(
  154. IN PADAPTER Adapter,
  155. IN u8 *mBratesOS,
  156. OUT u16 *pBrateCfg)
  157. {
  158. u8 i, is_brate, brate;
  159. for(i=0;i<NDIS_802_11_LENGTH_RATES_EX;i++)
  160. {
  161. is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
  162. brate = mBratesOS[i] & 0x7f;
  163. if( is_brate )
  164. {
  165. switch(brate)
  166. {
  167. case IEEE80211_CCK_RATE_1MB: *pBrateCfg |= RATE_1M; break;
  168. case IEEE80211_CCK_RATE_2MB: *pBrateCfg |= RATE_2M; break;
  169. case IEEE80211_CCK_RATE_5MB: *pBrateCfg |= RATE_5_5M;break;
  170. case IEEE80211_CCK_RATE_11MB: *pBrateCfg |= RATE_11M; break;
  171. case IEEE80211_OFDM_RATE_6MB: *pBrateCfg |= RATE_6M; break;
  172. case IEEE80211_OFDM_RATE_9MB: *pBrateCfg |= RATE_9M; break;
  173. case IEEE80211_OFDM_RATE_12MB: *pBrateCfg |= RATE_12M; break;
  174. case IEEE80211_OFDM_RATE_18MB: *pBrateCfg |= RATE_18M; break;
  175. case IEEE80211_OFDM_RATE_24MB: *pBrateCfg |= RATE_24M; break;
  176. case IEEE80211_OFDM_RATE_36MB: *pBrateCfg |= RATE_36M; break;
  177. case IEEE80211_OFDM_RATE_48MB: *pBrateCfg |= RATE_48M; break;
  178. case IEEE80211_OFDM_RATE_54MB: *pBrateCfg |= RATE_54M; break;
  179. }
  180. }
  181. }
  182. }
  183. static VOID
  184. _OneOutPipeMapping(
  185. IN PADAPTER pAdapter
  186. )
  187. {
  188. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
  189. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  190. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
  191. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];//BE
  192. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
  193. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  194. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  195. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
  196. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  197. }
  198. static VOID
  199. _TwoOutPipeMapping(
  200. IN PADAPTER pAdapter,
  201. IN BOOLEAN bWIFICfg
  202. )
  203. {
  204. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
  205. if(bWIFICfg){ //WMM
  206. // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  207. //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 };
  208. //0:H, 1:N
  209. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];//VO
  210. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
  211. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
  212. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];//BK
  213. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  214. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  215. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
  216. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  217. }
  218. else{//typical setting
  219. //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  220. //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 };
  221. //0:H, 1:N
  222. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  223. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];//VI
  224. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];//BE
  225. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
  226. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  227. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  228. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
  229. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  230. }
  231. }
  232. static VOID _ThreeOutPipeMapping(
  233. IN PADAPTER pAdapter,
  234. IN BOOLEAN bWIFICfg
  235. )
  236. {
  237. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
  238. if(bWIFICfg){//for WMM
  239. // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  240. //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
  241. //0:H, 1:N, 2:L
  242. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  243. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
  244. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
  245. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
  246. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  247. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  248. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
  249. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  250. }
  251. else{//typical setting
  252. // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  253. //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
  254. //0:H, 1:N, 2:L
  255. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  256. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
  257. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
  258. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
  259. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  260. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  261. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];//HIGH
  262. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  263. }
  264. }
  265. static VOID _FourOutPipeMapping(
  266. IN PADAPTER pAdapter,
  267. IN BOOLEAN bWIFICfg
  268. )
  269. {
  270. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(pAdapter);
  271. if(bWIFICfg){//for WMM
  272. // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  273. //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 };
  274. //0:H, 1:N, 2:L ,3:E
  275. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  276. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
  277. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
  278. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];//BK
  279. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  280. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  281. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
  282. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  283. }
  284. else{//typical setting
  285. // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA
  286. //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 };
  287. //0:H, 1:N, 2:L
  288. pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];//VO
  289. pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];//VI
  290. pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];//BE
  291. pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];//BK
  292. pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];//BCN
  293. pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];//MGT
  294. pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[3];//HIGH
  295. pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];//TXCMD
  296. }
  297. }
  298. BOOLEAN
  299. Hal_MappingOutPipe(
  300. IN PADAPTER pAdapter,
  301. IN u8 NumOutPipe
  302. )
  303. {
  304. struct registry_priv *pregistrypriv = &pAdapter->registrypriv;
  305. BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE;
  306. BOOLEAN result = _TRUE;
  307. switch(NumOutPipe)
  308. {
  309. case 2:
  310. _TwoOutPipeMapping(pAdapter, bWIFICfg);
  311. break;
  312. case 3:
  313. case 4:
  314. _ThreeOutPipeMapping(pAdapter, bWIFICfg);
  315. break;
  316. case 1:
  317. _OneOutPipeMapping(pAdapter);
  318. break;
  319. default:
  320. result = _FALSE;
  321. break;
  322. }
  323. return result;
  324. }
  325. void hal_init_macaddr(_adapter *adapter)
  326. {
  327. rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
  328. #ifdef CONFIG_CONCURRENT_MODE
  329. if (adapter->pbuddy_adapter)
  330. rtw_hal_set_hwreg(adapter->pbuddy_adapter, HW_VAR_MAC_ADDR, adapter->pbuddy_adapter->eeprompriv.mac_addr);
  331. #endif
  332. }
  333. /*
  334. * C2H event format:
  335. * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
  336. * BITS [127:120] [119:16] [15:8] [7:4] [3:0]
  337. */
  338. void c2h_evt_clear(_adapter *adapter)
  339. {
  340. rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
  341. }
  342. s32 c2h_evt_read(_adapter *adapter, u8 *buf)
  343. {
  344. s32 ret = _FAIL;
  345. struct c2h_evt_hdr *c2h_evt;
  346. int i;
  347. u8 trigger;
  348. if (buf == NULL)
  349. goto exit;
  350. trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
  351. if (trigger == C2H_EVT_HOST_CLOSE) {
  352. goto exit; /* Not ready */
  353. } else if (trigger != C2H_EVT_FW_CLOSE) {
  354. goto clear_evt; /* Not a valid value */
  355. }
  356. c2h_evt = (struct c2h_evt_hdr *)buf;
  357. _rtw_memset(c2h_evt, 0, 16);
  358. *buf = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
  359. *(buf+1) = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 1);
  360. RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): ",
  361. &c2h_evt , sizeof(c2h_evt));
  362. if (0) {
  363. DBG_871X("%s id:%u, len:%u, seq:%u, trigger:0x%02x\n", __func__
  364. , c2h_evt->id, c2h_evt->plen, c2h_evt->seq, trigger);
  365. }
  366. /* Read the content */
  367. for (i = 0; i < c2h_evt->plen; i++)
  368. c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + sizeof(*c2h_evt) + i);
  369. RT_PRINT_DATA(_module_hal_init_c_, _drv_info_, "c2h_evt_read(): Command Content:\n",
  370. c2h_evt->payload, c2h_evt->plen);
  371. ret = _SUCCESS;
  372. clear_evt:
  373. /*
  374. * Clear event to notify FW we have read the command.
  375. * If this field isn't clear, the FW won't update the next command message.
  376. */
  377. c2h_evt_clear(adapter);
  378. exit:
  379. return ret;
  380. }
  381. u8 rtw_hal_networktype_to_raid(_adapter *adapter,unsigned char network_type)
  382. {
  383. if(IS_NEW_GENERATION_IC(adapter)){
  384. return networktype_to_raid_ex(adapter,network_type);
  385. }
  386. else{
  387. return networktype_to_raid(adapter,network_type);
  388. }
  389. }
  390. u8 rtw_get_mgntframe_raid(_adapter *adapter,unsigned char network_type)
  391. {
  392. u8 raid;
  393. if(IS_NEW_GENERATION_IC(adapter)){
  394. raid = (network_type & WIRELESS_11B) ?RATEID_IDX_B
  395. :RATEID_IDX_G;
  396. }
  397. else{
  398. raid = (network_type & WIRELESS_11B) ?RATR_INX_WIRELESS_B
  399. :RATR_INX_WIRELESS_G;
  400. }
  401. return raid;
  402. }