rtl8188e_spec.h 5.2 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *******************************************************************************/
  19. #ifndef __RTL8188E_SPEC_H__
  20. #define __RTL8188E_SPEC_H__
  21. //============================================================
  22. // 8188E Regsiter offset definition
  23. //============================================================
  24. //============================================================
  25. //
  26. //============================================================
  27. //-----------------------------------------------------
  28. //
  29. // 0x0000h ~ 0x00FFh System Configuration
  30. //
  31. //-----------------------------------------------------
  32. #define REG_BB_PAD_CTRL 0x0064
  33. #define REG_HMEBOX_E0 0x0088
  34. #define REG_HMEBOX_E1 0x008A
  35. #define REG_HMEBOX_E2 0x008C
  36. #define REG_HMEBOX_E3 0x008E
  37. #define REG_HMEBOX_EXT_0 0x01F0
  38. #define REG_HMEBOX_EXT_1 0x01F4
  39. #define REG_HMEBOX_EXT_2 0x01F8
  40. #define REG_HMEBOX_EXT_3 0x01FC
  41. #define REG_HIMR_88E 0x00B0 //RTL8188E
  42. #define REG_HISR_88E 0x00B4 //RTL8188E
  43. #define REG_HIMRE_88E 0x00B8 //RTL8188E
  44. #define REG_HISRE_88E 0x00BC //RTL8188E
  45. //-----------------------------------------------------
  46. //
  47. // 0x0100h ~ 0x01FFh MACTOP General Configuration
  48. //
  49. //-----------------------------------------------------
  50. #define REG_PKTBUF_DBG_ADDR (REG_PKTBUF_DBG_CTRL)
  51. #define REG_RXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+2)
  52. #define REG_TXPKTBUF_DBG (REG_PKTBUF_DBG_CTRL+3)
  53. #define REG_WOWLAN_WAKE_REASON REG_MCUTST_WOWLAN
  54. //-----------------------------------------------------
  55. //
  56. // 0x0200h ~ 0x027Fh TXDMA Configuration
  57. //
  58. //-----------------------------------------------------
  59. //-----------------------------------------------------
  60. //
  61. // 0x0280h ~ 0x02FFh RXDMA Configuration
  62. //
  63. //-----------------------------------------------------
  64. //-----------------------------------------------------
  65. //
  66. // 0x0300h ~ 0x03FFh PCIe
  67. //
  68. //-----------------------------------------------------
  69. //-----------------------------------------------------
  70. //
  71. // 0x0400h ~ 0x047Fh Protocol Configuration
  72. //
  73. //-----------------------------------------------------
  74. //-----------------------------------------------------
  75. //
  76. // 0x0500h ~ 0x05FFh EDCA Configuration
  77. //
  78. //-----------------------------------------------------
  79. //-----------------------------------------------------
  80. //
  81. // 0x0600h ~ 0x07FFh WMAC Configuration
  82. //
  83. //-----------------------------------------------------
  84. //----------------------------------------------------------------------------
  85. // 88E Driver Initialization Offload REG_FDHM0(Offset 0x88, 8 bits)
  86. //----------------------------------------------------------------------------
  87. //IOL config for REG_FDHM0(Reg0x88)
  88. #define CMD_INIT_LLT BIT0
  89. #define CMD_READ_EFUSE_MAP BIT1
  90. #define CMD_EFUSE_PATCH BIT2
  91. #define CMD_IOCONFIG BIT3
  92. #define CMD_INIT_LLT_ERR BIT4
  93. #define CMD_READ_EFUSE_MAP_ERR BIT5
  94. #define CMD_EFUSE_PATCH_ERR BIT6
  95. #define CMD_IOCONFIG_ERR BIT7
  96. //-----------------------------------------------------
  97. //
  98. // Redifine register definition for compatibility
  99. //
  100. //-----------------------------------------------------
  101. // TODO: use these definition when using REG_xxx naming rule.
  102. // NOTE: DO NOT Remove these definition. Use later.
  103. #define ISR_88E REG_HISR_88E
  104. #ifdef CONFIG_PCI_HCI
  105. //#define IMR_RX_MASK (IMR_ROK_88E|IMR_RDU_88E|IMR_RXFOVW_88E)
  106. #define IMR_TX_MASK (IMR_VODOK_88E|IMR_VIDOK_88E|IMR_BEDOK_88E|IMR_BKDOK_88E|IMR_MGNTDOK_88E|IMR_HIGHDOK_88E|IMR_BCNDERR0_88E)
  107. #ifdef CONFIG_CONCURRENT_MODE
  108. #define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E | IMR_BCNDMAINT_E_88E)
  109. #else
  110. #define RT_IBSS_INT_MASKS (IMR_BCNDMAINT0_88E | IMR_TBDOK_88E | IMR_TBDER_88E)
  111. #endif
  112. #define RT_AC_INT_MASKS (IMR_VIDOK_88E | IMR_VODOK_88E | IMR_BEDOK_88E|IMR_BKDOK_88E)
  113. #define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS)
  114. #endif
  115. //========================================================
  116. // General definitions
  117. //========================================================
  118. //----------------------------------------------------------------------------
  119. // 8192C EEPROM/EFUSE share register definition.
  120. //----------------------------------------------------------------------------
  121. #define EFUSE_ACCESS_ON 0x69 // For RTL8723 only.
  122. #define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only.
  123. #endif //__RTL8188E_SPEC_H__