rtl8723a_spec.h 3.2 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *******************************************************************************/
  19. #ifndef __RTL8723A_SPEC_H__
  20. #define __RTL8723A_SPEC_H__
  21. #include <rtl8192c_spec.h>
  22. //============================================================================
  23. // 8723A Regsiter offset definition
  24. //============================================================================
  25. //-----------------------------------------------------
  26. //
  27. // 0x0000h ~ 0x00FFh System Configuration
  28. //
  29. //-----------------------------------------------------
  30. //-----------------------------------------------------
  31. //
  32. // 0x0100h ~ 0x01FFh MACTOP General Configuration
  33. //
  34. //-----------------------------------------------------
  35. //-----------------------------------------------------
  36. //
  37. // 0x0200h ~ 0x027Fh TXDMA Configuration
  38. //
  39. //-----------------------------------------------------
  40. //-----------------------------------------------------
  41. //
  42. // 0x0280h ~ 0x02FFh RXDMA Configuration
  43. //
  44. //-----------------------------------------------------
  45. //-----------------------------------------------------
  46. //
  47. // 0x0300h ~ 0x03FFh PCIe
  48. //
  49. //-----------------------------------------------------
  50. //-----------------------------------------------------
  51. //
  52. // 0x0400h ~ 0x047Fh Protocol Configuration
  53. //
  54. //-----------------------------------------------------
  55. //-----------------------------------------------------
  56. //
  57. // 0x0500h ~ 0x05FFh EDCA Configuration
  58. //
  59. //-----------------------------------------------------
  60. //-----------------------------------------------------
  61. //
  62. // 0x0600h ~ 0x07FFh WMAC Configuration
  63. //
  64. //-----------------------------------------------------
  65. //============================================================================
  66. // 8723 Regsiter Bit and Content definition
  67. //============================================================================
  68. //2 HSISR
  69. // interrupt mask which needs to clear
  70. #define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\
  71. HSISR_SPS_OCP_INT |\
  72. HSISR_RON_INT |\
  73. HSISR_PDNINT |\
  74. HSISR_GPIO9_INT)
  75. //----------------------------------------------------------------------------
  76. // 8723 EFUSE
  77. //----------------------------------------------------------------------------
  78. //============================================================================
  79. // General definitions
  80. //============================================================================
  81. #endif