rtl8723b_spec.h 4.7 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *******************************************************************************/
  19. #ifndef __RTL8723B_SPEC_H__
  20. #define __RTL8723B_SPEC_H__
  21. #include <drv_conf.h>
  22. #define HAL_NAV_UPPER_UNIT_8723B 128 // micro-second
  23. //-----------------------------------------------------
  24. //
  25. // 0x0000h ~ 0x00FFh System Configuration
  26. //
  27. //-----------------------------------------------------
  28. #define REG_BT_WIFI_ANTENNA_SWITCH_8723B 0x0038
  29. #define REG_PAD_CTRL1_8723B 0x0064
  30. #define REG_AFE_CTRL_4_8723B 0x0078
  31. #define REG_HMEBOX_DBG_0_8723B 0x0088
  32. #define REG_HMEBOX_DBG_1_8723B 0x008A
  33. #define REG_HMEBOX_DBG_2_8723B 0x008C
  34. #define REG_HMEBOX_DBG_3_8723B 0x008E
  35. //-----------------------------------------------------
  36. //
  37. // 0x0100h ~ 0x01FFh MACTOP General Configuration
  38. //
  39. //-----------------------------------------------------
  40. #define REG_C2HEVT_CMD_ID_8723B 0x01A0
  41. #define REG_C2HEVT_CMD_LEN_8723B 0x01AE
  42. #define REG_WOWLAN_WAKE_REASON_8723B 0x01C7
  43. #define REG_HMEBOX_EXT0_8723B 0x01F0
  44. #define REG_HMEBOX_EXT1_8723B 0x01F4
  45. #define REG_HMEBOX_EXT2_8723B 0x01F8
  46. #define REG_HMEBOX_EXT3_8723B 0x01FC
  47. //-----------------------------------------------------
  48. //
  49. // 0x0200h ~ 0x027Fh TXDMA Configuration
  50. //
  51. //-----------------------------------------------------
  52. //-----------------------------------------------------
  53. //
  54. // 0x0280h ~ 0x02FFh RXDMA Configuration
  55. //
  56. //-----------------------------------------------------
  57. #define REG_RXDMA_MODE_CTRL_8723B 0x0290
  58. //-----------------------------------------------------
  59. //
  60. // 0x0300h ~ 0x03FFh PCIe
  61. //
  62. //-----------------------------------------------------
  63. //-----------------------------------------------------
  64. //
  65. // 0x0400h ~ 0x047Fh Protocol Configuration
  66. //
  67. //-----------------------------------------------------
  68. #define REG_TXPKTBUF_BCNQ_BDNY_8723B 0x0424
  69. #define REG_TXPKTBUF_MGQ_BDNY_8723B 0x0425
  70. #define REG_TXPKTBUF_WMAC_LBK_BF_HD_8723B 0x045D
  71. //-----------------------------------------------------
  72. //
  73. // 0x0500h ~ 0x05FFh EDCA Configuration
  74. //
  75. //-----------------------------------------------------
  76. #define REG_SECONDARY_CCA_CTRL_8723B 0x0577
  77. //-----------------------------------------------------
  78. //
  79. // 0x0600h ~ 0x07FFh WMAC Configuration
  80. //
  81. //-----------------------------------------------------
  82. //============================================================================
  83. // 8723 Regsiter Bit and Content definition
  84. //============================================================================
  85. //2 HSISR
  86. // interrupt mask which needs to clear
  87. #define MASK_HSISR_CLEAR (HSISR_GPIO12_0_INT |\
  88. HSISR_SPS_OCP_INT |\
  89. HSISR_RON_INT |\
  90. HSISR_PDNINT |\
  91. HSISR_GPIO9_INT)
  92. //-----------------------------------------------------
  93. //
  94. // 0x0100h ~ 0x01FFh MACTOP General Configuration
  95. //
  96. //-----------------------------------------------------
  97. #define RXDMA_AGG_MODE_EN BIT(1)
  98. //-----------------------------------------------------
  99. //
  100. // 0x0200h ~ 0x027Fh TXDMA Configuration
  101. //
  102. //-----------------------------------------------------
  103. //-----------------------------------------------------
  104. //
  105. // 0x0280h ~ 0x02FFh RXDMA Configuration
  106. //
  107. //-----------------------------------------------------
  108. #ifdef CONFIG_WOWLAN_8723
  109. #define RXPKT_RELEASE_POLL BIT(16)
  110. #define RXDMA_IDLE BIT(17)
  111. #define RW_RELEASE_EN BIT(18)
  112. #endif
  113. //-----------------------------------------------------
  114. //
  115. // 0x0400h ~ 0x047Fh Protocol Configuration
  116. //
  117. //-----------------------------------------------------
  118. //-----------------------------------------------------
  119. //
  120. // 0x0500h ~ 0x05FFh EDCA Configuration
  121. //
  122. //-----------------------------------------------------
  123. //-----------------------------------------------------
  124. //
  125. // 0x0600h ~ 0x07FFh WMAC Configuration
  126. //
  127. //-----------------------------------------------------
  128. #endif