hal_pg.h 30 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. *****************************************************************************/
  15. #ifndef __HAL_PG_H__
  16. #define __HAL_PG_H__
  17. #define PPG_BB_GAIN_2G_TX_OFFSET_MASK 0x0F
  18. #define PPG_BB_GAIN_2G_TXB_OFFSET_MASK 0xF0
  19. #define PPG_BB_GAIN_5G_TX_OFFSET_MASK 0x1F
  20. #define PPG_THERMAL_OFFSET_MASK 0x1F
  21. #define KFREE_BB_GAIN_2G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1))))
  22. #define KFREE_BB_GAIN_2G_TXB_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_2G_TXB_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x10) ? ((_ppg_v) >> 5) : (-((_ppg_v) >> 5))))
  23. #define KFREE_BB_GAIN_5G_TX_OFFSET(_ppg_v) (((_ppg_v) == PPG_BB_GAIN_5G_TX_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1))))
  24. #define KFREE_THERMAL_OFFSET(_ppg_v) (((_ppg_v) == PPG_THERMAL_OFFSET_MASK) ? 0 : (((_ppg_v) & 0x01) ? ((_ppg_v) >> 1) : (-((_ppg_v) >> 1))))
  25. /* ****************************************************
  26. * EEPROM/Efuse PG Offset for 88EE/88EU/88ES
  27. * **************************************************** */
  28. #define EEPROM_ChannelPlan_88E 0xB8
  29. #define EEPROM_XTAL_88E 0xB9
  30. #define EEPROM_THERMAL_METER_88E 0xBA
  31. #define EEPROM_IQK_LCK_88E 0xBB
  32. #define EEPROM_RF_BOARD_OPTION_88E 0xC1
  33. #define EEPROM_RF_FEATURE_OPTION_88E 0xC2
  34. #define EEPROM_RF_BT_SETTING_88E 0xC3
  35. #define EEPROM_VERSION_88E 0xC4
  36. #define EEPROM_CustomID_88E 0xC5
  37. #define EEPROM_RF_ANTENNA_OPT_88E 0xC9
  38. #define EEPROM_COUNTRY_CODE_88E 0xCB
  39. /* RTL88EE */
  40. #define EEPROM_MAC_ADDR_88EE 0xD0
  41. #define EEPROM_VID_88EE 0xD6
  42. #define EEPROM_DID_88EE 0xD8
  43. #define EEPROM_SVID_88EE 0xDA
  44. #define EEPROM_SMID_88EE 0xDC
  45. /* RTL88EU */
  46. #define EEPROM_MAC_ADDR_88EU 0xD7
  47. #define EEPROM_VID_88EU 0xD0
  48. #define EEPROM_PID_88EU 0xD2
  49. #define EEPROM_USB_OPTIONAL_FUNCTION0 0xD4 /* 8188EU, 8192EU, 8812AU is the same */
  50. #define EEPROM_USB_OPTIONAL_FUNCTION0_8811AU 0x104
  51. /* RTL88ES */
  52. #define EEPROM_MAC_ADDR_88ES 0x11A
  53. /* ****************************************************
  54. * EEPROM/Efuse PG Offset for 8192EE/8192EU/8192ES
  55. * **************************************************** */
  56. #define GET_PG_KFREE_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
  57. #define GET_PG_KFREE_THERMAL_K_ON_8192E(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  58. #define PPG_BB_GAIN_2G_TXA_OFFSET_8192E 0x1F6
  59. #define PPG_THERMAL_OFFSET_8192E 0x1F5
  60. #define EEPROM_ChannelPlan_8192E 0xB8
  61. #define EEPROM_XTAL_8192E 0xB9
  62. #define EEPROM_THERMAL_METER_8192E 0xBA
  63. #define EEPROM_IQK_LCK_8192E 0xBB
  64. #define EEPROM_2G_5G_PA_TYPE_8192E 0xBC
  65. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192E 0xBD
  66. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192E 0xBF
  67. #define EEPROM_RF_BOARD_OPTION_8192E 0xC1
  68. #define EEPROM_RF_FEATURE_OPTION_8192E 0xC2
  69. #define EEPROM_RF_BT_SETTING_8192E 0xC3
  70. #define EEPROM_VERSION_8192E 0xC4
  71. #define EEPROM_CustomID_8192E 0xC5
  72. #define EEPROM_TX_BBSWING_2G_8192E 0xC6
  73. #define EEPROM_TX_BBSWING_5G_8192E 0xC7
  74. #define EEPROM_TX_PWR_CALIBRATE_RATE_8192E 0xC8
  75. #define EEPROM_RF_ANTENNA_OPT_8192E 0xC9
  76. #define EEPROM_RFE_OPTION_8192E 0xCA
  77. #define EEPROM_RFE_OPTION_8188E 0xCA
  78. #define EEPROM_COUNTRY_CODE_8192E 0xCB
  79. /* RTL8192EE */
  80. #define EEPROM_MAC_ADDR_8192EE 0xD0
  81. #define EEPROM_VID_8192EE 0xD6
  82. #define EEPROM_DID_8192EE 0xD8
  83. #define EEPROM_SVID_8192EE 0xDA
  84. #define EEPROM_SMID_8192EE 0xDC
  85. /* RTL8192EU */
  86. #define EEPROM_MAC_ADDR_8192EU 0xD7
  87. #define EEPROM_VID_8192EU 0xD0
  88. #define EEPROM_PID_8192EU 0xD2
  89. #define EEPROM_PA_TYPE_8192EU 0xBC
  90. #define EEPROM_LNA_TYPE_2G_8192EU 0xBD
  91. #define EEPROM_LNA_TYPE_5G_8192EU 0xBF
  92. /* RTL8192ES */
  93. #define EEPROM_MAC_ADDR_8192ES 0x11A
  94. /* ****************************************************
  95. * EEPROM/Efuse PG Offset for 8812AE/8812AU/8812AS
  96. * *****************************************************/
  97. #define EEPROM_USB_MODE_8812 0x08
  98. #define EEPROM_ChannelPlan_8812 0xB8
  99. #define EEPROM_XTAL_8812 0xB9
  100. #define EEPROM_THERMAL_METER_8812 0xBA
  101. #define EEPROM_IQK_LCK_8812 0xBB
  102. #define EEPROM_2G_5G_PA_TYPE_8812 0xBC
  103. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8812 0xBD
  104. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8812 0xBF
  105. #define EEPROM_RF_BOARD_OPTION_8812 0xC1
  106. #define EEPROM_RF_FEATURE_OPTION_8812 0xC2
  107. #define EEPROM_RF_BT_SETTING_8812 0xC3
  108. #define EEPROM_VERSION_8812 0xC4
  109. #define EEPROM_CustomID_8812 0xC5
  110. #define EEPROM_TX_BBSWING_2G_8812 0xC6
  111. #define EEPROM_TX_BBSWING_5G_8812 0xC7
  112. #define EEPROM_TX_PWR_CALIBRATE_RATE_8812 0xC8
  113. #define EEPROM_RF_ANTENNA_OPT_8812 0xC9
  114. #define EEPROM_RFE_OPTION_8812 0xCA
  115. #define EEPROM_COUNTRY_CODE_8812 0xCB
  116. /* RTL8812AE */
  117. #define EEPROM_MAC_ADDR_8812AE 0xD0
  118. #define EEPROM_VID_8812AE 0xD6
  119. #define EEPROM_DID_8812AE 0xD8
  120. #define EEPROM_SVID_8812AE 0xDA
  121. #define EEPROM_SMID_8812AE 0xDC
  122. /* RTL8812AU */
  123. #define EEPROM_MAC_ADDR_8812AU 0xD7
  124. #define EEPROM_VID_8812AU 0xD0
  125. #define EEPROM_PID_8812AU 0xD2
  126. #define EEPROM_PA_TYPE_8812AU 0xBC
  127. #define EEPROM_LNA_TYPE_2G_8812AU 0xBD
  128. #define EEPROM_LNA_TYPE_5G_8812AU 0xBF
  129. /* RTL8814AU */
  130. #define EEPROM_MAC_ADDR_8814AU 0xD8
  131. #define EEPROM_VID_8814AU 0xD0
  132. #define EEPROM_PID_8814AU 0xD2
  133. #define EEPROM_PA_TYPE_8814AU 0xBC
  134. #define EEPROM_LNA_TYPE_2G_8814AU 0xBD
  135. #define EEPROM_LNA_TYPE_5G_8814AU 0xBF
  136. /* RTL8814AE */
  137. #define EEPROM_MAC_ADDR_8814AE 0xD0
  138. #define EEPROM_VID_8814AE 0xD6
  139. #define EEPROM_DID_8814AE 0xD8
  140. #define EEPROM_SVID_8814AE 0xDA
  141. #define EEPROM_SMID_8814AE 0xDC
  142. /* ****************************************************
  143. * EEPROM/Efuse PG Offset for 8814AU
  144. * **************************************************** */
  145. #define GET_PG_KFREE_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1)
  146. #define GET_PG_KFREE_THERMAL_K_ON_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  147. #define GET_PG_TX_POWER_TRACKING_MODE_8814A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 6, 2)
  148. #define KFREE_GAIN_DATA_LENGTH_8814A 22
  149. #define PPG_BB_GAIN_2G_TXBA_OFFSET_8814A 0x3EE
  150. #define PPG_THERMAL_OFFSET_8814A 0x3EF
  151. #define EEPROM_USB_MODE_8814A 0x0E
  152. #define EEPROM_ChannelPlan_8814 0xB8
  153. #define EEPROM_XTAL_8814 0xB9
  154. #define EEPROM_THERMAL_METER_8814 0xBA
  155. #define EEPROM_IQK_LCK_8814 0xBB
  156. #define EEPROM_PA_TYPE_8814 0xBC
  157. #define EEPROM_LNA_TYPE_AB_2G_8814 0xBD
  158. #define EEPROM_LNA_TYPE_CD_2G_8814 0xBE
  159. #define EEPROM_LNA_TYPE_AB_5G_8814 0xBF
  160. #define EEPROM_LNA_TYPE_CD_5G_8814 0xC0
  161. #define EEPROM_RF_BOARD_OPTION_8814 0xC1
  162. #define EEPROM_RF_BT_SETTING_8814 0xC3
  163. #define EEPROM_VERSION_8814 0xC4
  164. #define EEPROM_CustomID_8814 0xC5
  165. #define EEPROM_TX_BBSWING_2G_8814 0xC6
  166. #define EEPROM_TX_BBSWING_5G_8814 0xC7
  167. #define EEPROM_TRX_ANTENNA_OPTION_8814 0xC9
  168. #define EEPROM_RFE_OPTION_8814 0xCA
  169. #define EEPROM_COUNTRY_CODE_8814 0xCB
  170. /*Extra Info for 8814A Initial Gain Fine Tune suggested by Willis, JIRA: MP123*/
  171. #define EEPROM_IG_OFFSET_4_AB_2G_8814A 0x120
  172. #define EEPROM_IG_OFFSET_4_CD_2G_8814A 0x121
  173. #define EEPROM_IG_OFFSET_4_AB_5GL_8814A 0x122
  174. #define EEPROM_IG_OFFSET_4_CD_5GL_8814A 0x123
  175. #define EEPROM_IG_OFFSET_4_AB_5GM_8814A 0x124
  176. #define EEPROM_IG_OFFSET_4_CD_5GM_8814A 0x125
  177. #define EEPROM_IG_OFFSET_4_AB_5GH_8814A 0x126
  178. #define EEPROM_IG_OFFSET_4_CD_5GH_8814A 0x127
  179. /* ****************************************************
  180. * EEPROM/Efuse PG Offset for 8821AE/8821AU/8821AS
  181. * **************************************************** */
  182. #define GET_PG_KFREE_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 4, 1)
  183. #define GET_PG_KFREE_THERMAL_K_ON_8821A(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  184. #define PPG_BB_GAIN_2G_TXA_OFFSET_8821A 0x1F6
  185. #define PPG_THERMAL_OFFSET_8821A 0x1F5
  186. #define PPG_BB_GAIN_5GLB1_TXA_OFFSET_8821A 0x1F4
  187. #define PPG_BB_GAIN_5GLB2_TXA_OFFSET_8821A 0x1F3
  188. #define PPG_BB_GAIN_5GMB1_TXA_OFFSET_8821A 0x1F2
  189. #define PPG_BB_GAIN_5GMB2_TXA_OFFSET_8821A 0x1F1
  190. #define PPG_BB_GAIN_5GHB_TXA_OFFSET_8821A 0x1F0
  191. #define EEPROM_ChannelPlan_8821 0xB8
  192. #define EEPROM_XTAL_8821 0xB9
  193. #define EEPROM_THERMAL_METER_8821 0xBA
  194. #define EEPROM_IQK_LCK_8821 0xBB
  195. #define EEPROM_RF_BOARD_OPTION_8821 0xC1
  196. #define EEPROM_RF_FEATURE_OPTION_8821 0xC2
  197. #define EEPROM_RF_BT_SETTING_8821 0xC3
  198. #define EEPROM_VERSION_8821 0xC4
  199. #define EEPROM_CustomID_8821 0xC5
  200. #define EEPROM_RF_ANTENNA_OPT_8821 0xC9
  201. /* RTL8821AE */
  202. #define EEPROM_MAC_ADDR_8821AE 0xD0
  203. #define EEPROM_VID_8821AE 0xD6
  204. #define EEPROM_DID_8821AE 0xD8
  205. #define EEPROM_SVID_8821AE 0xDA
  206. #define EEPROM_SMID_8821AE 0xDC
  207. /* RTL8821AU */
  208. #define EEPROM_PA_TYPE_8821AU 0xBC
  209. #define EEPROM_LNA_TYPE_8821AU 0xBF
  210. /* RTL8821AS */
  211. #define EEPROM_MAC_ADDR_8821AS 0x11A
  212. /* RTL8821AU */
  213. #define EEPROM_MAC_ADDR_8821AU 0x107
  214. #define EEPROM_VID_8821AU 0x100
  215. #define EEPROM_PID_8821AU 0x102
  216. /* ****************************************************
  217. * EEPROM/Efuse PG Offset for 8192 SE/SU
  218. * **************************************************** */
  219. #define EEPROM_VID_92SE 0x0A
  220. #define EEPROM_DID_92SE 0x0C
  221. #define EEPROM_SVID_92SE 0x0E
  222. #define EEPROM_SMID_92SE 0x10
  223. #define EEPROM_MAC_ADDR_92S 0x12
  224. #define EEPROM_TSSI_A_92SE 0x74
  225. #define EEPROM_TSSI_B_92SE 0x75
  226. #define EEPROM_Version_92SE 0x7C
  227. #define EEPROM_VID_92SU 0x08
  228. #define EEPROM_PID_92SU 0x0A
  229. #define EEPROM_Version_92SU 0x50
  230. #define EEPROM_TSSI_A_92SU 0x6b
  231. #define EEPROM_TSSI_B_92SU 0x6c
  232. /* ====================================================
  233. EEPROM/Efuse PG Offset for 8188FE/8188FU/8188FS
  234. ====================================================
  235. */
  236. #define GET_PG_KFREE_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
  237. #define GET_PG_KFREE_THERMAL_K_ON_8188F(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  238. #define PPG_BB_GAIN_2G_TXA_OFFSET_8188F 0xEE
  239. #define PPG_THERMAL_OFFSET_8188F 0xEF
  240. #define EEPROM_ChannelPlan_8188F 0xB8
  241. #define EEPROM_XTAL_8188F 0xB9
  242. #define EEPROM_THERMAL_METER_8188F 0xBA
  243. #define EEPROM_IQK_LCK_8188F 0xBB
  244. #define EEPROM_2G_5G_PA_TYPE_8188F 0xBC
  245. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188F 0xBD
  246. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188F 0xBF
  247. #define EEPROM_RF_BOARD_OPTION_8188F 0xC1
  248. #define EEPROM_FEATURE_OPTION_8188F 0xC2
  249. #define EEPROM_RF_BT_SETTING_8188F 0xC3
  250. #define EEPROM_VERSION_8188F 0xC4
  251. #define EEPROM_CustomID_8188F 0xC5
  252. #define EEPROM_TX_BBSWING_2G_8188F 0xC6
  253. #define EEPROM_TX_PWR_CALIBRATE_RATE_8188F 0xC8
  254. #define EEPROM_RF_ANTENNA_OPT_8188F 0xC9
  255. #define EEPROM_RFE_OPTION_8188F 0xCA
  256. #define EEPROM_COUNTRY_CODE_8188F 0xCB
  257. #define EEPROM_CUSTOMER_ID_8188F 0x7F
  258. #define EEPROM_SUBCUSTOMER_ID_8188F 0x59
  259. /* RTL8188FU */
  260. #define EEPROM_MAC_ADDR_8188FU 0xD7
  261. #define EEPROM_VID_8188FU 0xD0
  262. #define EEPROM_PID_8188FU 0xD2
  263. #define EEPROM_PA_TYPE_8188FU 0xBC
  264. #define EEPROM_LNA_TYPE_2G_8188FU 0xBD
  265. #define EEPROM_USB_OPTIONAL_FUNCTION0_8188FU 0xD4
  266. /* RTL8188FS */
  267. #define EEPROM_MAC_ADDR_8188FS 0x11A
  268. #define EEPROM_Voltage_ADDR_8188F 0x8
  269. /* ====================================================
  270. EEPROM/Efuse PG Offset for 8188GTV/8188GTVS
  271. ====================================================
  272. */
  273. #define GET_PG_KFREE_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
  274. #define GET_PG_KFREE_THERMAL_K_ON_8188GTV(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  275. #define PPG_BB_GAIN_2G_TXA_OFFSET_8188GTV 0xEE
  276. #define PPG_THERMAL_OFFSET_8188GTV 0xEF
  277. #define EEPROM_ChannelPlan_8188GTV 0xB8
  278. #define EEPROM_XTAL_8188GTV 0xB9
  279. #define EEPROM_THERMAL_METER_8188GTV 0xBA
  280. #define EEPROM_IQK_LCK_8188GTV 0xBB
  281. #define EEPROM_2G_5G_PA_TYPE_8188GTV 0xBC
  282. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8188GTV 0xBD
  283. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8188GTV 0xBF
  284. #define EEPROM_RF_BOARD_OPTION_8188GTV 0xC1
  285. #define EEPROM_FEATURE_OPTION_8188GTV 0xC2
  286. #define EEPROM_RF_BT_SETTING_8188GTV 0xC3
  287. #define EEPROM_VERSION_8188GTV 0xC4
  288. #define EEPROM_CustomID_8188GTV 0xC5
  289. #define EEPROM_TX_BBSWING_2G_8188GTV 0xC6
  290. #define EEPROM_TX_PWR_CALIBRATE_RATE_8188GTV 0xC8
  291. #define EEPROM_RF_ANTENNA_OPT_8188GTV 0xC9
  292. #define EEPROM_RFE_OPTION_8188GTV 0xCA
  293. #define EEPROM_COUNTRY_CODE_8188GTV 0xCB
  294. #define EEPROM_CUSTOMER_ID_8188GTV 0x7F
  295. #define EEPROM_SUBCUSTOMER_ID_8188GTV 0x59
  296. /* RTL8188GTVU */
  297. #define EEPROM_MAC_ADDR_8188GTVU 0xD7
  298. #define EEPROM_VID_8188GTVU 0xD0
  299. #define EEPROM_PID_8188GTVU 0xD2
  300. #define EEPROM_PA_TYPE_8188GTVU 0xBC
  301. #define EEPROM_LNA_TYPE_2G_8188GTVU 0xBD
  302. #define EEPROM_USB_OPTIONAL_FUNCTION0_8188GTVU 0xD4
  303. /* RTL8188GTVS */
  304. #define EEPROM_MAC_ADDR_8188GTVS 0x11A
  305. #define EEPROM_Voltage_ADDR_8188GTV 0x8
  306. /* ****************************************************
  307. * EEPROM/Efuse PG Offset for 8723BE/8723BU/8723BS
  308. * *****************************************************/
  309. #define EEPROM_ChannelPlan_8723B 0xB8
  310. #define EEPROM_XTAL_8723B 0xB9
  311. #define EEPROM_THERMAL_METER_8723B 0xBA
  312. #define EEPROM_IQK_LCK_8723B 0xBB
  313. #define EEPROM_2G_5G_PA_TYPE_8723B 0xBC
  314. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723B 0xBD
  315. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723B 0xBF
  316. #define EEPROM_RF_BOARD_OPTION_8723B 0xC1
  317. #define EEPROM_FEATURE_OPTION_8723B 0xC2
  318. #define EEPROM_RF_BT_SETTING_8723B 0xC3
  319. #define EEPROM_VERSION_8723B 0xC4
  320. #define EEPROM_CustomID_8723B 0xC5
  321. #define EEPROM_TX_BBSWING_2G_8723B 0xC6
  322. #define EEPROM_TX_PWR_CALIBRATE_RATE_8723B 0xC8
  323. #define EEPROM_RF_ANTENNA_OPT_8723B 0xC9
  324. #define EEPROM_RFE_OPTION_8723B 0xCA
  325. #define EEPROM_COUNTRY_CODE_8723B 0xCB
  326. /* RTL8723BE */
  327. #define EEPROM_MAC_ADDR_8723BE 0xD0
  328. #define EEPROM_VID_8723BE 0xD6
  329. #define EEPROM_DID_8723BE 0xD8
  330. #define EEPROM_SVID_8723BE 0xDA
  331. #define EEPROM_SMID_8723BE 0xDC
  332. /* RTL8723BU */
  333. #define EEPROM_MAC_ADDR_8723BU 0x107
  334. #define EEPROM_VID_8723BU 0x100
  335. #define EEPROM_PID_8723BU 0x102
  336. #define EEPROM_PA_TYPE_8723BU 0xBC
  337. #define EEPROM_LNA_TYPE_2G_8723BU 0xBD
  338. /* RTL8723BS */
  339. #define EEPROM_MAC_ADDR_8723BS 0x11A
  340. #define EEPROM_Voltage_ADDR_8723B 0x8
  341. /* ****************************************************
  342. * EEPROM/Efuse PG Offset for 8703B
  343. * **************************************************** */
  344. #define GET_PG_KFREE_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
  345. #define GET_PG_KFREE_THERMAL_K_ON_8703B(_pg_m) LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  346. #define PPG_BB_GAIN_2G_TXA_OFFSET_8703B 0xEE
  347. #define PPG_THERMAL_OFFSET_8703B 0xEF
  348. #define EEPROM_ChannelPlan_8703B 0xB8
  349. #define EEPROM_XTAL_8703B 0xB9
  350. #define EEPROM_THERMAL_METER_8703B 0xBA
  351. #define EEPROM_IQK_LCK_8703B 0xBB
  352. #define EEPROM_2G_5G_PA_TYPE_8703B 0xBC
  353. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8703B 0xBD
  354. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8703B 0xBF
  355. #define EEPROM_RF_BOARD_OPTION_8703B 0xC1
  356. #define EEPROM_FEATURE_OPTION_8703B 0xC2
  357. #define EEPROM_RF_BT_SETTING_8703B 0xC3
  358. #define EEPROM_VERSION_8703B 0xC4
  359. #define EEPROM_CustomID_8703B 0xC5
  360. #define EEPROM_TX_BBSWING_2G_8703B 0xC6
  361. #define EEPROM_TX_PWR_CALIBRATE_RATE_8703B 0xC8
  362. #define EEPROM_RF_ANTENNA_OPT_8703B 0xC9
  363. #define EEPROM_RFE_OPTION_8703B 0xCA
  364. #define EEPROM_COUNTRY_CODE_8703B 0xCB
  365. /* RTL8703BU */
  366. #define EEPROM_MAC_ADDR_8703BU 0x107
  367. #define EEPROM_VID_8703BU 0x100
  368. #define EEPROM_PID_8703BU 0x102
  369. #define EEPROM_USB_OPTIONAL_FUNCTION0_8703BU 0x104
  370. #define EEPROM_PA_TYPE_8703BU 0xBC
  371. #define EEPROM_LNA_TYPE_2G_8703BU 0xBD
  372. /* RTL8703BS */
  373. #define EEPROM_MAC_ADDR_8703BS 0x11A
  374. #define EEPROM_Voltage_ADDR_8703B 0x8
  375. /*
  376. * ====================================================
  377. * EEPROM/Efuse PG Offset for 8822B
  378. * ====================================================
  379. */
  380. #define EEPROM_ChannelPlan_8822B 0xB8
  381. #define EEPROM_XTAL_8822B 0xB9
  382. #define EEPROM_THERMAL_METER_8822B 0xBA
  383. #define EEPROM_IQK_LCK_8822B 0xBB
  384. #define EEPROM_2G_5G_PA_TYPE_8822B 0xBC
  385. /* PATH A & PATH B */
  386. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBD
  387. /* PATH C & PATH D */
  388. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8822B 0xBE
  389. /* PATH A & PATH B */
  390. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8822B 0xBF
  391. /* PATH C & PATH D */
  392. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8822B 0xC0
  393. #define EEPROM_RF_BOARD_OPTION_8822B 0xC1
  394. #define EEPROM_FEATURE_OPTION_8822B 0xC2
  395. #define EEPROM_RF_BT_SETTING_8822B 0xC3
  396. #define EEPROM_VERSION_8822B 0xC4
  397. #define EEPROM_CustomID_8822B 0xC5
  398. #define EEPROM_TX_BBSWING_2G_8822B 0xC6
  399. #define EEPROM_TX_PWR_CALIBRATE_RATE_8822B 0xC8
  400. #define EEPROM_RF_ANTENNA_OPT_8822B 0xC9
  401. #define EEPROM_RFE_OPTION_8822B 0xCA
  402. #define EEPROM_COUNTRY_CODE_8822B 0xCB
  403. /* RTL8822BU */
  404. #define EEPROM_MAC_ADDR_8822BU 0x107
  405. #define EEPROM_VID_8822BU 0x100
  406. #define EEPROM_PID_8822BU 0x102
  407. #define EEPROM_USB_OPTIONAL_FUNCTION0_8822BU 0x104
  408. #define EEPROM_USB_MODE_8822BU 0x06
  409. /* RTL8822BS */
  410. #define EEPROM_MAC_ADDR_8822BS 0x11A
  411. /* RTL8822BE */
  412. #define EEPROM_MAC_ADDR_8822BE 0xD0
  413. /*
  414. * ====================================================
  415. * EEPROM/Efuse PG Offset for 8821C
  416. * ====================================================
  417. */
  418. #define EEPROM_CHANNEL_PLAN_8821C 0xB8
  419. #define EEPROM_XTAL_8821C 0xB9
  420. #define EEPROM_THERMAL_METER_8821C 0xBA
  421. #define EEPROM_IQK_LCK_8821C 0xBB
  422. #define EEPROM_2G_5G_PA_TYPE_8821C 0xBC
  423. /* PATH A & PATH B */
  424. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBD
  425. /* PATH C & PATH D */
  426. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_CD_8821C 0xBE
  427. /* PATH A & PATH B */
  428. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_AB_8821C 0xBF
  429. /* PATH C & PATH D */
  430. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_CD_8821C 0xC0
  431. #define EEPROM_RF_BOARD_OPTION_8821C 0xC1
  432. #define EEPROM_FEATURE_OPTION_8821C 0xC2
  433. #define EEPROM_RF_BT_SETTING_8821C 0xC3
  434. #define EEPROM_VERSION_8821C 0xC4
  435. #define EEPROM_CUSTOMER_ID_8821C 0xC5
  436. #define EEPROM_TX_BBSWING_2G_8821C 0xC6
  437. #define EEPROM_TX_BBSWING_5G_8821C 0xC7
  438. #define EEPROM_TX_PWR_CALIBRATE_RATE_8821C 0xC8
  439. #define EEPROM_RF_ANTENNA_OPT_8821C 0xC9
  440. #define EEPROM_RFE_OPTION_8821C 0xCA
  441. #define EEPROM_COUNTRY_CODE_8821C 0xCB
  442. /* RTL8821CU */
  443. #define EEPROM_MAC_ADDR_8821CU 0x107
  444. #define EEPROM_VID_8821CU 0x100
  445. #define EEPROM_PID_8821CU 0x102
  446. #define EEPROM_USB_OPTIONAL_FUNCTION0_8821CU 0x104
  447. #define EEPROM_USB_MODE_8821CU 0x06
  448. /* RTL8821CS */
  449. #define EEPROM_MAC_ADDR_8821CS 0x11A
  450. /* RTL8821CE */
  451. #define EEPROM_MAC_ADDR_8821CE 0xD0
  452. /* ****************************************************
  453. * EEPROM/Efuse PG Offset for 8723D
  454. * **************************************************** */
  455. #define GET_PG_KFREE_ON_8723D(_pg_m) \
  456. LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC1, 4, 1)
  457. #define GET_PG_KFREE_THERMAL_K_ON_8723D(_pg_m) \
  458. LE_BITS_TO_1BYTE(((u8 *)(_pg_m)) + 0xC8, 5, 1)
  459. #define PPG_8723D_S1 0
  460. #define PPG_8723D_S0 1
  461. #define PPG_BB_GAIN_2G_TXA_OFFSET_8723D 0xEE
  462. #define PPG_BB_GAIN_2G_TX_OFFSET_8723D 0x1EE
  463. #define PPG_THERMAL_OFFSET_8723D 0xEF
  464. #define EEPROM_ChannelPlan_8723D 0xB8
  465. #define EEPROM_XTAL_8723D 0xB9
  466. #define EEPROM_THERMAL_METER_8723D 0xBA
  467. #define EEPROM_IQK_LCK_8723D 0xBB
  468. #define EEPROM_2G_5G_PA_TYPE_8723D 0xBC
  469. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8723D 0xBD
  470. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8723D 0xBF
  471. #define EEPROM_RF_BOARD_OPTION_8723D 0xC1
  472. #define EEPROM_FEATURE_OPTION_8723D 0xC2
  473. #define EEPROM_RF_BT_SETTING_8723D 0xC3
  474. #define EEPROM_VERSION_8723D 0xC4
  475. #define EEPROM_CustomID_8723D 0xC5
  476. #define EEPROM_TX_BBSWING_2G_8723D 0xC6
  477. #define EEPROM_TX_PWR_CALIBRATE_RATE_8723D 0xC8
  478. #define EEPROM_RF_ANTENNA_OPT_8723D 0xC9
  479. #define EEPROM_RFE_OPTION_8723D 0xCA
  480. #define EEPROM_COUNTRY_CODE_8723D 0xCB
  481. /* RTL8723DE */
  482. #define EEPROM_MAC_ADDR_8723DE 0xD0
  483. #define EEPROM_VID_8723DE 0xD6
  484. #define EEPROM_DID_8723DE 0xD8
  485. #define EEPROM_SVID_8723DE 0xDA
  486. #define EEPROM_SMID_8723DE 0xDC
  487. /* RTL8723DU */
  488. #define EEPROM_MAC_ADDR_8723DU 0x107
  489. #define EEPROM_VID_8723DU 0x100
  490. #define EEPROM_PID_8723DU 0x102
  491. #define EEPROM_USB_OPTIONAL_FUNCTION0_8723DU 0x104
  492. /* RTL8723BS */
  493. #define EEPROM_MAC_ADDR_8723DS 0x11A
  494. #define EEPROM_Voltage_ADDR_8723D 0x8
  495. /* ****************************************************
  496. * EEPROM/Efuse PG Offset for 8192F
  497. * **************************************************** */
  498. #define EEPROM_ChannelPlan_8192F 0xB8
  499. #define EEPROM_XTAL_8192F 0xB9
  500. #define EEPROM_THERMAL_METER_8192F 0xBA
  501. #define EEPROM_IQK_LCK_8192F 0xBB
  502. #define EEPROM_2G_5G_PA_TYPE_8192F 0xBC
  503. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8192F 0xBD
  504. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8192F 0xBF
  505. #define EEPROM_RF_BOARD_OPTION_8192F 0xC1
  506. #define EEPROM_FEATURE_OPTION_8192F 0xC2
  507. #define EEPROM_RF_BT_SETTING_8192F 0xC3
  508. #define EEPROM_VERSION_8192F 0xC4
  509. #define EEPROM_CustomID_8192F 0xC5
  510. #define EEPROM_TX_BBSWING_2G_8192F 0xC6
  511. #define EEPROM_TX_BBSWING_5G_8192F 0xC7
  512. #define EEPROM_TX_PWR_CALIBRATE_RATE_8192F 0xC8
  513. #define EEPROM_RF_ANTENNA_OPT_8192F 0xC9
  514. #define EEPROM_RFE_OPTION_8192F 0xCA
  515. #define EEPROM_COUNTRY_CODE_8192F 0xCB
  516. /*RTL8192FS*/
  517. #define EEPROM_MAC_ADDR_8192FS 0x11A
  518. #define EEPROM_Voltage_ADDR_8192F 0x8
  519. /* RTL8192FU */
  520. #define EEPROM_MAC_ADDR_8192FU 0x107
  521. #define EEPROM_VID_8192FU 0x100
  522. #define EEPROM_PID_8192FU 0x102
  523. #define EEPROM_USB_OPTIONAL_FUNCTION0_8192FU 0x104
  524. /* RTL8192FE */
  525. #define EEPROM_MAC_ADDR_8192FE 0xD0
  526. #define EEPROM_VID_8192FE 0xD6
  527. #define EEPROM_DID_8192FE 0xD8
  528. #define EEPROM_SVID_8192FE 0xDA
  529. #define EEPROM_SMID_8192FE 0xDC
  530. /* ****************************************************
  531. * EEPROM/Efuse PG Offset for 8710B
  532. * **************************************************** */
  533. #define RTL_EEPROM_ID_8710B 0x8195
  534. #define EEPROM_Default_ThermalMeter_8710B 0x1A
  535. #define EEPROM_CHANNEL_PLAN_8710B 0xC8
  536. #define EEPROM_XTAL_8710B 0xC9
  537. #define EEPROM_THERMAL_METER_8710B 0xCA
  538. #define EEPROM_IQK_LCK_8710B 0xCB
  539. #define EEPROM_2G_5G_PA_TYPE_8710B 0xCC
  540. #define EEPROM_2G_LNA_TYPE_GAIN_SEL_8710B 0xCD
  541. #define EEPROM_5G_LNA_TYPE_GAIN_SEL_8710B 0xCF
  542. #define EEPROM_TX_KFREE_8710B 0xEE //Physical Efuse Address
  543. #define EEPROM_THERMAL_8710B 0xEF //Physical Efuse Address
  544. #define EEPROM_PACKAGE_TYPE_8710B 0xF8 //Physical Efuse Address
  545. #define EEPROM_RF_BOARD_OPTION_8710B 0x131
  546. #define EEPROM_RF_FEATURE_OPTION_8710B 0x132
  547. #define EEPROM_RF_BT_SETTING_8710B 0x133
  548. #define EEPROM_VERSION_8710B 0x134
  549. #define EEPROM_CUSTOM_ID_8710B 0x135
  550. #define EEPROM_TX_BBSWING_2G_8710B 0x136
  551. #define EEPROM_TX_BBSWING_5G_8710B 0x137
  552. #define EEPROM_TX_PWR_CALIBRATE_RATE_8710B 0x138
  553. #define EEPROM_RF_ANTENNA_OPT_8710B 0x139
  554. #define EEPROM_RFE_OPTION_8710B 0x13A
  555. #define EEPROM_COUNTRY_CODE_8710B 0x13B
  556. #define EEPROM_COUNTRY_CODE_2_8710B 0x13C
  557. #define EEPROM_MAC_ADDR_8710B 0x11A
  558. #define EEPROM_VID_8710BU 0x1C0
  559. #define EEPROM_PID_8710BU 0x1C2
  560. /* ****************************************************
  561. * EEPROM/Efuse Value Type
  562. * **************************************************** */
  563. #define EETYPE_TX_PWR 0x0
  564. #define EETYPE_MAX_RFE_8192F 0x31
  565. /* ****************************************************
  566. * EEPROM/Efuse Default Value
  567. * **************************************************** */
  568. #define EEPROM_CID_DEFAULT 0x0
  569. #define EEPROM_CID_DEFAULT_EXT 0xFF /* Reserved for Realtek */
  570. #define EEPROM_CID_TOSHIBA 0x4
  571. #define EEPROM_CID_CCX 0x10
  572. #define EEPROM_CID_QMI 0x0D
  573. #define EEPROM_CID_WHQL 0xFE
  574. #define EEPROM_CHANNEL_PLAN_FCC 0x0
  575. #define EEPROM_CHANNEL_PLAN_IC 0x1
  576. #define EEPROM_CHANNEL_PLAN_ETSI 0x2
  577. #define EEPROM_CHANNEL_PLAN_SPAIN 0x3
  578. #define EEPROM_CHANNEL_PLAN_FRANCE 0x4
  579. #define EEPROM_CHANNEL_PLAN_MKK 0x5
  580. #define EEPROM_CHANNEL_PLAN_MKK1 0x6
  581. #define EEPROM_CHANNEL_PLAN_ISRAEL 0x7
  582. #define EEPROM_CHANNEL_PLAN_TELEC 0x8
  583. #define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9
  584. #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA
  585. #define EEPROM_CHANNEL_PLAN_NCC_TAIWAN 0xB
  586. #define EEPROM_CHANNEL_PLAN_CHIAN 0XC
  587. #define EEPROM_CHANNEL_PLAN_SINGAPORE_INDIA_MEXICO 0XD
  588. #define EEPROM_CHANNEL_PLAN_KOREA 0xE
  589. #define EEPROM_CHANNEL_PLAN_TURKEY 0xF
  590. #define EEPROM_CHANNEL_PLAN_JAPAN 0x10
  591. #define EEPROM_CHANNEL_PLAN_FCC_NO_DFS 0x11
  592. #define EEPROM_CHANNEL_PLAN_JAPAN_NO_DFS 0x12
  593. #define EEPROM_CHANNEL_PLAN_WORLD_WIDE_5G 0x13
  594. #define EEPROM_CHANNEL_PLAN_TAIWAN_NO_DFS 0x14
  595. #define EEPROM_USB_OPTIONAL1 0xE
  596. #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
  597. #define RTL_EEPROM_ID 0x8129
  598. #define EEPROM_Default_TSSI 0x0
  599. #define EEPROM_Default_BoardType 0x02
  600. #define EEPROM_Default_ThermalMeter 0x12
  601. #define EEPROM_Default_ThermalMeter_92SU 0x7
  602. #define EEPROM_Default_ThermalMeter_88E 0x18
  603. #define EEPROM_Default_ThermalMeter_8812 0x18
  604. #define EEPROM_Default_ThermalMeter_8192E 0x1A
  605. #define EEPROM_Default_ThermalMeter_8723B 0x18
  606. #define EEPROM_Default_ThermalMeter_8703B 0x18
  607. #define EEPROM_Default_ThermalMeter_8723D 0x18
  608. #define EEPROM_Default_ThermalMeter_8188F 0x18
  609. #define EEPROM_Default_ThermalMeter_8188GTV 0x18
  610. #define EEPROM_Default_ThermalMeter_8814A 0x18
  611. #define EEPROM_Default_ThermalMeter_8192F 0x1A
  612. #define EEPROM_Default_CrystalCap 0x0
  613. #define EEPROM_Default_CrystalCap_8723A 0x20
  614. #define EEPROM_Default_CrystalCap_88E 0x20
  615. #define EEPROM_Default_CrystalCap_8812 0x20
  616. #define EEPROM_Default_CrystalCap_8814 0x20
  617. #define EEPROM_Default_CrystalCap_8192E 0x20
  618. #define EEPROM_Default_CrystalCap_8723B 0x20
  619. #define EEPROM_Default_CrystalCap_8703B 0x20
  620. #define EEPROM_Default_CrystalCap_8723D 0x20
  621. #define EEPROM_Default_CrystalCap_8188F 0x20
  622. #define EEPROM_Default_CrystalCap_8188GTV 0x20
  623. #define EEPROM_Default_CrystalCap_8192F 0x20
  624. #define EEPROM_Default_CrystalFreq 0x0
  625. #define EEPROM_Default_TxPowerLevel_92C 0x22
  626. #define EEPROM_Default_TxPowerLevel_2G 0x2C
  627. #define EEPROM_Default_TxPowerLevel_5G 0x22
  628. #define EEPROM_Default_TxPowerLevel 0x22
  629. #define EEPROM_Default_HT40_2SDiff 0x0
  630. #define EEPROM_Default_HT20_Diff 2
  631. #define EEPROM_Default_LegacyHTTxPowerDiff 0x3
  632. #define EEPROM_Default_LegacyHTTxPowerDiff_92C 0x3
  633. #define EEPROM_Default_LegacyHTTxPowerDiff_92D 0x4
  634. #define EEPROM_Default_HT40_PwrMaxOffset 0
  635. #define EEPROM_Default_HT20_PwrMaxOffset 0
  636. #define EEPROM_Default_PID 0x1234
  637. #define EEPROM_Default_VID 0x5678
  638. #define EEPROM_Default_CustomerID 0xAB
  639. #define EEPROM_Default_CustomerID_8188E 0x00
  640. #define EEPROM_Default_SubCustomerID 0xCD
  641. #define EEPROM_Default_Version 0
  642. #define EEPROM_Default_externalPA_C9 0x00
  643. #define EEPROM_Default_externalPA_CC 0xFF
  644. #define EEPROM_Default_internalPA_SP3T_C9 0xAA
  645. #define EEPROM_Default_internalPA_SP3T_CC 0xAF
  646. #define EEPROM_Default_internalPA_SPDT_C9 0xAA
  647. #ifdef CONFIG_PCI_HCI
  648. #define EEPROM_Default_internalPA_SPDT_CC 0xA0
  649. #else
  650. #define EEPROM_Default_internalPA_SPDT_CC 0xFA
  651. #endif
  652. #define EEPROM_Default_PAType 0
  653. #define EEPROM_Default_LNAType 0
  654. /* New EFUSE default value */
  655. #define EEPROM_DEFAULT_CHANNEL_PLAN 0x7F
  656. #define EEPROM_DEFAULT_BOARD_OPTION 0x00
  657. #define EEPROM_DEFAULT_RFE_OPTION_8192E 0xFF
  658. #define EEPROM_DEFAULT_RFE_OPTION_8188E 0xFF
  659. #define EEPROM_DEFAULT_RFE_OPTION 0x04
  660. #define EEPROM_DEFAULT_FEATURE_OPTION 0x00
  661. #define EEPROM_DEFAULT_BT_OPTION 0x10
  662. #define EEPROM_DEFAULT_TX_CALIBRATE_RATE 0x00
  663. /* PCIe related */
  664. #define EEPROM_PCIE_DEV_CAP_01 0xE0 /* Express device capability in PCIe configuration space, i.e., map to offset 0x74 */
  665. #define EEPROM_PCIE_DEV_CAP_02 0xE1 /* Express device capability in PCIe configuration space, i.e., map to offset 0x75 */
  666. /*
  667. * For VHT series TX power by rate table.
  668. * VHT TX power by rate off setArray =
  669. * Band:-2G&5G = 0 / 1
  670. * RF: at most 4*4 = ABCD=0/1/2/3
  671. * CCK=0 OFDM=1/2 HT-MCS 0-15=3/4/56 VHT=7/8/9/10/11
  672. * */
  673. #define TX_PWR_BY_RATE_NUM_BAND 2
  674. #define TX_PWR_BY_RATE_NUM_RF 4
  675. #define TX_PWR_BY_RATE_NUM_RATE 84
  676. #define TXPWR_LMT_MAX_RF 4
  677. /* ----------------------------------------------------------------------------
  678. * EEPROM/EFUSE data structure definition.
  679. * ---------------------------------------------------------------------------- */
  680. /* For 88E new structure */
  681. /*
  682. 2.4G:
  683. {
  684. {1,2},
  685. {3,4,5},
  686. {6,7,8},
  687. {9,10,11},
  688. {12,13},
  689. {14}
  690. }
  691. 5G:
  692. {
  693. {36,38,40},
  694. {44,46,48},
  695. {52,54,56},
  696. {60,62,64},
  697. {100,102,104},
  698. {108,110,112},
  699. {116,118,120},
  700. {124,126,128},
  701. {132,134,136},
  702. {140,142,144},
  703. {149,151,153},
  704. {157,159,161},
  705. {173,175,177},
  706. }
  707. */
  708. #define MAX_RF_PATH 4
  709. #define RF_PATH_MAX MAX_RF_PATH
  710. #define MAX_CHNL_GROUP_24G 6
  711. #define MAX_CHNL_GROUP_5G 14
  712. /* It must always set to 4, otherwise read efuse table sequence will be wrong. */
  713. #define MAX_TX_COUNT 4
  714. typedef struct _TxPowerInfo24G {
  715. u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
  716. u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
  717. /* If only one tx, only BW20 and OFDM are used. */
  718. s8 CCK_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  719. s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  720. s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  721. s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  722. } TxPowerInfo24G, *PTxPowerInfo24G;
  723. typedef struct _TxPowerInfo5G {
  724. u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_5G];
  725. /* If only one tx, only BW20, OFDM, BW80 and BW160 are used. */
  726. s8 OFDM_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  727. s8 BW20_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  728. s8 BW40_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  729. s8 BW80_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  730. s8 BW160_Diff[MAX_RF_PATH][MAX_TX_COUNT];
  731. } TxPowerInfo5G, *PTxPowerInfo5G;
  732. typedef enum _BT_Ant_NUM {
  733. Ant_x2 = 0,
  734. Ant_x1 = 1
  735. } BT_Ant_NUM, *PBT_Ant_NUM;
  736. typedef enum _BT_CoType {
  737. BT_2WIRE = 0,
  738. BT_ISSC_3WIRE = 1,
  739. BT_ACCEL = 2,
  740. BT_CSR_BC4 = 3,
  741. BT_CSR_BC8 = 4,
  742. BT_RTL8756 = 5,
  743. BT_RTL8723A = 6,
  744. BT_RTL8821 = 7,
  745. BT_RTL8723B = 8,
  746. BT_RTL8192E = 9,
  747. BT_RTL8814A = 10,
  748. BT_RTL8812A = 11,
  749. BT_RTL8703B = 12,
  750. BT_RTL8822B = 13,
  751. BT_RTL8723D = 14,
  752. BT_RTL8821C = 15,
  753. BT_RTL8192F = 16,
  754. } BT_CoType, *PBT_CoType;
  755. typedef enum _BT_RadioShared {
  756. BT_Radio_Shared = 0,
  757. BT_Radio_Individual = 1,
  758. } BT_RadioShared, *PBT_RadioShared;
  759. #endif