halbtc8192e2ant.c 132 KB

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  1. /* ************************************************************
  2. * Description:
  3. *
  4. * This file is for RTL8192E Co-exist mechanism
  5. *
  6. * History
  7. * 2012/11/15 Cosa first check in.
  8. *
  9. * ************************************************************ */
  10. /* ************************************************************
  11. * include files
  12. * ************************************************************ */
  13. #include "mp_precomp.h"
  14. #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  15. #if (RTL8192E_SUPPORT == 1)
  16. /* ************************************************************
  17. * Global variables, these are static variables
  18. * ************************************************************ */
  19. static u8 *trace_buf = &gl_btc_trace_buf[0];
  20. static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
  21. static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
  22. static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
  23. static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
  24. const char *const glbt_info_src_8192e_2ant[] = {
  25. "BT Info[wifi fw]",
  26. "BT Info[bt rsp]",
  27. "BT Info[bt auto report]",
  28. };
  29. /* ************************************************************
  30. * BtCoex Version Format:
  31. * 1. date : glcoex_ver_date_XXXXX_1ant
  32. * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
  33. * 3. BtCoexVersion : glcoex_ver_btdesired_XXXXX_1ant
  34. * 4. others : glcoex_ver_XXXXXX_XXXXX_1ant
  35. *
  36. * Variable should be indicated IC and Antenna numbers !!!
  37. * Please strictly follow this order and naming style !!!
  38. *
  39. * ************************************************************ */
  40. u32 glcoex_ver_date_8192e_2ant = 20161024;
  41. u32 glcoex_ver_8192e_2ant = 0x45;
  42. u32 glcoex_ver_btdesired_8192e_2ant = 0x03;
  43. /*1.BT FW update BLE channel map with high priority*/
  44. /* ************************************************************
  45. * local function proto type if needed
  46. * ************************************************************
  47. * ************************************************************
  48. * local function start with halbtc8192e2ant_
  49. * ************************************************************ */
  50. u8 halbtc8192e2ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  51. {
  52. s32 bt_rssi = 0;
  53. u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
  54. bt_rssi = coex_sta->bt_rssi;
  55. if (level_num == 2) {
  56. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  57. (coex_sta->pre_bt_rssi_state ==
  58. BTC_RSSI_STATE_STAY_LOW)) {
  59. if (bt_rssi >= (rssi_thresh +
  60. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  61. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  62. else
  63. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  64. } else {
  65. if (bt_rssi < rssi_thresh)
  66. bt_rssi_state = BTC_RSSI_STATE_LOW;
  67. else
  68. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  69. }
  70. } else if (level_num == 3) {
  71. if (rssi_thresh > rssi_thresh1) {
  72. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  73. "[BTCoex], BT Rssi thresh error!!\n");
  74. BTC_TRACE(trace_buf);
  75. return coex_sta->pre_bt_rssi_state;
  76. }
  77. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  78. (coex_sta->pre_bt_rssi_state ==
  79. BTC_RSSI_STATE_STAY_LOW)) {
  80. if (bt_rssi >= (rssi_thresh +
  81. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  82. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  83. else
  84. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  85. } else if ((coex_sta->pre_bt_rssi_state ==
  86. BTC_RSSI_STATE_MEDIUM) ||
  87. (coex_sta->pre_bt_rssi_state ==
  88. BTC_RSSI_STATE_STAY_MEDIUM)) {
  89. if (bt_rssi >= (rssi_thresh1 +
  90. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  91. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  92. else if (bt_rssi < rssi_thresh)
  93. bt_rssi_state = BTC_RSSI_STATE_LOW;
  94. else
  95. bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  96. } else {
  97. if (bt_rssi < rssi_thresh1)
  98. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  99. else
  100. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  101. }
  102. }
  103. coex_sta->pre_bt_rssi_state = bt_rssi_state;
  104. return bt_rssi_state;
  105. }
  106. u8 halbtc8192e2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
  107. IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
  108. {
  109. s32 wifi_rssi = 0;
  110. u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
  111. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  112. if (level_num == 2) {
  113. if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
  114. ||
  115. (coex_sta->pre_wifi_rssi_state[index] ==
  116. BTC_RSSI_STATE_STAY_LOW)) {
  117. if (wifi_rssi >= (rssi_thresh +
  118. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  119. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  120. else
  121. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  122. } else {
  123. if (wifi_rssi < rssi_thresh)
  124. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  125. else
  126. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  127. }
  128. } else if (level_num == 3) {
  129. if (rssi_thresh > rssi_thresh1) {
  130. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  131. "[BTCoex], wifi RSSI thresh error!!\n");
  132. BTC_TRACE(trace_buf);
  133. return coex_sta->pre_wifi_rssi_state[index];
  134. }
  135. if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
  136. ||
  137. (coex_sta->pre_wifi_rssi_state[index] ==
  138. BTC_RSSI_STATE_STAY_LOW)) {
  139. if (wifi_rssi >= (rssi_thresh +
  140. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  141. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  142. else
  143. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  144. } else if ((coex_sta->pre_wifi_rssi_state[index] ==
  145. BTC_RSSI_STATE_MEDIUM) ||
  146. (coex_sta->pre_wifi_rssi_state[index] ==
  147. BTC_RSSI_STATE_STAY_MEDIUM)) {
  148. if (wifi_rssi >= (rssi_thresh1 +
  149. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
  150. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  151. else if (wifi_rssi < rssi_thresh)
  152. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  153. else
  154. wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  155. } else {
  156. if (wifi_rssi < rssi_thresh1)
  157. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  158. else
  159. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  160. }
  161. }
  162. coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
  163. return wifi_rssi_state;
  164. }
  165. void halbtc8192e2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  166. {
  167. static u32 bt_disable_cnt = 0;
  168. boolean bt_active = true, bt_disabled = false;
  169. /* This function check if bt is disabled */
  170. if (coex_sta->high_priority_tx == 0 &&
  171. coex_sta->high_priority_rx == 0 &&
  172. coex_sta->low_priority_tx == 0 &&
  173. coex_sta->low_priority_rx == 0)
  174. bt_active = false;
  175. if (coex_sta->high_priority_tx == 0xffff &&
  176. coex_sta->high_priority_rx == 0xffff &&
  177. coex_sta->low_priority_tx == 0xffff &&
  178. coex_sta->low_priority_rx == 0xffff)
  179. bt_active = false;
  180. if (bt_active) {
  181. bt_disable_cnt = 0;
  182. bt_disabled = false;
  183. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  184. &bt_disabled);
  185. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  186. "[BTCoex], BT is enabled !!\n");
  187. BTC_TRACE(trace_buf);
  188. } else {
  189. bt_disable_cnt++;
  190. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  191. "[BTCoex], bt all counters=0, %d times!!\n",
  192. bt_disable_cnt);
  193. BTC_TRACE(trace_buf);
  194. if (bt_disable_cnt >= 2) {
  195. bt_disabled = true;
  196. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  197. &bt_disabled);
  198. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  199. "[BTCoex], BT is disabled !!\n");
  200. BTC_TRACE(trace_buf);
  201. }
  202. }
  203. if (coex_sta->bt_disabled != bt_disabled) {
  204. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  205. "[BTCoex], BT is from %s to %s!!\n",
  206. (coex_sta->bt_disabled ? "disabled" : "enabled"),
  207. (bt_disabled ? "disabled" : "enabled"));
  208. BTC_TRACE(trace_buf);
  209. coex_sta->bt_disabled = bt_disabled;
  210. /* if (!bt_disabled) {
  211. } else {
  212. } */
  213. }
  214. }
  215. u32 halbtc8192e2ant_decide_ra_mask(IN struct btc_coexist *btcoexist,
  216. IN u8 ss_type, IN u32 ra_mask_type)
  217. {
  218. u32 dis_ra_mask = 0x0;
  219. switch (ra_mask_type) {
  220. case 0: /* normal mode */
  221. if (ss_type == 2)
  222. dis_ra_mask = 0x0; /* enable 2ss */
  223. else
  224. dis_ra_mask = 0xfff00000; /* disable 2ss */
  225. break;
  226. case 1: /* disable cck 1/2 */
  227. if (ss_type == 2)
  228. dis_ra_mask = 0x00000003; /* enable 2ss */
  229. else
  230. dis_ra_mask = 0xfff00003; /* disable 2ss */
  231. break;
  232. case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
  233. if (ss_type == 2)
  234. dis_ra_mask = 0x0001f1f7; /* enable 2ss */
  235. else
  236. dis_ra_mask = 0xfff1f1f7; /* disable 2ss */
  237. break;
  238. default:
  239. break;
  240. }
  241. return dis_ra_mask;
  242. }
  243. void halbtc8192e2ant_update_ra_mask(IN struct btc_coexist *btcoexist,
  244. IN boolean force_exec, IN u32 dis_rate_mask)
  245. {
  246. coex_dm->cur_ra_mask = dis_rate_mask;
  247. if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
  248. btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
  249. &coex_dm->cur_ra_mask);
  250. coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
  251. }
  252. void halbtc8192e2ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
  253. IN boolean force_exec, IN u8 type)
  254. {
  255. boolean wifi_under_b_mode = false;
  256. coex_dm->cur_arfr_type = type;
  257. if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
  258. switch (coex_dm->cur_arfr_type) {
  259. case 0: /* normal mode */
  260. btcoexist->btc_write_4byte(btcoexist, 0x430,
  261. coex_dm->backup_arfr_cnt1);
  262. btcoexist->btc_write_4byte(btcoexist, 0x434,
  263. coex_dm->backup_arfr_cnt2);
  264. break;
  265. case 1:
  266. btcoexist->btc_get(btcoexist,
  267. BTC_GET_BL_WIFI_UNDER_B_MODE,
  268. &wifi_under_b_mode);
  269. if (wifi_under_b_mode) {
  270. btcoexist->btc_write_4byte(btcoexist,
  271. 0x430, 0x0);
  272. btcoexist->btc_write_4byte(btcoexist,
  273. 0x434, 0x01010101);
  274. } else {
  275. btcoexist->btc_write_4byte(btcoexist,
  276. 0x430, 0x0);
  277. btcoexist->btc_write_4byte(btcoexist,
  278. 0x434, 0x04030201);
  279. }
  280. break;
  281. default:
  282. break;
  283. }
  284. }
  285. coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
  286. }
  287. void halbtc8192e2ant_retry_limit(IN struct btc_coexist *btcoexist,
  288. IN boolean force_exec, IN u8 type)
  289. {
  290. coex_dm->cur_retry_limit_type = type;
  291. if (force_exec ||
  292. (coex_dm->pre_retry_limit_type !=
  293. coex_dm->cur_retry_limit_type)) {
  294. switch (coex_dm->cur_retry_limit_type) {
  295. case 0: /* normal mode */
  296. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  297. coex_dm->backup_retry_limit);
  298. break;
  299. case 1: /* retry limit=8 */
  300. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  301. 0x0808);
  302. break;
  303. default:
  304. break;
  305. }
  306. }
  307. coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
  308. }
  309. void halbtc8192e2ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
  310. IN boolean force_exec, IN u8 type)
  311. {
  312. coex_dm->cur_ampdu_time_type = type;
  313. if (force_exec ||
  314. (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
  315. switch (coex_dm->cur_ampdu_time_type) {
  316. case 0: /* normal mode */
  317. btcoexist->btc_write_1byte(btcoexist, 0x456,
  318. coex_dm->backup_ampdu_max_time);
  319. break;
  320. case 1: /* AMPDU timw = 0x38 * 32us */
  321. btcoexist->btc_write_1byte(btcoexist, 0x456,
  322. 0x38);
  323. break;
  324. default:
  325. break;
  326. }
  327. }
  328. coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
  329. }
  330. void halbtc8192e2ant_limited_tx(IN struct btc_coexist *btcoexist,
  331. IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
  332. IN u8 retry_limit_type, IN u8 ampdu_time_type)
  333. {
  334. u32 dis_ra_mask = 0x0;
  335. coex_dm->cur_ra_mask_type = ra_mask_type;
  336. dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist,
  337. coex_dm->cur_ss_type, ra_mask_type);
  338. halbtc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
  339. halbtc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec,
  340. arfr_type);
  341. halbtc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
  342. halbtc8192e2ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
  343. }
  344. void halbtc8192e2ant_limited_rx(IN struct btc_coexist *btcoexist,
  345. IN boolean force_exec, IN boolean rej_ap_agg_pkt,
  346. IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
  347. {
  348. boolean reject_rx_agg = rej_ap_agg_pkt;
  349. boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  350. u8 rx_agg_size = agg_buf_size;
  351. /* ============================================ */
  352. /* Rx Aggregation related setting */
  353. /* ============================================ */
  354. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  355. &reject_rx_agg);
  356. /* decide BT control aggregation buf size or not */
  357. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  358. &bt_ctrl_rx_agg_size);
  359. /* aggregation buf size, only work when BT control Rx aggregation size. */
  360. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  361. /* real update aggregation setting */
  362. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  363. }
  364. void halbtc8192e2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
  365. {
  366. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  367. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  368. reg_hp_txrx = 0x770;
  369. reg_lp_txrx = 0x774;
  370. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  371. reg_hp_tx = u32tmp & MASKLWORD;
  372. reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
  373. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  374. reg_lp_tx = u32tmp & MASKLWORD;
  375. reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
  376. coex_sta->high_priority_tx = reg_hp_tx;
  377. coex_sta->high_priority_rx = reg_hp_rx;
  378. coex_sta->low_priority_tx = reg_lp_tx;
  379. coex_sta->low_priority_rx = reg_lp_rx;
  380. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  381. "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
  382. reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
  383. BTC_TRACE(trace_buf);
  384. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  385. "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
  386. reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
  387. BTC_TRACE(trace_buf);
  388. /* reset counter */
  389. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  390. }
  391. void halbtc8192e2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
  392. {
  393. #if 1
  394. coex_sta->crc_ok_cck =
  395. btcoexist->btc_phydm_query_PHY_counter(
  396. btcoexist,
  397. PHYDM_INFO_CRC32_OK_CCK);
  398. coex_sta->crc_ok_11g =
  399. btcoexist->btc_phydm_query_PHY_counter(
  400. btcoexist,
  401. PHYDM_INFO_CRC32_OK_LEGACY);
  402. coex_sta->crc_ok_11n =
  403. btcoexist->btc_phydm_query_PHY_counter(
  404. btcoexist,
  405. PHYDM_INFO_CRC32_OK_HT);
  406. coex_sta->crc_ok_11n_vht =
  407. btcoexist->btc_phydm_query_PHY_counter(
  408. btcoexist,
  409. PHYDM_INFO_CRC32_OK_VHT);
  410. coex_sta->crc_err_cck =
  411. btcoexist->btc_phydm_query_PHY_counter(
  412. btcoexist,
  413. PHYDM_INFO_CRC32_ERROR_CCK);
  414. coex_sta->crc_err_11g =
  415. btcoexist->btc_phydm_query_PHY_counter(
  416. btcoexist,
  417. PHYDM_INFO_CRC32_ERROR_LEGACY);
  418. coex_sta->crc_err_11n =
  419. btcoexist->btc_phydm_query_PHY_counter(
  420. btcoexist,
  421. PHYDM_INFO_CRC32_ERROR_HT);
  422. coex_sta->crc_err_11n_vht =
  423. btcoexist->btc_phydm_query_PHY_counter(
  424. btcoexist,
  425. PHYDM_INFO_CRC32_ERROR_VHT);
  426. #endif
  427. }
  428. void halbtc8192e2ant_query_bt_info(IN struct btc_coexist *btcoexist)
  429. {
  430. u8 h2c_parameter[1] = {0};
  431. coex_sta->c2h_bt_info_req_sent = true;
  432. h2c_parameter[0] |= BIT(0); /* trigger */
  433. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  434. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  435. "[BTCoex],Query BT info!!!! H2C 0x61 = 0x1\n");
  436. BTC_TRACE(trace_buf);
  437. }
  438. boolean halbtc8192e2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
  439. {
  440. static boolean pre_wifi_busy = false, pre_under_4way = false,
  441. pre_bt_hs_on = false;
  442. boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
  443. boolean wifi_connected = false;
  444. u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  445. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  446. &wifi_connected);
  447. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  448. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  449. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  450. &under_4way);
  451. if (wifi_connected) {
  452. if (wifi_busy != pre_wifi_busy) {
  453. pre_wifi_busy = wifi_busy;
  454. return true;
  455. }
  456. if (under_4way != pre_under_4way) {
  457. pre_under_4way = under_4way;
  458. return true;
  459. }
  460. if (bt_hs_on != pre_bt_hs_on) {
  461. pre_bt_hs_on = bt_hs_on;
  462. return true;
  463. }
  464. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0,
  465. 2, 34, 0);
  466. if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
  467. (BTC_RSSI_STATE_LOW == wifi_rssi_state))
  468. return true;
  469. }
  470. return false;
  471. }
  472. void halbtc8192e2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
  473. {
  474. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  475. boolean bt_hs_on = false;
  476. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  477. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  478. bt_link_info->sco_exist = coex_sta->sco_exist;
  479. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  480. bt_link_info->pan_exist = coex_sta->pan_exist;
  481. bt_link_info->hid_exist = coex_sta->hid_exist;
  482. /* work around for HS mode. */
  483. if (bt_hs_on) {
  484. bt_link_info->pan_exist = true;
  485. bt_link_info->bt_link_exist = true;
  486. }
  487. /* check if Sco only */
  488. if (bt_link_info->sco_exist &&
  489. !bt_link_info->a2dp_exist &&
  490. !bt_link_info->pan_exist &&
  491. !bt_link_info->hid_exist)
  492. bt_link_info->sco_only = true;
  493. else
  494. bt_link_info->sco_only = false;
  495. /* check if A2dp only */
  496. if (!bt_link_info->sco_exist &&
  497. bt_link_info->a2dp_exist &&
  498. !bt_link_info->pan_exist &&
  499. !bt_link_info->hid_exist)
  500. bt_link_info->a2dp_only = true;
  501. else
  502. bt_link_info->a2dp_only = false;
  503. /* check if Pan only */
  504. if (!bt_link_info->sco_exist &&
  505. !bt_link_info->a2dp_exist &&
  506. bt_link_info->pan_exist &&
  507. !bt_link_info->hid_exist)
  508. bt_link_info->pan_only = true;
  509. else
  510. bt_link_info->pan_only = false;
  511. /* check if Hid only */
  512. if (!bt_link_info->sco_exist &&
  513. !bt_link_info->a2dp_exist &&
  514. !bt_link_info->pan_exist &&
  515. bt_link_info->hid_exist)
  516. bt_link_info->hid_only = true;
  517. else
  518. bt_link_info->hid_only = false;
  519. }
  520. u8 halbtc8192e2ant_action_algorithm(IN struct btc_coexist *btcoexist)
  521. {
  522. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  523. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  524. boolean bt_hs_on = false;
  525. u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
  526. u8 num_of_diff_profile = 0;
  527. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  528. if (!bt_link_info->bt_link_exist) {
  529. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  530. "[BTCoex], No BT link exists!!!\n");
  531. BTC_TRACE(trace_buf);
  532. return algorithm;
  533. }
  534. if (bt_link_info->sco_exist)
  535. num_of_diff_profile++;
  536. if (bt_link_info->hid_exist)
  537. num_of_diff_profile++;
  538. if (bt_link_info->pan_exist)
  539. num_of_diff_profile++;
  540. if (bt_link_info->a2dp_exist)
  541. num_of_diff_profile++;
  542. if (num_of_diff_profile == 1) {
  543. if (bt_link_info->sco_exist) {
  544. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  545. "[BTCoex], SCO only\n");
  546. BTC_TRACE(trace_buf);
  547. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  548. } else {
  549. if (bt_link_info->hid_exist) {
  550. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  551. "[BTCoex], HID only\n");
  552. BTC_TRACE(trace_buf);
  553. algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
  554. } else if (bt_link_info->a2dp_exist) {
  555. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  556. "[BTCoex], A2DP only\n");
  557. BTC_TRACE(trace_buf);
  558. algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
  559. } else if (bt_link_info->pan_exist) {
  560. if (bt_hs_on) {
  561. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  562. "[BTCoex], PAN(HS) only\n");
  563. BTC_TRACE(trace_buf);
  564. algorithm =
  565. BT_8192E_2ANT_COEX_ALGO_PANHS;
  566. } else {
  567. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  568. "[BTCoex], PAN(EDR) only\n");
  569. BTC_TRACE(trace_buf);
  570. algorithm =
  571. BT_8192E_2ANT_COEX_ALGO_PANEDR;
  572. }
  573. }
  574. }
  575. } else if (num_of_diff_profile == 2) {
  576. if (bt_link_info->sco_exist) {
  577. if (bt_link_info->hid_exist) {
  578. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  579. "[BTCoex], SCO + HID\n");
  580. BTC_TRACE(trace_buf);
  581. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  582. } else if (bt_link_info->a2dp_exist) {
  583. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  584. "[BTCoex], SCO + A2DP ==> SCO\n");
  585. BTC_TRACE(trace_buf);
  586. algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  587. } else if (bt_link_info->pan_exist) {
  588. if (bt_hs_on) {
  589. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  590. "[BTCoex], SCO + PAN(HS)\n");
  591. BTC_TRACE(trace_buf);
  592. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  593. } else {
  594. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  595. "[BTCoex], SCO + PAN(EDR)\n");
  596. BTC_TRACE(trace_buf);
  597. algorithm =
  598. BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
  599. }
  600. }
  601. } else {
  602. if (bt_link_info->hid_exist &&
  603. bt_link_info->a2dp_exist) {
  604. if (stack_info->num_of_hid >= 2) {
  605. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  606. "[BTCoex], HID*2 + A2DP\n");
  607. BTC_TRACE(trace_buf);
  608. algorithm =
  609. BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  610. } else {
  611. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  612. "[BTCoex], HID + A2DP\n");
  613. BTC_TRACE(trace_buf);
  614. algorithm =
  615. BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
  616. }
  617. } else if (bt_link_info->hid_exist &&
  618. bt_link_info->pan_exist) {
  619. if (bt_hs_on) {
  620. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  621. "[BTCoex], HID + PAN(HS)\n");
  622. BTC_TRACE(trace_buf);
  623. algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
  624. } else {
  625. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  626. "[BTCoex], HID + PAN(EDR)\n");
  627. BTC_TRACE(trace_buf);
  628. algorithm =
  629. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  630. }
  631. } else if (bt_link_info->pan_exist &&
  632. bt_link_info->a2dp_exist) {
  633. if (bt_hs_on) {
  634. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  635. "[BTCoex], A2DP + PAN(HS)\n");
  636. BTC_TRACE(trace_buf);
  637. algorithm =
  638. BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
  639. } else {
  640. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  641. "[BTCoex], A2DP + PAN(EDR)\n");
  642. BTC_TRACE(trace_buf);
  643. algorithm =
  644. BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
  645. }
  646. }
  647. }
  648. } else if (num_of_diff_profile == 3) {
  649. if (bt_link_info->sco_exist) {
  650. if (bt_link_info->hid_exist &&
  651. bt_link_info->a2dp_exist) {
  652. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  653. "[BTCoex], SCO + HID + A2DP ==> HID\n");
  654. BTC_TRACE(trace_buf);
  655. algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  656. } else if (bt_link_info->hid_exist &&
  657. bt_link_info->pan_exist) {
  658. if (bt_hs_on) {
  659. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  660. "[BTCoex], SCO + HID + PAN(HS)\n");
  661. BTC_TRACE(trace_buf);
  662. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  663. } else {
  664. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  665. "[BTCoex], SCO + HID + PAN(EDR)\n");
  666. BTC_TRACE(trace_buf);
  667. algorithm =
  668. BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
  669. }
  670. } else if (bt_link_info->pan_exist &&
  671. bt_link_info->a2dp_exist) {
  672. if (bt_hs_on) {
  673. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  674. "[BTCoex], SCO + A2DP + PAN(HS)\n");
  675. BTC_TRACE(trace_buf);
  676. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  677. } else {
  678. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  679. "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
  680. BTC_TRACE(trace_buf);
  681. algorithm =
  682. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  683. }
  684. }
  685. } else {
  686. if (bt_link_info->hid_exist &&
  687. bt_link_info->pan_exist &&
  688. bt_link_info->a2dp_exist) {
  689. if (bt_hs_on) {
  690. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  691. "[BTCoex], HID + A2DP + PAN(HS)\n");
  692. BTC_TRACE(trace_buf);
  693. algorithm =
  694. BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
  695. } else {
  696. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  697. "[BTCoex], HID + A2DP + PAN(EDR)\n");
  698. BTC_TRACE(trace_buf);
  699. algorithm =
  700. BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  701. }
  702. }
  703. }
  704. } else if (num_of_diff_profile >= 3) {
  705. if (bt_link_info->sco_exist) {
  706. if (bt_link_info->hid_exist &&
  707. bt_link_info->pan_exist &&
  708. bt_link_info->a2dp_exist) {
  709. if (bt_hs_on) {
  710. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  711. "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
  712. BTC_TRACE(trace_buf);
  713. } else {
  714. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  715. "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
  716. BTC_TRACE(trace_buf);
  717. algorithm =
  718. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  719. }
  720. }
  721. }
  722. }
  723. return algorithm;
  724. }
  725. void halbtc8192e2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
  726. IN u8 dac_swing_lvl)
  727. {
  728. u8 h2c_parameter[1] = {0};
  729. /* There are several type of dacswing */
  730. /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
  731. h2c_parameter[0] = dac_swing_lvl;
  732. btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
  733. }
  734. void halbtc8192e2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  735. IN u8 dec_bt_pwr_lvl)
  736. {
  737. u8 h2c_parameter[1] = {0};
  738. h2c_parameter[0] = dec_bt_pwr_lvl;
  739. btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
  740. }
  741. void halbtc8192e2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  742. IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
  743. {
  744. coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
  745. if (!force_exec) {
  746. #if 0 /* work around, avoid h2c command fail. */
  747. if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
  748. return;
  749. #endif
  750. }
  751. halbtc8192e2ant_set_fw_dec_bt_pwr(btcoexist,
  752. coex_dm->cur_bt_dec_pwr_lvl);
  753. coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
  754. }
  755. void halbtc8192e2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
  756. IN boolean enable_auto_report)
  757. {
  758. u8 h2c_parameter[1] = {0};
  759. h2c_parameter[0] = 0;
  760. if (enable_auto_report)
  761. h2c_parameter[0] |= BIT(0);
  762. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  763. }
  764. void halbtc8192e2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
  765. IN boolean force_exec, IN boolean enable_auto_report)
  766. {
  767. coex_dm->cur_bt_auto_report = enable_auto_report;
  768. if (!force_exec) {
  769. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  770. return;
  771. }
  772. halbtc8192e2ant_set_bt_auto_report(btcoexist,
  773. coex_dm->cur_bt_auto_report);
  774. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  775. }
  776. void halbtc8192e2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
  777. IN boolean force_exec, IN u8 fw_dac_swing_lvl)
  778. {
  779. coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
  780. if (!force_exec) {
  781. if (coex_dm->pre_fw_dac_swing_lvl ==
  782. coex_dm->cur_fw_dac_swing_lvl)
  783. return;
  784. }
  785. halbtc8192e2ant_set_fw_dac_swing_level(btcoexist,
  786. coex_dm->cur_fw_dac_swing_lvl);
  787. coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
  788. }
  789. void halbtc8192e2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
  790. IN boolean rx_rf_shrink_on)
  791. {
  792. if (rx_rf_shrink_on) {
  793. /* Shrink RF Rx LPF corner */
  794. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  795. "[BTCoex], Shrink RF Rx LPF corner!!\n");
  796. BTC_TRACE(trace_buf);
  797. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
  798. 0xffffc);
  799. } else {
  800. /* Resume RF Rx LPF corner */
  801. /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
  802. if (btcoexist->initilized) {
  803. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  804. "[BTCoex], Resume RF Rx LPF corner!!\n");
  805. BTC_TRACE(trace_buf);
  806. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  807. 0xfffff, coex_dm->bt_rf_0x1e_backup);
  808. }
  809. }
  810. }
  811. void halbtc8192e2ant_rf_shrink(IN struct btc_coexist *btcoexist,
  812. IN boolean force_exec, IN boolean rx_rf_shrink_on)
  813. {
  814. coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
  815. if (!force_exec) {
  816. if (coex_dm->pre_rf_rx_lpf_shrink ==
  817. coex_dm->cur_rf_rx_lpf_shrink)
  818. return;
  819. }
  820. halbtc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
  821. coex_dm->cur_rf_rx_lpf_shrink);
  822. coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
  823. }
  824. void halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
  825. *btcoexist, IN boolean low_penalty_ra)
  826. {
  827. u8 h2c_parameter[6] = {0};
  828. h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
  829. if (low_penalty_ra) {
  830. h2c_parameter[1] |= BIT(0);
  831. h2c_parameter[2] =
  832. 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
  833. h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
  834. h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
  835. h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
  836. }
  837. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
  838. }
  839. void halbtc8192e2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
  840. IN boolean force_exec, IN boolean low_penalty_ra)
  841. {
  842. coex_dm->cur_low_penalty_ra = low_penalty_ra;
  843. if (!force_exec) {
  844. if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
  845. return;
  846. }
  847. halbtc8192e2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
  848. coex_dm->cur_low_penalty_ra);
  849. coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
  850. }
  851. void halbtc8192e2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
  852. IN u32 level)
  853. {
  854. u8 val = (u8)level;
  855. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  856. "[BTCoex], Write SwDacSwing = 0x%x\n", level);
  857. BTC_TRACE(trace_buf);
  858. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
  859. }
  860. void halbtc8192e2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
  861. *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
  862. {
  863. if (sw_dac_swing_on)
  864. halbtc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
  865. else
  866. halbtc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
  867. }
  868. void halbtc8192e2ant_dac_swing(IN struct btc_coexist *btcoexist,
  869. IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
  870. {
  871. coex_dm->cur_dac_swing_on = dac_swing_on;
  872. coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
  873. if (!force_exec) {
  874. if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
  875. (coex_dm->pre_dac_swing_lvl ==
  876. coex_dm->cur_dac_swing_lvl))
  877. return;
  878. }
  879. delay_ms(30);
  880. halbtc8192e2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
  881. dac_swing_lvl);
  882. coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
  883. coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
  884. }
  885. void halbtc8192e2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
  886. IN boolean adc_back_off)
  887. {
  888. if (adc_back_off) {
  889. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  890. "[BTCoex], BB BackOff Level On!\n");
  891. BTC_TRACE(trace_buf);
  892. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
  893. } else {
  894. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  895. "[BTCoex], BB BackOff Level Off!\n");
  896. BTC_TRACE(trace_buf);
  897. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
  898. }
  899. }
  900. void halbtc8192e2ant_adc_back_off(IN struct btc_coexist *btcoexist,
  901. IN boolean force_exec, IN boolean adc_back_off)
  902. {
  903. coex_dm->cur_adc_back_off = adc_back_off;
  904. if (!force_exec) {
  905. if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
  906. return;
  907. }
  908. halbtc8192e2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
  909. coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
  910. }
  911. void halbtc8192e2ant_set_agc_table(IN struct btc_coexist *btcoexist,
  912. IN boolean agc_table_en)
  913. {
  914. /* =================BB AGC Gain Table */
  915. if (agc_table_en) {
  916. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  917. "[BTCoex], BB Agc Table On!\n");
  918. BTC_TRACE(trace_buf);
  919. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
  920. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
  921. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
  922. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
  923. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
  924. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
  925. } else {
  926. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  927. "[BTCoex], BB Agc Table Off!\n");
  928. BTC_TRACE(trace_buf);
  929. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
  930. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
  931. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
  932. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
  933. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
  934. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
  935. }
  936. }
  937. void halbtc8192e2ant_agc_table(IN struct btc_coexist *btcoexist,
  938. IN boolean force_exec, IN boolean agc_table_en)
  939. {
  940. coex_dm->cur_agc_table_en = agc_table_en;
  941. if (!force_exec) {
  942. if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
  943. return;
  944. }
  945. halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
  946. coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
  947. }
  948. void halbtc8192e2ant_set_coex_table(IN struct btc_coexist *btcoexist,
  949. IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
  950. {
  951. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  952. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  953. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  954. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  955. }
  956. void halbtc8192e2ant_coex_table(IN struct btc_coexist *btcoexist,
  957. IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
  958. IN u32 val0x6c8, IN u8 val0x6cc)
  959. {
  960. coex_dm->cur_val0x6c0 = val0x6c0;
  961. coex_dm->cur_val0x6c4 = val0x6c4;
  962. coex_dm->cur_val0x6c8 = val0x6c8;
  963. coex_dm->cur_val0x6cc = val0x6cc;
  964. if (!force_exec) {
  965. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  966. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  967. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  968. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  969. return;
  970. }
  971. halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
  972. val0x6cc);
  973. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  974. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  975. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  976. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  977. }
  978. void halbtc8192e2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
  979. IN boolean force_exec, IN u8 type)
  980. {
  981. switch (type) {
  982. case 0:
  983. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
  984. 0x5a5a5a5a, 0xffffff, 0x3);
  985. break;
  986. case 1:
  987. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
  988. 0x5a5a5a5a, 0xffffff, 0x3);
  989. break;
  990. case 2:
  991. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
  992. 0x5ada5ada, 0xffffff, 0x3);
  993. break;
  994. case 3:
  995. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fdf5fdf,
  996. 0x5fdb5fdb, 0xffffff, 0x3);
  997. break;
  998. case 4:
  999. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
  1000. 0x5ffb5ffb, 0xffffff, 0x3);
  1001. break;
  1002. case 5:
  1003. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5ddd5ddd,
  1004. 0x5fdb5fdb, 0xffffff, 0x3);
  1005. break;
  1006. case 6:
  1007. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
  1008. 0x5a5a5a5a, 0xffffff, 0x3);
  1009. break;
  1010. case 7:
  1011. if (coex_sta->scan_ap_num <= NOISY_AP_NUM_THRESH_8192E)
  1012. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xffffffff, 0xfafafafa, 0xffffff, 0x3);
  1013. else
  1014. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xffffffff, 0x5a5a5a5a, 0xffffff, 0x3);
  1015. break;
  1016. case 8:
  1017. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5f5f5f5f, 0x5a5a5a5a, 0xffffff, 0x3);
  1018. break;
  1019. case 9:
  1020. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xfafafafa, 0xffffff, 0x3);
  1021. break;
  1022. case 10:
  1023. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3);
  1024. break;
  1025. case 11:
  1026. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555, 0xfafafafa, 0xffffff, 0x3);
  1027. break;
  1028. default:
  1029. break;
  1030. }
  1031. }
  1032. void halbtc8192e2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1033. IN boolean enable)
  1034. {
  1035. u8 h2c_parameter[1] = {0};
  1036. if (enable)
  1037. h2c_parameter[0] |= BIT(0); /* function enable */
  1038. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  1039. }
  1040. void halbtc8192e2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1041. IN boolean force_exec, IN boolean enable)
  1042. {
  1043. coex_dm->cur_ignore_wlan_act = enable;
  1044. if (!force_exec) {
  1045. if (coex_dm->pre_ignore_wlan_act ==
  1046. coex_dm->cur_ignore_wlan_act)
  1047. return;
  1048. }
  1049. halbtc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
  1050. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  1051. }
  1052. void halbtc8192e2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
  1053. IN u8 lps_val, IN u8 rpwm_val)
  1054. {
  1055. u8 lps = lps_val;
  1056. u8 rpwm = rpwm_val;
  1057. btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
  1058. btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
  1059. }
  1060. void halbtc8192e2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
  1061. IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
  1062. {
  1063. coex_dm->cur_lps = lps_val;
  1064. coex_dm->cur_rpwm = rpwm_val;
  1065. if (!force_exec) {
  1066. if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
  1067. (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
  1068. return;
  1069. }
  1070. halbtc8192e2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
  1071. coex_dm->pre_lps = coex_dm->cur_lps;
  1072. coex_dm->pre_rpwm = coex_dm->cur_rpwm;
  1073. }
  1074. void halbtc8192e2ant_ps_tdma_check_for_power_save_state(
  1075. IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
  1076. {
  1077. u8 lps_mode = 0x0;
  1078. u8 h2c_parameter[5] = {0x8, 0, 0, 0, 0};
  1079. btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
  1080. if (lps_mode) { /* already under LPS state */
  1081. if (new_ps_state) {
  1082. /* keep state under LPS, do nothing. */
  1083. } else {
  1084. /* will leave LPS state, turn off psTdma first */
  1085. /*halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);*/
  1086. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1087. }
  1088. } else { /* NO PS state */
  1089. if (new_ps_state) {
  1090. /* will enter LPS state, turn off psTdma first */
  1091. /*halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);*/
  1092. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1093. } else {
  1094. /* keep state under NO PS state, do nothing. */
  1095. }
  1096. }
  1097. }
  1098. void halbtc8192e2ant_power_save_state(IN struct btc_coexist *btcoexist,
  1099. IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
  1100. {
  1101. boolean low_pwr_disable = false;
  1102. boolean bApEnable = false;
  1103. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE, &bApEnable);
  1104. if (bApEnable) {
  1105. ps_type = BTC_PS_WIFI_NATIVE;
  1106. lps_val = 0x0;
  1107. rpwm_val = 0x0;
  1108. }
  1109. /*for 8192e, NO 32k*/
  1110. low_pwr_disable = true;
  1111. switch (ps_type) {
  1112. case BTC_PS_WIFI_NATIVE:
  1113. coex_sta->force_lps_on = false;
  1114. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
  1115. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
  1116. break;
  1117. case BTC_PS_LPS_ON:
  1118. coex_sta->force_lps_on = true;
  1119. halbtc8192e2ant_ps_tdma_check_for_power_save_state(btcoexist, true);
  1120. halbtc8192e2ant_lps_rpwm(btcoexist, NORMAL_EXEC, lps_val, rpwm_val);
  1121. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
  1122. /* power save must executed before psTdma. */
  1123. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, NULL);
  1124. break;
  1125. case BTC_PS_LPS_OFF:
  1126. coex_sta->force_lps_on = false;
  1127. halbtc8192e2ant_ps_tdma_check_for_power_save_state(btcoexist, false);
  1128. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
  1129. break;
  1130. default:
  1131. break;
  1132. }
  1133. }
  1134. void halbtc8192e2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
  1135. IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
  1136. {
  1137. u8 h2c_parameter[5] = {0};
  1138. u8 real_byte1 = byte1, real_byte5 = byte5;
  1139. boolean ap_enable = false;
  1140. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1141. &ap_enable);
  1142. if (ap_enable) {
  1143. if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1144. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1145. "[BTCoex], FW for 1Ant AP mode\n");
  1146. real_byte1 &= ~BIT(4);
  1147. real_byte1 |= BIT(5);
  1148. real_byte5 |= BIT(5);
  1149. real_byte5 &= ~BIT(6);
  1150. }
  1151. } else if ((byte1 & BIT(4)) && (!(byte1 & BIT(5))))
  1152. halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_LPS_ON, 0x50, 0x4);
  1153. else
  1154. halbtc8192e2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
  1155. h2c_parameter[0] = byte1;
  1156. h2c_parameter[1] = byte2;
  1157. h2c_parameter[2] = byte3;
  1158. h2c_parameter[3] = byte4;
  1159. h2c_parameter[4] = byte5;
  1160. coex_dm->ps_tdma_para[0] = byte1;
  1161. coex_dm->ps_tdma_para[1] = byte2;
  1162. coex_dm->ps_tdma_para[2] = byte3;
  1163. coex_dm->ps_tdma_para[3] = byte4;
  1164. coex_dm->ps_tdma_para[4] = byte5;
  1165. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1166. }
  1167. void halbtc8192e2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
  1168. IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
  1169. IN boolean limited_dig, IN boolean bt_lna_constrain)
  1170. {
  1171. /*
  1172. u32 wifi_bw;
  1173. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  1174. if(BTC_WIFI_BW_HT40 != wifi_bw)
  1175. {
  1176. if (shrink_rx_lpf)
  1177. shrink_rx_lpf = false;
  1178. }
  1179. */
  1180. halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
  1181. /* halbtc8192e2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra); */
  1182. }
  1183. void halbtc8192e2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
  1184. IN boolean agc_table_shift, IN boolean adc_back_off,
  1185. IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
  1186. {
  1187. halbtc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
  1188. /* halbtc8192e2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
  1189. halbtc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
  1190. dac_swing_lvl);
  1191. }
  1192. void halbtc8192e2ant_set_ant_path(IN struct btc_coexist *btcoexist,
  1193. IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
  1194. {
  1195. u32 u32tmp = 0;
  1196. if (init_hwcfg) {
  1197. btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
  1198. btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
  1199. if (btcoexist->chip_interface == BTC_INTF_USB)
  1200. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
  1201. else
  1202. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
  1203. /* 0x4c[27][24]='00', Set Antenna to BB */
  1204. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  1205. u32tmp &= ~BIT(24);
  1206. u32tmp &= ~BIT(27);
  1207. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  1208. } else if (wifi_off) {
  1209. if (btcoexist->chip_interface == BTC_INTF_USB)
  1210. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
  1211. else
  1212. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
  1213. /* 0x4c[27][24]='11', Set Antenna to BT, 0x64[8:7]=0, 0x64[2]=1 */
  1214. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  1215. u32tmp |= BIT(24);
  1216. u32tmp |= BIT(27);
  1217. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  1218. }
  1219. /* ext switch setting */
  1220. switch (ant_pos_type) {
  1221. case BTC_ANT_PATH_WIFI:
  1222. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
  1223. break;
  1224. case BTC_ANT_PATH_BT:
  1225. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
  1226. break;
  1227. default:
  1228. case BTC_ANT_PATH_PTA:
  1229. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
  1230. break;
  1231. }
  1232. }
  1233. void halbtc8192e2ant_set_switch_ss_type(IN struct btc_coexist *btcoexist,
  1234. IN u8 ss_type)
  1235. {
  1236. u8 mimo_ps = BTC_MIMO_PS_DYNAMIC;
  1237. u32 dis_ra_mask = 0x0;
  1238. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1239. "[BTCoex], REAL set SS Type = %d\n", ss_type);
  1240. BTC_TRACE(trace_buf);
  1241. dis_ra_mask = halbtc8192e2ant_decide_ra_mask(btcoexist, ss_type,
  1242. coex_dm->cur_ra_mask_type);
  1243. halbtc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
  1244. if (ss_type == 1) {
  1245. /*halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);*/
  1246. /* switch ofdm path */
  1247. btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
  1248. btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
  1249. btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
  1250. /* switch cck patch */
  1251. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1); */
  1252. /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81); */
  1253. mimo_ps = BTC_MIMO_PS_STATIC;
  1254. } else if (ss_type == 2) {
  1255. /*halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);*/
  1256. btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
  1257. btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
  1258. btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
  1259. /* remove, if 0xe77[2]=0x0 then CCK will fail, advised by Jenyu */
  1260. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0); */
  1261. /* btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41); */
  1262. mimo_ps = BTC_MIMO_PS_DYNAMIC;
  1263. }
  1264. btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS,
  1265. &mimo_ps); /* set rx 1ss or 2ss */
  1266. }
  1267. void halbtc8192e2ant_switch_ss_type(IN struct btc_coexist *btcoexist,
  1268. IN boolean force_exec, IN u8 new_ss_type)
  1269. {
  1270. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1271. "[BTCoex], %s Switch SS Type = %d\n",
  1272. (force_exec ? "force to" : ""), new_ss_type);
  1273. BTC_TRACE(trace_buf);
  1274. coex_dm->cur_ss_type = new_ss_type;
  1275. if (!force_exec) {
  1276. if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
  1277. return;
  1278. }
  1279. halbtc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
  1280. coex_dm->pre_ss_type = coex_dm->cur_ss_type;
  1281. }
  1282. void halbtc8192e2ant_ps_tdma(IN struct btc_coexist *btcoexist,
  1283. IN boolean force_exec, IN boolean turn_on, IN u8 type)
  1284. {
  1285. s8 wifi_duration_adjust = 0x0;
  1286. coex_dm->cur_ps_tdma_on = turn_on;
  1287. coex_dm->cur_ps_tdma = type;
  1288. if (!force_exec) {
  1289. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1290. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1291. return;
  1292. }
  1293. if (coex_sta->scan_ap_num >= 40)
  1294. wifi_duration_adjust = -15;
  1295. else if (coex_sta->scan_ap_num >= 20)
  1296. wifi_duration_adjust = -10;
  1297. if (turn_on) {
  1298. switch (type) {
  1299. case 1:
  1300. default: /*d1,wb*/
  1301. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x11, 0x10);
  1302. break;
  1303. case 2:
  1304. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x11, 0x10);
  1305. break;
  1306. case 3:
  1307. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x11, 0x10);
  1308. break;
  1309. case 4:
  1310. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x11, 0x10);
  1311. break;
  1312. case 5: /*d1,pb,TXpause*/
  1313. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x3c, 0x03, 0x90, 0x10);
  1314. break;
  1315. case 6:
  1316. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x32, 0x03, 0x90, 0x10);
  1317. break;
  1318. case 7:
  1319. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x28, 0x03, 0x90, 0x10);
  1320. break;
  1321. case 8:
  1322. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x1e, 0x03, 0x90, 0x10);
  1323. break;
  1324. case 9: /*d1,bb*/
  1325. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x31, 0x10);
  1326. break;
  1327. case 10:
  1328. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x31, 0x10);
  1329. break;
  1330. case 11:
  1331. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x31, 0x10);
  1332. break;
  1333. case 12:
  1334. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x31, 0x10);
  1335. break;
  1336. case 13: /*d1,bb,TXpause*/
  1337. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x3c, 0x03, 0x30, 0x10);
  1338. break;
  1339. case 14:
  1340. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x32, 0x03, 0x30, 0x10);
  1341. break;
  1342. case 15:
  1343. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x28, 0x03, 0x30, 0x10);
  1344. break;
  1345. case 16:
  1346. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1e, 0x03, 0x30, 0x10);
  1347. break;
  1348. case 17:
  1349. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x20, 0x03, 0x10, 0x10);
  1350. break;
  1351. case 18:
  1352. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5, 0x5, 0xe1, 0x90);
  1353. break;
  1354. case 19:
  1355. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 0x25, 0xe1, 0x90);
  1356. break;
  1357. case 20:
  1358. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25, 0x25, 0x60, 0x90);
  1359. break;
  1360. case 21:
  1361. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x15, 0x03, 0x11, 0x11);
  1362. break;
  1363. case 22: /* d1,wb */
  1364. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x11, 0x14);
  1365. break;
  1366. case 23: /* d1,pb,TXpause */
  1367. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x63, 0x14, 0x03, 0x90, 0x14);
  1368. break;
  1369. case 24: /* d1,bb */
  1370. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x31, 0x14);
  1371. break;
  1372. case 25: /* d1,bb,TXpause */
  1373. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x30, 0x14);
  1374. break;
  1375. case 26: /*d1,wp,noTXpause*/
  1376. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe1, 0x3c, 0x03, 0x11, 0x10);
  1377. break;
  1378. case 27: /*11,pp,noTXpause*/
  1379. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x3c, 0x03, 0x11, 0x11);
  1380. break;
  1381. case 28: /*11,pp,noTXpause*/
  1382. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x50, 0x03, 0x11, 0x11);
  1383. break;
  1384. case 29:
  1385. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x15, 0x03, 0x11, 0x11);
  1386. break;
  1387. case 30:
  1388. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x10, 0x14);
  1389. break;
  1390. case 31: /*d3,bb,TXpause*/
  1391. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x14, 0x03, 0x30, 0x94);
  1392. break;
  1393. case 32:
  1394. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x61, 0x35, 0x03, 0x11, 0x11);
  1395. break;
  1396. case 71:
  1397. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a, 0x1a, 0xe1, 0x90);
  1398. break;
  1399. /* following cases is for wifi rssi low // bad antenna isolation, started from 81 */
  1400. case 80:
  1401. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3c, 0x3, 0x10, 0x50);
  1402. break;
  1403. case 81:
  1404. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3a + wifi_duration_adjust, 0x3, 0x10, 0x50);
  1405. break;
  1406. case 82:
  1407. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x30 + wifi_duration_adjust, 0x03, 0x10, 0x50);
  1408. break;
  1409. case 83:
  1410. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21, 0x03, 0x10, 0x50);
  1411. break;
  1412. case 84:
  1413. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x15, 0x3, 0x10, 0x50);
  1414. break;
  1415. case 85:
  1416. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x3a, 0x03, 0x10, 0x50);
  1417. break;
  1418. case 86:
  1419. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x21, 0x03, 0x10, 0x50);
  1420. break;
  1421. case 87:
  1422. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x51, 0x14, 0x03, 0x10, 0x54);
  1423. break;
  1424. case 88:
  1425. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x53, 0x14, 0x03, 0x10, 0x54);
  1426. break;
  1427. }
  1428. } else {
  1429. /* disable PS tdma */
  1430. switch (type) {
  1431. default:
  1432. case 0: /* ANT2PTA, 0x778=1 */
  1433. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x8, 0x0, 0x0, 0x0, 0x0);
  1434. halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, false, false);
  1435. break;
  1436. case 1: /* ANT2BT, 0x778=3 */
  1437. halbtc8192e2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0, 0x8, 0x0);
  1438. delay_ms(5);
  1439. halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, false);
  1440. break;
  1441. }
  1442. }
  1443. /* update pre state */
  1444. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1445. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1446. }
  1447. void halbtc8192e2ant_coex_all_off(IN struct btc_coexist *btcoexist)
  1448. {
  1449. /* fw all off */
  1450. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1451. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1452. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1453. /* sw all off */
  1454. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1455. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1456. /* hw all off */
  1457. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1458. }
  1459. void halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  1460. {
  1461. coex_sta->cnt_setup_link = 0;
  1462. /* force to reset coex mechanism */
  1463. halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  1464. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
  1465. halbtc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
  1466. halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  1467. halbtc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
  1468. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1469. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1470. }
  1471. void halbtc8192e2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
  1472. {
  1473. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1474. if (coex_sta->wifi_is_high_pri_task && (!bt_link_info->a2dp_exist)) {
  1475. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
  1476. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  1477. } else {
  1478. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1479. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 29);
  1480. }
  1481. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1482. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1483. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1484. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1485. }
  1486. boolean halbtc8192e2ant_is_common_action(IN struct btc_coexist *btcoexist)
  1487. {
  1488. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1489. boolean common = false, wifi_connected = false, wifi_busy = false;
  1490. boolean bt_hs_on = false, low_pwr_disable = false;
  1491. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  1492. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1493. &wifi_connected);
  1494. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1495. if (bt_link_info->sco_exist || bt_link_info->hid_exist)
  1496. halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
  1497. else
  1498. halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  1499. if (!wifi_connected) {
  1500. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1501. "[BTCoex], Wifi non-connected idle!!\n");
  1502. BTC_TRACE(trace_buf);
  1503. if ((coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE) ||
  1504. (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE)) {
  1505. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  1506. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  1507. } else {
  1508. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1509. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1510. }
  1511. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1512. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1513. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1514. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1515. common = true;
  1516. } else {
  1517. if (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE) {
  1518. if (wifi_busy) {
  1519. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi busy + BT non connected-idle!!\n");
  1520. BTC_TRACE(trace_buf);
  1521. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
  1522. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 26);
  1523. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1524. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1525. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1526. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1527. common = true;
  1528. } else {
  1529. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi connected-idle + BT non connected-idle!!\n");
  1530. BTC_TRACE(trace_buf);
  1531. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1532. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  1533. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1534. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1535. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1536. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1537. common = true;
  1538. }
  1539. } else if (coex_dm->bt_status == BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE) {
  1540. if (bt_hs_on)
  1541. return false;
  1542. if (wifi_busy) {
  1543. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi busy + BT connected-idle!!\n");
  1544. BTC_TRACE(trace_buf);
  1545. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 10);
  1546. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 27);
  1547. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1548. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1549. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1550. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1551. common = true;
  1552. } else {
  1553. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Wifi connected-idle + BT connected-idle!!\n");
  1554. BTC_TRACE(trace_buf);
  1555. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1556. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  1557. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1558. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1559. halbtc8192e2ant_sw_mechanism1(btcoexist, true, false, false, false);
  1560. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1561. common = true;
  1562. }
  1563. } else {
  1564. if (wifi_busy) {
  1565. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1566. "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
  1567. BTC_TRACE(trace_buf);
  1568. common = false;
  1569. } else {
  1570. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1571. "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
  1572. BTC_TRACE(trace_buf);
  1573. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1574. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
  1575. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1576. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1577. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1578. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1579. common = true;
  1580. }
  1581. }
  1582. }
  1583. return common;
  1584. }
  1585. void halbtc8192e2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
  1586. IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
  1587. {
  1588. static s32 up, dn, m, n, wait_count;
  1589. s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
  1590. u8 retry_count = 0;
  1591. if (!coex_dm->auto_tdma_adjust) {
  1592. coex_dm->auto_tdma_adjust = true;
  1593. {
  1594. if (sco_hid) {
  1595. if (tx_pause) {
  1596. if (max_interval == 1) {
  1597. halbtc8192e2ant_ps_tdma(
  1598. btcoexist, NORMAL_EXEC,
  1599. true, 13);
  1600. coex_dm->ps_tdma_du_adj_type =
  1601. 13;
  1602. } else if (max_interval == 2) {
  1603. halbtc8192e2ant_ps_tdma(
  1604. btcoexist, NORMAL_EXEC,
  1605. true, 14);
  1606. coex_dm->ps_tdma_du_adj_type =
  1607. 14;
  1608. } else if (max_interval == 3) {
  1609. halbtc8192e2ant_ps_tdma(
  1610. btcoexist, NORMAL_EXEC,
  1611. true, 15);
  1612. coex_dm->ps_tdma_du_adj_type =
  1613. 15;
  1614. } else {
  1615. halbtc8192e2ant_ps_tdma(
  1616. btcoexist, NORMAL_EXEC,
  1617. true, 15);
  1618. coex_dm->ps_tdma_du_adj_type =
  1619. 15;
  1620. }
  1621. } else {
  1622. if (max_interval == 1) {
  1623. halbtc8192e2ant_ps_tdma(
  1624. btcoexist, NORMAL_EXEC,
  1625. true, 9);
  1626. coex_dm->ps_tdma_du_adj_type =
  1627. 9;
  1628. } else if (max_interval == 2) {
  1629. halbtc8192e2ant_ps_tdma(
  1630. btcoexist, NORMAL_EXEC,
  1631. true, 10);
  1632. coex_dm->ps_tdma_du_adj_type =
  1633. 10;
  1634. } else if (max_interval == 3) {
  1635. halbtc8192e2ant_ps_tdma(
  1636. btcoexist, NORMAL_EXEC,
  1637. true, 11);
  1638. coex_dm->ps_tdma_du_adj_type =
  1639. 11;
  1640. } else {
  1641. halbtc8192e2ant_ps_tdma(
  1642. btcoexist, NORMAL_EXEC,
  1643. true, 11);
  1644. coex_dm->ps_tdma_du_adj_type =
  1645. 11;
  1646. }
  1647. }
  1648. } else {
  1649. if (tx_pause) {
  1650. if (max_interval == 1) {
  1651. halbtc8192e2ant_ps_tdma(
  1652. btcoexist, NORMAL_EXEC,
  1653. true, 5);
  1654. coex_dm->ps_tdma_du_adj_type =
  1655. 5;
  1656. } else if (max_interval == 2) {
  1657. halbtc8192e2ant_ps_tdma(
  1658. btcoexist, NORMAL_EXEC,
  1659. true, 6);
  1660. coex_dm->ps_tdma_du_adj_type =
  1661. 6;
  1662. } else if (max_interval == 3) {
  1663. halbtc8192e2ant_ps_tdma(
  1664. btcoexist, NORMAL_EXEC,
  1665. true, 7);
  1666. coex_dm->ps_tdma_du_adj_type =
  1667. 7;
  1668. } else {
  1669. halbtc8192e2ant_ps_tdma(
  1670. btcoexist, NORMAL_EXEC,
  1671. true, 7);
  1672. coex_dm->ps_tdma_du_adj_type =
  1673. 7;
  1674. }
  1675. } else {
  1676. if (max_interval == 1) {
  1677. halbtc8192e2ant_ps_tdma(
  1678. btcoexist, NORMAL_EXEC,
  1679. true, 1);
  1680. coex_dm->ps_tdma_du_adj_type =
  1681. 1;
  1682. } else if (max_interval == 2) {
  1683. halbtc8192e2ant_ps_tdma(
  1684. btcoexist, NORMAL_EXEC,
  1685. true, 2);
  1686. coex_dm->ps_tdma_du_adj_type =
  1687. 2;
  1688. } else if (max_interval == 3) {
  1689. halbtc8192e2ant_ps_tdma(
  1690. btcoexist, NORMAL_EXEC,
  1691. true, 3);
  1692. coex_dm->ps_tdma_du_adj_type =
  1693. 3;
  1694. } else {
  1695. halbtc8192e2ant_ps_tdma(
  1696. btcoexist, NORMAL_EXEC,
  1697. true, 3);
  1698. coex_dm->ps_tdma_du_adj_type =
  1699. 3;
  1700. }
  1701. }
  1702. }
  1703. }
  1704. /* ============ */
  1705. up = 0;
  1706. dn = 0;
  1707. m = 1;
  1708. n = 3;
  1709. result = 0;
  1710. wait_count = 0;
  1711. } else {
  1712. /* acquire the BT TRx retry count from BT_Info byte2 */
  1713. retry_count = coex_sta->bt_retry_cnt;
  1714. result = 0;
  1715. wait_count++;
  1716. if (retry_count ==
  1717. 0) { /* no retry in the last 2-second duration */
  1718. up++;
  1719. dn--;
  1720. if (dn <= 0)
  1721. dn = 0;
  1722. if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
  1723. wait_count = 0;
  1724. n = 3;
  1725. up = 0;
  1726. dn = 0;
  1727. result = 1;
  1728. }
  1729. } else if (retry_count <=
  1730. 3) { /* <=3 retry in the last 2-second duration */
  1731. up--;
  1732. dn++;
  1733. if (up <= 0)
  1734. up = 0;
  1735. if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
  1736. if (wait_count <= 2)
  1737. m++; /* to avoid loop between the two levels */
  1738. else
  1739. m = 1;
  1740. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1741. m = 20;
  1742. n = 3 * m;
  1743. up = 0;
  1744. dn = 0;
  1745. wait_count = 0;
  1746. result = -1;
  1747. }
  1748. } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
  1749. if (wait_count == 1)
  1750. m++; /* to avoid loop between the two levels */
  1751. else
  1752. m = 1;
  1753. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1754. m = 20;
  1755. n = 3 * m;
  1756. up = 0;
  1757. dn = 0;
  1758. wait_count = 0;
  1759. result = -1;
  1760. }
  1761. if (max_interval == 1) {
  1762. if (tx_pause) {
  1763. if (coex_dm->cur_ps_tdma == 1) {
  1764. halbtc8192e2ant_ps_tdma(btcoexist,
  1765. NORMAL_EXEC, true, 5);
  1766. coex_dm->ps_tdma_du_adj_type = 5;
  1767. } else if (coex_dm->cur_ps_tdma == 2) {
  1768. halbtc8192e2ant_ps_tdma(btcoexist,
  1769. NORMAL_EXEC, true, 6);
  1770. coex_dm->ps_tdma_du_adj_type = 6;
  1771. } else if (coex_dm->cur_ps_tdma == 3) {
  1772. halbtc8192e2ant_ps_tdma(btcoexist,
  1773. NORMAL_EXEC, true, 7);
  1774. coex_dm->ps_tdma_du_adj_type = 7;
  1775. } else if (coex_dm->cur_ps_tdma == 4) {
  1776. halbtc8192e2ant_ps_tdma(btcoexist,
  1777. NORMAL_EXEC, true, 8);
  1778. coex_dm->ps_tdma_du_adj_type = 8;
  1779. }
  1780. if (coex_dm->cur_ps_tdma == 9) {
  1781. halbtc8192e2ant_ps_tdma(btcoexist,
  1782. NORMAL_EXEC, true, 13);
  1783. coex_dm->ps_tdma_du_adj_type = 13;
  1784. } else if (coex_dm->cur_ps_tdma == 10) {
  1785. halbtc8192e2ant_ps_tdma(btcoexist,
  1786. NORMAL_EXEC, true, 14);
  1787. coex_dm->ps_tdma_du_adj_type = 14;
  1788. } else if (coex_dm->cur_ps_tdma == 11) {
  1789. halbtc8192e2ant_ps_tdma(btcoexist,
  1790. NORMAL_EXEC, true, 15);
  1791. coex_dm->ps_tdma_du_adj_type = 15;
  1792. } else if (coex_dm->cur_ps_tdma == 12) {
  1793. halbtc8192e2ant_ps_tdma(btcoexist,
  1794. NORMAL_EXEC, true, 16);
  1795. coex_dm->ps_tdma_du_adj_type = 16;
  1796. }
  1797. if (result == -1) {
  1798. if (coex_dm->cur_ps_tdma == 5) {
  1799. halbtc8192e2ant_ps_tdma(
  1800. btcoexist, NORMAL_EXEC,
  1801. true, 6);
  1802. coex_dm->ps_tdma_du_adj_type =
  1803. 6;
  1804. } else if (coex_dm->cur_ps_tdma == 6) {
  1805. halbtc8192e2ant_ps_tdma(
  1806. btcoexist, NORMAL_EXEC,
  1807. true, 7);
  1808. coex_dm->ps_tdma_du_adj_type =
  1809. 7;
  1810. } else if (coex_dm->cur_ps_tdma == 7) {
  1811. halbtc8192e2ant_ps_tdma(
  1812. btcoexist, NORMAL_EXEC,
  1813. true, 8);
  1814. coex_dm->ps_tdma_du_adj_type =
  1815. 8;
  1816. } else if (coex_dm->cur_ps_tdma == 13) {
  1817. halbtc8192e2ant_ps_tdma(
  1818. btcoexist, NORMAL_EXEC,
  1819. true, 14);
  1820. coex_dm->ps_tdma_du_adj_type =
  1821. 14;
  1822. } else if (coex_dm->cur_ps_tdma == 14) {
  1823. halbtc8192e2ant_ps_tdma(
  1824. btcoexist, NORMAL_EXEC,
  1825. true, 15);
  1826. coex_dm->ps_tdma_du_adj_type =
  1827. 15;
  1828. } else if (coex_dm->cur_ps_tdma == 15) {
  1829. halbtc8192e2ant_ps_tdma(
  1830. btcoexist, NORMAL_EXEC,
  1831. true, 16);
  1832. coex_dm->ps_tdma_du_adj_type =
  1833. 16;
  1834. }
  1835. } else if (result == 1) {
  1836. if (coex_dm->cur_ps_tdma == 8) {
  1837. halbtc8192e2ant_ps_tdma(
  1838. btcoexist, NORMAL_EXEC,
  1839. true, 7);
  1840. coex_dm->ps_tdma_du_adj_type =
  1841. 7;
  1842. } else if (coex_dm->cur_ps_tdma == 7) {
  1843. halbtc8192e2ant_ps_tdma(
  1844. btcoexist, NORMAL_EXEC,
  1845. true, 6);
  1846. coex_dm->ps_tdma_du_adj_type =
  1847. 6;
  1848. } else if (coex_dm->cur_ps_tdma == 6) {
  1849. halbtc8192e2ant_ps_tdma(
  1850. btcoexist, NORMAL_EXEC,
  1851. true, 5);
  1852. coex_dm->ps_tdma_du_adj_type =
  1853. 5;
  1854. } else if (coex_dm->cur_ps_tdma == 16) {
  1855. halbtc8192e2ant_ps_tdma(
  1856. btcoexist, NORMAL_EXEC,
  1857. true, 15);
  1858. coex_dm->ps_tdma_du_adj_type =
  1859. 15;
  1860. } else if (coex_dm->cur_ps_tdma == 15) {
  1861. halbtc8192e2ant_ps_tdma(
  1862. btcoexist, NORMAL_EXEC,
  1863. true, 14);
  1864. coex_dm->ps_tdma_du_adj_type =
  1865. 14;
  1866. } else if (coex_dm->cur_ps_tdma == 14) {
  1867. halbtc8192e2ant_ps_tdma(
  1868. btcoexist, NORMAL_EXEC,
  1869. true, 13);
  1870. coex_dm->ps_tdma_du_adj_type =
  1871. 13;
  1872. }
  1873. }
  1874. } else {
  1875. if (coex_dm->cur_ps_tdma == 5) {
  1876. halbtc8192e2ant_ps_tdma(btcoexist,
  1877. NORMAL_EXEC, true, 1);
  1878. coex_dm->ps_tdma_du_adj_type = 1;
  1879. } else if (coex_dm->cur_ps_tdma == 6) {
  1880. halbtc8192e2ant_ps_tdma(btcoexist,
  1881. NORMAL_EXEC, true, 2);
  1882. coex_dm->ps_tdma_du_adj_type = 2;
  1883. } else if (coex_dm->cur_ps_tdma == 7) {
  1884. halbtc8192e2ant_ps_tdma(btcoexist,
  1885. NORMAL_EXEC, true, 3);
  1886. coex_dm->ps_tdma_du_adj_type = 3;
  1887. } else if (coex_dm->cur_ps_tdma == 8) {
  1888. halbtc8192e2ant_ps_tdma(btcoexist,
  1889. NORMAL_EXEC, true, 4);
  1890. coex_dm->ps_tdma_du_adj_type = 4;
  1891. }
  1892. if (coex_dm->cur_ps_tdma == 13) {
  1893. halbtc8192e2ant_ps_tdma(btcoexist,
  1894. NORMAL_EXEC, true, 9);
  1895. coex_dm->ps_tdma_du_adj_type = 9;
  1896. } else if (coex_dm->cur_ps_tdma == 14) {
  1897. halbtc8192e2ant_ps_tdma(btcoexist,
  1898. NORMAL_EXEC, true, 10);
  1899. coex_dm->ps_tdma_du_adj_type = 10;
  1900. } else if (coex_dm->cur_ps_tdma == 15) {
  1901. halbtc8192e2ant_ps_tdma(btcoexist,
  1902. NORMAL_EXEC, true, 11);
  1903. coex_dm->ps_tdma_du_adj_type = 11;
  1904. } else if (coex_dm->cur_ps_tdma == 16) {
  1905. halbtc8192e2ant_ps_tdma(btcoexist,
  1906. NORMAL_EXEC, true, 12);
  1907. coex_dm->ps_tdma_du_adj_type = 12;
  1908. }
  1909. if (result == -1) {
  1910. if (coex_dm->cur_ps_tdma == 1) {
  1911. halbtc8192e2ant_ps_tdma(
  1912. btcoexist, NORMAL_EXEC,
  1913. true, 2);
  1914. coex_dm->ps_tdma_du_adj_type =
  1915. 2;
  1916. } else if (coex_dm->cur_ps_tdma == 2) {
  1917. halbtc8192e2ant_ps_tdma(
  1918. btcoexist, NORMAL_EXEC,
  1919. true, 3);
  1920. coex_dm->ps_tdma_du_adj_type =
  1921. 3;
  1922. } else if (coex_dm->cur_ps_tdma == 3) {
  1923. halbtc8192e2ant_ps_tdma(
  1924. btcoexist, NORMAL_EXEC,
  1925. true, 4);
  1926. coex_dm->ps_tdma_du_adj_type =
  1927. 4;
  1928. } else if (coex_dm->cur_ps_tdma == 9) {
  1929. halbtc8192e2ant_ps_tdma(
  1930. btcoexist, NORMAL_EXEC,
  1931. true, 10);
  1932. coex_dm->ps_tdma_du_adj_type =
  1933. 10;
  1934. } else if (coex_dm->cur_ps_tdma == 10) {
  1935. halbtc8192e2ant_ps_tdma(
  1936. btcoexist, NORMAL_EXEC,
  1937. true, 11);
  1938. coex_dm->ps_tdma_du_adj_type =
  1939. 11;
  1940. } else if (coex_dm->cur_ps_tdma == 11) {
  1941. halbtc8192e2ant_ps_tdma(
  1942. btcoexist, NORMAL_EXEC,
  1943. true, 12);
  1944. coex_dm->ps_tdma_du_adj_type =
  1945. 12;
  1946. }
  1947. } else if (result == 1) {
  1948. if (coex_dm->cur_ps_tdma == 4) {
  1949. halbtc8192e2ant_ps_tdma(
  1950. btcoexist, NORMAL_EXEC,
  1951. true, 3);
  1952. coex_dm->ps_tdma_du_adj_type =
  1953. 3;
  1954. } else if (coex_dm->cur_ps_tdma == 3) {
  1955. halbtc8192e2ant_ps_tdma(
  1956. btcoexist, NORMAL_EXEC,
  1957. true, 2);
  1958. coex_dm->ps_tdma_du_adj_type =
  1959. 2;
  1960. } else if (coex_dm->cur_ps_tdma == 2) {
  1961. halbtc8192e2ant_ps_tdma(
  1962. btcoexist, NORMAL_EXEC,
  1963. true, 1);
  1964. coex_dm->ps_tdma_du_adj_type =
  1965. 1;
  1966. } else if (coex_dm->cur_ps_tdma == 1) {
  1967. halbtc8192e2ant_ps_tdma(
  1968. btcoexist, NORMAL_EXEC,
  1969. true, 71);
  1970. coex_dm->ps_tdma_du_adj_type =
  1971. 71;
  1972. } else if (coex_dm->cur_ps_tdma == 12) {
  1973. halbtc8192e2ant_ps_tdma(
  1974. btcoexist, NORMAL_EXEC,
  1975. true, 11);
  1976. coex_dm->ps_tdma_du_adj_type =
  1977. 11;
  1978. } else if (coex_dm->cur_ps_tdma == 11) {
  1979. halbtc8192e2ant_ps_tdma(
  1980. btcoexist, NORMAL_EXEC,
  1981. true, 10);
  1982. coex_dm->ps_tdma_du_adj_type =
  1983. 10;
  1984. } else if (coex_dm->cur_ps_tdma == 10) {
  1985. halbtc8192e2ant_ps_tdma(
  1986. btcoexist, NORMAL_EXEC,
  1987. true, 9);
  1988. coex_dm->ps_tdma_du_adj_type =
  1989. 9;
  1990. }
  1991. }
  1992. }
  1993. } else if (max_interval == 2) {
  1994. if (tx_pause) {
  1995. if (coex_dm->cur_ps_tdma == 1) {
  1996. halbtc8192e2ant_ps_tdma(btcoexist,
  1997. NORMAL_EXEC, true, 6);
  1998. coex_dm->ps_tdma_du_adj_type = 6;
  1999. } else if (coex_dm->cur_ps_tdma == 2) {
  2000. halbtc8192e2ant_ps_tdma(btcoexist,
  2001. NORMAL_EXEC, true, 6);
  2002. coex_dm->ps_tdma_du_adj_type = 6;
  2003. } else if (coex_dm->cur_ps_tdma == 3) {
  2004. halbtc8192e2ant_ps_tdma(btcoexist,
  2005. NORMAL_EXEC, true, 7);
  2006. coex_dm->ps_tdma_du_adj_type = 7;
  2007. } else if (coex_dm->cur_ps_tdma == 4) {
  2008. halbtc8192e2ant_ps_tdma(btcoexist,
  2009. NORMAL_EXEC, true, 8);
  2010. coex_dm->ps_tdma_du_adj_type = 8;
  2011. }
  2012. if (coex_dm->cur_ps_tdma == 9) {
  2013. halbtc8192e2ant_ps_tdma(btcoexist,
  2014. NORMAL_EXEC, true, 14);
  2015. coex_dm->ps_tdma_du_adj_type = 14;
  2016. } else if (coex_dm->cur_ps_tdma == 10) {
  2017. halbtc8192e2ant_ps_tdma(btcoexist,
  2018. NORMAL_EXEC, true, 14);
  2019. coex_dm->ps_tdma_du_adj_type = 14;
  2020. } else if (coex_dm->cur_ps_tdma == 11) {
  2021. halbtc8192e2ant_ps_tdma(btcoexist,
  2022. NORMAL_EXEC, true, 15);
  2023. coex_dm->ps_tdma_du_adj_type = 15;
  2024. } else if (coex_dm->cur_ps_tdma == 12) {
  2025. halbtc8192e2ant_ps_tdma(btcoexist,
  2026. NORMAL_EXEC, true, 16);
  2027. coex_dm->ps_tdma_du_adj_type = 16;
  2028. }
  2029. if (result == -1) {
  2030. if (coex_dm->cur_ps_tdma == 5) {
  2031. halbtc8192e2ant_ps_tdma(
  2032. btcoexist, NORMAL_EXEC,
  2033. true, 6);
  2034. coex_dm->ps_tdma_du_adj_type =
  2035. 6;
  2036. } else if (coex_dm->cur_ps_tdma == 6) {
  2037. halbtc8192e2ant_ps_tdma(
  2038. btcoexist, NORMAL_EXEC,
  2039. true, 7);
  2040. coex_dm->ps_tdma_du_adj_type =
  2041. 7;
  2042. } else if (coex_dm->cur_ps_tdma == 7) {
  2043. halbtc8192e2ant_ps_tdma(
  2044. btcoexist, NORMAL_EXEC,
  2045. true, 8);
  2046. coex_dm->ps_tdma_du_adj_type =
  2047. 8;
  2048. } else if (coex_dm->cur_ps_tdma == 13) {
  2049. halbtc8192e2ant_ps_tdma(
  2050. btcoexist, NORMAL_EXEC,
  2051. true, 14);
  2052. coex_dm->ps_tdma_du_adj_type =
  2053. 14;
  2054. } else if (coex_dm->cur_ps_tdma == 14) {
  2055. halbtc8192e2ant_ps_tdma(
  2056. btcoexist, NORMAL_EXEC,
  2057. true, 15);
  2058. coex_dm->ps_tdma_du_adj_type =
  2059. 15;
  2060. } else if (coex_dm->cur_ps_tdma == 15) {
  2061. halbtc8192e2ant_ps_tdma(
  2062. btcoexist, NORMAL_EXEC,
  2063. true, 16);
  2064. coex_dm->ps_tdma_du_adj_type =
  2065. 16;
  2066. }
  2067. } else if (result == 1) {
  2068. if (coex_dm->cur_ps_tdma == 8) {
  2069. halbtc8192e2ant_ps_tdma(
  2070. btcoexist, NORMAL_EXEC,
  2071. true, 7);
  2072. coex_dm->ps_tdma_du_adj_type =
  2073. 7;
  2074. } else if (coex_dm->cur_ps_tdma == 7) {
  2075. halbtc8192e2ant_ps_tdma(
  2076. btcoexist, NORMAL_EXEC,
  2077. true, 6);
  2078. coex_dm->ps_tdma_du_adj_type =
  2079. 6;
  2080. } else if (coex_dm->cur_ps_tdma == 6) {
  2081. halbtc8192e2ant_ps_tdma(
  2082. btcoexist, NORMAL_EXEC,
  2083. true, 6);
  2084. coex_dm->ps_tdma_du_adj_type =
  2085. 6;
  2086. } else if (coex_dm->cur_ps_tdma == 16) {
  2087. halbtc8192e2ant_ps_tdma(
  2088. btcoexist, NORMAL_EXEC,
  2089. true, 15);
  2090. coex_dm->ps_tdma_du_adj_type =
  2091. 15;
  2092. } else if (coex_dm->cur_ps_tdma == 15) {
  2093. halbtc8192e2ant_ps_tdma(
  2094. btcoexist, NORMAL_EXEC,
  2095. true, 14);
  2096. coex_dm->ps_tdma_du_adj_type =
  2097. 14;
  2098. } else if (coex_dm->cur_ps_tdma == 14) {
  2099. halbtc8192e2ant_ps_tdma(
  2100. btcoexist, NORMAL_EXEC,
  2101. true, 14);
  2102. coex_dm->ps_tdma_du_adj_type =
  2103. 14;
  2104. }
  2105. }
  2106. } else {
  2107. if (coex_dm->cur_ps_tdma == 5) {
  2108. halbtc8192e2ant_ps_tdma(btcoexist,
  2109. NORMAL_EXEC, true, 2);
  2110. coex_dm->ps_tdma_du_adj_type = 2;
  2111. } else if (coex_dm->cur_ps_tdma == 6) {
  2112. halbtc8192e2ant_ps_tdma(btcoexist,
  2113. NORMAL_EXEC, true, 2);
  2114. coex_dm->ps_tdma_du_adj_type = 2;
  2115. } else if (coex_dm->cur_ps_tdma == 7) {
  2116. halbtc8192e2ant_ps_tdma(btcoexist,
  2117. NORMAL_EXEC, true, 3);
  2118. coex_dm->ps_tdma_du_adj_type = 3;
  2119. } else if (coex_dm->cur_ps_tdma == 8) {
  2120. halbtc8192e2ant_ps_tdma(btcoexist,
  2121. NORMAL_EXEC, true, 4);
  2122. coex_dm->ps_tdma_du_adj_type = 4;
  2123. }
  2124. if (coex_dm->cur_ps_tdma == 13) {
  2125. halbtc8192e2ant_ps_tdma(btcoexist,
  2126. NORMAL_EXEC, true, 10);
  2127. coex_dm->ps_tdma_du_adj_type = 10;
  2128. } else if (coex_dm->cur_ps_tdma == 14) {
  2129. halbtc8192e2ant_ps_tdma(btcoexist,
  2130. NORMAL_EXEC, true, 10);
  2131. coex_dm->ps_tdma_du_adj_type = 10;
  2132. } else if (coex_dm->cur_ps_tdma == 15) {
  2133. halbtc8192e2ant_ps_tdma(btcoexist,
  2134. NORMAL_EXEC, true, 11);
  2135. coex_dm->ps_tdma_du_adj_type = 11;
  2136. } else if (coex_dm->cur_ps_tdma == 16) {
  2137. halbtc8192e2ant_ps_tdma(btcoexist,
  2138. NORMAL_EXEC, true, 12);
  2139. coex_dm->ps_tdma_du_adj_type = 12;
  2140. }
  2141. if (result == -1) {
  2142. if (coex_dm->cur_ps_tdma == 1) {
  2143. halbtc8192e2ant_ps_tdma(
  2144. btcoexist, NORMAL_EXEC,
  2145. true, 2);
  2146. coex_dm->ps_tdma_du_adj_type =
  2147. 2;
  2148. } else if (coex_dm->cur_ps_tdma == 2) {
  2149. halbtc8192e2ant_ps_tdma(
  2150. btcoexist, NORMAL_EXEC,
  2151. true, 3);
  2152. coex_dm->ps_tdma_du_adj_type =
  2153. 3;
  2154. } else if (coex_dm->cur_ps_tdma == 3) {
  2155. halbtc8192e2ant_ps_tdma(
  2156. btcoexist, NORMAL_EXEC,
  2157. true, 4);
  2158. coex_dm->ps_tdma_du_adj_type =
  2159. 4;
  2160. } else if (coex_dm->cur_ps_tdma == 9) {
  2161. halbtc8192e2ant_ps_tdma(
  2162. btcoexist, NORMAL_EXEC,
  2163. true, 10);
  2164. coex_dm->ps_tdma_du_adj_type =
  2165. 10;
  2166. } else if (coex_dm->cur_ps_tdma == 10) {
  2167. halbtc8192e2ant_ps_tdma(
  2168. btcoexist, NORMAL_EXEC,
  2169. true, 11);
  2170. coex_dm->ps_tdma_du_adj_type =
  2171. 11;
  2172. } else if (coex_dm->cur_ps_tdma == 11) {
  2173. halbtc8192e2ant_ps_tdma(
  2174. btcoexist, NORMAL_EXEC,
  2175. true, 12);
  2176. coex_dm->ps_tdma_du_adj_type =
  2177. 12;
  2178. }
  2179. } else if (result == 1) {
  2180. if (coex_dm->cur_ps_tdma == 4) {
  2181. halbtc8192e2ant_ps_tdma(
  2182. btcoexist, NORMAL_EXEC,
  2183. true, 3);
  2184. coex_dm->ps_tdma_du_adj_type =
  2185. 3;
  2186. } else if (coex_dm->cur_ps_tdma == 3) {
  2187. halbtc8192e2ant_ps_tdma(
  2188. btcoexist, NORMAL_EXEC,
  2189. true, 2);
  2190. coex_dm->ps_tdma_du_adj_type =
  2191. 2;
  2192. } else if (coex_dm->cur_ps_tdma == 2) {
  2193. halbtc8192e2ant_ps_tdma(
  2194. btcoexist, NORMAL_EXEC,
  2195. true, 2);
  2196. coex_dm->ps_tdma_du_adj_type =
  2197. 2;
  2198. } else if (coex_dm->cur_ps_tdma == 12) {
  2199. halbtc8192e2ant_ps_tdma(
  2200. btcoexist, NORMAL_EXEC,
  2201. true, 11);
  2202. coex_dm->ps_tdma_du_adj_type =
  2203. 11;
  2204. } else if (coex_dm->cur_ps_tdma == 11) {
  2205. halbtc8192e2ant_ps_tdma(
  2206. btcoexist, NORMAL_EXEC,
  2207. true, 10);
  2208. coex_dm->ps_tdma_du_adj_type =
  2209. 10;
  2210. } else if (coex_dm->cur_ps_tdma == 10) {
  2211. halbtc8192e2ant_ps_tdma(
  2212. btcoexist, NORMAL_EXEC,
  2213. true, 10);
  2214. coex_dm->ps_tdma_du_adj_type =
  2215. 10;
  2216. }
  2217. }
  2218. }
  2219. } else if (max_interval == 3) {
  2220. if (tx_pause) {
  2221. if (coex_dm->cur_ps_tdma == 1) {
  2222. halbtc8192e2ant_ps_tdma(btcoexist,
  2223. NORMAL_EXEC, true, 7);
  2224. coex_dm->ps_tdma_du_adj_type = 7;
  2225. } else if (coex_dm->cur_ps_tdma == 2) {
  2226. halbtc8192e2ant_ps_tdma(btcoexist,
  2227. NORMAL_EXEC, true, 7);
  2228. coex_dm->ps_tdma_du_adj_type = 7;
  2229. } else if (coex_dm->cur_ps_tdma == 3) {
  2230. halbtc8192e2ant_ps_tdma(btcoexist,
  2231. NORMAL_EXEC, true, 7);
  2232. coex_dm->ps_tdma_du_adj_type = 7;
  2233. } else if (coex_dm->cur_ps_tdma == 4) {
  2234. halbtc8192e2ant_ps_tdma(btcoexist,
  2235. NORMAL_EXEC, true, 8);
  2236. coex_dm->ps_tdma_du_adj_type = 8;
  2237. }
  2238. if (coex_dm->cur_ps_tdma == 9) {
  2239. halbtc8192e2ant_ps_tdma(btcoexist,
  2240. NORMAL_EXEC, true, 15);
  2241. coex_dm->ps_tdma_du_adj_type = 15;
  2242. } else if (coex_dm->cur_ps_tdma == 10) {
  2243. halbtc8192e2ant_ps_tdma(btcoexist,
  2244. NORMAL_EXEC, true, 15);
  2245. coex_dm->ps_tdma_du_adj_type = 15;
  2246. } else if (coex_dm->cur_ps_tdma == 11) {
  2247. halbtc8192e2ant_ps_tdma(btcoexist,
  2248. NORMAL_EXEC, true, 15);
  2249. coex_dm->ps_tdma_du_adj_type = 15;
  2250. } else if (coex_dm->cur_ps_tdma == 12) {
  2251. halbtc8192e2ant_ps_tdma(btcoexist,
  2252. NORMAL_EXEC, true, 16);
  2253. coex_dm->ps_tdma_du_adj_type = 16;
  2254. }
  2255. if (result == -1) {
  2256. if (coex_dm->cur_ps_tdma == 5) {
  2257. halbtc8192e2ant_ps_tdma(
  2258. btcoexist, NORMAL_EXEC,
  2259. true, 7);
  2260. coex_dm->ps_tdma_du_adj_type =
  2261. 7;
  2262. } else if (coex_dm->cur_ps_tdma == 6) {
  2263. halbtc8192e2ant_ps_tdma(
  2264. btcoexist, NORMAL_EXEC,
  2265. true, 7);
  2266. coex_dm->ps_tdma_du_adj_type =
  2267. 7;
  2268. } else if (coex_dm->cur_ps_tdma == 7) {
  2269. halbtc8192e2ant_ps_tdma(
  2270. btcoexist, NORMAL_EXEC,
  2271. true, 8);
  2272. coex_dm->ps_tdma_du_adj_type =
  2273. 8;
  2274. } else if (coex_dm->cur_ps_tdma == 13) {
  2275. halbtc8192e2ant_ps_tdma(
  2276. btcoexist, NORMAL_EXEC,
  2277. true, 15);
  2278. coex_dm->ps_tdma_du_adj_type =
  2279. 15;
  2280. } else if (coex_dm->cur_ps_tdma == 14) {
  2281. halbtc8192e2ant_ps_tdma(
  2282. btcoexist, NORMAL_EXEC,
  2283. true, 15);
  2284. coex_dm->ps_tdma_du_adj_type =
  2285. 15;
  2286. } else if (coex_dm->cur_ps_tdma == 15) {
  2287. halbtc8192e2ant_ps_tdma(
  2288. btcoexist, NORMAL_EXEC,
  2289. true, 16);
  2290. coex_dm->ps_tdma_du_adj_type =
  2291. 16;
  2292. }
  2293. } else if (result == 1) {
  2294. if (coex_dm->cur_ps_tdma == 8) {
  2295. halbtc8192e2ant_ps_tdma(
  2296. btcoexist, NORMAL_EXEC,
  2297. true, 7);
  2298. coex_dm->ps_tdma_du_adj_type =
  2299. 7;
  2300. } else if (coex_dm->cur_ps_tdma == 7) {
  2301. halbtc8192e2ant_ps_tdma(
  2302. btcoexist, NORMAL_EXEC,
  2303. true, 7);
  2304. coex_dm->ps_tdma_du_adj_type =
  2305. 7;
  2306. } else if (coex_dm->cur_ps_tdma == 6) {
  2307. halbtc8192e2ant_ps_tdma(
  2308. btcoexist, NORMAL_EXEC,
  2309. true, 7);
  2310. coex_dm->ps_tdma_du_adj_type =
  2311. 7;
  2312. } else if (coex_dm->cur_ps_tdma == 16) {
  2313. halbtc8192e2ant_ps_tdma(
  2314. btcoexist, NORMAL_EXEC,
  2315. true, 15);
  2316. coex_dm->ps_tdma_du_adj_type =
  2317. 15;
  2318. } else if (coex_dm->cur_ps_tdma == 15) {
  2319. halbtc8192e2ant_ps_tdma(
  2320. btcoexist, NORMAL_EXEC,
  2321. true, 15);
  2322. coex_dm->ps_tdma_du_adj_type =
  2323. 15;
  2324. } else if (coex_dm->cur_ps_tdma == 14) {
  2325. halbtc8192e2ant_ps_tdma(
  2326. btcoexist, NORMAL_EXEC,
  2327. true, 15);
  2328. coex_dm->ps_tdma_du_adj_type =
  2329. 15;
  2330. }
  2331. }
  2332. } else {
  2333. if (coex_dm->cur_ps_tdma == 5) {
  2334. halbtc8192e2ant_ps_tdma(btcoexist,
  2335. NORMAL_EXEC, true, 3);
  2336. coex_dm->ps_tdma_du_adj_type = 3;
  2337. } else if (coex_dm->cur_ps_tdma == 6) {
  2338. halbtc8192e2ant_ps_tdma(btcoexist,
  2339. NORMAL_EXEC, true, 3);
  2340. coex_dm->ps_tdma_du_adj_type = 3;
  2341. } else if (coex_dm->cur_ps_tdma == 7) {
  2342. halbtc8192e2ant_ps_tdma(btcoexist,
  2343. NORMAL_EXEC, true, 3);
  2344. coex_dm->ps_tdma_du_adj_type = 3;
  2345. } else if (coex_dm->cur_ps_tdma == 8) {
  2346. halbtc8192e2ant_ps_tdma(btcoexist,
  2347. NORMAL_EXEC, true, 4);
  2348. coex_dm->ps_tdma_du_adj_type = 4;
  2349. }
  2350. if (coex_dm->cur_ps_tdma == 13) {
  2351. halbtc8192e2ant_ps_tdma(btcoexist,
  2352. NORMAL_EXEC, true, 11);
  2353. coex_dm->ps_tdma_du_adj_type = 11;
  2354. } else if (coex_dm->cur_ps_tdma == 14) {
  2355. halbtc8192e2ant_ps_tdma(btcoexist,
  2356. NORMAL_EXEC, true, 11);
  2357. coex_dm->ps_tdma_du_adj_type = 11;
  2358. } else if (coex_dm->cur_ps_tdma == 15) {
  2359. halbtc8192e2ant_ps_tdma(btcoexist,
  2360. NORMAL_EXEC, true, 11);
  2361. coex_dm->ps_tdma_du_adj_type = 11;
  2362. } else if (coex_dm->cur_ps_tdma == 16) {
  2363. halbtc8192e2ant_ps_tdma(btcoexist,
  2364. NORMAL_EXEC, true, 12);
  2365. coex_dm->ps_tdma_du_adj_type = 12;
  2366. }
  2367. if (result == -1) {
  2368. if (coex_dm->cur_ps_tdma == 1) {
  2369. halbtc8192e2ant_ps_tdma(
  2370. btcoexist, NORMAL_EXEC,
  2371. true, 3);
  2372. coex_dm->ps_tdma_du_adj_type =
  2373. 3;
  2374. } else if (coex_dm->cur_ps_tdma == 2) {
  2375. halbtc8192e2ant_ps_tdma(
  2376. btcoexist, NORMAL_EXEC,
  2377. true, 3);
  2378. coex_dm->ps_tdma_du_adj_type =
  2379. 3;
  2380. } else if (coex_dm->cur_ps_tdma == 3) {
  2381. halbtc8192e2ant_ps_tdma(
  2382. btcoexist, NORMAL_EXEC,
  2383. true, 4);
  2384. coex_dm->ps_tdma_du_adj_type =
  2385. 4;
  2386. } else if (coex_dm->cur_ps_tdma == 9) {
  2387. halbtc8192e2ant_ps_tdma(
  2388. btcoexist, NORMAL_EXEC,
  2389. true, 11);
  2390. coex_dm->ps_tdma_du_adj_type =
  2391. 11;
  2392. } else if (coex_dm->cur_ps_tdma == 10) {
  2393. halbtc8192e2ant_ps_tdma(
  2394. btcoexist, NORMAL_EXEC,
  2395. true, 11);
  2396. coex_dm->ps_tdma_du_adj_type =
  2397. 11;
  2398. } else if (coex_dm->cur_ps_tdma == 11) {
  2399. halbtc8192e2ant_ps_tdma(
  2400. btcoexist, NORMAL_EXEC,
  2401. true, 12);
  2402. coex_dm->ps_tdma_du_adj_type =
  2403. 12;
  2404. }
  2405. } else if (result == 1) {
  2406. if (coex_dm->cur_ps_tdma == 4) {
  2407. halbtc8192e2ant_ps_tdma(
  2408. btcoexist, NORMAL_EXEC,
  2409. true, 3);
  2410. coex_dm->ps_tdma_du_adj_type =
  2411. 3;
  2412. } else if (coex_dm->cur_ps_tdma == 3) {
  2413. halbtc8192e2ant_ps_tdma(
  2414. btcoexist, NORMAL_EXEC,
  2415. true, 3);
  2416. coex_dm->ps_tdma_du_adj_type =
  2417. 3;
  2418. } else if (coex_dm->cur_ps_tdma == 2) {
  2419. halbtc8192e2ant_ps_tdma(
  2420. btcoexist, NORMAL_EXEC,
  2421. true, 3);
  2422. coex_dm->ps_tdma_du_adj_type =
  2423. 3;
  2424. } else if (coex_dm->cur_ps_tdma == 12) {
  2425. halbtc8192e2ant_ps_tdma(
  2426. btcoexist, NORMAL_EXEC,
  2427. true, 11);
  2428. coex_dm->ps_tdma_du_adj_type =
  2429. 11;
  2430. } else if (coex_dm->cur_ps_tdma == 11) {
  2431. halbtc8192e2ant_ps_tdma(
  2432. btcoexist, NORMAL_EXEC,
  2433. true, 11);
  2434. coex_dm->ps_tdma_du_adj_type =
  2435. 11;
  2436. } else if (coex_dm->cur_ps_tdma == 10) {
  2437. halbtc8192e2ant_ps_tdma(
  2438. btcoexist, NORMAL_EXEC,
  2439. true, 11);
  2440. coex_dm->ps_tdma_du_adj_type =
  2441. 11;
  2442. }
  2443. }
  2444. }
  2445. }
  2446. }
  2447. /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
  2448. /* then we have to adjust it back to the previous record one. */
  2449. if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
  2450. boolean scan = false, link = false, roam = false;
  2451. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2452. "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
  2453. coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
  2454. BTC_TRACE(trace_buf);
  2455. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2456. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2457. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2458. if (!scan && !link && !roam)
  2459. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2460. coex_dm->ps_tdma_du_adj_type);
  2461. else {
  2462. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2463. "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
  2464. BTC_TRACE(trace_buf);
  2465. }
  2466. }
  2467. }
  2468. /* ******************
  2469. * pstdma for wifi rssi low
  2470. * ****************** */
  2471. void halbtc8192e2ant_tdma_duration_adjust_for_wifi_rssi_low(
  2472. IN struct btc_coexist *btcoexist/* , */ /* IN u8 wifi_status */)
  2473. {
  2474. static s32 up, dn, m, n, wait_count;
  2475. s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
  2476. u8 retry_count = 0, bt_info_ext;
  2477. coex_dm->auto_tdma_adjust = false;
  2478. retry_count = coex_sta->bt_retry_cnt;
  2479. bt_info_ext = coex_sta->bt_info_ext;
  2480. if (!coex_dm->auto_tdma_adjust_low_rssi) {
  2481. coex_dm->auto_tdma_adjust_low_rssi = true;
  2482. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 81);
  2483. coex_dm->ps_tdma_du_adj_type = 81;
  2484. /* ============ */
  2485. up = 0;
  2486. dn = 0;
  2487. m = 1;
  2488. n = 3;
  2489. result = 0;
  2490. wait_count = 0;
  2491. } else {
  2492. /* acquire the BT TRx retry count from BT_Info byte2
  2493. * retry_count = coex_sta->bt_retry_cnt;
  2494. * bt_info_ext = coex_sta->bt_info_ext; */
  2495. result = 0;
  2496. wait_count++;
  2497. if ((coex_sta->low_priority_tx) > 1050 ||
  2498. (coex_sta->low_priority_rx) > 1250)
  2499. retry_count++;
  2500. if (retry_count ==
  2501. 0) { /* no retry in the last 2-second duration */
  2502. up++;
  2503. dn--;
  2504. if (dn <= 0)
  2505. dn = 0;
  2506. if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
  2507. wait_count = 0;
  2508. n = 3;
  2509. up = 0;
  2510. dn = 0;
  2511. result = 1;
  2512. }
  2513. } else if (retry_count <=
  2514. 3) { /* <=3 retry in the last 2-second duration */
  2515. up--;
  2516. dn++;
  2517. if (up <= 0)
  2518. up = 0;
  2519. if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
  2520. if (wait_count <= 2)
  2521. m++; /* to avoid loop between the two levels */
  2522. else
  2523. m = 1;
  2524. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  2525. m = 20;
  2526. n = 3 * m;
  2527. up = 0;
  2528. dn = 0;
  2529. wait_count = 0;
  2530. result = -1;
  2531. }
  2532. } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
  2533. if (wait_count == 1)
  2534. m++; /* to avoid loop between the two levels */
  2535. else
  2536. m = 1;
  2537. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  2538. m = 20;
  2539. n = 3 * m;
  2540. up = 0;
  2541. dn = 0;
  2542. wait_count = 0;
  2543. result = -1;
  2544. }
  2545. if (result == -1) {
  2546. if (coex_dm->cur_ps_tdma == 80) {
  2547. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2548. true, 81);
  2549. coex_dm->ps_tdma_du_adj_type = 81;
  2550. } else if (coex_dm->cur_ps_tdma == 81) {
  2551. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2552. true, 82);
  2553. coex_dm->ps_tdma_du_adj_type = 82;
  2554. } else if (coex_dm->cur_ps_tdma == 82) {
  2555. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2556. true, 83);
  2557. coex_dm->ps_tdma_du_adj_type = 83;
  2558. } else if (coex_dm->cur_ps_tdma == 83) {
  2559. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2560. true, 84);
  2561. coex_dm->ps_tdma_du_adj_type = 84;
  2562. }
  2563. } else if (result == 1) {
  2564. if (coex_dm->cur_ps_tdma == 84) {
  2565. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2566. true, 83);
  2567. coex_dm->ps_tdma_du_adj_type = 83;
  2568. } else if (coex_dm->cur_ps_tdma == 83) {
  2569. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2570. true, 82);
  2571. coex_dm->ps_tdma_du_adj_type = 82;
  2572. } else if (coex_dm->cur_ps_tdma == 82) {
  2573. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2574. true, 81);
  2575. coex_dm->ps_tdma_du_adj_type = 81;
  2576. } else if ((coex_dm->cur_ps_tdma == 81) &&
  2577. (coex_sta->scan_ap_num <= 5)) {
  2578. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2579. true, 81);
  2580. coex_dm->ps_tdma_du_adj_type = 81;
  2581. }
  2582. }
  2583. if (coex_dm->cur_ps_tdma != 80 &&
  2584. coex_dm->cur_ps_tdma != 81 &&
  2585. coex_dm->cur_ps_tdma != 82 &&
  2586. coex_dm->cur_ps_tdma != 83 &&
  2587. coex_dm->cur_ps_tdma != 84) {
  2588. /* recover to previous adjust type */
  2589. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2590. coex_dm->ps_tdma_du_adj_type);
  2591. }
  2592. }
  2593. }
  2594. void halbtc8192e2ant_get_bt_rssi_threshold(IN struct btc_coexist *btcoexist,
  2595. IN u8 *pThres0, IN u8 *pThres1)
  2596. {
  2597. u8 ant_type;
  2598. struct btc_board_info *board_info = &btcoexist->board_info;
  2599. ant_type = board_info->ant_type;
  2600. switch (ant_type) {
  2601. case BTC_ANT_TYPE_0:
  2602. *pThres0 = 100;
  2603. *pThres1 = 100;
  2604. break;
  2605. case BTC_ANT_TYPE_1:
  2606. *pThres0 = 34;
  2607. *pThres1 = 42;
  2608. break;
  2609. case BTC_ANT_TYPE_2:
  2610. *pThres0 = 34;
  2611. *pThres1 = 42;
  2612. break;
  2613. case BTC_ANT_TYPE_3:
  2614. *pThres0 = 34;
  2615. *pThres1 = 42;
  2616. break;
  2617. case BTC_ANT_TYPE_4:
  2618. *pThres0 = 34;
  2619. *pThres1 = 42;
  2620. break;
  2621. default:
  2622. break;
  2623. }
  2624. }
  2625. void halbtc8192e2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
  2626. {
  2627. if (coex_sta->wifi_is_high_pri_task) {
  2628. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2629. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2630. } else {
  2631. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2632. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2633. }
  2634. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2635. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2636. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2637. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2638. }
  2639. /* SCO only or SCO+PAN(HS) */
  2640. void halbtc8192e2ant_action_sco(IN struct btc_coexist *btcoexist)
  2641. {
  2642. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  2643. u32 wifi_bw;
  2644. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2645. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2646. &bt_thresh1);
  2647. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2648. bt_thresh1);
  2649. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
  2650. 0);
  2651. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2652. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2653. else
  2654. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2655. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2656. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2657. else
  2658. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2659. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2660. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2661. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2662. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2663. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2664. }
  2665. void halbtc8192e2ant_action_sco_pan(IN struct btc_coexist *btcoexist)
  2666. {
  2667. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  2668. u32 wifi_bw;
  2669. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2670. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2671. &bt_thresh1);
  2672. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2673. bt_thresh1);
  2674. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
  2675. 0);
  2676. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2677. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2678. else
  2679. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2680. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2681. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
  2682. else
  2683. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
  2684. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2685. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2686. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2687. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)) &&
  2688. (coex_sta->scan_ap_num < NOISY_AP_NUM_THRESH_8192E))
  2689. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
  2690. 0x18);
  2691. else if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2692. (!BTC_RSSI_LOW(bt_rssi_state)) &&
  2693. (coex_sta->scan_ap_num > NOISY_AP_NUM_THRESH_8192E))
  2694. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
  2695. 0x18);
  2696. else
  2697. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
  2698. 0x18);
  2699. }
  2700. void halbtc8192e2ant_action_hid(IN struct btc_coexist *btcoexist)
  2701. {
  2702. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2703. u32 wifi_bw;
  2704. u8 anttype = 0;
  2705. btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
  2706. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
  2707. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
  2708. if (anttype == 0) {
  2709. /*ANTTYPE = 0 2ant with SPDT*/
  2710. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 28);
  2711. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2712. } else if (anttype == 1) {
  2713. /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
  2714. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 28);
  2715. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2716. } else if (anttype == 2) {
  2717. /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
  2718. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  2719. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2720. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  2721. } else {
  2722. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2723. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  2724. }
  2725. } else if (anttype == 3) {
  2726. /*ANTTYPE = 3, 3ant with good ant. isolation*/
  2727. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  2728. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2729. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2730. } else {
  2731. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2732. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2733. }
  2734. }
  2735. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2736. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2737. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2738. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2739. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2740. }
  2741. /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
  2742. void halbtc8192e2ant_action_a2dp(IN struct btc_coexist *btcoexist)
  2743. {
  2744. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2745. u32 wifi_bw;
  2746. boolean long_dist = false;
  2747. u8 anttype = 0;
  2748. btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
  2749. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
  2750. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
  2751. if (anttype == 0) {
  2752. /*ANTTYPE = 0 2ant with SPDT*/
  2753. if ((coex_sta->scan_ap_num > 40) && (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))) {
  2754. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
  2755. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2756. } else {
  2757. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
  2758. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2759. }
  2760. } else if (anttype == 1) {
  2761. /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
  2762. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  2763. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
  2764. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2765. } else {
  2766. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
  2767. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2768. }
  2769. } else if (anttype == 2) {
  2770. /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
  2771. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  2772. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  2773. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  2774. } else {
  2775. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
  2776. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2777. }
  2778. } else if (anttype == 3) {
  2779. /*ANTTYPE = 3, 3ant with good ant. isolation*/
  2780. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2781. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2782. }
  2783. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2784. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2785. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2786. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2787. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2788. }
  2789. void halbtc8192e2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
  2790. {
  2791. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2792. u32 wifi_bw;
  2793. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
  2794. 0);
  2795. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
  2796. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2797. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2798. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2799. if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  2800. (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2801. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
  2802. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2803. } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2804. (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2805. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
  2806. 2);
  2807. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2808. } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2809. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2810. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, false,
  2811. 2);
  2812. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
  2813. }
  2814. /* sw mechanism */
  2815. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2816. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2817. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2818. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2819. halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
  2820. false, false);
  2821. halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
  2822. true, 0x6);
  2823. } else {
  2824. halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
  2825. false, false);
  2826. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
  2827. true, 0x6);
  2828. }
  2829. } else {
  2830. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2831. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2832. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
  2833. false, false);
  2834. halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
  2835. true, 0x6);
  2836. } else {
  2837. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
  2838. false, false);
  2839. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
  2840. true, 0x6);
  2841. }
  2842. }
  2843. }
  2844. void halbtc8192e2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
  2845. {
  2846. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2847. u32 wifi_bw;
  2848. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2849. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2850. &bt_thresh1);
  2851. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2852. bt_thresh1);
  2853. /* wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
  2854. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  2855. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2856. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2857. else
  2858. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2859. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2860. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
  2861. else
  2862. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 85);
  2863. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2864. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2865. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2866. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2867. }
  2868. /* PAN(HS) only */
  2869. void halbtc8192e2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
  2870. {
  2871. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2872. u32 wifi_bw;
  2873. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15,
  2874. 0);
  2875. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
  2876. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2877. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2878. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2879. if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  2880. (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW))
  2881. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2882. else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2883. (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM))
  2884. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2885. else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2886. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
  2887. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
  2888. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2889. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2890. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2891. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2892. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2893. halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
  2894. false, false);
  2895. halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
  2896. false, 0x18);
  2897. } else {
  2898. halbtc8192e2ant_sw_mechanism1(btcoexist, true, false,
  2899. false, false);
  2900. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
  2901. false, 0x18);
  2902. }
  2903. } else {
  2904. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2905. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2906. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
  2907. false, false);
  2908. halbtc8192e2ant_sw_mechanism2(btcoexist, true, false,
  2909. false, 0x18);
  2910. } else {
  2911. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false,
  2912. false, false);
  2913. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false,
  2914. false, 0x18);
  2915. }
  2916. }
  2917. }
  2918. /* PAN(EDR)+A2DP */
  2919. void halbtc8192e2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
  2920. {
  2921. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2922. u32 wifi_bw;
  2923. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2924. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2925. &bt_thresh1);
  2926. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2927. bt_thresh1);
  2928. /* wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0); */
  2929. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  2930. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2931. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2932. else
  2933. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2934. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2935. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
  2936. else
  2937. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
  2938. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2939. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2940. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2941. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2942. }
  2943. void halbtc8192e2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
  2944. {
  2945. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2946. u32 wifi_bw;
  2947. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2948. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2949. &bt_thresh1);
  2950. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2951. bt_thresh1);
  2952. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
  2953. 0);
  2954. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2955. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  2956. else
  2957. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2958. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2959. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
  2960. else
  2961. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
  2962. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2963. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2964. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2965. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2966. }
  2967. /* HID+A2DP+PAN(EDR) */
  2968. void halbtc8192e2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
  2969. {
  2970. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2971. u32 wifi_bw;
  2972. u8 bt_thresh0 = 0, bt_thresh1 = 0;
  2973. halbtc8192e2ant_get_bt_rssi_threshold(btcoexist, &bt_thresh0,
  2974. &bt_thresh1);
  2975. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, bt_thresh0,
  2976. bt_thresh1);
  2977. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34,
  2978. 0);
  2979. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2980. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  2981. else
  2982. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2983. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))
  2984. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
  2985. else
  2986. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 86);
  2987. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2988. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2989. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  2990. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  2991. }
  2992. void halbtc8192e2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
  2993. {
  2994. u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
  2995. u32 wifi_bw;
  2996. u8 bt_thresh0 = 0, bt_thresh1 = 0, anttype = 0;
  2997. btcoexist->btc_get(btcoexist, BTC_GET_U1_ANT_TYPE, &anttype);
  2998. wifi_rssi_state = halbtc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 34, 0);
  2999. bt_rssi_state = halbtc8192e2ant_bt_rssi_state(3, 34, 42);
  3000. if (anttype == 0) {
  3001. /*2ant with SPDT*/
  3002. if ((coex_sta->scan_ap_num > 40) && (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state)))) {
  3003. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 31);
  3004. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
  3005. } else {
  3006. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 88);
  3007. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  3008. }
  3009. } else if (anttype == 1) {
  3010. /*2ant with coupler and bad ant. isolation, 3ant with bad ant. isolation*/
  3011. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  3012. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
  3013. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  3014. } else {
  3015. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
  3016. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  3017. }
  3018. } else if (anttype == 2) {
  3019. /*ANTTYPE = 2, 2ant with coupler and normal/good ant. isolation, 3ant with normal ant. isolation*/
  3020. if (BTC_RSSI_HIGH(wifi_rssi_state) && (!BTC_RSSI_LOW(bt_rssi_state))) {
  3021. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 25);
  3022. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  3023. } else {
  3024. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 87);
  3025. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  3026. }
  3027. } else if (anttype == 3) {
  3028. /*ANTTYPE = 3, 3ant with good ant. isolation*/
  3029. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  3030. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  3031. }
  3032. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3033. halbtc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3034. halbtc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
  3035. halbtc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  3036. }
  3037. void halbtc8192e2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
  3038. {
  3039. u8 algorithm = 0;
  3040. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3041. "[BTCoex], RunCoexistMechanism()===>\n");
  3042. BTC_TRACE(trace_buf);
  3043. if (btcoexist->manual_control) {
  3044. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3045. "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
  3046. BTC_TRACE(trace_buf);
  3047. return;
  3048. }
  3049. if (coex_sta->under_ips) {
  3050. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3051. "[BTCoex], wifi is under IPS !!!\n");
  3052. BTC_TRACE(trace_buf);
  3053. return;
  3054. }
  3055. algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
  3056. if (coex_sta->c2h_bt_inquiry_page &&
  3057. (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
  3058. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3059. "[BTCoex], BT is under inquiry/page scan !!\n");
  3060. BTC_TRACE(trace_buf);
  3061. halbtc8192e2ant_action_bt_inquiry(btcoexist);
  3062. return;
  3063. }
  3064. if (coex_sta->is_setup_link) {
  3065. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3066. "[BTCoex], BT is re-link !!!\n");
  3067. halbtc8192e2ant_action_bt_relink(btcoexist);
  3068. return;
  3069. }
  3070. coex_dm->cur_algorithm = algorithm;
  3071. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
  3072. coex_dm->cur_algorithm);
  3073. BTC_TRACE(trace_buf);
  3074. if (halbtc8192e2ant_is_common_action(btcoexist)) {
  3075. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3076. "[BTCoex], Action 2-Ant common.\n");
  3077. BTC_TRACE(trace_buf);
  3078. coex_dm->auto_tdma_adjust = false;
  3079. coex_dm->auto_tdma_adjust_low_rssi = false;
  3080. } else {
  3081. if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
  3082. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3083. "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
  3084. coex_dm->pre_algorithm, coex_dm->cur_algorithm);
  3085. BTC_TRACE(trace_buf);
  3086. coex_dm->auto_tdma_adjust = false;
  3087. coex_dm->auto_tdma_adjust_low_rssi = false;
  3088. }
  3089. switch (coex_dm->cur_algorithm) {
  3090. case BT_8192E_2ANT_COEX_ALGO_SCO:
  3091. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3092. "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
  3093. BTC_TRACE(trace_buf);
  3094. halbtc8192e2ant_action_sco(btcoexist);
  3095. break;
  3096. case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
  3097. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3098. "[BTCoex], Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
  3099. BTC_TRACE(trace_buf);
  3100. halbtc8192e2ant_action_sco_pan(btcoexist);
  3101. break;
  3102. case BT_8192E_2ANT_COEX_ALGO_HID:
  3103. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3104. "[BTCoex], Action 2-Ant, algorithm = HID.\n");
  3105. BTC_TRACE(trace_buf);
  3106. halbtc8192e2ant_action_hid(btcoexist);
  3107. break;
  3108. case BT_8192E_2ANT_COEX_ALGO_A2DP:
  3109. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3110. "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
  3111. BTC_TRACE(trace_buf);
  3112. halbtc8192e2ant_action_a2dp(btcoexist);
  3113. break;
  3114. case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
  3115. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3116. "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
  3117. BTC_TRACE(trace_buf);
  3118. halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
  3119. break;
  3120. case BT_8192E_2ANT_COEX_ALGO_PANEDR:
  3121. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3122. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
  3123. BTC_TRACE(trace_buf);
  3124. halbtc8192e2ant_action_pan_edr(btcoexist);
  3125. break;
  3126. case BT_8192E_2ANT_COEX_ALGO_PANHS:
  3127. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3128. "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
  3129. BTC_TRACE(trace_buf);
  3130. halbtc8192e2ant_action_pan_hs(btcoexist);
  3131. break;
  3132. case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
  3133. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3134. "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
  3135. BTC_TRACE(trace_buf);
  3136. halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
  3137. break;
  3138. case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
  3139. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3140. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
  3141. BTC_TRACE(trace_buf);
  3142. halbtc8192e2ant_action_pan_edr_hid(btcoexist);
  3143. break;
  3144. case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
  3145. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3146. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
  3147. BTC_TRACE(trace_buf);
  3148. halbtc8192e2ant_action_hid_a2dp_pan_edr(
  3149. btcoexist);
  3150. break;
  3151. case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
  3152. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3153. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
  3154. BTC_TRACE(trace_buf);
  3155. halbtc8192e2ant_action_hid_a2dp(btcoexist);
  3156. break;
  3157. default:
  3158. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3159. "[BTCoex], Action 2-Ant, algorithm = unknown!!\n");
  3160. BTC_TRACE(trace_buf);
  3161. halbtc8192e2ant_coex_all_off(btcoexist);
  3162. break;
  3163. }
  3164. coex_dm->pre_algorithm = coex_dm->cur_algorithm;
  3165. }
  3166. }
  3167. void halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3168. IN boolean back_up)
  3169. {
  3170. u16 u16tmp = 0;
  3171. u8 u8tmp = 0;
  3172. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3173. "[BTCoex], 2Ant Init HW Config!!\n");
  3174. BTC_TRACE(trace_buf);
  3175. if (back_up) {
  3176. /* backup rf 0x1e value */
  3177. coex_dm->bt_rf_0x1e_backup =
  3178. btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  3179. 0xfffff);
  3180. coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
  3181. 0x430);
  3182. coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
  3183. 0x434);
  3184. coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
  3185. btcoexist, 0x42a);
  3186. coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
  3187. btcoexist, 0x456);
  3188. }
  3189. /* antenna sw ctrl to bt */
  3190. halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, true, false);
  3191. halbtc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  3192. /* antenna switch control parameter */
  3193. /* btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555); */
  3194. /* coex parameters */
  3195. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
  3196. /* 0x790[5:0]=0x5 */
  3197. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
  3198. u8tmp &= 0xc0;
  3199. u8tmp |= 0x5;
  3200. btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
  3201. /* enable counter statistics */
  3202. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  3203. /* enable PTA */
  3204. btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
  3205. /* enable mailbox interface */
  3206. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
  3207. u16tmp |= BIT(9);
  3208. btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
  3209. /* enable PTA I2C mailbox */
  3210. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
  3211. u8tmp |= BIT(4);
  3212. btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
  3213. /* enable bt clock when wifi is disabled. */
  3214. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
  3215. u8tmp |= BIT(0);
  3216. btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
  3217. /* enable bt clock when suspend. */
  3218. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
  3219. u8tmp |= BIT(0);
  3220. btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
  3221. /* Give bt_coex_supported_version the default value */
  3222. coex_sta->bt_coex_supported_version = 0;
  3223. }
  3224. /* ************************************************************
  3225. * work around function start with wa_halbtc8192e2ant_
  3226. * ************************************************************
  3227. * ************************************************************
  3228. * extern function start with ex_halbtc8192e2ant_
  3229. * ************************************************************ */
  3230. void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist)
  3231. {
  3232. }
  3233. void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3234. IN boolean wifi_only)
  3235. {
  3236. halbtc8192e2ant_init_hw_config(btcoexist, true);
  3237. }
  3238. void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  3239. {
  3240. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3241. "[BTCoex], Coex Mechanism Init!!\n");
  3242. BTC_TRACE(trace_buf);
  3243. halbtc8192e2ant_init_coex_dm(btcoexist);
  3244. }
  3245. void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist)
  3246. {
  3247. struct btc_board_info *board_info = &btcoexist->board_info;
  3248. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  3249. u8 *cli_buf = btcoexist->cli_buf;
  3250. u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
  3251. u16 u16tmp[4];
  3252. u32 u32tmp[4];
  3253. u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck;
  3254. u32 fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
  3255. u32 phyver = 0;
  3256. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3257. "\r\n ============[BT Coexist info]============");
  3258. CL_PRINTF(cli_buf);
  3259. if (btcoexist->manual_control) {
  3260. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3261. "\r\n ============[Under Manual Control]============");
  3262. CL_PRINTF(cli_buf);
  3263. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3264. "\r\n ==========================================");
  3265. CL_PRINTF(cli_buf);
  3266. }
  3267. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
  3268. "Ant PG number/ Ant mechanism:",
  3269. board_info->pg_ant_num, board_info->btdm_ant_num);
  3270. CL_PRINTF(cli_buf);
  3271. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "Antenna type:",
  3272. board_info->ant_type);
  3273. CL_PRINTF(cli_buf);
  3274. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
  3275. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3276. phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
  3277. bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
  3278. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3279. "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
  3280. "CoexVer WL/ BT_Desired/ BT_Report",
  3281. glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
  3282. glcoex_ver_btdesired_8192e_2ant, bt_coex_ver,
  3283. (bt_coex_ver == 0xff ? "Unknown" : (bt_coex_ver >=
  3284. glcoex_ver_btdesired_8192e_2ant ? "Match" :
  3285. "Mis-Match")));
  3286. CL_PRINTF(cli_buf);
  3287. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3288. "\r\n %-35s = 0x%x/ 0x%x/ v%d",
  3289. "W_FW/ B_FW/ Phy", fw_ver, bt_patch_ver, phyver);
  3290. CL_PRINTF(cli_buf);
  3291. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
  3292. "Wifi channel informed to BT",
  3293. coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
  3294. coex_dm->wifi_chnl_info[2]);
  3295. CL_PRINTF(cli_buf);
  3296. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/", "WifibHiPri",
  3297. (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"));
  3298. CL_PRINTF(cli_buf);
  3299. #if 0
  3300. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/", "test patch version",
  3301. "20161003_v3");
  3302. CL_PRINTF(cli_buf);
  3303. #endif
  3304. /* wifi status */
  3305. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3306. "============[Wifi Status]============");
  3307. CL_PRINTF(cli_buf);
  3308. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
  3309. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3310. "============[BT Status]============");
  3311. CL_PRINTF(cli_buf);
  3312. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d] ",
  3313. "BT [status/ rssi/ retryCnt]",
  3314. ((coex_sta->bt_disabled) ? ("disabled") : ((
  3315. coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
  3316. : ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  3317. coex_dm->bt_status) ? "non-connected idle" :
  3318. ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
  3319. ? "connected-idle" : "busy")))),
  3320. coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
  3321. CL_PRINTF(cli_buf);
  3322. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d / %d",
  3323. "SCO/HID/PAN/A2DP",
  3324. stack_info->sco_exist, stack_info->hid_exist,
  3325. stack_info->pan_exist, stack_info->a2dp_exist);
  3326. CL_PRINTF(cli_buf);
  3327. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
  3328. bt_info_ext = coex_sta->bt_info_ext;
  3329. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3330. "BT Info A2DP rate",
  3331. (bt_info_ext & BIT(0)) ? "Basic rate" : "EDR rate");
  3332. CL_PRINTF(cli_buf);
  3333. for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
  3334. if (coex_sta->bt_info_c2h_cnt[i]) {
  3335. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3336. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
  3337. glbt_info_src_8192e_2ant[i],
  3338. coex_sta->bt_info_c2h[i][0],
  3339. coex_sta->bt_info_c2h[i][1],
  3340. coex_sta->bt_info_c2h[i][2],
  3341. coex_sta->bt_info_c2h[i][3],
  3342. coex_sta->bt_info_c2h[i][4],
  3343. coex_sta->bt_info_c2h[i][5],
  3344. coex_sta->bt_info_c2h[i][6],
  3345. coex_sta->bt_info_c2h_cnt[i]);
  3346. CL_PRINTF(cli_buf);
  3347. }
  3348. }
  3349. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "SS Type",
  3350. coex_dm->cur_ss_type);
  3351. CL_PRINTF(cli_buf);
  3352. /* Sw mechanism */
  3353. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3354. "============[Sw mechanism]============");
  3355. CL_PRINTF(cli_buf);
  3356. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
  3357. "SM1[ShRf/ LpRA/ LimDig]",
  3358. coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
  3359. coex_dm->limited_dig);
  3360. CL_PRINTF(cli_buf);
  3361. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
  3362. "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
  3363. coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
  3364. coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
  3365. CL_PRINTF(cli_buf);
  3366. /* Fw mechanism */
  3367. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3368. "============[Fw mechanism]============");
  3369. CL_PRINTF(cli_buf);
  3370. ps_tdma_case = coex_dm->cur_ps_tdma;
  3371. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3372. "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
  3373. "PS TDMA",
  3374. coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
  3375. coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
  3376. coex_dm->ps_tdma_para[4], ps_tdma_case,
  3377. coex_dm->auto_tdma_adjust);
  3378. CL_PRINTF(cli_buf);
  3379. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
  3380. "DecBtPwr/ IgnWlanAct",
  3381. coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
  3382. CL_PRINTF(cli_buf);
  3383. /* Hw setting */
  3384. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3385. "============[Hw setting]============");
  3386. CL_PRINTF(cli_buf);
  3387. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
  3388. "RF-A, 0x1e initVal",
  3389. coex_dm->bt_rf_0x1e_backup);
  3390. CL_PRINTF(cli_buf);
  3391. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3392. "backup ARFR1/ARFR2/RL/AMaxTime",
  3393. coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
  3394. coex_dm->backup_retry_limit,
  3395. coex_dm->backup_ampdu_max_time);
  3396. CL_PRINTF(cli_buf);
  3397. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
  3398. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
  3399. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
  3400. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
  3401. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3402. "0x430/0x434/0x42a/0x456",
  3403. u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
  3404. CL_PRINTF(cli_buf);
  3405. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
  3406. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
  3407. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
  3408. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3409. "0xc04/ 0xd04/ 0x90c",
  3410. u32tmp[0], u32tmp[1], u32tmp[2]);
  3411. CL_PRINTF(cli_buf);
  3412. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  3413. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
  3414. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x", "0x778/0x880[29:25]",
  3415. u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
  3416. CL_PRINTF(cli_buf);
  3417. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
  3418. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
  3419. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3420. "0x92c/ 0x930",
  3421. (u8tmp[0]), u32tmp[0]);
  3422. CL_PRINTF(cli_buf);
  3423. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  3424. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
  3425. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3426. "0x40/ 0x4f",
  3427. u8tmp[0], u8tmp[1]);
  3428. CL_PRINTF(cli_buf);
  3429. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  3430. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  3431. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3432. "0x550(bcn ctrl)/0x522",
  3433. u32tmp[0], u8tmp[0]);
  3434. CL_PRINTF(cli_buf);
  3435. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
  3436. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x", "0xc50(dig)",
  3437. u32tmp[0]);
  3438. CL_PRINTF(cli_buf);
  3439. fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3440. PHYDM_INFO_FA_OFDM);
  3441. fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3442. PHYDM_INFO_FA_CCK);
  3443. cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3444. PHYDM_INFO_CCA_OFDM);
  3445. cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3446. PHYDM_INFO_CCA_CCK);
  3447. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3448. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3449. "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
  3450. cca_cck, fa_cck, cca_ofdm, fa_ofdm);
  3451. CL_PRINTF(cli_buf);
  3452. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3453. "CRC_OK CCK/11g/11n/11n-agg",
  3454. coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
  3455. coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
  3456. CL_PRINTF(cli_buf);
  3457. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3458. "CRC_Err CCK/11g/11n/11n-agg",
  3459. coex_sta->crc_err_cck, coex_sta->crc_err_11g,
  3460. coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
  3461. CL_PRINTF(cli_buf);
  3462. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  3463. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  3464. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  3465. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
  3466. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3467. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3468. "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
  3469. u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
  3470. CL_PRINTF(cli_buf);
  3471. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  3472. "0x770(hp rx[31:16]/tx[15:0])",
  3473. coex_sta->high_priority_rx, coex_sta->high_priority_tx);
  3474. CL_PRINTF(cli_buf);
  3475. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  3476. "0x774(lp rx[31:16]/tx[15:0])",
  3477. coex_sta->low_priority_rx, coex_sta->low_priority_tx);
  3478. CL_PRINTF(cli_buf);
  3479. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
  3480. halbtc8192e2ant_monitor_bt_ctr(btcoexist);
  3481. #endif
  3482. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  3483. }
  3484. void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  3485. {
  3486. if (BTC_IPS_ENTER == type) {
  3487. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3488. "[BTCoex], IPS ENTER notify\n");
  3489. BTC_TRACE(trace_buf);
  3490. coex_sta->under_ips = true;
  3491. halbtc8192e2ant_coex_all_off(btcoexist);
  3492. halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
  3493. halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  3494. } else if (BTC_IPS_LEAVE == type) {
  3495. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3496. "[BTCoex], IPS LEAVE notify\n");
  3497. BTC_TRACE(trace_buf);
  3498. coex_sta->under_ips = false;
  3499. halbtc8192e2ant_init_hw_config(btcoexist, false);
  3500. halbtc8192e2ant_init_coex_dm(btcoexist);
  3501. }
  3502. }
  3503. void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  3504. {
  3505. if (BTC_LPS_ENABLE == type) {
  3506. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3507. "[BTCoex], LPS ENABLE notify\n");
  3508. BTC_TRACE(trace_buf);
  3509. coex_sta->under_lps = true;
  3510. } else if (BTC_LPS_DISABLE == type) {
  3511. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3512. "[BTCoex], LPS DISABLE notify\n");
  3513. BTC_TRACE(trace_buf);
  3514. coex_sta->under_lps = false;
  3515. }
  3516. }
  3517. void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
  3518. IN u8 type)
  3519. {
  3520. if (BTC_SCAN_START == type) {
  3521. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3522. "[BTCoex], SCAN START notify\n");
  3523. BTC_TRACE(trace_buf);
  3524. } else if (BTC_SCAN_FINISH == type) {
  3525. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3526. "[BTCoex], SCAN FINISH notify\n");
  3527. BTC_TRACE(trace_buf);
  3528. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  3529. &coex_sta->scan_ap_num);
  3530. }
  3531. }
  3532. void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
  3533. IN u8 type)
  3534. {
  3535. if (BTC_ASSOCIATE_START == type) {
  3536. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3537. "[BTCoex], CONNECT START notify\n");
  3538. BTC_TRACE(trace_buf);
  3539. coex_sta->wifi_is_high_pri_task = true;
  3540. coex_sta->cnt_wifi_high_pri = 2;
  3541. halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, false);
  3542. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  3543. halbtc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
  3544. halbtc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3545. } else if (BTC_ASSOCIATE_FINISH == type) {
  3546. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3547. "[BTCoex], CONNECT FINISH notify\n");
  3548. BTC_TRACE(trace_buf);
  3549. coex_sta->wifi_is_high_pri_task = false;
  3550. halbtc8192e2ant_run_coexist_mechanism(btcoexist);
  3551. }
  3552. }
  3553. void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
  3554. IN u8 type)
  3555. {
  3556. u8 h2c_parameter[3] = {0};
  3557. u32 wifi_bw;
  3558. u8 wifi_central_chnl;
  3559. if (btcoexist->manual_control ||
  3560. btcoexist->stop_coex_dm ||
  3561. coex_sta->bt_disabled)
  3562. return;
  3563. if (BTC_MEDIA_CONNECT == type) {
  3564. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3565. "[BTCoex], MEDIA connect notify\n");
  3566. BTC_TRACE(trace_buf);
  3567. } else {
  3568. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3569. "[BTCoex], MEDIA disconnect notify\n");
  3570. BTC_TRACE(trace_buf);
  3571. }
  3572. /* only 2.4G we need to inform bt the chnl mask */
  3573. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  3574. &wifi_central_chnl);
  3575. if ((BTC_MEDIA_CONNECT == type) &&
  3576. (wifi_central_chnl <= 14)) {
  3577. h2c_parameter[0] = 0x1;
  3578. h2c_parameter[1] = wifi_central_chnl;
  3579. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3580. if (BTC_WIFI_BW_HT40 == wifi_bw)
  3581. h2c_parameter[2] = 0x30;
  3582. else
  3583. h2c_parameter[2] = 0x20;
  3584. }
  3585. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  3586. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  3587. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  3588. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  3589. }
  3590. void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
  3591. IN u8 type)
  3592. {
  3593. if (type == BTC_PACKET_DHCP) {
  3594. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3595. "[BTCoex], DHCP Packet notify\n");
  3596. BTC_TRACE(trace_buf);
  3597. }
  3598. }
  3599. void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
  3600. IN u8 *tmp_buf, IN u8 length)
  3601. {
  3602. u8 bt_info = 0;
  3603. u8 i, rsp_source = 0;
  3604. boolean bt_busy = false, limited_dig = false;
  3605. boolean wifi_connected = false;
  3606. static u8 bt_info_for_wifi_fw_count = 0;
  3607. coex_sta->c2h_bt_info_req_sent = false;
  3608. rsp_source = tmp_buf[0] & 0xf;
  3609. if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
  3610. rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
  3611. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  3612. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3613. "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
  3614. length);
  3615. BTC_TRACE(trace_buf);
  3616. /*avoid mailbox issue*/
  3617. if (rsp_source == BT_INFO_SRC_8192E_2ANT_WIFI_FW) {
  3618. bt_info_for_wifi_fw_count++;
  3619. if (bt_info_for_wifi_fw_count < 5)
  3620. return;
  3621. } else
  3622. bt_info_for_wifi_fw_count = 0;
  3623. for (i = 0; i < length; i++) {
  3624. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  3625. if (i == 1)
  3626. bt_info = tmp_buf[i];
  3627. if (i == length - 1) {
  3628. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
  3629. tmp_buf[i]);
  3630. BTC_TRACE(trace_buf);
  3631. } else {
  3632. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
  3633. tmp_buf[i]);
  3634. BTC_TRACE(trace_buf);
  3635. }
  3636. }
  3637. if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
  3638. coex_sta->bt_retry_cnt = /* [3:0] */
  3639. coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
  3640. coex_sta->bt_rssi =
  3641. coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
  3642. coex_sta->bt_info_ext =
  3643. coex_sta->bt_info_c2h[rsp_source][4];
  3644. /* Here we need to resend some wifi info to BT */
  3645. /* because bt is reset and loss of the info. */
  3646. if ((coex_sta->bt_info_ext & BIT(1))) {
  3647. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3648. "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
  3649. BTC_TRACE(trace_buf);
  3650. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  3651. &wifi_connected);
  3652. if (wifi_connected)
  3653. ex_halbtc8192e2ant_media_status_notify(
  3654. btcoexist, BTC_MEDIA_CONNECT);
  3655. else
  3656. ex_halbtc8192e2ant_media_status_notify(
  3657. btcoexist, BTC_MEDIA_DISCONNECT);
  3658. }
  3659. if (coex_sta->bt_info_ext & BIT(2)) {
  3660. coex_sta->cnt_setup_link++;
  3661. coex_sta->is_setup_link = true;
  3662. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3663. "[BTCoex], Re-Link start in BT info!!\n");
  3664. BTC_TRACE(trace_buf);
  3665. } else
  3666. coex_sta->is_setup_link = false;
  3667. if ((coex_sta->bt_info_ext & BIT(3))) {
  3668. if (!btcoexist->manual_control &&
  3669. !btcoexist->stop_coex_dm) {
  3670. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3671. "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
  3672. BTC_TRACE(trace_buf);
  3673. halbtc8192e2ant_ignore_wlan_act(btcoexist,
  3674. FORCE_EXEC, false);
  3675. }
  3676. } else {
  3677. /* BT already NOT ignore Wlan active, do nothing here. */
  3678. }
  3679. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
  3680. if ((coex_sta->bt_info_ext & BIT(4))) {
  3681. /* BT auto report already enabled, do nothing */
  3682. } else
  3683. halbtc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
  3684. true);
  3685. #endif
  3686. }
  3687. /* check BIT2 first ==> check if bt is under inquiry or page scan */
  3688. if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
  3689. coex_sta->c2h_bt_inquiry_page = true;
  3690. else
  3691. coex_sta->c2h_bt_inquiry_page = false;
  3692. /* set link exist status */
  3693. if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
  3694. coex_sta->bt_link_exist = false;
  3695. coex_sta->pan_exist = false;
  3696. coex_sta->a2dp_exist = false;
  3697. coex_sta->hid_exist = false;
  3698. coex_sta->sco_exist = false;
  3699. } else { /* connection exists */
  3700. coex_sta->bt_link_exist = true;
  3701. if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
  3702. coex_sta->pan_exist = true;
  3703. else
  3704. coex_sta->pan_exist = false;
  3705. if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
  3706. coex_sta->a2dp_exist = true;
  3707. else
  3708. coex_sta->a2dp_exist = false;
  3709. if (bt_info & BT_INFO_8192E_2ANT_B_HID)
  3710. coex_sta->hid_exist = true;
  3711. else
  3712. coex_sta->hid_exist = false;
  3713. if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
  3714. coex_sta->sco_exist = true;
  3715. else
  3716. coex_sta->sco_exist = false;
  3717. }
  3718. halbtc8192e2ant_update_bt_link_info(btcoexist);
  3719. if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
  3720. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
  3721. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3722. "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
  3723. BTC_TRACE(trace_buf);
  3724. } else if (bt_info ==
  3725. BT_INFO_8192E_2ANT_B_CONNECTION) { /* connection exists but no busy */
  3726. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
  3727. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3728. "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
  3729. BTC_TRACE(trace_buf);
  3730. } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
  3731. (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
  3732. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
  3733. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3734. "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
  3735. BTC_TRACE(trace_buf);
  3736. } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
  3737. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
  3738. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3739. "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
  3740. BTC_TRACE(trace_buf);
  3741. } else {
  3742. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
  3743. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3744. "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
  3745. BTC_TRACE(trace_buf);
  3746. }
  3747. if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  3748. (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  3749. (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
  3750. bt_busy = true;
  3751. limited_dig = true;
  3752. } else {
  3753. bt_busy = false;
  3754. limited_dig = false;
  3755. }
  3756. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  3757. coex_dm->limited_dig = limited_dig;
  3758. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
  3759. halbtc8192e2ant_run_coexist_mechanism(btcoexist);
  3760. }
  3761. void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist)
  3762. {
  3763. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
  3764. BTC_TRACE(trace_buf);
  3765. halbtc8192e2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
  3766. halbtc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  3767. ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  3768. }
  3769. void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist)
  3770. {
  3771. boolean wifi_connected = false;
  3772. static u8 count = 0;
  3773. static boolean pre_wifi_connected = false;
  3774. if ((coex_sta->bt_coex_supported_version == 0) ||
  3775. (coex_sta->bt_coex_supported_version == 0xffff))
  3776. coex_sta->bt_coex_supported_version =
  3777. btcoexist->btc_get_bt_coex_supported_version(btcoexist);
  3778. /*If wifi is connecting, the update of wifi channel mask may fail caused by wifi FW*/
  3779. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
  3780. if (pre_wifi_connected != wifi_connected)
  3781. count = 0;
  3782. if (count < 10)
  3783. count++;
  3784. if (count == 2) {
  3785. if (wifi_connected)
  3786. ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_CONNECT);
  3787. else
  3788. ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  3789. }
  3790. pre_wifi_connected = wifi_connected;
  3791. /*If wifi is connecting, the update of wifi channel mask may fail caused by wifi FW*/
  3792. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
  3793. halbtc8192e2ant_query_bt_info(btcoexist);
  3794. halbtc8192e2ant_monitor_bt_ctr(btcoexist);
  3795. halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
  3796. halbtc8192e2ant_monitor_bt_enable_disable(btcoexist);
  3797. #else
  3798. halbtc8192e2ant_monitor_wifi_ctr(btcoexist);
  3799. if (halbtc8192e2ant_is_wifi_status_changed(btcoexist) ||
  3800. coex_dm->auto_tdma_adjust)
  3801. halbtc8192e2ant_run_coexist_mechanism(btcoexist);
  3802. #endif
  3803. }
  3804. #endif
  3805. #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */