halbtc8723b1ant.c 149 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508350935103511351235133514351535163517351835193520352135223523352435253526352735283529353035313532353335343535353635373538353935403541354235433544354535463547354835493550355135523553355435553556355735583559356035613562356335643565356635673568356935703571357235733574357535763577357835793580358135823583358435853586358735883589359035913592359335943595359635973598359936003601360236033604360536063607360836093610361136123613361436153616361736183619362036213622362336243625362636273628362936303631363236333634363536363637363836393640364136423643364436453646364736483649365036513652365336543655365636573658365936603661366236633664366536663667366836693670367136723673367436753676367736783679368036813682368336843685368636873688368936903691369236933694369536963697369836993700370137023703370437053706370737083709371037113712371337143715371637173718371937203721372237233724372537263727372837293730373137323733373437353736373737383739374037413742374337443745374637473748374937503751375237533754375537563757375837593760376137623763376437653766376737683769377037713772377337743775377637773778377937803781378237833784378537863787378837893790379137923793379437953796379737983799380038013802380338043805380638073808380938103811381238133814381538163817381838193820382138223823382438253826382738283829383038313832383338343835383638373838383938403841384238433844384538463847384838493850385138523853385438553856385738583859386038613862386338643865386638673868386938703871387238733874387538763877387838793880388138823883388438853886388738883889389038913892389338943895389638973898389939003901390239033904390539063907390839093910391139123913391439153916391739183919392039213922392339243925392639273928392939303931393239333934393539363937393839393940394139423943394439453946394739483949395039513952395339543955395639573958395939603961396239633964396539663967396839693970397139723973397439753976397739783979398039813982398339843985398639873988398939903991399239933994399539963997399839994000400140024003400440054006400740084009401040114012401340144015401640174018401940204021402240234024402540264027402840294030403140324033403440354036403740384039404040414042404340444045404640474048404940504051405240534054405540564057405840594060406140624063406440654066406740684069407040714072407340744075407640774078407940804081408240834084408540864087408840894090409140924093409440954096409740984099410041014102410341044105410641074108410941104111411241134114411541164117411841194120412141224123412441254126412741284129413041314132413341344135413641374138413941404141414241434144414541464147414841494150415141524153415441554156415741584159416041614162416341644165416641674168416941704171417241734174417541764177417841794180418141824183418441854186418741884189419041914192419341944195419641974198419942004201420242034204420542064207420842094210421142124213421442154216421742184219422042214222422342244225422642274228422942304231423242334234423542364237423842394240424142424243424442454246424742484249425042514252425342544255425642574258425942604261426242634264426542664267426842694270427142724273427442754276427742784279428042814282428342844285428642874288428942904291429242934294429542964297429842994300430143024303430443054306430743084309431043114312431343144315431643174318431943204321432243234324432543264327432843294330433143324333433443354336433743384339434043414342434343444345434643474348434943504351435243534354435543564357435843594360436143624363436443654366436743684369437043714372437343744375437643774378437943804381438243834384438543864387438843894390439143924393439443954396439743984399440044014402440344044405440644074408440944104411441244134414441544164417441844194420442144224423442444254426442744284429443044314432443344344435443644374438443944404441444244434444444544464447444844494450445144524453445444554456445744584459446044614462446344644465446644674468446944704471447244734474447544764477447844794480448144824483448444854486448744884489449044914492449344944495449644974498449945004501450245034504450545064507450845094510451145124513451445154516451745184519452045214522452345244525452645274528452945304531453245334534453545364537453845394540454145424543454445454546454745484549455045514552455345544555455645574558455945604561456245634564456545664567456845694570457145724573457445754576457745784579458045814582458345844585458645874588458945904591459245934594459545964597459845994600460146024603460446054606460746084609461046114612461346144615461646174618461946204621462246234624462546264627462846294630463146324633463446354636463746384639464046414642464346444645464646474648464946504651465246534654465546564657465846594660466146624663466446654666466746684669467046714672467346744675467646774678467946804681468246834684468546864687468846894690469146924693469446954696469746984699470047014702470347044705470647074708470947104711471247134714471547164717471847194720472147224723472447254726472747284729473047314732473347344735473647374738473947404741474247434744474547464747474847494750475147524753475447554756475747584759476047614762476347644765476647674768476947704771477247734774477547764777477847794780478147824783478447854786478747884789479047914792479347944795479647974798479948004801480248034804480548064807480848094810481148124813481448154816481748184819482048214822482348244825482648274828482948304831483248334834483548364837483848394840484148424843484448454846484748484849485048514852485348544855485648574858485948604861486248634864486548664867486848694870487148724873487448754876487748784879488048814882488348844885488648874888488948904891489248934894489548964897489848994900490149024903490449054906490749084909491049114912491349144915491649174918491949204921492249234924492549264927492849294930493149324933493449354936493749384939494049414942494349444945494649474948494949504951495249534954495549564957495849594960496149624963496449654966496749684969497049714972497349744975497649774978497949804981498249834984498549864987498849894990499149924993499449954996499749984999500050015002500350045005500650075008500950105011501250135014501550165017501850195020502150225023502450255026502750285029503050315032503350345035503650375038503950405041504250435044504550465047504850495050505150525053505450555056505750585059506050615062506350645065506650675068506950705071507250735074507550765077507850795080508150825083508450855086508750885089509050915092509350945095509650975098509951005101510251035104510551065107510851095110511151125113
  1. /* ************************************************************
  2. * Description:
  3. *
  4. * This file is for RTL8723B Co-exist mechanism
  5. *
  6. * History
  7. * 2012/11/15 Cosa first check in.
  8. *
  9. * ************************************************************ */
  10. /* ************************************************************
  11. * include files
  12. * ************************************************************ */
  13. #include "mp_precomp.h"
  14. #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  15. #if (RTL8723B_SUPPORT == 1)
  16. /* ************************************************************
  17. * Global variables, these are static variables
  18. * ************************************************************ */
  19. static u8 *trace_buf = &gl_btc_trace_buf[0];
  20. static struct coex_dm_8723b_1ant glcoex_dm_8723b_1ant;
  21. static struct coex_dm_8723b_1ant *coex_dm = &glcoex_dm_8723b_1ant;
  22. static struct coex_sta_8723b_1ant glcoex_sta_8723b_1ant;
  23. static struct coex_sta_8723b_1ant *coex_sta = &glcoex_sta_8723b_1ant;
  24. static struct psdscan_sta_8723b_1ant gl_psd_scan_8723b_1ant;
  25. static struct psdscan_sta_8723b_1ant *psd_scan = &gl_psd_scan_8723b_1ant;
  26. const char *const glbt_info_src_8723b_1ant[] = {
  27. "BT Info[wifi fw]",
  28. "BT Info[bt rsp]",
  29. "BT Info[bt auto report]",
  30. };
  31. u32 glcoex_ver_date_8723b_1ant = 20161007;
  32. u32 glcoex_ver_8723b_1ant = 0x69;
  33. u32 glcoex_ver_btdesired_8723b_1ant = 0x69;
  34. /* ************************************************************
  35. * local function proto type if needed
  36. * ************************************************************
  37. * ************************************************************
  38. * local function start with halbtc8723b1ant_
  39. * ************************************************************ */
  40. void halbtc8723b1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
  41. IN boolean force_exec, IN u32 dis_rate_mask)
  42. {
  43. coex_dm->cur_ra_mask = dis_rate_mask;
  44. if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
  45. btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
  46. &coex_dm->cur_ra_mask);
  47. coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
  48. }
  49. void halbtc8723b1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
  50. IN boolean force_exec, IN u8 type)
  51. {
  52. boolean wifi_under_b_mode = false;
  53. coex_dm->cur_arfr_type = type;
  54. if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
  55. switch (coex_dm->cur_arfr_type) {
  56. case 0: /* normal mode */
  57. btcoexist->btc_write_4byte(btcoexist, 0x430,
  58. coex_dm->backup_arfr_cnt1);
  59. btcoexist->btc_write_4byte(btcoexist, 0x434,
  60. coex_dm->backup_arfr_cnt2);
  61. break;
  62. case 1:
  63. btcoexist->btc_get(btcoexist,
  64. BTC_GET_BL_WIFI_UNDER_B_MODE,
  65. &wifi_under_b_mode);
  66. if (wifi_under_b_mode) {
  67. btcoexist->btc_write_4byte(btcoexist,
  68. 0x430, 0x0);
  69. btcoexist->btc_write_4byte(btcoexist,
  70. 0x434, 0x01010101);
  71. } else {
  72. btcoexist->btc_write_4byte(btcoexist,
  73. 0x430, 0x0);
  74. btcoexist->btc_write_4byte(btcoexist,
  75. 0x434, 0x04030201);
  76. }
  77. break;
  78. default:
  79. break;
  80. }
  81. }
  82. coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
  83. }
  84. void halbtc8723b1ant_retry_limit(IN struct btc_coexist *btcoexist,
  85. IN boolean force_exec, IN u8 type)
  86. {
  87. coex_dm->cur_retry_limit_type = type;
  88. if (force_exec ||
  89. (coex_dm->pre_retry_limit_type !=
  90. coex_dm->cur_retry_limit_type)) {
  91. switch (coex_dm->cur_retry_limit_type) {
  92. case 0: /* normal mode */
  93. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  94. coex_dm->backup_retry_limit);
  95. break;
  96. case 1: /* retry limit=8 */
  97. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  98. 0x0808);
  99. break;
  100. default:
  101. break;
  102. }
  103. }
  104. coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
  105. }
  106. void halbtc8723b1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
  107. IN boolean force_exec, IN u8 type)
  108. {
  109. coex_dm->cur_ampdu_time_type = type;
  110. if (force_exec ||
  111. (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
  112. switch (coex_dm->cur_ampdu_time_type) {
  113. case 0: /* normal mode */
  114. btcoexist->btc_write_1byte(btcoexist, 0x456,
  115. coex_dm->backup_ampdu_max_time);
  116. break;
  117. case 1: /* AMPDU timw = 0x38 * 32us */
  118. btcoexist->btc_write_1byte(btcoexist, 0x456,
  119. 0x38);
  120. break;
  121. default:
  122. break;
  123. }
  124. }
  125. coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
  126. }
  127. void halbtc8723b1ant_limited_tx(IN struct btc_coexist *btcoexist,
  128. IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
  129. IN u8 retry_limit_type, IN u8 ampdu_time_type)
  130. {
  131. switch (ra_mask_type) {
  132. case 0: /* normal mode */
  133. halbtc8723b1ant_update_ra_mask(btcoexist, force_exec,
  134. 0x0);
  135. break;
  136. case 1: /* disable cck 1/2 */
  137. halbtc8723b1ant_update_ra_mask(btcoexist, force_exec,
  138. 0x00000003);
  139. break;
  140. case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
  141. halbtc8723b1ant_update_ra_mask(btcoexist, force_exec,
  142. 0x0001f1f7);
  143. break;
  144. default:
  145. break;
  146. }
  147. halbtc8723b1ant_auto_rate_fallback_retry(btcoexist, force_exec,
  148. arfr_type);
  149. halbtc8723b1ant_retry_limit(btcoexist, force_exec, retry_limit_type);
  150. halbtc8723b1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
  151. }
  152. void halbtc8723b1ant_limited_rx(IN struct btc_coexist *btcoexist,
  153. IN boolean force_exec, IN boolean rej_ap_agg_pkt,
  154. IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
  155. {
  156. boolean reject_rx_agg = rej_ap_agg_pkt;
  157. boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  158. u8 rx_agg_size = agg_buf_size;
  159. /* ============================================ */
  160. /* Rx Aggregation related setting */
  161. /* ============================================ */
  162. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  163. &reject_rx_agg);
  164. /* decide BT control aggregation buf size or not */
  165. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  166. &bt_ctrl_rx_agg_size);
  167. /* aggregation buf size, only work when BT control Rx aggregation size. */
  168. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  169. /* real update aggregation setting */
  170. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  171. }
  172. void halbtc8723b1ant_query_bt_info(IN struct btc_coexist *btcoexist)
  173. {
  174. u8 h2c_parameter[1] = {0};
  175. coex_sta->c2h_bt_info_req_sent = true;
  176. h2c_parameter[0] |= BIT(0); /* trigger */
  177. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  178. }
  179. void halbtc8723b1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
  180. {
  181. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  182. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  183. static u32 num_of_bt_counter_chk = 0;
  184. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  185. /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
  186. /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */
  187. reg_hp_txrx = 0x770;
  188. reg_lp_txrx = 0x774;
  189. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  190. reg_hp_tx = u32tmp & MASKLWORD;
  191. reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
  192. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  193. reg_lp_tx = u32tmp & MASKLWORD;
  194. reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
  195. coex_sta->high_priority_tx = reg_hp_tx;
  196. coex_sta->high_priority_rx = reg_hp_rx;
  197. coex_sta->low_priority_tx = reg_lp_tx;
  198. coex_sta->low_priority_rx = reg_lp_rx;
  199. if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
  200. (bt_link_info->hid_exist == true))
  201. bt_link_info->hid_exist = false;
  202. if ((coex_sta->low_priority_tx > 1050) &&
  203. (!coex_sta->c2h_bt_inquiry_page))
  204. coex_sta->pop_event_cnt++;
  205. if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips)
  206. && (coex_sta->low_priority_rx >=
  207. coex_sta->low_priority_tx) &&
  208. (!coex_sta->c2h_bt_inquiry_page))
  209. bt_link_info->slave_role = true;
  210. else
  211. bt_link_info->slave_role = false;
  212. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  213. "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
  214. reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
  215. BTC_TRACE(trace_buf);
  216. /* reset counter */
  217. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  218. /* This part is for wifi FW and driver to update BT's status as disabled. */
  219. /* The flow is as the following */
  220. /* 1. disable BT */
  221. /* 2. if all BT Tx/Rx counter=0, after 6 sec we query bt info */
  222. /* 3. Because BT will not rsp from mailbox, so wifi fw will know BT is disabled */
  223. /* 4. FW will rsp c2h for BT that driver will know BT is disabled. */
  224. if ((reg_hp_tx == 0) && (reg_hp_rx == 0) && (reg_lp_tx == 0) &&
  225. (reg_lp_rx == 0)) {
  226. num_of_bt_counter_chk++;
  227. if (num_of_bt_counter_chk >= 3) {
  228. halbtc8723b1ant_query_bt_info(btcoexist);
  229. num_of_bt_counter_chk = 0;
  230. }
  231. }
  232. }
  233. void halbtc8723b1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
  234. {
  235. s32 wifi_rssi = 0;
  236. boolean wifi_busy = false, wifi_under_b_mode = false;
  237. static u8 cck_lock_counter = 0;
  238. u32 total_cnt;
  239. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  240. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  241. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  242. &wifi_under_b_mode);
  243. #if 1
  244. coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
  245. btcoexist,
  246. PHYDM_INFO_CRC32_OK_CCK);
  247. coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
  248. btcoexist,
  249. PHYDM_INFO_CRC32_OK_LEGACY);
  250. coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
  251. btcoexist,
  252. PHYDM_INFO_CRC32_OK_HT);
  253. coex_sta->crc_ok_11n_vht =
  254. btcoexist->btc_phydm_query_PHY_counter(
  255. btcoexist,
  256. PHYDM_INFO_CRC32_OK_VHT);
  257. coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
  258. btcoexist,
  259. PHYDM_INFO_CRC32_ERROR_CCK);
  260. coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter(
  261. btcoexist,
  262. PHYDM_INFO_CRC32_ERROR_LEGACY);
  263. coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
  264. btcoexist,
  265. PHYDM_INFO_CRC32_ERROR_HT);
  266. coex_sta->crc_err_11n_vht =
  267. btcoexist->btc_phydm_query_PHY_counter(
  268. btcoexist,
  269. PHYDM_INFO_CRC32_ERROR_VHT);
  270. #endif
  271. if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
  272. total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
  273. coex_sta->crc_ok_11n +
  274. coex_sta->crc_ok_11n_vht;
  275. if ((coex_dm->bt_status == BT_8723B_1ANT_BT_STATUS_ACL_BUSY) ||
  276. (coex_dm->bt_status ==
  277. BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
  278. (coex_dm->bt_status ==
  279. BT_8723B_1ANT_BT_STATUS_SCO_BUSY)) {
  280. if (coex_sta->crc_ok_cck > (total_cnt -
  281. coex_sta->crc_ok_cck)) {
  282. if (cck_lock_counter < 3)
  283. cck_lock_counter++;
  284. } else {
  285. if (cck_lock_counter > 0)
  286. cck_lock_counter--;
  287. }
  288. } else {
  289. if (cck_lock_counter > 0)
  290. cck_lock_counter--;
  291. }
  292. } else {
  293. if (cck_lock_counter > 0)
  294. cck_lock_counter--;
  295. }
  296. if (!coex_sta->pre_ccklock) {
  297. if (cck_lock_counter >= 3)
  298. coex_sta->cck_lock = true;
  299. else
  300. coex_sta->cck_lock = false;
  301. } else {
  302. if (cck_lock_counter == 0)
  303. coex_sta->cck_lock = false;
  304. else
  305. coex_sta->cck_lock = true;
  306. }
  307. if (coex_sta->cck_lock)
  308. coex_sta->cck_ever_lock = true;
  309. coex_sta->pre_ccklock = coex_sta->cck_lock;
  310. }
  311. boolean halbtc8723b1ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
  312. {
  313. static boolean pre_wifi_busy = false, pre_under_4way = false,
  314. pre_bt_hs_on = false;
  315. boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
  316. boolean wifi_connected = false;
  317. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  318. &wifi_connected);
  319. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  320. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  321. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  322. &under_4way);
  323. if (wifi_connected) {
  324. if (wifi_busy != pre_wifi_busy) {
  325. pre_wifi_busy = wifi_busy;
  326. return true;
  327. }
  328. if (under_4way != pre_under_4way) {
  329. pre_under_4way = under_4way;
  330. return true;
  331. }
  332. if (bt_hs_on != pre_bt_hs_on) {
  333. pre_bt_hs_on = bt_hs_on;
  334. return true;
  335. }
  336. }
  337. return false;
  338. }
  339. void halbtc8723b1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  340. {
  341. static u32 bt_disable_cnt = 0;
  342. boolean bt_active = true, bt_disabled = false, bt_change = false;
  343. /* This function check if bt is disabled */
  344. if (coex_sta->high_priority_tx == 0 &&
  345. coex_sta->high_priority_rx == 0 &&
  346. coex_sta->low_priority_tx == 0 &&
  347. coex_sta->low_priority_rx == 0)
  348. bt_active = false;
  349. if (coex_sta->high_priority_tx == 0xffff &&
  350. coex_sta->high_priority_rx == 0xffff &&
  351. coex_sta->low_priority_tx == 0xffff &&
  352. coex_sta->low_priority_rx == 0xffff)
  353. bt_active = false;
  354. if (bt_active) {
  355. bt_disable_cnt = 0;
  356. bt_disabled = false;
  357. } else {
  358. bt_disable_cnt++;
  359. if (bt_disable_cnt >= 10)
  360. bt_disabled = true;
  361. }
  362. if (coex_sta->bt_disabled != bt_disabled) {
  363. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  364. "[BTCoex], BT is from %s to %s!!\n",
  365. (coex_sta->bt_disabled ? "disabled" : "enabled"),
  366. (bt_disabled ? "disabled" : "enabled"));
  367. BTC_TRACE(trace_buf);
  368. bt_change = true;
  369. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  370. &bt_disabled);
  371. btcoexist->btc_set(btcoexist,
  372. BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
  373. &bt_change);
  374. coex_sta->bt_disabled = bt_disabled;
  375. } else {
  376. btcoexist->btc_set(btcoexist,
  377. BTC_SET_BL_BT_ENABLE_DISABLE_CHANGE,
  378. &bt_change);
  379. }
  380. }
  381. void halbtc8723b1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
  382. {
  383. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  384. boolean bt_hs_on = false;
  385. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  386. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  387. bt_link_info->sco_exist = coex_sta->sco_exist;
  388. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  389. bt_link_info->pan_exist = coex_sta->pan_exist;
  390. bt_link_info->hid_exist = coex_sta->hid_exist;
  391. bt_link_info->bt_hi_pri_link_exist = coex_sta->bt_hi_pri_link_exist;
  392. /* work around for HS mode. */
  393. if (bt_hs_on) {
  394. bt_link_info->pan_exist = true;
  395. bt_link_info->bt_link_exist = true;
  396. }
  397. /* check if Sco only */
  398. if (bt_link_info->sco_exist &&
  399. !bt_link_info->a2dp_exist &&
  400. !bt_link_info->pan_exist &&
  401. !bt_link_info->hid_exist)
  402. bt_link_info->sco_only = true;
  403. else
  404. bt_link_info->sco_only = false;
  405. /* check if A2dp only */
  406. if (!bt_link_info->sco_exist &&
  407. bt_link_info->a2dp_exist &&
  408. !bt_link_info->pan_exist &&
  409. !bt_link_info->hid_exist)
  410. bt_link_info->a2dp_only = true;
  411. else
  412. bt_link_info->a2dp_only = false;
  413. /* check if Pan only */
  414. if (!bt_link_info->sco_exist &&
  415. !bt_link_info->a2dp_exist &&
  416. bt_link_info->pan_exist &&
  417. !bt_link_info->hid_exist)
  418. bt_link_info->pan_only = true;
  419. else
  420. bt_link_info->pan_only = false;
  421. /* check if Hid only */
  422. if (!bt_link_info->sco_exist &&
  423. !bt_link_info->a2dp_exist &&
  424. !bt_link_info->pan_exist &&
  425. bt_link_info->hid_exist)
  426. bt_link_info->hid_only = true;
  427. else
  428. bt_link_info->hid_only = false;
  429. }
  430. void halbtc8723b1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
  431. IN boolean enable_auto_report)
  432. {
  433. u8 h2c_parameter[1] = {0};
  434. h2c_parameter[0] = 0;
  435. if (enable_auto_report)
  436. h2c_parameter[0] |= BIT(0);
  437. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  438. }
  439. void halbtc8723b1ant_bt_auto_report(IN struct btc_coexist *btcoexist,
  440. IN boolean force_exec, IN boolean enable_auto_report)
  441. {
  442. coex_dm->cur_bt_auto_report = enable_auto_report;
  443. if (!force_exec) {
  444. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  445. return;
  446. }
  447. halbtc8723b1ant_set_bt_auto_report(btcoexist,
  448. coex_dm->cur_bt_auto_report);
  449. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  450. }
  451. void halbtc8723b1ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
  452. *btcoexist, IN boolean low_penalty_ra)
  453. {
  454. u8 h2c_parameter[6] = {0};
  455. h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
  456. if (low_penalty_ra) {
  457. h2c_parameter[1] |= BIT(0);
  458. h2c_parameter[2] =
  459. 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
  460. h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
  461. h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
  462. h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
  463. }
  464. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
  465. }
  466. void halbtc8723b1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
  467. IN boolean force_exec, IN boolean low_penalty_ra)
  468. {
  469. coex_dm->cur_low_penalty_ra = low_penalty_ra;
  470. if (!force_exec) {
  471. if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
  472. return;
  473. }
  474. halbtc8723b1ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
  475. coex_dm->cur_low_penalty_ra);
  476. coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
  477. }
  478. void halbtc8723b1ant_sw_mechanism(IN struct btc_coexist *btcoexist,
  479. IN boolean low_penalty_ra)
  480. {
  481. halbtc8723b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
  482. }
  483. void halbtc8723b1ant_set_coex_table(IN struct btc_coexist *btcoexist,
  484. IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
  485. {
  486. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  487. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  488. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  489. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  490. }
  491. void halbtc8723b1ant_coex_table(IN struct btc_coexist *btcoexist,
  492. IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
  493. IN u32 val0x6c8, IN u8 val0x6cc)
  494. {
  495. coex_dm->cur_val0x6c0 = val0x6c0;
  496. coex_dm->cur_val0x6c4 = val0x6c4;
  497. coex_dm->cur_val0x6c8 = val0x6c8;
  498. coex_dm->cur_val0x6cc = val0x6cc;
  499. if (!force_exec) {
  500. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  501. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  502. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  503. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  504. return;
  505. }
  506. halbtc8723b1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
  507. val0x6cc);
  508. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  509. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  510. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  511. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  512. }
  513. void halbtc8723b1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
  514. IN boolean force_exec, IN u8 type)
  515. {
  516. struct btc_board_info *board_info = &btcoexist->board_info;
  517. #if BT_8723B_1ANT_ANTDET_ENABLE
  518. #if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE
  519. if (board_info->btdm_ant_num_by_ant_det == 2) {
  520. if (type == 3)
  521. type = 14;
  522. else if (type == 4)
  523. type = 13;
  524. else if (type == 5)
  525. type = 8;
  526. }
  527. #endif
  528. #endif
  529. coex_sta->coex_table_type = type;
  530. switch (type) {
  531. case 0:
  532. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  533. 0x55555555, 0x55555555, 0xffffff, 0x3);
  534. break;
  535. case 1:
  536. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  537. 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3);
  538. break;
  539. case 2:
  540. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  541. 0x5a5a5a5a, 0x5a5a5a5a, 0xffffff, 0x3);
  542. break;
  543. case 3:
  544. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  545. 0x55555555, 0x5a5a5a5a, 0xffffff, 0x3);
  546. break;
  547. case 4:
  548. if ((coex_sta->cck_ever_lock) &&
  549. (coex_sta->scan_ap_num <= 5))
  550. halbtc8723b1ant_coex_table(btcoexist,
  551. force_exec, 0x55555555, 0xaaaa5a5a,
  552. 0xffffff, 0x3);
  553. else
  554. halbtc8723b1ant_coex_table(btcoexist,
  555. force_exec, 0x55555555, 0x5a5a5a5a,
  556. 0xffffff, 0x3);
  557. break;
  558. case 5:
  559. if ((coex_sta->cck_ever_lock) &&
  560. (coex_sta->scan_ap_num <= 5))
  561. halbtc8723b1ant_coex_table(btcoexist,
  562. force_exec, 0x5a5a5a5a, 0x5aaa5a5a,
  563. 0xffffff, 0x3);
  564. else
  565. halbtc8723b1ant_coex_table(btcoexist,
  566. force_exec, 0x5a5a5a5a, 0x5aaa5a5a,
  567. 0xffffff, 0x3);
  568. break;
  569. case 6:
  570. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  571. 0x55555555, 0xaaaaaaaa, 0xffffff, 0x3);
  572. break;
  573. case 7:
  574. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  575. 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
  576. break;
  577. case 8:
  578. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  579. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  580. break;
  581. case 9:
  582. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  583. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  584. break;
  585. case 10:
  586. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  587. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  588. break;
  589. case 11:
  590. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  591. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  592. break;
  593. case 12:
  594. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  595. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  596. break;
  597. case 13:
  598. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  599. 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
  600. break;
  601. case 14:
  602. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  603. 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
  604. break;
  605. case 15:
  606. halbtc8723b1ant_coex_table(btcoexist, force_exec,
  607. 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
  608. break;
  609. default:
  610. break;
  611. }
  612. }
  613. void halbtc8723b1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  614. IN boolean enable)
  615. {
  616. u8 h2c_parameter[1] = {0};
  617. if (enable)
  618. h2c_parameter[0] |= BIT(0); /* function enable */
  619. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  620. }
  621. void halbtc8723b1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  622. IN boolean force_exec, IN boolean enable)
  623. {
  624. coex_dm->cur_ignore_wlan_act = enable;
  625. if (!force_exec) {
  626. if (coex_dm->pre_ignore_wlan_act ==
  627. coex_dm->cur_ignore_wlan_act)
  628. return;
  629. }
  630. halbtc8723b1ant_set_fw_ignore_wlan_act(btcoexist, enable);
  631. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  632. }
  633. void halbtc8723b1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
  634. IN u8 lps_val, IN u8 rpwm_val)
  635. {
  636. u8 lps = lps_val;
  637. u8 rpwm = rpwm_val;
  638. btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
  639. btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
  640. }
  641. void halbtc8723b1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
  642. IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
  643. {
  644. coex_dm->cur_lps = lps_val;
  645. coex_dm->cur_rpwm = rpwm_val;
  646. if (!force_exec) {
  647. if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
  648. (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
  649. return;
  650. }
  651. halbtc8723b1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
  652. coex_dm->pre_lps = coex_dm->cur_lps;
  653. coex_dm->pre_rpwm = coex_dm->cur_rpwm;
  654. }
  655. void halbtc8723b1ant_set_ant_path(IN struct btc_coexist *btcoexist,
  656. IN u8 ant_pos_type, IN boolean force_exec, IN boolean init_hwcfg,
  657. IN boolean wifi_off)
  658. {
  659. struct btc_board_info *board_info = &btcoexist->board_info;
  660. u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
  661. boolean pg_ext_switch = false;
  662. boolean use_ext_switch = false;
  663. boolean is_in_mp_mode = false;
  664. u8 h2c_parameter[2] = {0}, u8tmp = 0;
  665. u32 u32tmp_1[4];
  666. boolean is_fw_ready;
  667. coex_dm->cur_ant_pos_type = ant_pos_type;
  668. btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
  669. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
  670. &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */
  671. if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
  672. use_ext_switch = true;
  673. #if BT_8723B_1ANT_ANTDET_ENABLE
  674. #if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE
  675. if (ant_pos_type == BTC_ANT_PATH_PTA) {
  676. if ((board_info->btdm_ant_det_finish) &&
  677. (board_info->btdm_ant_num_by_ant_det == 2)) {
  678. if (board_info->btdm_ant_pos ==
  679. BTC_ANTENNA_AT_MAIN_PORT)
  680. ant_pos_type = BTC_ANT_PATH_WIFI;
  681. else
  682. ant_pos_type = BTC_ANT_PATH_BT;
  683. }
  684. }
  685. #endif
  686. #endif
  687. if (init_hwcfg) {
  688. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  689. 0x780); /* WiFi TRx Mask on */
  690. /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
  691. /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); */ /*BT TRx Mask on */
  692. if (fw_ver >= 0x180000) {
  693. /* Use H2C to set GNT_BT to HIGH */
  694. h2c_parameter[0] = 1;
  695. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
  696. h2c_parameter);
  697. cnt_bt_cal_chk = 0;
  698. while (1) {
  699. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
  700. if (is_fw_ready == false) {
  701. BTC_SPRINTF(trace_buf , BT_TMP_BUF_SIZE,
  702. ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
  703. BTC_TRACE(trace_buf);
  704. break;
  705. }
  706. if (btcoexist->btc_read_1byte(btcoexist,
  707. 0x765) == 0x18)
  708. break;
  709. cnt_bt_cal_chk++;
  710. if (cnt_bt_cal_chk > 20)
  711. break;
  712. }
  713. } else {
  714. /* set grant_bt to high */
  715. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
  716. }
  717. /* set wlan_act control by PTA */
  718. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  719. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
  720. 0x0); /* BT select s0/s1 is controlled by BT */
  721. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
  722. btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
  723. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
  724. btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
  725. } else if (wifi_off) {
  726. if (fw_ver >= 0x180000) {
  727. /* Use H2C to set GNT_BT to HIGH */
  728. h2c_parameter[0] = 1;
  729. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
  730. h2c_parameter);
  731. cnt_bt_cal_chk = 0;
  732. while (1) {
  733. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
  734. if (is_fw_ready == false) {
  735. BTC_SPRINTF(trace_buf , BT_TMP_BUF_SIZE,
  736. ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
  737. BTC_TRACE(trace_buf);
  738. break;
  739. }
  740. if (btcoexist->btc_read_1byte(btcoexist,
  741. 0x765) == 0x18)
  742. break;
  743. cnt_bt_cal_chk++;
  744. if (cnt_bt_cal_chk > 20)
  745. break;
  746. }
  747. } else {
  748. /* set grant_bt to high */
  749. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
  750. }
  751. /* set wlan_act to always low */
  752. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  753. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE,
  754. &is_in_mp_mode);
  755. if (!is_in_mp_mode)
  756. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  757. 0x20, 0x0); /* BT select s0/s1 is controlled by BT */
  758. else
  759. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  760. 0x20, 0x1); /* BT select s0/s1 is controlled by WiFi */
  761. /* 0x4c[24:23]=00, Set Antenna control by BT_RFE_CTRL BT Vendor 0xac=0xf002 */
  762. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  763. u32tmp &= ~BIT(23);
  764. u32tmp &= ~BIT(24);
  765. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  766. } else {
  767. /* Use H2C to set GNT_BT to LOW */
  768. if (fw_ver >= 0x180000) {
  769. if (btcoexist->btc_read_1byte(btcoexist, 0x765) != 0) {
  770. h2c_parameter[0] = 0;
  771. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
  772. h2c_parameter);
  773. cnt_bt_cal_chk = 0;
  774. while (1) {
  775. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
  776. if (is_fw_ready == false) {
  777. BTC_SPRINTF(trace_buf ,
  778. BT_TMP_BUF_SIZE,
  779. ("halbtc8723b1ant_set_ant_path(): we don't need to wait for H2C command completion because of Fw download fail!!!\n"));
  780. BTC_TRACE(trace_buf);
  781. break;
  782. }
  783. if (btcoexist->btc_read_1byte(btcoexist,
  784. 0x765) == 0x0)
  785. break;
  786. cnt_bt_cal_chk++;
  787. if (cnt_bt_cal_chk > 20)
  788. break;
  789. }
  790. }
  791. } else {
  792. /* BT calibration check */
  793. while (cnt_bt_cal_chk <= 20) {
  794. u8tmp = btcoexist->btc_read_1byte(btcoexist,
  795. 0x49d);
  796. cnt_bt_cal_chk++;
  797. if (u8tmp & BIT(0)) {
  798. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  799. "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n",
  800. cnt_bt_cal_chk);
  801. BTC_TRACE(trace_buf);
  802. delay_ms(50);
  803. } else {
  804. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  805. "[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n",
  806. cnt_bt_cal_chk);
  807. BTC_TRACE(trace_buf);
  808. break;
  809. }
  810. }
  811. /* set grant_bt to PTA */
  812. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
  813. }
  814. if (btcoexist->btc_read_1byte(btcoexist, 0x76e) != 0xc) {
  815. /* set wlan_act control by PTA */
  816. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  817. }
  818. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
  819. 0x1); /* BT select s0/s1 is controlled by WiFi */
  820. }
  821. if (use_ext_switch) {
  822. if (init_hwcfg) {
  823. /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
  824. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  825. u32tmp &= ~BIT(23);
  826. u32tmp |= BIT(24);
  827. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  828. u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
  829. 0x948);
  830. if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
  831. btcoexist->btc_write_4byte(btcoexist, 0x948,
  832. u32tmp_1[0]);
  833. else
  834. btcoexist->btc_write_4byte(btcoexist, 0x948,
  835. 0x0);
  836. if (board_info->btdm_ant_pos ==
  837. BTC_ANTENNA_AT_MAIN_PORT) {
  838. /* tell firmware "no antenna inverse" */
  839. h2c_parameter[0] = 0;
  840. h2c_parameter[1] = 1; /* ext switch type */
  841. btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
  842. h2c_parameter);
  843. } else {
  844. /* tell firmware "antenna inverse" */
  845. h2c_parameter[0] = 1;
  846. h2c_parameter[1] = 1; /* ext switch type */
  847. btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
  848. h2c_parameter);
  849. }
  850. }
  851. if (force_exec ||
  852. (coex_dm->cur_ant_pos_type !=
  853. coex_dm->pre_ant_pos_type)) {
  854. /* ext switch setting */
  855. switch (ant_pos_type) {
  856. case BTC_ANT_PATH_WIFI:
  857. if (board_info->btdm_ant_pos ==
  858. BTC_ANTENNA_AT_MAIN_PORT)
  859. btcoexist->btc_write_1byte_bitmask(
  860. btcoexist, 0x92c, 0x3,
  861. 0x1);
  862. else
  863. btcoexist->btc_write_1byte_bitmask(
  864. btcoexist, 0x92c, 0x3,
  865. 0x2);
  866. break;
  867. case BTC_ANT_PATH_BT:
  868. if (board_info->btdm_ant_pos ==
  869. BTC_ANTENNA_AT_MAIN_PORT)
  870. btcoexist->btc_write_1byte_bitmask(
  871. btcoexist, 0x92c, 0x3,
  872. 0x2);
  873. else
  874. btcoexist->btc_write_1byte_bitmask(
  875. btcoexist, 0x92c, 0x3,
  876. 0x1);
  877. break;
  878. default:
  879. case BTC_ANT_PATH_PTA:
  880. if (board_info->btdm_ant_pos ==
  881. BTC_ANTENNA_AT_MAIN_PORT)
  882. btcoexist->btc_write_1byte_bitmask(
  883. btcoexist, 0x92c, 0x3,
  884. 0x1);
  885. else
  886. btcoexist->btc_write_1byte_bitmask(
  887. btcoexist, 0x92c, 0x3,
  888. 0x2);
  889. break;
  890. }
  891. }
  892. } else {
  893. if (init_hwcfg) {
  894. /* 0x4c[23]=1, 0x4c[24]=0 Antenna control by 0x64 */
  895. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  896. u32tmp |= BIT(23);
  897. u32tmp &= ~BIT(24);
  898. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  899. /* Fix Ext switch Main->S1, Aux->S0 */
  900. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
  901. 0x0);
  902. if (board_info->btdm_ant_pos ==
  903. BTC_ANTENNA_AT_MAIN_PORT) {
  904. /* tell firmware "no antenna inverse" */
  905. h2c_parameter[0] = 0;
  906. h2c_parameter[1] =
  907. 0; /* internal switch type */
  908. btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
  909. h2c_parameter);
  910. } else {
  911. /* tell firmware "antenna inverse" */
  912. h2c_parameter[0] = 1;
  913. h2c_parameter[1] =
  914. 0; /* internal switch type */
  915. btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
  916. h2c_parameter);
  917. }
  918. }
  919. if (force_exec ||
  920. (coex_dm->cur_ant_pos_type !=
  921. coex_dm->pre_ant_pos_type)) {
  922. /* internal switch setting */
  923. switch (ant_pos_type) {
  924. case BTC_ANT_PATH_WIFI:
  925. if (board_info->btdm_ant_pos ==
  926. BTC_ANTENNA_AT_MAIN_PORT) {
  927. u32tmp_1[0] = btcoexist->btc_read_4byte(
  928. btcoexist, 0x948);
  929. if ((u32tmp_1[0] == 0x40) ||
  930. (u32tmp_1[0] == 0x240))
  931. btcoexist->btc_write_4byte(
  932. btcoexist, 0x948,
  933. u32tmp_1[0]);
  934. else
  935. btcoexist->btc_write_4byte(
  936. btcoexist, 0x948, 0x0);
  937. } else {
  938. u32tmp_1[0] = btcoexist->btc_read_4byte(
  939. btcoexist, 0x948);
  940. if ((u32tmp_1[0] == 0x40) ||
  941. (u32tmp_1[0] == 0x240))
  942. btcoexist->btc_write_4byte(
  943. btcoexist, 0x948,
  944. u32tmp_1[0]);
  945. else
  946. btcoexist->btc_write_4byte(
  947. btcoexist, 0x948,
  948. 0x280);
  949. }
  950. break;
  951. case BTC_ANT_PATH_BT:
  952. if (board_info->btdm_ant_pos ==
  953. BTC_ANTENNA_AT_MAIN_PORT) {
  954. u32tmp_1[0] = btcoexist->btc_read_4byte(
  955. btcoexist, 0x948);
  956. if ((u32tmp_1[0] == 0x40) ||
  957. (u32tmp_1[0] == 0x240))
  958. btcoexist->btc_write_4byte(
  959. btcoexist, 0x948,
  960. u32tmp_1[0]);
  961. else
  962. btcoexist->btc_write_4byte(
  963. btcoexist, 0x948,
  964. 0x280);
  965. } else {
  966. u32tmp_1[0] = btcoexist->btc_read_4byte(
  967. btcoexist, 0x948);
  968. if ((u32tmp_1[0] == 0x40) ||
  969. (u32tmp_1[0] == 0x240))
  970. btcoexist->btc_write_4byte(
  971. btcoexist, 0x948,
  972. u32tmp_1[0]);
  973. else
  974. btcoexist->btc_write_4byte(
  975. btcoexist, 0x948, 0x0);
  976. }
  977. break;
  978. default:
  979. case BTC_ANT_PATH_PTA:
  980. if (board_info->btdm_ant_pos ==
  981. BTC_ANTENNA_AT_MAIN_PORT)
  982. btcoexist->btc_write_4byte(
  983. btcoexist, 0x948,
  984. 0x200);
  985. else
  986. btcoexist->btc_write_4byte(
  987. btcoexist, 0x948, 0x80);
  988. break;
  989. }
  990. }
  991. }
  992. coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
  993. }
  994. void halbtc8723b1ant_ps_tdma_check_for_power_save_state(
  995. IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
  996. {
  997. u8 lps_mode = 0x0;
  998. u8 h2c_parameter[5] = {0x8, 0, 0, 0, 0};
  999. btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
  1000. if (lps_mode) { /* already under LPS state */
  1001. if (new_ps_state) {
  1002. /* keep state under LPS, do nothing. */
  1003. } else {
  1004. /* will leave LPS state, turn off psTdma first */
  1005. /* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1006. 8); */
  1007. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1008. h2c_parameter);
  1009. }
  1010. } else { /* NO PS state */
  1011. if (new_ps_state) {
  1012. /* will enter LPS state, turn off psTdma first */
  1013. /* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1014. 8); */
  1015. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1016. h2c_parameter);
  1017. } else {
  1018. /* keep state under NO PS state, do nothing. */
  1019. }
  1020. }
  1021. }
  1022. void halbtc8723b1ant_power_save_state(IN struct btc_coexist *btcoexist,
  1023. IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
  1024. {
  1025. boolean low_pwr_disable = false;
  1026. switch (ps_type) {
  1027. case BTC_PS_WIFI_NATIVE:
  1028. /* recover to original 32k low power setting */
  1029. low_pwr_disable = false;
  1030. btcoexist->btc_set(btcoexist,
  1031. BTC_SET_ACT_DISABLE_LOW_POWER,
  1032. &low_pwr_disable);
  1033. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
  1034. NULL);
  1035. coex_sta->force_lps_on = false;
  1036. break;
  1037. case BTC_PS_LPS_ON:
  1038. halbtc8723b1ant_ps_tdma_check_for_power_save_state(
  1039. btcoexist, true);
  1040. halbtc8723b1ant_lps_rpwm(btcoexist, NORMAL_EXEC,
  1041. lps_val, rpwm_val);
  1042. /* when coex force to enter LPS, do not enter 32k low power. */
  1043. low_pwr_disable = true;
  1044. btcoexist->btc_set(btcoexist,
  1045. BTC_SET_ACT_DISABLE_LOW_POWER,
  1046. &low_pwr_disable);
  1047. /* power save must executed before psTdma. */
  1048. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
  1049. NULL);
  1050. coex_sta->force_lps_on = true;
  1051. break;
  1052. case BTC_PS_LPS_OFF:
  1053. halbtc8723b1ant_ps_tdma_check_for_power_save_state(
  1054. btcoexist, false);
  1055. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
  1056. NULL);
  1057. coex_sta->force_lps_on = false;
  1058. break;
  1059. default:
  1060. break;
  1061. }
  1062. }
  1063. void halbtc8723b1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
  1064. IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
  1065. {
  1066. u8 h2c_parameter[5] = {0};
  1067. u8 real_byte1 = byte1, real_byte5 = byte5;
  1068. boolean ap_enable = false;
  1069. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1070. &ap_enable);
  1071. if (ap_enable) {
  1072. if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1073. real_byte1 &= ~BIT(4);
  1074. real_byte1 |= BIT(5);
  1075. real_byte5 |= BIT(5);
  1076. real_byte5 &= ~BIT(6);
  1077. halbtc8723b1ant_power_save_state(btcoexist,
  1078. BTC_PS_WIFI_NATIVE, 0x0, 0x0);
  1079. }
  1080. } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1081. halbtc8723b1ant_power_save_state(btcoexist,
  1082. BTC_PS_LPS_ON, 0x50, 0x4);
  1083. } else {
  1084. halbtc8723b1ant_power_save_state(btcoexist,
  1085. BTC_PS_WIFI_NATIVE, 0x0, 0x0);
  1086. }
  1087. h2c_parameter[0] = real_byte1;
  1088. h2c_parameter[1] = byte2;
  1089. h2c_parameter[2] = byte3;
  1090. h2c_parameter[3] = byte4;
  1091. h2c_parameter[4] = real_byte5;
  1092. coex_dm->ps_tdma_para[0] = real_byte1;
  1093. coex_dm->ps_tdma_para[1] = byte2;
  1094. coex_dm->ps_tdma_para[2] = byte3;
  1095. coex_dm->ps_tdma_para[3] = byte4;
  1096. coex_dm->ps_tdma_para[4] = real_byte5;
  1097. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1098. }
  1099. void halbtc8723b1ant_ps_tdma(IN struct btc_coexist *btcoexist,
  1100. IN boolean force_exec, IN boolean turn_on, IN u8 type)
  1101. {
  1102. struct btc_board_info *board_info = &btcoexist->board_info;
  1103. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1104. boolean wifi_busy = false;
  1105. u8 rssi_adjust_val = 0;
  1106. u8 ps_tdma_byte4_val = 0x50, ps_tdma_byte0_val = 0x51,
  1107. ps_tdma_byte3_val = 0x10;
  1108. s8 wifi_duration_adjust = 0x0;
  1109. static boolean pre_wifi_busy = false;
  1110. coex_dm->cur_ps_tdma_on = turn_on;
  1111. coex_dm->cur_ps_tdma = type;
  1112. #if BT_8723B_1ANT_ANTDET_ENABLE
  1113. #if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE
  1114. if (board_info->btdm_ant_num_by_ant_det == 2) {
  1115. if (turn_on)
  1116. type = type +
  1117. 100; /* for WiFi RSSI low or BT RSSI low */
  1118. else
  1119. type = 1; /* always translate to TDMA(off,1) for TDMA-off case */
  1120. }
  1121. #endif
  1122. #endif
  1123. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1124. if (wifi_busy != pre_wifi_busy) {
  1125. force_exec = true;
  1126. pre_wifi_busy = wifi_busy;
  1127. }
  1128. if (!force_exec) {
  1129. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1130. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1131. return;
  1132. }
  1133. if (coex_sta->scan_ap_num <= 5) {
  1134. wifi_duration_adjust = 5;
  1135. if (coex_sta->a2dp_bit_pool >= 35)
  1136. wifi_duration_adjust = -10;
  1137. else if (coex_sta->a2dp_bit_pool >= 45)
  1138. wifi_duration_adjust = -15;
  1139. } else if (coex_sta->scan_ap_num >= 40) {
  1140. wifi_duration_adjust = -15;
  1141. if (coex_sta->a2dp_bit_pool < 35)
  1142. wifi_duration_adjust = -5;
  1143. else if (coex_sta->a2dp_bit_pool < 45)
  1144. wifi_duration_adjust = -10;
  1145. } else if (coex_sta->scan_ap_num >= 20) {
  1146. wifi_duration_adjust = -10;
  1147. if (coex_sta->a2dp_bit_pool >= 45)
  1148. wifi_duration_adjust = -15;
  1149. } else {
  1150. wifi_duration_adjust = 0;
  1151. if (coex_sta->a2dp_bit_pool >= 35)
  1152. wifi_duration_adjust = -10;
  1153. else if (coex_sta->a2dp_bit_pool >= 45)
  1154. wifi_duration_adjust = -15;
  1155. }
  1156. if ((type == 1) || (type == 2) || (type == 9) || (type == 11) ||
  1157. (type == 101)
  1158. || (type == 102) || (type == 109) || (type == 101)) {
  1159. if (!coex_sta->force_lps_on) { /* Native power save TDMA, only for A2DP-only case 1/2/9/11 while wifi noisy threshold > 30 */
  1160. ps_tdma_byte0_val = 0x61; /* no null-pkt */
  1161. ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */
  1162. ps_tdma_byte4_val =
  1163. 0x10; /* 0x778 = d/1 toggle, no dynamic slot */
  1164. } else {
  1165. ps_tdma_byte0_val = 0x51; /* null-pkt */
  1166. ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */
  1167. ps_tdma_byte4_val =
  1168. 0x50; /* 0x778 = d/1 toggle, dynamic slot */
  1169. }
  1170. } else if ((type == 3) || (type == 13) || (type == 14) ||
  1171. (type == 103) || (type == 113) || (type == 114)) {
  1172. ps_tdma_byte0_val = 0x51; /* null-pkt */
  1173. ps_tdma_byte3_val = 0x10; /* tx-pause at BT-slot */
  1174. ps_tdma_byte4_val =
  1175. 0x10; /* 0x778 = d/1 toggle, no dynamic slot */
  1176. #if 0
  1177. if (!wifi_busy)
  1178. ps_tdma_byte4_val = ps_tdma_byte4_val |
  1179. 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
  1180. #endif
  1181. } else { /* native power save case */
  1182. ps_tdma_byte0_val = 0x61; /* no null-pkt */
  1183. ps_tdma_byte3_val = 0x11; /* no tx-pause at BT-slot */
  1184. ps_tdma_byte4_val =
  1185. 0x11; /* 0x778 = d/1 toggle, no dynamic slot */
  1186. /* psTdmaByte4Va is not defne for 0x778 = d/1, 1/1 case */
  1187. }
  1188. /* if (bt_link_info->slave_role == true) */
  1189. if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist))
  1190. ps_tdma_byte4_val = ps_tdma_byte4_val |
  1191. 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
  1192. if (type > 100) {
  1193. ps_tdma_byte0_val = ps_tdma_byte0_val |
  1194. 0x82; /* set antenna control by SW */
  1195. ps_tdma_byte3_val = ps_tdma_byte3_val |
  1196. 0x60; /* set antenna no toggle, control by antenna diversity */
  1197. }
  1198. if (turn_on) {
  1199. switch (type) {
  1200. default:
  1201. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51,
  1202. 0x1a, 0x1a, 0x0, ps_tdma_byte4_val);
  1203. break;
  1204. case 1:
  1205. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1206. ps_tdma_byte0_val, 0x3a +
  1207. wifi_duration_adjust, 0x03,
  1208. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1209. break;
  1210. case 2:
  1211. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1212. ps_tdma_byte0_val, 0x2d +
  1213. wifi_duration_adjust, 0x03,
  1214. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1215. break;
  1216. case 3:
  1217. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1218. ps_tdma_byte0_val, 0x30, 0x03,
  1219. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1220. break;
  1221. case 4:
  1222. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93,
  1223. 0x15, 0x3, 0x14, 0x0);
  1224. break;
  1225. case 5:
  1226. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1227. ps_tdma_byte0_val, 0x1f, 0x3,
  1228. ps_tdma_byte3_val, 0x11);
  1229. break;
  1230. case 6:
  1231. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1232. ps_tdma_byte0_val, 0x20, 0x3,
  1233. ps_tdma_byte3_val, 0x11);
  1234. break;
  1235. case 7:
  1236. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13,
  1237. 0xc, 0x5, 0x0, 0x0);
  1238. break;
  1239. case 8:
  1240. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93,
  1241. 0x25, 0x3, 0x10, 0x0);
  1242. break;
  1243. case 9:
  1244. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1245. ps_tdma_byte0_val, 0x21, 0x3,
  1246. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1247. break;
  1248. case 10:
  1249. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13,
  1250. 0xa, 0xa, 0x0, 0x40);
  1251. break;
  1252. case 11:
  1253. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1254. ps_tdma_byte0_val, 0x21, 0x03,
  1255. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1256. break;
  1257. case 12:
  1258. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51,
  1259. 0x0a, 0x0a, 0x0, 0x50);
  1260. break;
  1261. case 13:
  1262. if (coex_sta->scan_ap_num <= 3)
  1263. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1264. ps_tdma_byte0_val, 0x40, 0x3,
  1265. ps_tdma_byte3_val,
  1266. ps_tdma_byte4_val);
  1267. else
  1268. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1269. ps_tdma_byte0_val, 0x21, 0x3,
  1270. ps_tdma_byte3_val,
  1271. ps_tdma_byte4_val);
  1272. break;
  1273. case 14:
  1274. if (coex_sta->scan_ap_num <= 3)
  1275. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1276. 0x51, 0x30, 0x3, 0x10, 0x50);
  1277. else
  1278. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1279. ps_tdma_byte0_val, 0x21, 0x3,
  1280. ps_tdma_byte3_val,
  1281. ps_tdma_byte4_val);
  1282. break;
  1283. case 15:
  1284. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x13,
  1285. 0xa, 0x3, 0x8, 0x0);
  1286. break;
  1287. case 16:
  1288. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93,
  1289. 0x15, 0x3, 0x10, 0x0);
  1290. break;
  1291. case 18:
  1292. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x93,
  1293. 0x25, 0x3, 0x10, 0x0);
  1294. break;
  1295. case 20:
  1296. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1297. ps_tdma_byte0_val, 0x3f, 0x03,
  1298. ps_tdma_byte3_val, 0x10);
  1299. break;
  1300. case 21:
  1301. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x61,
  1302. 0x25, 0x03, 0x11, 0x11);
  1303. break;
  1304. case 22:
  1305. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1306. ps_tdma_byte0_val, 0x25, 0x03,
  1307. ps_tdma_byte3_val, 0x10);
  1308. break;
  1309. case 23:
  1310. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3,
  1311. 0x25, 0x3, 0x31, 0x18);
  1312. break;
  1313. case 24:
  1314. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3,
  1315. 0x15, 0x3, 0x31, 0x18);
  1316. break;
  1317. case 25:
  1318. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3,
  1319. 0xa, 0x3, 0x31, 0x18);
  1320. break;
  1321. case 26:
  1322. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3,
  1323. 0xa, 0x3, 0x31, 0x18);
  1324. break;
  1325. case 27:
  1326. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xe3,
  1327. 0x25, 0x3, 0x31, 0x98);
  1328. break;
  1329. case 28:
  1330. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x69,
  1331. 0x25, 0x3, 0x31, 0x0);
  1332. break;
  1333. case 29:
  1334. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xab,
  1335. 0x1a, 0x1a, 0x1, 0x10);
  1336. break;
  1337. case 30:
  1338. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51,
  1339. 0x30, 0x3, 0x10, 0x10);
  1340. break;
  1341. case 31:
  1342. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xd3,
  1343. 0x1a, 0x1a, 0, 0x58);
  1344. break;
  1345. case 32:
  1346. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1347. ps_tdma_byte0_val, 0x35, 0x3,
  1348. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1349. break;
  1350. case 33:
  1351. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1352. ps_tdma_byte0_val, 0x35, 0x3,
  1353. ps_tdma_byte3_val, 0x10);
  1354. break;
  1355. case 34:
  1356. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x53,
  1357. 0x1a, 0x1a, 0x0, 0x10);
  1358. break;
  1359. case 35:
  1360. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x63,
  1361. 0x1a, 0x1a, 0x0, 0x10);
  1362. break;
  1363. case 36:
  1364. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0xd3,
  1365. 0x12, 0x3, 0x14, 0x50);
  1366. break;
  1367. case 40: /* SoftAP only with no sta associated,BT disable ,TDMA mode for power saving */
  1368. /* here softap mode screen off will cost 70-80mA for phone */
  1369. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x23,
  1370. 0x18, 0x00, 0x10, 0x24);
  1371. break;
  1372. /* for 1-Ant translate to 2-Ant */
  1373. case 101:
  1374. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1375. ps_tdma_byte0_val, 0x3a +
  1376. wifi_duration_adjust, 0x03,
  1377. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1378. break;
  1379. case 102:
  1380. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1381. ps_tdma_byte0_val, 0x2d +
  1382. wifi_duration_adjust, 0x03,
  1383. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1384. break;
  1385. case 103:
  1386. /* halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, 0x1d, 0x1d, 0x0, ps_tdma_byte4_val); */
  1387. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1388. ps_tdma_byte0_val, 0x3a, 0x03,
  1389. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1390. break;
  1391. case 105:
  1392. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1393. ps_tdma_byte0_val, 0x15, 0x3,
  1394. ps_tdma_byte3_val, 0x11);
  1395. break;
  1396. case 106:
  1397. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1398. ps_tdma_byte0_val, 0x20, 0x3,
  1399. ps_tdma_byte3_val, 0x11);
  1400. break;
  1401. case 109:
  1402. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1403. ps_tdma_byte0_val, 0x21, 0x3,
  1404. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1405. break;
  1406. case 111:
  1407. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1408. ps_tdma_byte0_val, 0x21, 0x03,
  1409. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1410. break;
  1411. case 113:
  1412. /* halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x51, 0x12, 0x12, 0x0, ps_tdma_byte4_val); */
  1413. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1414. ps_tdma_byte0_val, 0x21, 0x3,
  1415. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1416. break;
  1417. case 114:
  1418. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1419. ps_tdma_byte0_val, 0x21, 0x3,
  1420. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1421. break;
  1422. case 120:
  1423. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1424. ps_tdma_byte0_val, 0x3f, 0x03,
  1425. ps_tdma_byte3_val, 0x10);
  1426. break;
  1427. case 122:
  1428. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1429. ps_tdma_byte0_val, 0x25, 0x03,
  1430. ps_tdma_byte3_val, 0x10);
  1431. break;
  1432. case 132:
  1433. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1434. ps_tdma_byte0_val, 0x25, 0x03,
  1435. ps_tdma_byte3_val, ps_tdma_byte4_val);
  1436. break;
  1437. case 133:
  1438. halbtc8723b1ant_set_fw_pstdma(btcoexist,
  1439. ps_tdma_byte0_val, 0x25, 0x03,
  1440. ps_tdma_byte3_val, 0x11);
  1441. break;
  1442. }
  1443. } else {
  1444. /* disable PS tdma */
  1445. switch (type) {
  1446. case 8: /* PTA Control */
  1447. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x8,
  1448. 0x0, 0x0, 0x0, 0x0);
  1449. break;
  1450. case 0:
  1451. default: /* Software control, Antenna at BT side */
  1452. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x0,
  1453. 0x0, 0x0, 0x0, 0x0);
  1454. break;
  1455. case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */
  1456. halbtc8723b1ant_set_fw_pstdma(btcoexist, 0x0,
  1457. 0x0, 0x0, 0x48, 0x0);
  1458. break;
  1459. }
  1460. }
  1461. rssi_adjust_val = 0;
  1462. btcoexist->btc_set(btcoexist,
  1463. BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val);
  1464. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1465. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n",
  1466. btcoexist->btc_read_4byte(btcoexist, 0x948),
  1467. btcoexist->btc_read_1byte(btcoexist, 0x765),
  1468. btcoexist->btc_read_1byte(btcoexist, 0x67));
  1469. BTC_TRACE(trace_buf);
  1470. /* update pre state */
  1471. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1472. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1473. }
  1474. void halbtc8723b1ant_tdma_duration_adjust_for_acl(IN struct btc_coexist
  1475. *btcoexist, IN u8 wifi_status)
  1476. {
  1477. static s32 up, dn, m, n, wait_count;
  1478. s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
  1479. u8 retry_count = 0, bt_info_ext;
  1480. boolean wifi_busy = false;
  1481. if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status)
  1482. wifi_busy = true;
  1483. else
  1484. wifi_busy = false;
  1485. if ((BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN ==
  1486. wifi_status) ||
  1487. (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) ||
  1488. (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT ==
  1489. wifi_status)) {
  1490. if (coex_dm->cur_ps_tdma != 1 &&
  1491. coex_dm->cur_ps_tdma != 2 &&
  1492. coex_dm->cur_ps_tdma != 3 &&
  1493. coex_dm->cur_ps_tdma != 9) {
  1494. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1495. 9);
  1496. coex_dm->ps_tdma_du_adj_type = 9;
  1497. up = 0;
  1498. dn = 0;
  1499. m = 1;
  1500. n = 3;
  1501. result = 0;
  1502. wait_count = 0;
  1503. }
  1504. return;
  1505. }
  1506. if (!coex_dm->auto_tdma_adjust) {
  1507. coex_dm->auto_tdma_adjust = true;
  1508. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
  1509. coex_dm->ps_tdma_du_adj_type = 2;
  1510. /* ============ */
  1511. up = 0;
  1512. dn = 0;
  1513. m = 1;
  1514. n = 3;
  1515. result = 0;
  1516. wait_count = 0;
  1517. } else {
  1518. /* acquire the BT TRx retry count from BT_Info byte2 */
  1519. retry_count = coex_sta->bt_retry_cnt;
  1520. bt_info_ext = coex_sta->bt_info_ext;
  1521. if ((coex_sta->low_priority_tx) > 1050 ||
  1522. (coex_sta->low_priority_rx) > 1250)
  1523. retry_count++;
  1524. result = 0;
  1525. wait_count++;
  1526. if (retry_count ==
  1527. 0) { /* no retry in the last 2-second duration */
  1528. up++;
  1529. dn--;
  1530. if (dn <= 0)
  1531. dn = 0;
  1532. if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
  1533. wait_count = 0;
  1534. n = 3;
  1535. up = 0;
  1536. dn = 0;
  1537. result = 1;
  1538. }
  1539. } else if (retry_count <=
  1540. 3) { /* <=3 retry in the last 2-second duration */
  1541. up--;
  1542. dn++;
  1543. if (up <= 0)
  1544. up = 0;
  1545. if (dn == 2) { /* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
  1546. if (wait_count <= 2)
  1547. m++; /* to avoid loop between the two levels */
  1548. else
  1549. m = 1;
  1550. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1551. m = 20;
  1552. n = 3 * m;
  1553. up = 0;
  1554. dn = 0;
  1555. wait_count = 0;
  1556. result = -1;
  1557. }
  1558. } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
  1559. if (wait_count == 1)
  1560. m++; /* to avoid loop between the two levels */
  1561. else
  1562. m = 1;
  1563. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1564. m = 20;
  1565. n = 3 * m;
  1566. up = 0;
  1567. dn = 0;
  1568. wait_count = 0;
  1569. result = -1;
  1570. }
  1571. if (result == -1) {
  1572. /* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
  1573. ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) )
  1574. {
  1575. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  1576. coex_dm->ps_tdma_du_adj_type = 9;
  1577. }
  1578. else */ if (coex_dm->cur_ps_tdma == 1) {
  1579. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1580. true, 2);
  1581. coex_dm->ps_tdma_du_adj_type = 2;
  1582. } else if (coex_dm->cur_ps_tdma == 2) {
  1583. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1584. true, 9);
  1585. coex_dm->ps_tdma_du_adj_type = 9;
  1586. } else if (coex_dm->cur_ps_tdma == 9) {
  1587. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1588. true, 11);
  1589. coex_dm->ps_tdma_du_adj_type = 11;
  1590. }
  1591. } else if (result == 1) {
  1592. /* if( (BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
  1593. ((coex_dm->cur_ps_tdma == 1) ||(coex_dm->cur_ps_tdma == 2)) )
  1594. {
  1595. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  1596. coex_dm->ps_tdma_du_adj_type = 9;
  1597. }
  1598. else */ if (coex_dm->cur_ps_tdma == 11) {
  1599. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1600. true, 9);
  1601. coex_dm->ps_tdma_du_adj_type = 9;
  1602. } else if (coex_dm->cur_ps_tdma == 9) {
  1603. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1604. true, 2);
  1605. coex_dm->ps_tdma_du_adj_type = 2;
  1606. } else if (coex_dm->cur_ps_tdma == 2) {
  1607. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1608. true, 1);
  1609. coex_dm->ps_tdma_du_adj_type = 1;
  1610. }
  1611. } else { /* no change */
  1612. /* Bryant Modify
  1613. if(wifi_busy != pre_wifi_busy)
  1614. {
  1615. pre_wifi_busy = wifi_busy;
  1616. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, true, coex_dm->cur_ps_tdma);
  1617. }
  1618. */
  1619. }
  1620. if (coex_dm->cur_ps_tdma != 1 &&
  1621. coex_dm->cur_ps_tdma != 2 &&
  1622. coex_dm->cur_ps_tdma != 9 &&
  1623. coex_dm->cur_ps_tdma != 11) {
  1624. /* recover to previous adjust type */
  1625. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1626. coex_dm->ps_tdma_du_adj_type);
  1627. }
  1628. }
  1629. }
  1630. /* *********************************************
  1631. *
  1632. * Non-Software Coex Mechanism start
  1633. *
  1634. * ********************************************* */
  1635. void halbtc8723b1ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
  1636. {
  1637. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1638. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
  1639. false, false);
  1640. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1641. }
  1642. void halbtc8723b1ant_action_hs(IN struct btc_coexist *btcoexist)
  1643. {
  1644. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  1645. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  1646. }
  1647. void halbtc8723b1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
  1648. {
  1649. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1650. boolean wifi_connected = false, ap_enable = false, wifi_busy = false,
  1651. bt_busy = false;
  1652. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1653. &ap_enable);
  1654. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1655. &wifi_connected);
  1656. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1657. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  1658. if (coex_sta->bt_abnormal_scan) {
  1659. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1660. 33);
  1661. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  1662. } else if ((!wifi_connected) && (!coex_sta->wifi_is_high_pri_task)) {
  1663. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1664. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1665. NORMAL_EXEC, false, false);
  1666. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1667. } else if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) ||
  1668. (bt_link_info->a2dp_exist)) {
  1669. /* SCO/HID/A2DP busy */
  1670. if (coex_sta->c2h_bt_remote_name_req)
  1671. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1672. 33);
  1673. else
  1674. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1675. 32);
  1676. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1677. } else if ((bt_link_info->pan_exist) || (wifi_busy)) {
  1678. if (coex_sta->c2h_bt_remote_name_req)
  1679. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1680. 33);
  1681. else
  1682. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1683. 32);
  1684. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1685. } else {
  1686. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1687. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1688. NORMAL_EXEC, false, false);
  1689. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  1690. }
  1691. }
  1692. void halbtc8723b1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
  1693. *btcoexist, IN u8 wifi_status)
  1694. {
  1695. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1696. boolean wifi_connected = false;
  1697. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1698. &wifi_connected);
  1699. /* tdma and coex table */
  1700. if (bt_link_info->sco_exist) {
  1701. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  1702. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  1703. } else { /* HID */
  1704. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
  1705. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  1706. }
  1707. }
  1708. void halbtc8723b1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
  1709. {
  1710. halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  1711. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  1712. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, FORCE_EXEC,
  1713. false, false);
  1714. }
  1715. void halbtc8723b1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
  1716. {
  1717. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1718. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
  1719. false, false);
  1720. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  1721. }
  1722. void halbtc8723b1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
  1723. *btcoexist, IN u8 wifi_status)
  1724. {
  1725. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1726. if ((coex_sta->low_priority_rx >= 950) && (!coex_sta->under_ips))
  1727. bt_link_info->slave_role = true;
  1728. else
  1729. bt_link_info->slave_role = false;
  1730. if (bt_link_info->hid_only) { /* HID */
  1731. halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist,
  1732. wifi_status);
  1733. coex_dm->auto_tdma_adjust = false;
  1734. return;
  1735. } else if (bt_link_info->a2dp_only) { /* A2DP */
  1736. if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
  1737. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1738. 32);
  1739. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1740. NORMAL_EXEC, 4);
  1741. coex_dm->auto_tdma_adjust = false;
  1742. } else {
  1743. halbtc8723b1ant_tdma_duration_adjust_for_acl(btcoexist,
  1744. wifi_status);
  1745. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1746. NORMAL_EXEC, 4);
  1747. coex_dm->auto_tdma_adjust = true;
  1748. }
  1749. } else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) ||
  1750. (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
  1751. bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
  1752. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
  1753. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1754. coex_dm->auto_tdma_adjust = false;
  1755. } else if (bt_link_info->hid_exist &&
  1756. bt_link_info->a2dp_exist) { /* HID+A2DP */
  1757. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  1758. coex_dm->auto_tdma_adjust = false;
  1759. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1760. } else if ((bt_link_info->pan_only) || (bt_link_info->hid_exist &&
  1761. bt_link_info->pan_exist)) { /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
  1762. if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status)
  1763. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1764. 9);
  1765. else
  1766. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1767. 3);
  1768. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1769. coex_dm->auto_tdma_adjust = false;
  1770. } else {
  1771. /* BT no-profile busy (0x9) */
  1772. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
  1773. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1774. coex_dm->auto_tdma_adjust = false;
  1775. }
  1776. }
  1777. void halbtc8723b1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
  1778. {
  1779. /* tdma and coex table */
  1780. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  1781. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, NORMAL_EXEC,
  1782. false, false);
  1783. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1784. }
  1785. void halbtc8723b1ant_action_wifi_not_connected_scan(IN struct btc_coexist
  1786. *btcoexist)
  1787. {
  1788. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1789. /* tdma and coex table */
  1790. if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
  1791. if (bt_link_info->a2dp_exist) {
  1792. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1793. 32);
  1794. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1795. NORMAL_EXEC, 4);
  1796. } else if (bt_link_info->a2dp_exist &&
  1797. bt_link_info->pan_exist) {
  1798. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1799. 22);
  1800. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1801. NORMAL_EXEC, 4);
  1802. } else {
  1803. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1804. 20);
  1805. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1806. NORMAL_EXEC, 4);
  1807. }
  1808. } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  1809. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
  1810. coex_dm->bt_status)) {
  1811. halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist,
  1812. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
  1813. } else {
  1814. /* Bryant Add */
  1815. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1816. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1817. NORMAL_EXEC, false, false);
  1818. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  1819. }
  1820. }
  1821. void halbtc8723b1ant_action_wifi_not_connected_asso_auth(
  1822. IN struct btc_coexist *btcoexist)
  1823. {
  1824. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1825. /* tdma and coex table */
  1826. if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist) ||
  1827. (bt_link_info->a2dp_exist)) {
  1828. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  1829. halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
  1830. } else if (bt_link_info->pan_exist) {
  1831. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
  1832. halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 4);
  1833. } else {
  1834. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1835. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1836. NORMAL_EXEC, false, false);
  1837. halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
  1838. }
  1839. }
  1840. void halbtc8723b1ant_action_wifi_connected_scan(IN struct btc_coexist
  1841. *btcoexist)
  1842. {
  1843. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1844. /* tdma and coex table */
  1845. if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
  1846. if (bt_link_info->a2dp_exist) {
  1847. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1848. 32);
  1849. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1850. NORMAL_EXEC, 4);
  1851. } else if (bt_link_info->a2dp_exist &&
  1852. bt_link_info->pan_exist) {
  1853. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1854. 22);
  1855. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1856. NORMAL_EXEC, 4);
  1857. } else {
  1858. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1859. 20);
  1860. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1861. NORMAL_EXEC, 4);
  1862. }
  1863. } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  1864. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
  1865. coex_dm->bt_status)) {
  1866. halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist,
  1867. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
  1868. } else {
  1869. /* Bryant Add */
  1870. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1871. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1872. NORMAL_EXEC, false, false);
  1873. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  1874. }
  1875. }
  1876. void halbtc8723b1ant_action_wifi_connected_specific_packet(
  1877. IN struct btc_coexist *btcoexist)
  1878. {
  1879. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1880. boolean wifi_busy = false;
  1881. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1882. /* no specific packet process for both WiFi and BT very busy */
  1883. if ((wifi_busy) && ((bt_link_info->pan_exist) ||
  1884. (coex_sta->num_of_profile >= 2)))
  1885. return;
  1886. /* tdma and coex table */
  1887. if ((bt_link_info->sco_exist) || (bt_link_info->hid_exist)) {
  1888. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  1889. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  1890. } else if (bt_link_info->a2dp_exist) {
  1891. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  1892. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1893. } else if (bt_link_info->pan_exist) {
  1894. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
  1895. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  1896. } else {
  1897. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  1898. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  1899. NORMAL_EXEC, false, false);
  1900. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  1901. }
  1902. }
  1903. void halbtc8723b1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
  1904. {
  1905. boolean wifi_busy = false;
  1906. boolean scan = false, link = false, roam = false;
  1907. boolean under_4way = false, ap_enable = false;
  1908. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1909. "[BTCoex], CoexForWifiConnect()===>\n");
  1910. BTC_TRACE(trace_buf);
  1911. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  1912. &under_4way);
  1913. if (under_4way) {
  1914. halbtc8723b1ant_action_wifi_connected_specific_packet(
  1915. btcoexist);
  1916. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1917. "[BTCoex], CoexForWifiConnect(), return for wifi is under 4way<===\n");
  1918. BTC_TRACE(trace_buf);
  1919. return;
  1920. }
  1921. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  1922. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  1923. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  1924. if (scan || link || roam) {
  1925. if (scan)
  1926. halbtc8723b1ant_action_wifi_connected_scan(btcoexist);
  1927. else
  1928. halbtc8723b1ant_action_wifi_connected_specific_packet(
  1929. btcoexist);
  1930. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1931. "[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n");
  1932. BTC_TRACE(trace_buf);
  1933. return;
  1934. }
  1935. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1936. &ap_enable);
  1937. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1938. /* tdma and coex table */
  1939. if (!wifi_busy) {
  1940. if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
  1941. halbtc8723b1ant_action_wifi_connected_bt_acl_busy(
  1942. btcoexist,
  1943. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
  1944. } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY ==
  1945. coex_dm->bt_status) ||
  1946. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
  1947. coex_dm->bt_status)) {
  1948. halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist,
  1949. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE);
  1950. } else {
  1951. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1952. 8);
  1953. halbtc8723b1ant_set_ant_path(btcoexist,
  1954. BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false);
  1955. /* if ((coex_sta->high_priority_tx) +
  1956. (coex_sta->high_priority_rx) <= 60) */
  1957. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1958. NORMAL_EXEC, 2);
  1959. /* else
  1960. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1961. NORMAL_EXEC, 7); */
  1962. }
  1963. } else {
  1964. if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
  1965. halbtc8723b1ant_action_wifi_connected_bt_acl_busy(
  1966. btcoexist,
  1967. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
  1968. } else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY ==
  1969. coex_dm->bt_status) ||
  1970. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
  1971. coex_dm->bt_status)) {
  1972. halbtc8723b1ant_action_bt_sco_hid_only_busy(btcoexist,
  1973. BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY);
  1974. } else {
  1975. /* halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1976. 8);
  1977. halbtc8723b1ant_set_ant_path(btcoexist,
  1978. BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false);
  1979. if ((coex_sta->high_priority_tx) +
  1980. (coex_sta->high_priority_rx) <= 60)
  1981. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1982. NORMAL_EXEC, 2);
  1983. else
  1984. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1985. NORMAL_EXEC, 7); */
  1986. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1987. 32);
  1988. halbtc8723b1ant_set_ant_path(btcoexist,
  1989. BTC_ANT_PATH_PTA, NORMAL_EXEC, false, false);
  1990. halbtc8723b1ant_coex_table_with_type(btcoexist,
  1991. NORMAL_EXEC, 4);
  1992. }
  1993. }
  1994. }
  1995. void halbtc8723b1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
  1996. {
  1997. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1998. boolean wifi_connected = false, bt_hs_on = false, wifi_busy = false;
  1999. boolean increase_scan_dev_num = false;
  2000. boolean bt_ctrl_agg_buf_size = false;
  2001. boolean miracast_plus_bt = false;
  2002. u8 agg_buf_size = 5;
  2003. u32 wifi_link_status = 0;
  2004. u32 num_of_wifi_link = 0, wifi_bw;
  2005. u8 iot_peer = BTC_IOT_PEER_UNKNOWN;
  2006. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2007. "[BTCoex], RunCoexistMechanism()===>\n");
  2008. BTC_TRACE(trace_buf);
  2009. if (btcoexist->manual_control) {
  2010. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2011. "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
  2012. BTC_TRACE(trace_buf);
  2013. return;
  2014. }
  2015. if (btcoexist->stop_coex_dm) {
  2016. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2017. "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n");
  2018. BTC_TRACE(trace_buf);
  2019. return;
  2020. }
  2021. if (coex_sta->under_ips) {
  2022. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2023. "[BTCoex], wifi is under IPS !!!\n");
  2024. BTC_TRACE(trace_buf);
  2025. return;
  2026. }
  2027. if (coex_sta->bt_whck_test) {
  2028. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2029. "[BTCoex], BT is under WHCK TEST!!!\n");
  2030. BTC_TRACE(trace_buf);
  2031. halbtc8723b1ant_action_bt_whck_test(btcoexist);
  2032. return;
  2033. }
  2034. if ((BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  2035. (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  2036. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
  2037. increase_scan_dev_num = true;
  2038. btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
  2039. &increase_scan_dev_num);
  2040. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2041. &wifi_connected);
  2042. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2043. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  2044. &wifi_link_status);
  2045. num_of_wifi_link = wifi_link_status >> 16;
  2046. if ((num_of_wifi_link >= 2) ||
  2047. (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
  2048. if (bt_link_info->bt_link_exist) {
  2049. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1,
  2050. 0, 1);
  2051. miracast_plus_bt = true;
  2052. } else {
  2053. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0,
  2054. 0, 0);
  2055. miracast_plus_bt = false;
  2056. }
  2057. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  2058. &miracast_plus_bt);
  2059. halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
  2060. bt_ctrl_agg_buf_size, agg_buf_size);
  2061. if (((bt_link_info->a2dp_exist) || (wifi_busy)) &&
  2062. (coex_sta->c2h_bt_inquiry_page))
  2063. halbtc8723b1ant_action_bt_inquiry(btcoexist);
  2064. else
  2065. halbtc8723b1ant_action_wifi_multi_port(btcoexist);
  2066. return;
  2067. }
  2068. miracast_plus_bt = false;
  2069. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  2070. &miracast_plus_bt);
  2071. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2072. if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
  2073. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 1, 0, 1);
  2074. btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
  2075. /* if(BTC_IOT_PEER_CISCO != iot_peer) */
  2076. if ((BTC_IOT_PEER_CISCO != iot_peer) &&
  2077. (BTC_IOT_PEER_BROADCOM != iot_peer)) {
  2078. if (bt_link_info->sco_exist) /* if (bt_link_info->bt_hi_pri_link_exist) */
  2079. /* halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, true, false, 0x5); */
  2080. halbtc8723b1ant_limited_rx(btcoexist,
  2081. NORMAL_EXEC, true, false, 0x5);
  2082. else
  2083. halbtc8723b1ant_limited_rx(btcoexist,
  2084. NORMAL_EXEC, false, false, 0x5);
  2085. /* halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x8); */
  2086. } else {
  2087. if (bt_link_info->sco_exist)
  2088. halbtc8723b1ant_limited_rx(btcoexist,
  2089. NORMAL_EXEC, true, false, 0x5);
  2090. else if (bt_link_info->hid_exist)
  2091. halbtc8723b1ant_limited_rx(btcoexist,
  2092. NORMAL_EXEC, false, true, 0x3);
  2093. else {
  2094. if (BTC_WIFI_BW_HT40 == wifi_bw)
  2095. halbtc8723b1ant_limited_rx(btcoexist,
  2096. NORMAL_EXEC, false, true, 0x10);
  2097. else
  2098. halbtc8723b1ant_limited_rx(btcoexist,
  2099. NORMAL_EXEC, false, true, 0x8);
  2100. }
  2101. }
  2102. halbtc8723b1ant_sw_mechanism(btcoexist, true);
  2103. /* low pelnaty ra in pcr ra */
  2104. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 35);
  2105. } else {
  2106. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  2107. halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
  2108. 0x5);
  2109. halbtc8723b1ant_sw_mechanism(btcoexist, false);
  2110. }
  2111. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  2112. if (coex_sta->c2h_bt_inquiry_page) {
  2113. halbtc8723b1ant_action_bt_inquiry(btcoexist);
  2114. return;
  2115. } else if (bt_hs_on) {
  2116. halbtc8723b1ant_action_hs(btcoexist);
  2117. return;
  2118. }
  2119. if (!wifi_connected) {
  2120. boolean scan = false, link = false, roam = false;
  2121. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2122. "[BTCoex], wifi is non connected-idle !!!\n");
  2123. BTC_TRACE(trace_buf);
  2124. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2125. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2126. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2127. if (scan || link || roam) {
  2128. if (scan)
  2129. halbtc8723b1ant_action_wifi_not_connected_scan(
  2130. btcoexist);
  2131. else
  2132. halbtc8723b1ant_action_wifi_not_connected_asso_auth(
  2133. btcoexist);
  2134. } else
  2135. halbtc8723b1ant_action_wifi_not_connected(btcoexist);
  2136. } else /* wifi LPS/Busy */
  2137. halbtc8723b1ant_action_wifi_connected(btcoexist);
  2138. }
  2139. void halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  2140. {
  2141. /* force to reset coex mechanism */
  2142. /* sw all off */
  2143. halbtc8723b1ant_sw_mechanism(btcoexist, false);
  2144. /* halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8); */
  2145. /* halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */
  2146. coex_sta->pop_event_cnt = 0;
  2147. }
  2148. void halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
  2149. IN boolean back_up, IN boolean wifi_only)
  2150. {
  2151. u32 u32tmp = 0; /* , fw_ver; */
  2152. u8 u8tmpa = 0, u8tmpb = 0;
  2153. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2154. "[BTCoex], 1Ant Init HW Config!!\n");
  2155. BTC_TRACE(trace_buf);
  2156. psd_scan->ant_det_is_ant_det_available = false;
  2157. /* Give bt_coex_supported_version the default value */
  2158. coex_sta->bt_coex_supported_version = 0;
  2159. /* 0xf0[15:12] --> Chip Cut information */
  2160. coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
  2161. 0xf1) & 0xf0) >> 4;
  2162. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
  2163. 0x1); /* enable TBTT nterrupt */
  2164. /* 0x790[5:0]=0x5 */
  2165. btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5);
  2166. /* Enable counter statistics */
  2167. /* btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc); */ /*0x76e[3] =1, WLAN_Act control by PTA */
  2168. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1);
  2169. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
  2170. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1); */ /*BT select s0/s1 is controlled by WiFi */
  2171. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  2172. /* Antenna config */
  2173. if (wifi_only)
  2174. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
  2175. FORCE_EXEC, true, false);
  2176. else
  2177. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  2178. FORCE_EXEC, true, false);
  2179. /* PTA parameter */
  2180. halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  2181. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
  2182. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  2183. u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67);
  2184. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2185. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n",
  2186. u32tmp, u8tmpa, u8tmpb);
  2187. BTC_TRACE(trace_buf);
  2188. }
  2189. /* Donot remove optimize off flag, otherwise antenna detection would trigger BT collapsed */
  2190. #ifdef PLATFORM_WINDOWS
  2191. #pragma optimize("", off)
  2192. #endif
  2193. void halbtc8723b1ant_mechanism_switch(IN struct btc_coexist *btcoexist,
  2194. IN boolean bSwitchTo2Antenna)
  2195. {
  2196. if (bSwitchTo2Antenna) {
  2197. /* BT TRx mask off */
  2198. btcoexist->btc_set_bt_trx_mask(btcoexist, 0);
  2199. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2200. "############# [BTCoex], BT TRx Mask off for mechanism_switch\n");
  2201. BTC_TRACE(trace_buf);
  2202. } else {
  2203. /* BT TRx mask on */
  2204. btcoexist->btc_set_bt_trx_mask(btcoexist, 1);
  2205. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2206. "############# [BTCoex], BT TRx Mask on for mechanism_switch\n");
  2207. BTC_TRACE(trace_buf);
  2208. }
  2209. #if 0
  2210. if (bSwitchTo2Antenna) { /* 1-Ant -> 2-Ant */
  2211. /* un-lock TRx Mask setup for 8723b f-cut */
  2212. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, 0x80, 0x1);
  2213. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, 0x1, 0x1);
  2214. /* WiFi TRx Mask on */
  2215. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  2216. 0x0);
  2217. /* BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 */
  2218. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x2c,
  2219. 0x7c45);
  2220. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x30,
  2221. 0x7c45);
  2222. /* BT TRx Mask on */
  2223. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x1);
  2224. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  2225. FORCE_EXEC, false, false);
  2226. } else {
  2227. /* WiFi TRx Mask on */
  2228. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  2229. 0x780);
  2230. /* lock TRx Mask setup for 8723b f-cut */
  2231. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd, 0x80, 0x0);
  2232. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf, 0x1, 0x0);
  2233. /* BT TRx Mask on */
  2234. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15);
  2235. /* BT TRx Mask ock 0x2c[0], 0x30[0] = 0 */
  2236. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x2c,
  2237. 0x7c44);
  2238. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x30,
  2239. 0x7c44);
  2240. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  2241. FORCE_EXEC, false, false);
  2242. }
  2243. #endif
  2244. }
  2245. u32 halbtc8723b1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
  2246. {
  2247. u8 j;
  2248. u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
  2249. u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
  2250. 174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
  2251. 32, 23, 15, 7, 0
  2252. };
  2253. if (val == 0)
  2254. return 0;
  2255. tmp = val;
  2256. while (1) {
  2257. if (tmp == 1)
  2258. break;
  2259. tmp = (tmp >> 1);
  2260. shiftcount++;
  2261. }
  2262. val_integerd_b = shiftcount + 1;
  2263. tmp2 = 1;
  2264. for (j = 1; j <= val_integerd_b; j++)
  2265. tmp2 = tmp2 * 2;
  2266. tmp = (val * 100) / tmp2;
  2267. tindex = tmp / 5;
  2268. if (tindex > 20)
  2269. tindex = 20;
  2270. val_fractiond_b = table_fraction[tindex];
  2271. result = val_integerd_b * 100 - val_fractiond_b;
  2272. return result;
  2273. }
  2274. void halbtc8723b1ant_psd_show_antenna_detect_result(IN struct btc_coexist
  2275. *btcoexist)
  2276. {
  2277. u8 *cli_buf = btcoexist->cli_buf;
  2278. struct btc_board_info *board_info = &btcoexist->board_info;
  2279. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2280. "\r\n============[Antenna Detection info] ============\n");
  2281. CL_PRINTF(cli_buf);
  2282. if (psd_scan->ant_det_result == 1)
  2283. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
  2284. "Ant Det Result", "2-Antenna (Bad-Isolation)",
  2285. BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2286. else if (psd_scan->ant_det_result == 2)
  2287. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  2288. "Ant Det Result", "2-Antenna (Good-Isolation)",
  2289. BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  2290. + psd_scan->ant_det_thres_offset,
  2291. BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2292. else
  2293. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  2294. "Ant Det Result", "1-Antenna",
  2295. BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT,
  2296. BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  2297. + psd_scan->ant_det_thres_offset);
  2298. CL_PRINTF(cli_buf);
  2299. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
  2300. "Antenna Detection Finish",
  2301. (board_info->btdm_ant_det_finish
  2302. ? "Yes" : "No"));
  2303. CL_PRINTF(cli_buf);
  2304. switch (psd_scan->ant_det_result) {
  2305. case 0:
  2306. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2307. "(BT is not available)");
  2308. break;
  2309. case 1: /* 2-Ant bad-isolation */
  2310. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2311. "(BT is available)");
  2312. break;
  2313. case 2: /* 2-Ant good-isolation */
  2314. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2315. "(BT is available)");
  2316. break;
  2317. case 3: /* 1-Ant */
  2318. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2319. "(BT is available)");
  2320. break;
  2321. case 4:
  2322. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2323. "(Uncertainty result)");
  2324. break;
  2325. case 5:
  2326. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
  2327. break;
  2328. case 6:
  2329. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2330. "(WiFi is Scanning)");
  2331. break;
  2332. case 7:
  2333. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2334. "(BT is not idle)");
  2335. break;
  2336. case 8:
  2337. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2338. "(Abort by WiFi Scanning)");
  2339. break;
  2340. case 9:
  2341. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2342. "(Antenna Init is not ready)");
  2343. break;
  2344. case 10:
  2345. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2346. "(BT is Inquiry or page)");
  2347. break;
  2348. case 11:
  2349. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2350. "(BT is Disabled)");
  2351. break;
  2352. }
  2353. CL_PRINTF(cli_buf);
  2354. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  2355. "Ant Detect Total Count", psd_scan->ant_det_try_count);
  2356. CL_PRINTF(cli_buf);
  2357. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  2358. "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
  2359. CL_PRINTF(cli_buf);
  2360. if ((!board_info->btdm_ant_det_finish) &&
  2361. (psd_scan->ant_det_result != 5))
  2362. return;
  2363. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
  2364. (psd_scan->ant_det_result ? "ok" : "fail"));
  2365. CL_PRINTF(cli_buf);
  2366. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
  2367. psd_scan->ant_det_bt_tx_time);
  2368. CL_PRINTF(cli_buf);
  2369. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
  2370. psd_scan->ant_det_bt_le_channel);
  2371. CL_PRINTF(cli_buf);
  2372. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
  2373. "WiFi PSD Cent-Ch/Offset/Span",
  2374. psd_scan->real_cent_freq, psd_scan->real_offset,
  2375. psd_scan->real_span);
  2376. CL_PRINTF(cli_buf);
  2377. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
  2378. "PSD Pre-Scan Peak Value",
  2379. psd_scan->ant_det_pre_psdscan_peak_val / 100);
  2380. CL_PRINTF(cli_buf);
  2381. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
  2382. "PSD Pre-Scan result",
  2383. (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
  2384. BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND
  2385. + psd_scan->ant_det_thres_offset);
  2386. CL_PRINTF(cli_buf);
  2387. if (psd_scan->ant_det_result == 5)
  2388. return;
  2389. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
  2390. "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
  2391. CL_PRINTF(cli_buf);
  2392. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
  2393. "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
  2394. CL_PRINTF(cli_buf);
  2395. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
  2396. (board_info->tfbga_package) ? "Yes" : "No");
  2397. CL_PRINTF(cli_buf);
  2398. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  2399. "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
  2400. CL_PRINTF(cli_buf);
  2401. }
  2402. void halbtc8723b1ant_psd_showdata(IN struct btc_coexist *btcoexist)
  2403. {
  2404. u8 *cli_buf = btcoexist->cli_buf;
  2405. u32 delta_freq_per_point;
  2406. u32 freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
  2407. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2408. "\r\n\n============[PSD info] (%d)============\n",
  2409. psd_scan->psd_gen_count);
  2410. CL_PRINTF(cli_buf);
  2411. if (psd_scan->psd_gen_count == 0) {
  2412. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
  2413. CL_PRINTF(cli_buf);
  2414. return;
  2415. }
  2416. if (psd_scan->psd_point == 0)
  2417. delta_freq_per_point = 0;
  2418. else
  2419. delta_freq_per_point = psd_scan->psd_band_width /
  2420. psd_scan->psd_point;
  2421. /* if (psd_scan->is_psd_show_max_only) */
  2422. if (0) {
  2423. psd_rep1 = psd_scan->psd_max_value / 100;
  2424. psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
  2425. freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
  2426. psd_scan->psd_max_value_point * delta_freq_per_point);
  2427. freq1 = freq / 1000000;
  2428. freq2 = freq / 1000 - freq1 * 1000;
  2429. if (freq2 < 100)
  2430. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2431. "\r\n Freq = %d.0%d MHz",
  2432. freq1, freq2);
  2433. else
  2434. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2435. "\r\n Freq = %d.%d MHz",
  2436. freq1, freq2);
  2437. if (psd_rep2 < 10)
  2438. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2439. ", Value = %d.0%d dB, (%d)\n",
  2440. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  2441. else
  2442. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2443. ", Value = %d.%d dB, (%d)\n",
  2444. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  2445. CL_PRINTF(cli_buf);
  2446. } else {
  2447. m = psd_scan->psd_start_point;
  2448. n = psd_scan->psd_start_point;
  2449. i = 1;
  2450. j = 1;
  2451. while (1) {
  2452. do {
  2453. freq = ((psd_scan->real_cent_freq - 20) *
  2454. 1000000 + m *
  2455. delta_freq_per_point);
  2456. freq1 = freq / 1000000;
  2457. freq2 = freq / 1000 - freq1 * 1000;
  2458. if (i == 1) {
  2459. if (freq2 == 0)
  2460. CL_SPRINTF(cli_buf,
  2461. BT_TMP_BUF_SIZE,
  2462. "\r\n Freq%6d.000",
  2463. freq1);
  2464. else if (freq2 < 100)
  2465. CL_SPRINTF(cli_buf,
  2466. BT_TMP_BUF_SIZE,
  2467. "\r\n Freq%6d.0%2d",
  2468. freq1,
  2469. freq2);
  2470. else
  2471. CL_SPRINTF(cli_buf,
  2472. BT_TMP_BUF_SIZE,
  2473. "\r\n Freq%6d.%3d",
  2474. freq1,
  2475. freq2);
  2476. } else if ((i % 8 == 0) ||
  2477. (m == psd_scan->psd_stop_point)) {
  2478. if (freq2 == 0)
  2479. CL_SPRINTF(cli_buf,
  2480. BT_TMP_BUF_SIZE,
  2481. "%6d.000\n", freq1);
  2482. else if (freq2 < 100)
  2483. CL_SPRINTF(cli_buf,
  2484. BT_TMP_BUF_SIZE,
  2485. "%6d.0%2d\n", freq1,
  2486. freq2);
  2487. else
  2488. CL_SPRINTF(cli_buf,
  2489. BT_TMP_BUF_SIZE,
  2490. "%6d.%3d\n", freq1,
  2491. freq2);
  2492. } else {
  2493. if (freq2 == 0)
  2494. CL_SPRINTF(cli_buf,
  2495. BT_TMP_BUF_SIZE,
  2496. "%6d.000", freq1);
  2497. else if (freq2 < 100)
  2498. CL_SPRINTF(cli_buf,
  2499. BT_TMP_BUF_SIZE,
  2500. "%6d.0%2d", freq1,
  2501. freq2);
  2502. else
  2503. CL_SPRINTF(cli_buf,
  2504. BT_TMP_BUF_SIZE,
  2505. "%6d.%3d", freq1,
  2506. freq2);
  2507. }
  2508. i++;
  2509. m++;
  2510. CL_PRINTF(cli_buf);
  2511. } while ((i <= 8) && (m <= psd_scan->psd_stop_point));
  2512. do {
  2513. psd_rep1 = psd_scan->psd_report_max_hold[n] /
  2514. 100;
  2515. psd_rep2 = psd_scan->psd_report_max_hold[n] -
  2516. psd_rep1 *
  2517. 100;
  2518. if (j == 1) {
  2519. if (psd_rep2 < 10)
  2520. CL_SPRINTF(cli_buf,
  2521. BT_TMP_BUF_SIZE,
  2522. "\r\n Val %7d.0%d",
  2523. psd_rep1,
  2524. psd_rep2);
  2525. else
  2526. CL_SPRINTF(cli_buf,
  2527. BT_TMP_BUF_SIZE,
  2528. "\r\n Val %7d.%d",
  2529. psd_rep1,
  2530. psd_rep2);
  2531. } else if ((j % 8 == 0) ||
  2532. (n == psd_scan->psd_stop_point)) {
  2533. if (psd_rep2 < 10)
  2534. CL_SPRINTF(cli_buf,
  2535. BT_TMP_BUF_SIZE,
  2536. "%7d.0%d\n", psd_rep1,
  2537. psd_rep2);
  2538. else
  2539. CL_SPRINTF(cli_buf,
  2540. BT_TMP_BUF_SIZE,
  2541. "%7d.%d\n", psd_rep1,
  2542. psd_rep2);
  2543. } else {
  2544. if (psd_rep2 < 10)
  2545. CL_SPRINTF(cli_buf,
  2546. BT_TMP_BUF_SIZE,
  2547. "%7d.0%d", psd_rep1,
  2548. psd_rep2);
  2549. else
  2550. CL_SPRINTF(cli_buf,
  2551. BT_TMP_BUF_SIZE,
  2552. "%7d.%d", psd_rep1,
  2553. psd_rep2);
  2554. }
  2555. j++;
  2556. n++;
  2557. CL_PRINTF(cli_buf);
  2558. } while ((j <= 8) && (n <= psd_scan->psd_stop_point));
  2559. if ((m > psd_scan->psd_stop_point) ||
  2560. (n > psd_scan->psd_stop_point))
  2561. break;
  2562. i = 1;
  2563. j = 1;
  2564. }
  2565. }
  2566. }
  2567. void halbtc8723b1ant_psd_max_holddata(IN struct btc_coexist *btcoexist,
  2568. IN u32 gen_count)
  2569. {
  2570. u32 i = 0, i_max = 0, val_max = 0;
  2571. if (gen_count == 1) {
  2572. memcpy(psd_scan->psd_report_max_hold,
  2573. psd_scan->psd_report,
  2574. BT_8723B_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
  2575. psd_scan->psd_max_value_point = 0;
  2576. psd_scan->psd_max_value = 0;
  2577. } else {
  2578. for (i = psd_scan->psd_start_point;
  2579. i <= psd_scan->psd_stop_point; i++) {
  2580. if (psd_scan->psd_report[i] >
  2581. psd_scan->psd_report_max_hold[i])
  2582. psd_scan->psd_report_max_hold[i] =
  2583. psd_scan->psd_report[i];
  2584. /* search Max Value */
  2585. if (i == psd_scan->psd_start_point) {
  2586. i_max = i;
  2587. val_max = psd_scan->psd_report_max_hold[i];
  2588. } else {
  2589. if (psd_scan->psd_report_max_hold[i] >
  2590. val_max) {
  2591. i_max = i;
  2592. val_max = psd_scan->psd_report_max_hold[i];
  2593. }
  2594. }
  2595. }
  2596. psd_scan->psd_max_value_point = i_max;
  2597. psd_scan->psd_max_value = val_max;
  2598. }
  2599. }
  2600. u32 halbtc8723b1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
  2601. {
  2602. /* reg 0x808[9:0]: FFT data x */
  2603. /* reg 0x808[22]: 0-->1 to get 1 FFT data y */
  2604. /* reg 0x8b4[15:0]: FFT data y report */
  2605. u32 val = 0, psd_report = 0;
  2606. int k = 0;
  2607. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  2608. val &= 0xffbffc00;
  2609. val |= point;
  2610. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  2611. val |= 0x00400000;
  2612. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  2613. while (1) {
  2614. if (k++ > BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY)
  2615. break;
  2616. }
  2617. val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
  2618. psd_report = val & 0x0000ffff;
  2619. return psd_report;
  2620. }
  2621. boolean halbtc8723b1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
  2622. IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
  2623. IN u32 avgnum, IN u32 loopcnt)
  2624. {
  2625. u32 i, val, n, k = 0, j, point_index = 0;
  2626. u32 points1 = 0, psd_report = 0;
  2627. u32 start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
  2628. u32 psd_center_freq = 20 * 10 ^ 6;
  2629. boolean outloop = false, scan , roam, is_sweep_ok = true;
  2630. u8 flag = 0;
  2631. u32 tmp;
  2632. u32 wifi_original_channel = 1;
  2633. psd_scan->is_psd_running = true;
  2634. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2635. "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
  2636. BTC_TRACE(trace_buf);
  2637. do {
  2638. switch (flag) {
  2639. case 0: /* Get PSD parameters */
  2640. default:
  2641. psd_scan->psd_band_width = 40 * 1000000;
  2642. psd_scan->psd_point = points;
  2643. psd_scan->psd_start_base = points / 2;
  2644. psd_scan->psd_avg_num = avgnum;
  2645. psd_scan->real_cent_freq = cent_freq;
  2646. psd_scan->real_offset = offset;
  2647. psd_scan->real_span = span;
  2648. points1 = psd_scan->psd_point;
  2649. delta_freq_per_point = psd_scan->psd_band_width /
  2650. psd_scan->psd_point;
  2651. /* PSD point setup */
  2652. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  2653. val &= 0xffff0fff;
  2654. switch (psd_scan->psd_point) {
  2655. case 128:
  2656. val |= 0x0;
  2657. break;
  2658. case 256:
  2659. default:
  2660. val |= 0x00004000;
  2661. break;
  2662. case 512:
  2663. val |= 0x00008000;
  2664. break;
  2665. case 1024:
  2666. val |= 0x0000c000;
  2667. break;
  2668. }
  2669. switch (psd_scan->psd_avg_num) {
  2670. case 1:
  2671. val |= 0x0;
  2672. break;
  2673. case 8:
  2674. val |= 0x00001000;
  2675. break;
  2676. case 16:
  2677. val |= 0x00002000;
  2678. break;
  2679. case 32:
  2680. default:
  2681. val |= 0x00003000;
  2682. break;
  2683. }
  2684. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  2685. flag = 1;
  2686. break;
  2687. case 1: /* calculate the PSD point index from freq/offset/span */
  2688. psd_center_freq = psd_scan->psd_band_width / 2 +
  2689. offset * (1000000);
  2690. start_p = psd_scan->psd_start_base + (psd_center_freq -
  2691. span * (1000000) / 2) / delta_freq_per_point;
  2692. psd_scan->psd_start_point = start_p -
  2693. psd_scan->psd_start_base;
  2694. stop_p = psd_scan->psd_start_base + (psd_center_freq +
  2695. span * (1000000) / 2) / delta_freq_per_point;
  2696. psd_scan->psd_stop_point = stop_p -
  2697. psd_scan->psd_start_base - 1;
  2698. flag = 2;
  2699. break;
  2700. case 2: /* set RF channel/BW/Mode */
  2701. /* set 3-wire off */
  2702. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  2703. val |= 0x00300000;
  2704. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  2705. /* CCK off */
  2706. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  2707. val &= 0xfeffffff;
  2708. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  2709. /* store WiFi original channel */
  2710. wifi_original_channel = btcoexist->btc_get_rf_reg(
  2711. btcoexist, BTC_RF_A, 0x18, 0x3ff);
  2712. /* Set RF channel */
  2713. if (cent_freq == 2484)
  2714. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  2715. 0x18, 0x3ff, 0xe);
  2716. else
  2717. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  2718. 0x18, 0x3ff, (cent_freq - 2412) / 5 +
  2719. 1); /* WiFi TRx Mask on */
  2720. /* Set RF Rx filter corner */
  2721. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  2722. 0xfffff, 0x3e4);
  2723. /* Set TRx mask off */
  2724. /* un-lock TRx Mask setup */
  2725. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd,
  2726. 0x80, 0x1);
  2727. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf,
  2728. 0x1, 0x1);
  2729. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  2730. 0xfffff, 0x0);
  2731. /* Set RF mode = Rx, RF Gain = 0x8a0 */
  2732. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
  2733. 0xfffff, 0x308a0);
  2734. while (1) {
  2735. if (k++ > BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY)
  2736. break;
  2737. }
  2738. flag = 3;
  2739. break;
  2740. case 3:
  2741. psd_scan->psd_gen_count = 0;
  2742. for (j = 1; j <= loopcnt; j++) {
  2743. btcoexist->btc_get(btcoexist,
  2744. BTC_GET_BL_WIFI_SCAN, &scan);
  2745. btcoexist->btc_get(btcoexist,
  2746. BTC_GET_BL_WIFI_ROAM, &roam);
  2747. if (scan || roam) {
  2748. is_sweep_ok = false;
  2749. break;
  2750. }
  2751. memset(psd_scan->psd_report, 0,
  2752. psd_scan->psd_point * sizeof(u32));
  2753. start_p = psd_scan->psd_start_point +
  2754. psd_scan->psd_start_base;
  2755. stop_p = psd_scan->psd_stop_point +
  2756. psd_scan->psd_start_base + 1;
  2757. i = start_p;
  2758. point_index = 0;
  2759. while (i < stop_p) {
  2760. if (i >= points1)
  2761. psd_report =
  2762. halbtc8723b1ant_psd_getdata(
  2763. btcoexist, i - points1);
  2764. else
  2765. psd_report =
  2766. halbtc8723b1ant_psd_getdata(
  2767. btcoexist, i);
  2768. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2769. "Point=%d, psd_raw_data = 0x%08x\n",
  2770. i, psd_report);
  2771. BTC_TRACE(trace_buf);
  2772. if (psd_report == 0)
  2773. tmp = 0;
  2774. else
  2775. /* tmp = 20*log10((double)psd_report); */
  2776. /* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
  2777. tmp = 6 * halbtc8723b1ant_psd_log2base(
  2778. btcoexist, psd_report);
  2779. n = i - psd_scan->psd_start_base;
  2780. psd_scan->psd_report[n] = tmp;
  2781. halbtc8723b1ant_psd_max_holddata(
  2782. btcoexist, j);
  2783. i++;
  2784. }
  2785. psd_scan->psd_gen_count = j;
  2786. }
  2787. flag = 100;
  2788. break;
  2789. case 99: /* error */
  2790. outloop = true;
  2791. break;
  2792. case 100: /* recovery */
  2793. /* set 3-wire on */
  2794. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  2795. val &= 0xffcfffff;
  2796. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  2797. /* CCK on */
  2798. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  2799. val |= 0x01000000;
  2800. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  2801. /* PSD off */
  2802. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  2803. val &= 0xffbfffff;
  2804. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  2805. /* TRx Mask on */
  2806. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  2807. 0xfffff, 0x780);
  2808. /* lock TRx Mask setup */
  2809. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdd,
  2810. 0x80, 0x0);
  2811. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xdf,
  2812. 0x1, 0x0);
  2813. /* Set RF Rx filter corner */
  2814. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  2815. 0xfffff, 0x0);
  2816. /* restore WiFi original channel */
  2817. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
  2818. 0x3ff, wifi_original_channel);
  2819. outloop = true;
  2820. break;
  2821. }
  2822. } while (!outloop);
  2823. psd_scan->is_psd_running = false;
  2824. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2825. "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
  2826. BTC_TRACE(trace_buf);
  2827. return is_sweep_ok;
  2828. }
  2829. void halbtc8723b1ant_psd_antenna_detection(IN struct btc_coexist *btcoexist,
  2830. IN u32 bt_tx_time, IN u32 bt_le_channel)
  2831. {
  2832. u32 i = 0;
  2833. u32 wlpsd_cent_freq = 2484, wlpsd_span = 2, wlpsd_sweep_count = 50;
  2834. s32 wlpsd_offset = -4;
  2835. u8 bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
  2836. u8 h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
  2837. u8 state = 0;
  2838. boolean outloop = false, bt_resp = false;
  2839. u32 freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
  2840. u32tmp;
  2841. struct btc_board_info *board_info = &btcoexist->board_info;
  2842. board_info->btdm_ant_det_finish = false;
  2843. memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
  2844. memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
  2845. if (board_info->tfbga_package) /* for TFBGA */
  2846. psd_scan->ant_det_thres_offset = 5;
  2847. else
  2848. psd_scan->ant_det_thres_offset = 0;
  2849. do {
  2850. switch (state) {
  2851. case 0:
  2852. if (bt_le_channel == 39)
  2853. wlpsd_cent_freq = 2484;
  2854. else {
  2855. for (i = 1; i <= 13; i++) {
  2856. if (bt_le_ch[i - 1] ==
  2857. bt_le_channel) {
  2858. wlpsd_cent_freq = 2412
  2859. + (i - 1) * 5;
  2860. break;
  2861. }
  2862. }
  2863. if (i == 14) {
  2864. BTC_SPRINTF(trace_buf,
  2865. BT_TMP_BUF_SIZE,
  2866. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
  2867. bt_le_channel);
  2868. BTC_TRACE(trace_buf);
  2869. outloop = true;
  2870. break;
  2871. }
  2872. }
  2873. wlpsd_sweep_count = bt_tx_time * 238 /
  2874. 100; /* bt_tx_time/0.42 */
  2875. wlpsd_sweep_count = wlpsd_sweep_count / 5;
  2876. if (wlpsd_sweep_count % 5 != 0)
  2877. wlpsd_sweep_count = (wlpsd_sweep_count /
  2878. 5 + 1) * 5;
  2879. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2880. "xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n",
  2881. bt_tx_time, bt_le_channel);
  2882. BTC_TRACE(trace_buf);
  2883. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2884. "xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d, wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
  2885. wlpsd_cent_freq,
  2886. wlpsd_offset,
  2887. wlpsd_span,
  2888. wlpsd_sweep_count);
  2889. BTC_TRACE(trace_buf);
  2890. state = 1;
  2891. break;
  2892. case 1: /* stop coex DM & set antenna path */
  2893. /* Stop Coex DM */
  2894. /*
  2895. btcoexist->stop_coex_dm = true;
  2896. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2897. "xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
  2898. BTC_TRACE(trace_buf); */
  2899. /* Set TDMA off, */
  2900. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC,
  2901. false, 0);
  2902. /* Set coex table */
  2903. halbtc8723b1ant_coex_table_with_type(btcoexist,
  2904. FORCE_EXEC, 0);
  2905. if (board_info->btdm_ant_pos ==
  2906. BTC_ANTENNA_AT_MAIN_PORT) {
  2907. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2908. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
  2909. BTC_TRACE(trace_buf);
  2910. } else {
  2911. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2912. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
  2913. BTC_TRACE(trace_buf);
  2914. }
  2915. /* Set Antenna path, switch WiFi to un-certain antenna port */
  2916. halbtc8723b1ant_set_ant_path(btcoexist,
  2917. BTC_ANT_PATH_BT, FORCE_EXEC, false,
  2918. false);
  2919. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2920. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
  2921. BTC_TRACE(trace_buf);
  2922. /* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
  2923. h2c_parameter[0] = 0x1;
  2924. h2c_parameter[1] = 0xd;
  2925. h2c_parameter[2] = 0x14;
  2926. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2927. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  2928. h2c_parameter[1],
  2929. h2c_parameter[2]);
  2930. BTC_TRACE(trace_buf);
  2931. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  2932. h2c_parameter);
  2933. u32tmp = btcoexist->btc_read_4byte(btcoexist,
  2934. 0x948);
  2935. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  2936. u8tmpb = btcoexist->btc_read_1byte(btcoexist,
  2937. 0x778);
  2938. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2939. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x778=0x%x\n",
  2940. u32tmp, u8tmpa, u8tmpb);
  2941. BTC_TRACE(trace_buf);
  2942. state = 2;
  2943. break;
  2944. case 2: /* Pre-sweep background psd */
  2945. if (!halbtc8723b1ant_psd_sweep_point(btcoexist,
  2946. wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
  2947. BT_8723B_1ANT_ANTDET_PSD_POINTS,
  2948. BT_8723B_1ANT_ANTDET_PSD_AVGNUM, 3)) {
  2949. board_info->btdm_ant_det_finish = false;
  2950. board_info->btdm_ant_num_by_ant_det = 1;
  2951. psd_scan->ant_det_result = 8;
  2952. state = 99;
  2953. break;
  2954. }
  2955. psd_scan->ant_det_pre_psdscan_peak_val =
  2956. psd_scan->psd_max_value;
  2957. if (psd_scan->psd_max_value >
  2958. (BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND
  2959. + psd_scan->ant_det_thres_offset) * 100) {
  2960. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2961. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
  2962. psd_scan->psd_max_value / 100,
  2963. BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND
  2964. + psd_scan->ant_det_thres_offset);
  2965. BTC_TRACE(trace_buf);
  2966. board_info->btdm_ant_det_finish = false;
  2967. board_info->btdm_ant_num_by_ant_det = 1;
  2968. psd_scan->ant_det_result = 5;
  2969. state = 99;
  2970. } else {
  2971. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2972. "xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
  2973. psd_scan->psd_max_value / 100,
  2974. BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND
  2975. + psd_scan->ant_det_thres_offset);
  2976. BTC_TRACE(trace_buf);
  2977. state = 3;
  2978. }
  2979. break;
  2980. case 3:
  2981. bt_resp = btcoexist->btc_set_bt_ant_detection(
  2982. btcoexist, (u8)(bt_tx_time & 0xff),
  2983. (u8)(bt_le_channel & 0xff));
  2984. if (!halbtc8723b1ant_psd_sweep_point(btcoexist,
  2985. wlpsd_cent_freq, wlpsd_offset,
  2986. wlpsd_span,
  2987. BT_8723B_1ANT_ANTDET_PSD_POINTS,
  2988. BT_8723B_1ANT_ANTDET_PSD_AVGNUM,
  2989. wlpsd_sweep_count)) {
  2990. board_info->btdm_ant_det_finish = false;
  2991. board_info->btdm_ant_num_by_ant_det = 1;
  2992. psd_scan->ant_det_result = 8;
  2993. state = 99;
  2994. break;
  2995. }
  2996. psd_scan->ant_det_psd_scan_peak_val =
  2997. psd_scan->psd_max_value;
  2998. psd_scan->ant_det_psd_scan_peak_freq =
  2999. psd_scan->psd_max_value_point;
  3000. state = 4;
  3001. break;
  3002. case 4:
  3003. if (psd_scan->psd_point == 0)
  3004. delta_freq_per_point = 0;
  3005. else
  3006. delta_freq_per_point =
  3007. psd_scan->psd_band_width /
  3008. psd_scan->psd_point;
  3009. psd_rep1 = psd_scan->psd_max_value / 100;
  3010. psd_rep2 = psd_scan->psd_max_value - psd_rep1 *
  3011. 100;
  3012. freq = ((psd_scan->real_cent_freq - 20) *
  3013. 1000000 + psd_scan->psd_max_value_point
  3014. * delta_freq_per_point);
  3015. freq1 = freq / 1000000;
  3016. freq2 = freq / 1000 - freq1 * 1000;
  3017. if (freq2 < 100) {
  3018. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3019. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
  3020. freq1, freq2);
  3021. BTC_TRACE(trace_buf);
  3022. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  3023. BT_8723B_1ANT_ANTDET_BUF_LEN,
  3024. "%d.0%d", freq1, freq2);
  3025. } else {
  3026. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3027. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
  3028. freq1, freq2);
  3029. BTC_TRACE(trace_buf);
  3030. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  3031. BT_8723B_1ANT_ANTDET_BUF_LEN,
  3032. "%d.%d", freq1, freq2);
  3033. }
  3034. if (psd_rep2 < 10) {
  3035. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3036. ", Value = %d.0%d dB\n",
  3037. psd_rep1, psd_rep2);
  3038. BTC_TRACE(trace_buf);
  3039. CL_SPRINTF(psd_scan->ant_det_peak_val,
  3040. BT_8723B_1ANT_ANTDET_BUF_LEN,
  3041. "%d.0%d", psd_rep1, psd_rep2);
  3042. } else {
  3043. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3044. ", Value = %d.%d dB\n",
  3045. psd_rep1, psd_rep2);
  3046. BTC_TRACE(trace_buf);
  3047. CL_SPRINTF(psd_scan->ant_det_peak_val,
  3048. BT_8723B_1ANT_ANTDET_BUF_LEN,
  3049. "%d.%d", psd_rep1, psd_rep2);
  3050. }
  3051. psd_scan->ant_det_is_btreply_available = true;
  3052. if (bt_resp == false) {
  3053. psd_scan->ant_det_is_btreply_available =
  3054. false;
  3055. psd_scan->ant_det_result = 0;
  3056. board_info->btdm_ant_det_finish = false;
  3057. board_info->btdm_ant_num_by_ant_det = 1;
  3058. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3059. "xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
  3060. BTC_TRACE(trace_buf);
  3061. } else if (psd_scan->psd_max_value >
  3062. (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
  3063. * 100) {
  3064. psd_scan->ant_det_result = 1;
  3065. board_info->btdm_ant_det_finish = true;
  3066. board_info->btdm_ant_det_already_init_phydm =
  3067. true;
  3068. board_info->btdm_ant_num_by_ant_det = 2;
  3069. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3070. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
  3071. BTC_TRACE(trace_buf);
  3072. } else if (psd_scan->psd_max_value >
  3073. (BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  3074. + psd_scan->ant_det_thres_offset) * 100) {
  3075. psd_scan->ant_det_result = 2;
  3076. board_info->btdm_ant_det_finish = true;
  3077. board_info->btdm_ant_det_already_init_phydm =
  3078. true;
  3079. board_info->btdm_ant_num_by_ant_det = 2;
  3080. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3081. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
  3082. BTC_TRACE(trace_buf);
  3083. } else if (psd_scan->psd_max_value >
  3084. (BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT) *
  3085. 100) {
  3086. psd_scan->ant_det_result = 3;
  3087. board_info->btdm_ant_det_finish = true;
  3088. board_info->btdm_ant_det_already_init_phydm =
  3089. true;
  3090. board_info->btdm_ant_num_by_ant_det = 1;
  3091. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3092. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
  3093. BTC_TRACE(trace_buf);
  3094. } else {
  3095. psd_scan->ant_det_result = 4;
  3096. board_info->btdm_ant_det_finish = false;
  3097. board_info->btdm_ant_num_by_ant_det = 1;
  3098. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3099. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
  3100. BTC_TRACE(trace_buf);
  3101. }
  3102. state = 99;
  3103. break;
  3104. case 99: /* restore setup */
  3105. /* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
  3106. h2c_parameter[0] = 0x0;
  3107. h2c_parameter[1] = 0x0;
  3108. h2c_parameter[2] = 0x0;
  3109. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3110. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  3111. h2c_parameter[1], h2c_parameter[2]);
  3112. BTC_TRACE(trace_buf);
  3113. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  3114. h2c_parameter);
  3115. /* Set Antenna Path */
  3116. halbtc8723b1ant_set_ant_path(btcoexist,
  3117. BTC_ANT_PATH_PTA, FORCE_EXEC, false,
  3118. false);
  3119. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3120. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
  3121. BTC_TRACE(trace_buf);
  3122. /* Resume Coex DM */
  3123. /*
  3124. btcoexist->stop_coex_dm = false;
  3125. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3126. "xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
  3127. BTC_TRACE(trace_buf); */
  3128. /* stimulate coex running */
  3129. /*
  3130. halbtc8723b1ant_run_coexist_mechanism(
  3131. btcoexist);
  3132. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3133. "xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
  3134. BTC_TRACE(trace_buf);
  3135. */
  3136. outloop = true;
  3137. break;
  3138. }
  3139. } while (!outloop);
  3140. }
  3141. void halbtc8723b1ant_psd_antenna_detection_check(IN struct btc_coexist
  3142. *btcoexist)
  3143. {
  3144. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  3145. struct btc_board_info *board_info = &btcoexist->board_info;
  3146. boolean scan, roam;
  3147. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  3148. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  3149. /* psd_scan->ant_det_bt_tx_time = 20; */
  3150. psd_scan->ant_det_bt_tx_time =
  3151. BT_8723B_1ANT_ANTDET_BTTXTIME; /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
  3152. psd_scan->ant_det_bt_le_channel = BT_8723B_1ANT_ANTDET_BTTXCHANNEL;
  3153. ant_det_count++;
  3154. psd_scan->ant_det_try_count = ant_det_count;
  3155. if (scan || roam) {
  3156. board_info->btdm_ant_det_finish = false;
  3157. psd_scan->ant_det_result = 6;
  3158. } else if (coex_sta->bt_disabled) {
  3159. board_info->btdm_ant_det_finish = false;
  3160. psd_scan->ant_det_result = 11;
  3161. } else if (coex_sta->num_of_profile >= 1) {
  3162. board_info->btdm_ant_det_finish = false;
  3163. psd_scan->ant_det_result = 7;
  3164. } else if (
  3165. !psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
  3166. board_info->btdm_ant_det_finish = false;
  3167. psd_scan->ant_det_result = 9;
  3168. } else if (coex_sta->c2h_bt_inquiry_page) {
  3169. board_info->btdm_ant_det_finish = false;
  3170. psd_scan->ant_det_result = 10;
  3171. } else {
  3172. btcoexist->stop_coex_dm = true;
  3173. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3174. "xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
  3175. BTC_TRACE(trace_buf);
  3176. halbtc8723b1ant_psd_antenna_detection(btcoexist,
  3177. psd_scan->ant_det_bt_tx_time,
  3178. psd_scan->ant_det_bt_le_channel);
  3179. delay_ms(psd_scan->ant_det_bt_tx_time);
  3180. btcoexist->stop_coex_dm = false;
  3181. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3182. "xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
  3183. BTC_TRACE(trace_buf);
  3184. /* stimulate coex running */
  3185. halbtc8723b1ant_run_coexist_mechanism(
  3186. btcoexist);
  3187. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3188. "xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
  3189. BTC_TRACE(trace_buf);
  3190. }
  3191. board_info->ant_det_result = psd_scan->ant_det_result;
  3192. if (!board_info->btdm_ant_det_finish)
  3193. ant_det_fail_count++;
  3194. psd_scan->ant_det_fail_count = ant_det_fail_count;
  3195. }
  3196. /* ************************************************************
  3197. * work around function start with wa_halbtc8723b1ant_
  3198. * ************************************************************
  3199. * ************************************************************
  3200. * extern function start with ex_halbtc8723b1ant_
  3201. * ************************************************************ */
  3202. void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist)
  3203. {
  3204. struct btc_board_info *board_info = &btcoexist->board_info;
  3205. u8 u8tmp = 0x0;
  3206. u16 u16tmp = 0x0;
  3207. u32 value;
  3208. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3209. "xxxxxxxxxxxxxxxx Execute 8723b 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n");
  3210. BTC_TRACE(trace_buf);
  3211. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3212. "Ant Det Finish = %s, Ant Det Number = %d\n",
  3213. (board_info->btdm_ant_det_finish ? "Yes" : "No"),
  3214. board_info->btdm_ant_num_by_ant_det);
  3215. BTC_TRACE(trace_buf);
  3216. btcoexist->stop_coex_dm = true;
  3217. btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20);
  3218. /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
  3219. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
  3220. btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
  3221. /* set GRAN_BT = 1 */
  3222. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
  3223. /* set WLAN_ACT = 0 */
  3224. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  3225. /* */
  3226. /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
  3227. /* Local setting bit define */
  3228. /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
  3229. /* BIT1: "0" for internal switch; "1" for external switch */
  3230. /* BIT2: "0" for one antenna; "1" for two antenna */
  3231. /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
  3232. if (btcoexist->chip_interface == BTC_INTF_USB) {
  3233. /* fixed at S0 for USB interface */
  3234. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
  3235. u8tmp |= 0x1; /* antenna inverse */
  3236. btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
  3237. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  3238. } else {
  3239. /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
  3240. if (board_info->single_ant_path == 0) {
  3241. /* set to S1 */
  3242. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x280);
  3243. board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
  3244. value = 1;
  3245. } else if (board_info->single_ant_path == 1) {
  3246. /* set to S0 */
  3247. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
  3248. u8tmp |= 0x1; /* antenna inverse */
  3249. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  3250. value = 0;
  3251. }
  3252. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
  3253. &value);
  3254. if (btcoexist->chip_interface == BTC_INTF_PCI)
  3255. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384,
  3256. u8tmp);
  3257. else if (btcoexist->chip_interface == BTC_INTF_SDIO)
  3258. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
  3259. u8tmp);
  3260. }
  3261. }
  3262. void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
  3263. {
  3264. }
  3265. void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3266. IN boolean wifi_only)
  3267. {
  3268. halbtc8723b1ant_init_hw_config(btcoexist, true, wifi_only);
  3269. btcoexist->stop_coex_dm = false;
  3270. }
  3271. void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  3272. {
  3273. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3274. "[BTCoex], Coex Mechanism Init!!\n");
  3275. BTC_TRACE(trace_buf);
  3276. btcoexist->stop_coex_dm = false;
  3277. halbtc8723b1ant_init_coex_dm(btcoexist);
  3278. halbtc8723b1ant_query_bt_info(btcoexist);
  3279. }
  3280. void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist)
  3281. {
  3282. struct btc_board_info *board_info = &btcoexist->board_info;
  3283. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  3284. u8 *cli_buf = btcoexist->cli_buf;
  3285. u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
  3286. u16 u16tmp[4];
  3287. u32 u32tmp[4];
  3288. u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck;
  3289. u32 fw_ver = 0, bt_patch_ver = 0;
  3290. u32 bt_coex_ver = 0;
  3291. static u8 pop_report_in_10s = 0;
  3292. u32 phyver = 0;
  3293. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3294. "\r\n ============[BT Coexist info]============");
  3295. CL_PRINTF(cli_buf);
  3296. if (btcoexist->manual_control) {
  3297. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3298. "\r\n ============[Under Manual Control]============");
  3299. CL_PRINTF(cli_buf);
  3300. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3301. "\r\n ==========================================");
  3302. CL_PRINTF(cli_buf);
  3303. }
  3304. if (btcoexist->stop_coex_dm) {
  3305. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3306. "\r\n ============[Coex is STOPPED]============");
  3307. CL_PRINTF(cli_buf);
  3308. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3309. "\r\n ==========================================");
  3310. CL_PRINTF(cli_buf);
  3311. }
  3312. if (psd_scan->ant_det_try_count == 0) {
  3313. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
  3314. "Ant PG Num/ Mech/ Pos",
  3315. board_info->pg_ant_num, board_info->btdm_ant_num,
  3316. board_info->btdm_ant_pos);
  3317. CL_PRINTF(cli_buf);
  3318. } else {
  3319. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3320. "\r\n %-35s = %d/ %d/ %d (%d/%d/%d)",
  3321. "Ant PG Num/ Mech(Ant_Det)/ Pos",
  3322. board_info->pg_ant_num,
  3323. board_info->btdm_ant_num_by_ant_det,
  3324. board_info->btdm_ant_pos,
  3325. psd_scan->ant_det_try_count,
  3326. psd_scan->ant_det_fail_count,
  3327. psd_scan->ant_det_result);
  3328. CL_PRINTF(cli_buf);
  3329. if (board_info->btdm_ant_det_finish) {
  3330. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3331. "Ant Det PSD Value",
  3332. psd_scan->ant_det_peak_val);
  3333. CL_PRINTF(cli_buf);
  3334. }
  3335. }
  3336. if (board_info->ant_det_result_five_complete) {
  3337. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3338. "\r\n %-35s = %d",
  3339. "Ant number by AntDet",
  3340. board_info->btdm_ant_num_by_ant_det);
  3341. CL_PRINTF(cli_buf);
  3342. }
  3343. /* btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); */
  3344. bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
  3345. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3346. phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
  3347. bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
  3348. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3349. "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
  3350. "CoexVer WL/ BT_Desired/ BT_Report",
  3351. glcoex_ver_date_8723b_1ant, glcoex_ver_8723b_1ant,
  3352. glcoex_ver_btdesired_8723b_1ant,
  3353. bt_coex_ver,
  3354. (bt_coex_ver == 0xff ? "Unknown" :
  3355. (bt_coex_ver >= glcoex_ver_btdesired_8723b_1ant ?
  3356. "Match" : "Mis-Match")));
  3357. CL_PRINTF(cli_buf);
  3358. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3359. "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
  3360. "W_FW/ B_FW/ Phy/ Kt",
  3361. fw_ver, bt_patch_ver, phyver,
  3362. coex_sta->cut_version + 65);
  3363. CL_PRINTF(cli_buf);
  3364. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
  3365. "Wifi channel informed to BT",
  3366. coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
  3367. coex_dm->wifi_chnl_info[2]);
  3368. CL_PRINTF(cli_buf);
  3369. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s",
  3370. "WifibHiPri/ Ccklock/ CckEverLock",
  3371. (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
  3372. (coex_sta->cck_lock ? "Yes" : "No"),
  3373. (coex_sta->cck_ever_lock ? "Yes" : "No"));
  3374. CL_PRINTF(cli_buf);
  3375. /* wifi status */
  3376. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3377. "============[Wifi Status]============");
  3378. CL_PRINTF(cli_buf);
  3379. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
  3380. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3381. "============[BT Status]============");
  3382. CL_PRINTF(cli_buf);
  3383. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3384. "BT Abnormal scan",
  3385. (coex_sta->bt_abnormal_scan) ? "Yes" : "No");
  3386. CL_PRINTF(cli_buf);
  3387. pop_report_in_10s++;
  3388. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
  3389. "BT [status/ rssi/ retryCnt/ popCnt]",
  3390. ((coex_sta->bt_disabled) ? ("disabled") : ((
  3391. coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
  3392. : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  3393. coex_dm->bt_status) ? "non-connected idle" :
  3394. ((BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
  3395. ? "connected-idle" : "busy")))),
  3396. coex_sta->bt_rssi, coex_sta->bt_retry_cnt,
  3397. coex_sta->pop_event_cnt);
  3398. CL_PRINTF(cli_buf);
  3399. if (pop_report_in_10s >= 5) {
  3400. coex_sta->pop_event_cnt = 0;
  3401. pop_report_in_10s = 0;
  3402. }
  3403. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3404. "\r\n %-35s = %d / %d / %d / %d / %d / %d",
  3405. "SCO/HID/PAN/A2DP/NameReq/WHQL",
  3406. bt_link_info->sco_exist, bt_link_info->hid_exist,
  3407. bt_link_info->pan_exist, bt_link_info->a2dp_exist,
  3408. coex_sta->c2h_bt_remote_name_req,
  3409. coex_sta->bt_whck_test);
  3410. CL_PRINTF(cli_buf);
  3411. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3412. "BT Role",
  3413. (bt_link_info->slave_role) ? "Slave" : "Master");
  3414. CL_PRINTF(cli_buf);
  3415. bt_info_ext = coex_sta->bt_info_ext;
  3416. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d",
  3417. "A2DP Rate/Bitpool",
  3418. (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
  3419. CL_PRINTF(cli_buf);
  3420. for (i = 0; i < BT_INFO_SRC_8723B_1ANT_MAX; i++) {
  3421. if (coex_sta->bt_info_c2h_cnt[i]) {
  3422. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3423. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
  3424. glbt_info_src_8723b_1ant[i],
  3425. coex_sta->bt_info_c2h[i][0],
  3426. coex_sta->bt_info_c2h[i][1],
  3427. coex_sta->bt_info_c2h[i][2],
  3428. coex_sta->bt_info_c2h[i][3],
  3429. coex_sta->bt_info_c2h[i][4],
  3430. coex_sta->bt_info_c2h[i][5],
  3431. coex_sta->bt_info_c2h[i][6],
  3432. coex_sta->bt_info_c2h_cnt[i]);
  3433. CL_PRINTF(cli_buf);
  3434. }
  3435. }
  3436. if (btcoexist->manual_control)
  3437. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3438. "============[mechanisms] (before Manual)============");
  3439. else
  3440. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3441. "============[mechanisms]============");
  3442. CL_PRINTF(cli_buf);
  3443. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3444. "SM[LowPenaltyRA]",
  3445. coex_dm->cur_low_penalty_ra);
  3446. CL_PRINTF(cli_buf);
  3447. ps_tdma_case = coex_dm->cur_ps_tdma;
  3448. if (board_info->btdm_ant_num_by_ant_det == 2) {
  3449. if (coex_dm->cur_ps_tdma_on)
  3450. ps_tdma_case = ps_tdma_case +
  3451. 100; /* for WiFi RSSI low or BT RSSI low */
  3452. else
  3453. ps_tdma_case =
  3454. 1; /* always translate to TDMA(off,1) for TDMA-off case */
  3455. }
  3456. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3457. "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
  3458. "PS TDMA",
  3459. coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
  3460. coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
  3461. coex_dm->ps_tdma_para[4], ps_tdma_case,
  3462. (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
  3463. (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
  3464. CL_PRINTF(cli_buf);
  3465. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3466. "Coex Table Type",
  3467. coex_sta->coex_table_type);
  3468. CL_PRINTF(cli_buf);
  3469. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3470. "IgnWlanAct",
  3471. coex_dm->cur_ignore_wlan_act);
  3472. CL_PRINTF(cli_buf);
  3473. /*
  3474. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x ", "Latest error condition(should be 0)",
  3475. coex_dm->error_condition);
  3476. CL_PRINTF(cli_buf);
  3477. */
  3478. /* Hw setting */
  3479. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3480. "============[Hw setting]============");
  3481. CL_PRINTF(cli_buf);
  3482. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3483. "backup ARFR1/ARFR2/RL/AMaxTime",
  3484. coex_dm->backup_arfr_cnt1, coex_dm->backup_arfr_cnt2,
  3485. coex_dm->backup_retry_limit,
  3486. coex_dm->backup_ampdu_max_time);
  3487. CL_PRINTF(cli_buf);
  3488. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
  3489. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
  3490. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
  3491. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
  3492. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3493. "0x430/0x434/0x42a/0x456",
  3494. u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
  3495. CL_PRINTF(cli_buf);
  3496. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  3497. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc);
  3498. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x880);
  3499. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3500. "0x778/0x6cc/0x880[29:25]",
  3501. u8tmp[0], u32tmp[0], (u32tmp[1] & 0x3e000000) >> 25);
  3502. CL_PRINTF(cli_buf);
  3503. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
  3504. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
  3505. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x764);
  3506. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x76e);
  3507. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3508. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3509. "0x948/ 0x67[5] / 0x764 / 0x76e",
  3510. u32tmp[0], ((u8tmp[0] & 0x20) >> 5), (u32tmp[1] & 0xffff),
  3511. u8tmp[1]);
  3512. CL_PRINTF(cli_buf);
  3513. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
  3514. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
  3515. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
  3516. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3517. "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
  3518. u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3);
  3519. CL_PRINTF(cli_buf);
  3520. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
  3521. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  3522. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  3523. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
  3524. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3525. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3526. "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
  3527. ((u8tmp[0] & 0x8) >> 3), u8tmp[1],
  3528. ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1);
  3529. CL_PRINTF(cli_buf);
  3530. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  3531. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  3532. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3533. "0x550(bcn ctrl)/0x522",
  3534. u32tmp[0], u8tmp[0]);
  3535. CL_PRINTF(cli_buf);
  3536. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
  3537. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
  3538. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3539. "0xc50(dig)/0x49c(null-drop)",
  3540. u32tmp[0] & 0xff, u8tmp[0]);
  3541. CL_PRINTF(cli_buf);
  3542. fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3543. PHYDM_INFO_FA_OFDM);
  3544. fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3545. PHYDM_INFO_FA_CCK);
  3546. cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3547. PHYDM_INFO_CCA_OFDM);
  3548. cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3549. PHYDM_INFO_CCA_CCK);
  3550. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3551. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3552. "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
  3553. cca_cck, fa_cck, cca_ofdm, fa_ofdm);
  3554. CL_PRINTF(cli_buf);
  3555. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3556. "CRC_OK CCK/11g/11n/11n-agg",
  3557. coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
  3558. coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
  3559. CL_PRINTF(cli_buf);
  3560. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3561. "CRC_Err CCK/11g/11n/11n-agg",
  3562. coex_sta->crc_err_cck, coex_sta->crc_err_11g,
  3563. coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
  3564. CL_PRINTF(cli_buf);
  3565. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  3566. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  3567. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  3568. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3569. "0x6c0/0x6c4/0x6c8(coexTable)",
  3570. u32tmp[0], u32tmp[1], u32tmp[2]);
  3571. CL_PRINTF(cli_buf);
  3572. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  3573. "0x770(high-pri rx/tx)",
  3574. coex_sta->high_priority_rx, coex_sta->high_priority_tx);
  3575. CL_PRINTF(cli_buf);
  3576. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  3577. "0x774(low-pri rx/tx)",
  3578. coex_sta->low_priority_rx, coex_sta->low_priority_tx);
  3579. CL_PRINTF(cli_buf);
  3580. #if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 1)
  3581. /* halbtc8723b1ant_monitor_bt_ctr(btcoexist); */
  3582. #endif
  3583. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  3584. }
  3585. void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  3586. {
  3587. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  3588. return;
  3589. if (BTC_IPS_ENTER == type) {
  3590. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3591. "[BTCoex], IPS ENTER notify\n");
  3592. BTC_TRACE(trace_buf);
  3593. coex_sta->under_ips = true;
  3594. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  3595. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  3596. FORCE_EXEC, false, true);
  3597. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  3598. } else if (BTC_IPS_LEAVE == type) {
  3599. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3600. "[BTCoex], IPS LEAVE notify\n");
  3601. BTC_TRACE(trace_buf);
  3602. halbtc8723b1ant_init_hw_config(btcoexist, false, false);
  3603. halbtc8723b1ant_init_coex_dm(btcoexist);
  3604. halbtc8723b1ant_query_bt_info(btcoexist);
  3605. coex_sta->under_ips = false;
  3606. }
  3607. }
  3608. void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  3609. {
  3610. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  3611. return;
  3612. if (BTC_LPS_ENABLE == type) {
  3613. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3614. "[BTCoex], LPS ENABLE notify\n");
  3615. BTC_TRACE(trace_buf);
  3616. coex_sta->under_lps = true;
  3617. } else if (BTC_LPS_DISABLE == type) {
  3618. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3619. "[BTCoex], LPS DISABLE notify\n");
  3620. BTC_TRACE(trace_buf);
  3621. coex_sta->under_lps = false;
  3622. }
  3623. }
  3624. void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
  3625. IN u8 type)
  3626. {
  3627. boolean wifi_connected = false, bt_hs_on = false;
  3628. u32 wifi_link_status = 0;
  3629. u32 num_of_wifi_link = 0;
  3630. boolean bt_ctrl_agg_buf_size = false;
  3631. u8 agg_buf_size = 5;
  3632. u8 u8tmpa, u8tmpb;
  3633. u32 u32tmp;
  3634. if (btcoexist->manual_control ||
  3635. btcoexist->stop_coex_dm)
  3636. return;
  3637. if (BTC_SCAN_START == type) {
  3638. coex_sta->wifi_is_high_pri_task = true;
  3639. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3640. "[BTCoex], SCAN START notify\n");
  3641. BTC_TRACE(trace_buf);
  3642. psd_scan->ant_det_is_ant_det_available = true;
  3643. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
  3644. 8); /* Force antenna setup for no scan result issue */
  3645. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  3646. FORCE_EXEC, false, false);
  3647. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
  3648. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  3649. u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67);
  3650. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3651. "[BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x\n",
  3652. u32tmp, u8tmpa, u8tmpb);
  3653. BTC_TRACE(trace_buf);
  3654. } else {
  3655. coex_sta->wifi_is_high_pri_task = false;
  3656. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3657. "[BTCoex], SCAN FINISH notify\n");
  3658. BTC_TRACE(trace_buf);
  3659. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  3660. &coex_sta->scan_ap_num);
  3661. }
  3662. if (coex_sta->bt_disabled)
  3663. return;
  3664. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  3665. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  3666. &wifi_connected);
  3667. halbtc8723b1ant_query_bt_info(btcoexist);
  3668. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  3669. &wifi_link_status);
  3670. num_of_wifi_link = wifi_link_status >> 16;
  3671. if (num_of_wifi_link >= 2) {
  3672. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  3673. halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
  3674. bt_ctrl_agg_buf_size, agg_buf_size);
  3675. halbtc8723b1ant_action_wifi_multi_port(btcoexist);
  3676. return;
  3677. }
  3678. if (coex_sta->c2h_bt_inquiry_page) {
  3679. halbtc8723b1ant_action_bt_inquiry(btcoexist);
  3680. return;
  3681. } else if (bt_hs_on) {
  3682. halbtc8723b1ant_action_hs(btcoexist);
  3683. return;
  3684. }
  3685. if (BTC_SCAN_START == type) {
  3686. if (!wifi_connected) /* non-connected scan */
  3687. halbtc8723b1ant_action_wifi_not_connected_scan(
  3688. btcoexist);
  3689. else /* wifi is connected */
  3690. halbtc8723b1ant_action_wifi_connected_scan(btcoexist);
  3691. } else if (BTC_SCAN_FINISH == type) {
  3692. if (!wifi_connected) /* non-connected scan */
  3693. halbtc8723b1ant_action_wifi_not_connected(btcoexist);
  3694. else
  3695. halbtc8723b1ant_action_wifi_connected(btcoexist);
  3696. }
  3697. }
  3698. void ex_halbtc8723b1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
  3699. IN u8 type)
  3700. {
  3701. struct btc_board_info *board_info = &btcoexist->board_info;
  3702. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  3703. return;
  3704. if (type == 2) /* two antenna */
  3705. halbtc8723b1ant_mechanism_switch(btcoexist, true);
  3706. else /* one antenna */
  3707. halbtc8723b1ant_mechanism_switch(btcoexist, false);
  3708. }
  3709. void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
  3710. IN u8 type)
  3711. {
  3712. boolean wifi_connected = false, bt_hs_on = false;
  3713. u32 wifi_link_status = 0;
  3714. u32 num_of_wifi_link = 0;
  3715. boolean bt_ctrl_agg_buf_size = false;
  3716. u8 agg_buf_size = 5;
  3717. if (btcoexist->manual_control ||
  3718. btcoexist->stop_coex_dm)
  3719. return;
  3720. if (BTC_ASSOCIATE_START == type) {
  3721. coex_sta->wifi_is_high_pri_task = true;
  3722. psd_scan->ant_det_is_ant_det_available = true;
  3723. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
  3724. 8); /* Force antenna setup for no scan result issue */
  3725. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  3726. FORCE_EXEC, false, false);
  3727. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3728. "[BTCoex], CONNECT START notify\n");
  3729. BTC_TRACE(trace_buf);
  3730. coex_dm->arp_cnt = 0;
  3731. } else {
  3732. coex_sta->wifi_is_high_pri_task = false;
  3733. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3734. "[BTCoex], CONNECT FINISH notify\n");
  3735. BTC_TRACE(trace_buf);
  3736. /* coex_dm->arp_cnt = 0; */
  3737. }
  3738. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  3739. &wifi_link_status);
  3740. num_of_wifi_link = wifi_link_status >> 16;
  3741. if (num_of_wifi_link >= 2) {
  3742. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  3743. halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
  3744. bt_ctrl_agg_buf_size, agg_buf_size);
  3745. halbtc8723b1ant_action_wifi_multi_port(btcoexist);
  3746. return;
  3747. }
  3748. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  3749. if (coex_sta->c2h_bt_inquiry_page) {
  3750. halbtc8723b1ant_action_bt_inquiry(btcoexist);
  3751. return;
  3752. } else if (bt_hs_on) {
  3753. halbtc8723b1ant_action_hs(btcoexist);
  3754. return;
  3755. }
  3756. if (BTC_ASSOCIATE_START == type)
  3757. halbtc8723b1ant_action_wifi_not_connected_asso_auth(btcoexist);
  3758. else if (BTC_ASSOCIATE_FINISH == type) {
  3759. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  3760. &wifi_connected);
  3761. if (!wifi_connected) /* non-connected scan */
  3762. halbtc8723b1ant_action_wifi_not_connected(btcoexist);
  3763. else
  3764. halbtc8723b1ant_action_wifi_connected(btcoexist);
  3765. }
  3766. }
  3767. void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
  3768. IN u8 type)
  3769. {
  3770. u8 h2c_parameter[3] = {0};
  3771. u32 wifi_bw;
  3772. u8 wifi_central_chnl;
  3773. boolean wifi_under_b_mode = false;
  3774. if (btcoexist->manual_control ||
  3775. btcoexist->stop_coex_dm)
  3776. return;
  3777. if (BTC_MEDIA_CONNECT == type) {
  3778. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3779. "[BTCoex], MEDIA connect notify\n");
  3780. BTC_TRACE(trace_buf);
  3781. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false,
  3782. 8); /* Force antenna setup for no scan result issue */
  3783. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
  3784. FORCE_EXEC, false, false);
  3785. psd_scan->ant_det_is_ant_det_available = true;
  3786. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  3787. &wifi_under_b_mode);
  3788. /* Set CCK Tx/Rx high Pri except 11b mode */
  3789. if (wifi_under_b_mode) {
  3790. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  3791. 0x00); /* CCK Tx */
  3792. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  3793. 0x00); /* CCK Rx */
  3794. } else {
  3795. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  3796. 0x00); /* CCK Tx */
  3797. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  3798. 0x10); /* CCK Rx */
  3799. }
  3800. coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
  3801. 0x430);
  3802. coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
  3803. 0x434);
  3804. coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
  3805. btcoexist, 0x42a);
  3806. coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
  3807. btcoexist, 0x456);
  3808. } else {
  3809. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3810. "[BTCoex], MEDIA disconnect notify\n");
  3811. BTC_TRACE(trace_buf);
  3812. coex_dm->arp_cnt = 0;
  3813. btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
  3814. btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
  3815. coex_sta->cck_ever_lock = false;
  3816. }
  3817. /* only 2.4G we need to inform bt the chnl mask */
  3818. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  3819. &wifi_central_chnl);
  3820. if ((BTC_MEDIA_CONNECT == type) &&
  3821. (wifi_central_chnl <= 14)) {
  3822. /* h2c_parameter[0] = 0x1; */
  3823. h2c_parameter[0] = 0x0;
  3824. h2c_parameter[1] = wifi_central_chnl;
  3825. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3826. if (BTC_WIFI_BW_HT40 == wifi_bw)
  3827. h2c_parameter[2] = 0x30;
  3828. else
  3829. h2c_parameter[2] = 0x20;
  3830. }
  3831. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  3832. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  3833. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  3834. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  3835. }
  3836. void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
  3837. IN u8 type)
  3838. {
  3839. boolean bt_hs_on = false;
  3840. u32 wifi_link_status = 0;
  3841. u32 num_of_wifi_link = 0;
  3842. boolean bt_ctrl_agg_buf_size = false, under_4way = false;
  3843. u8 agg_buf_size = 5;
  3844. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  3845. &under_4way);
  3846. if (btcoexist->manual_control ||
  3847. btcoexist->stop_coex_dm)
  3848. return;
  3849. if (BTC_PACKET_DHCP == type ||
  3850. BTC_PACKET_EAPOL == type ||
  3851. BTC_PACKET_ARP == type) {
  3852. if (BTC_PACKET_ARP == type) {
  3853. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3854. "[BTCoex], specific Packet ARP notify\n");
  3855. BTC_TRACE(trace_buf);
  3856. coex_dm->arp_cnt++;
  3857. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3858. "[BTCoex], ARP Packet Count = %d\n",
  3859. coex_dm->arp_cnt);
  3860. BTC_TRACE(trace_buf);
  3861. if ((coex_dm->arp_cnt >= 10) &&
  3862. (!under_4way)) /* if APR PKT > 10 after connect, do not go to ActionWifiConnectedSpecificPacket(btcoexist) */
  3863. coex_sta->wifi_is_high_pri_task = false;
  3864. else
  3865. coex_sta->wifi_is_high_pri_task = true;
  3866. } else {
  3867. coex_sta->wifi_is_high_pri_task = true;
  3868. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3869. "[BTCoex], specific Packet DHCP or EAPOL notify\n");
  3870. BTC_TRACE(trace_buf);
  3871. }
  3872. } else {
  3873. coex_sta->wifi_is_high_pri_task = false;
  3874. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3875. "[BTCoex], specific Packet [Type = %d] notify\n", type);
  3876. BTC_TRACE(trace_buf);
  3877. }
  3878. coex_sta->specific_pkt_period_cnt = 0;
  3879. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  3880. &wifi_link_status);
  3881. num_of_wifi_link = wifi_link_status >> 16;
  3882. if (num_of_wifi_link >= 2) {
  3883. halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  3884. halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
  3885. bt_ctrl_agg_buf_size, agg_buf_size);
  3886. halbtc8723b1ant_action_wifi_multi_port(btcoexist);
  3887. return;
  3888. }
  3889. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  3890. if (coex_sta->c2h_bt_inquiry_page) {
  3891. halbtc8723b1ant_action_bt_inquiry(btcoexist);
  3892. return;
  3893. } else if (bt_hs_on) {
  3894. halbtc8723b1ant_action_hs(btcoexist);
  3895. return;
  3896. }
  3897. if (BTC_PACKET_DHCP == type ||
  3898. BTC_PACKET_EAPOL == type ||
  3899. ((BTC_PACKET_ARP == type) && (coex_sta->wifi_is_high_pri_task)))
  3900. halbtc8723b1ant_action_wifi_connected_specific_packet(
  3901. btcoexist);
  3902. }
  3903. /* Donot remove optimize off flag, otherwise antenna detection would trigger BT collapsed */
  3904. #ifdef PLATFORM_WINDOWS
  3905. #pragma optimize("", off)
  3906. #endif
  3907. void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
  3908. IN u8 *tmp_buf, IN u8 length)
  3909. {
  3910. u8 bt_info = 0;
  3911. u8 i, rsp_source = 0;
  3912. boolean wifi_connected = false;
  3913. boolean bt_busy = false;
  3914. struct btc_board_info *board_info = &btcoexist->board_info;
  3915. coex_sta->c2h_bt_info_req_sent = false;
  3916. rsp_source = tmp_buf[0] & 0xf;
  3917. if (rsp_source >= BT_INFO_SRC_8723B_1ANT_MAX)
  3918. rsp_source = BT_INFO_SRC_8723B_1ANT_WIFI_FW;
  3919. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  3920. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3921. "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
  3922. length);
  3923. BTC_TRACE(trace_buf);
  3924. for (i = 0; i < length; i++) {
  3925. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  3926. if (i == 1)
  3927. bt_info = tmp_buf[i];
  3928. if (i == length - 1) {
  3929. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
  3930. tmp_buf[i]);
  3931. BTC_TRACE(trace_buf);
  3932. } else {
  3933. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
  3934. tmp_buf[i]);
  3935. BTC_TRACE(trace_buf);
  3936. }
  3937. }
  3938. /* if 0xff, it means BT is under WHCK test */
  3939. if (bt_info == 0xff)
  3940. coex_sta->bt_whck_test = true;
  3941. else
  3942. coex_sta->bt_whck_test = false;
  3943. if (BT_INFO_SRC_8723B_1ANT_WIFI_FW != rsp_source) {
  3944. coex_sta->bt_retry_cnt = /* [3:0] */
  3945. coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
  3946. if (coex_sta->bt_retry_cnt >= 1)
  3947. coex_sta->pop_event_cnt++;
  3948. if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
  3949. coex_sta->c2h_bt_remote_name_req = true;
  3950. else
  3951. coex_sta->c2h_bt_remote_name_req = false;
  3952. coex_sta->bt_rssi =
  3953. coex_sta->bt_info_c2h[rsp_source][3] * 2 - 90;
  3954. /* coex_sta->bt_info_c2h[rsp_source][3]*2+10; */
  3955. coex_sta->bt_info_ext =
  3956. coex_sta->bt_info_c2h[rsp_source][4];
  3957. if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) {
  3958. coex_sta->a2dp_bit_pool =
  3959. coex_sta->bt_info_c2h[rsp_source][6];
  3960. } else
  3961. coex_sta->a2dp_bit_pool = 0;
  3962. coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2]
  3963. & 0x40);
  3964. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK,
  3965. &coex_sta->bt_tx_rx_mask);
  3966. if (btcoexist->stop_coex_dm) {
  3967. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3968. "############# [BTCoex], BT info Notify() return because stop_coex_dm\n");
  3969. BTC_TRACE(trace_buf);
  3970. return;
  3971. }
  3972. #if BT_8723B_1ANT_ANTDET_ENABLE
  3973. #if BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE
  3974. if ((board_info->btdm_ant_det_finish) &&
  3975. (board_info->btdm_ant_num_by_ant_det == 2)) {
  3976. if (coex_sta->bt_tx_rx_mask) {
  3977. /* BT TRx mask off */
  3978. btcoexist->btc_set_bt_trx_mask(btcoexist, 0);
  3979. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3980. "############# [BTCoex], BT TRx Mask off for BT Info Notify\n");
  3981. BTC_TRACE(trace_buf);
  3982. #if 0
  3983. /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */
  3984. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3985. "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x1\n");
  3986. BTC_TRACE(trace_buf);
  3987. /* BT TRx Mask un-lock 0x2c[0], 0x30[0] = 1 */
  3988. btcoexist->btc_set_bt_reg(btcoexist,
  3989. BTC_BT_REG_RF, 0x2c, 0x7c45);
  3990. btcoexist->btc_set_bt_reg(btcoexist,
  3991. BTC_BT_REG_RF, 0x30, 0x7c45);
  3992. btcoexist->btc_set_bt_reg(btcoexist,
  3993. BTC_BT_REG_RF, 0x3c, 0x1);
  3994. #endif
  3995. }
  3996. } else
  3997. #endif
  3998. #endif
  3999. {
  4000. if (!coex_sta->bt_tx_rx_mask) {
  4001. /* BT TRx mask on */
  4002. btcoexist->btc_set_bt_trx_mask(btcoexist, 1);
  4003. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4004. "############# [BTCoex], BT TRx Mask on for BT Info Notify\n");
  4005. BTC_TRACE(trace_buf);
  4006. #if 0
  4007. /* BT into is responded by BT FW and BT RF REG 0x3C != 0x15 => Need to switch BT TRx Mask */
  4008. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4009. "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x15\n");
  4010. BTC_TRACE(trace_buf);
  4011. btcoexist->btc_set_bt_reg(btcoexist,
  4012. BTC_BT_REG_RF,
  4013. 0x3c, 0x15);
  4014. /* BT TRx Mask lock 0x2c[0], 0x30[0] = 0 */
  4015. btcoexist->btc_set_bt_reg(btcoexist,
  4016. BTC_BT_REG_RF,
  4017. 0x2c, 0x7c44);
  4018. btcoexist->btc_set_bt_reg(btcoexist,
  4019. BTC_BT_REG_RF,
  4020. 0x30, 0x7c44);
  4021. #endif
  4022. }
  4023. }
  4024. /* Here we need to resend some wifi info to BT */
  4025. /* because bt is reset and loss of the info. */
  4026. if (coex_sta->bt_info_ext & BIT(1)) {
  4027. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4028. "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
  4029. BTC_TRACE(trace_buf);
  4030. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4031. &wifi_connected);
  4032. if (wifi_connected)
  4033. ex_halbtc8723b1ant_media_status_notify(
  4034. btcoexist, BTC_MEDIA_CONNECT);
  4035. else
  4036. ex_halbtc8723b1ant_media_status_notify(
  4037. btcoexist, BTC_MEDIA_DISCONNECT);
  4038. }
  4039. if (coex_sta->bt_info_ext & BIT(3)) {
  4040. if (!btcoexist->manual_control &&
  4041. !btcoexist->stop_coex_dm) {
  4042. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4043. "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
  4044. BTC_TRACE(trace_buf);
  4045. halbtc8723b1ant_ignore_wlan_act(btcoexist,
  4046. FORCE_EXEC, false);
  4047. }
  4048. } else {
  4049. /* BT already NOT ignore Wlan active, do nothing here. */
  4050. }
  4051. #if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 0)
  4052. if ((coex_sta->bt_info_ext & BIT(4))) {
  4053. /* BT auto report already enabled, do nothing */
  4054. } else
  4055. halbtc8723b1ant_bt_auto_report(btcoexist, FORCE_EXEC,
  4056. true);
  4057. #endif
  4058. }
  4059. /* check BIT2 first ==> check if bt is under inquiry or page scan */
  4060. if (bt_info & BT_INFO_8723B_1ANT_B_INQ_PAGE)
  4061. coex_sta->c2h_bt_inquiry_page = true;
  4062. else
  4063. coex_sta->c2h_bt_inquiry_page = false;
  4064. coex_sta->num_of_profile = 0;
  4065. /* set link exist status */
  4066. if (!(bt_info & BT_INFO_8723B_1ANT_B_CONNECTION)) {
  4067. coex_sta->bt_link_exist = false;
  4068. coex_sta->pan_exist = false;
  4069. coex_sta->a2dp_exist = false;
  4070. coex_sta->hid_exist = false;
  4071. coex_sta->sco_exist = false;
  4072. coex_sta->bt_hi_pri_link_exist = false;
  4073. } else { /* connection exists */
  4074. coex_sta->bt_link_exist = true;
  4075. if (bt_info & BT_INFO_8723B_1ANT_B_FTP) {
  4076. coex_sta->pan_exist = true;
  4077. coex_sta->num_of_profile++;
  4078. } else
  4079. coex_sta->pan_exist = false;
  4080. if (bt_info & BT_INFO_8723B_1ANT_B_A2DP) {
  4081. coex_sta->a2dp_exist = true;
  4082. coex_sta->num_of_profile++;
  4083. } else
  4084. coex_sta->a2dp_exist = false;
  4085. if (bt_info & BT_INFO_8723B_1ANT_B_HID) {
  4086. coex_sta->hid_exist = true;
  4087. coex_sta->num_of_profile++;
  4088. } else
  4089. coex_sta->hid_exist = false;
  4090. if (bt_info & BT_INFO_8723B_1ANT_B_SCO_ESCO) {
  4091. coex_sta->sco_exist = true;
  4092. coex_sta->num_of_profile++;
  4093. } else
  4094. coex_sta->sco_exist = false;
  4095. if ((coex_sta->hid_exist == false) &&
  4096. (coex_sta->c2h_bt_inquiry_page == false) &&
  4097. (coex_sta->sco_exist == false)) {
  4098. if (coex_sta->high_priority_tx +
  4099. coex_sta->high_priority_rx >= 160) {
  4100. coex_sta->hid_exist = true;
  4101. coex_sta->wrong_profile_notification++;
  4102. coex_sta->num_of_profile++;
  4103. bt_info = bt_info | 0x28;
  4104. }
  4105. }
  4106. /* Add Hi-Pri Tx/Rx counter to avoid false detection */
  4107. if (((coex_sta->hid_exist) || (coex_sta->sco_exist)) &&
  4108. (coex_sta->high_priority_tx +
  4109. coex_sta->high_priority_rx >= 160)
  4110. && (!coex_sta->c2h_bt_inquiry_page))
  4111. coex_sta->bt_hi_pri_link_exist = true;
  4112. if ((bt_info & BT_INFO_8723B_1ANT_B_ACL_BUSY) &&
  4113. (coex_sta->num_of_profile == 0)) {
  4114. if (coex_sta->low_priority_tx +
  4115. coex_sta->low_priority_rx >= 160) {
  4116. coex_sta->pan_exist = true;
  4117. coex_sta->num_of_profile++;
  4118. coex_sta->wrong_profile_notification++;
  4119. bt_info = bt_info | 0x88;
  4120. }
  4121. }
  4122. }
  4123. halbtc8723b1ant_update_bt_link_info(btcoexist);
  4124. bt_info = bt_info &
  4125. 0x1f; /* mask profile bit for connect-ilde identification ( for CSR case: A2DP idle --> 0x41) */
  4126. if (!(bt_info & BT_INFO_8723B_1ANT_B_CONNECTION))
  4127. coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
  4128. else if (bt_info ==
  4129. BT_INFO_8723B_1ANT_B_CONNECTION) /* connection exists but no busy */
  4130. coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE;
  4131. else if ((bt_info & BT_INFO_8723B_1ANT_B_SCO_ESCO) ||
  4132. (bt_info & BT_INFO_8723B_1ANT_B_SCO_BUSY))
  4133. coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_SCO_BUSY;
  4134. else if (bt_info & BT_INFO_8723B_1ANT_B_ACL_BUSY) {
  4135. if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY != coex_dm->bt_status)
  4136. coex_dm->auto_tdma_adjust = false;
  4137. coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_ACL_BUSY;
  4138. } else
  4139. coex_dm->bt_status = BT_8723B_1ANT_BT_STATUS_MAX;
  4140. if ((BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  4141. (BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  4142. (BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
  4143. bt_busy = true;
  4144. else
  4145. bt_busy = false;
  4146. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  4147. halbtc8723b1ant_run_coexist_mechanism(btcoexist);
  4148. }
  4149. void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
  4150. IN u8 type)
  4151. {
  4152. u32 u32tmp;
  4153. u8 u8tmpa, u8tmpb, u8tmpc;
  4154. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n");
  4155. BTC_TRACE(trace_buf);
  4156. if (BTC_RF_ON == type) {
  4157. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4158. "[BTCoex], RF is turned ON!!\n");
  4159. BTC_TRACE(trace_buf);
  4160. btcoexist->stop_coex_dm = false;
  4161. } else if (BTC_RF_OFF == type) {
  4162. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4163. "[BTCoex], RF is turned OFF!!\n");
  4164. BTC_TRACE(trace_buf);
  4165. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  4166. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  4167. FORCE_EXEC, false, true);
  4168. halbtc8723b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  4169. btcoexist->stop_coex_dm = true;
  4170. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
  4171. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  4172. u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x67);
  4173. u8tmpc = btcoexist->btc_read_1byte(btcoexist, 0x76e);
  4174. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4175. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x67=0x%x, 0x76e=0x%x\n",
  4176. u32tmp, u8tmpa, u8tmpb, u8tmpc);
  4177. BTC_TRACE(trace_buf);
  4178. }
  4179. }
  4180. void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist)
  4181. {
  4182. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
  4183. BTC_TRACE(trace_buf);
  4184. halbtc8723b1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  4185. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, FORCE_EXEC,
  4186. false, true);
  4187. halbtc8723b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  4188. ex_halbtc8723b1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  4189. btcoexist->stop_coex_dm = true;
  4190. }
  4191. void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
  4192. IN u8 pnp_state)
  4193. {
  4194. if (BTC_WIFI_PNP_SLEEP == pnp_state) {
  4195. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4196. "[BTCoex], Pnp notify to SLEEP\n");
  4197. BTC_TRACE(trace_buf);
  4198. halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  4199. halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  4200. FORCE_EXEC, false, true);
  4201. halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  4202. /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
  4203. /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
  4204. /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
  4205. coex_sta->under_ips = false;
  4206. coex_sta->under_lps = false;
  4207. btcoexist->stop_coex_dm = true;
  4208. } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
  4209. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4210. "[BTCoex], Pnp notify to WAKE UP\n");
  4211. BTC_TRACE(trace_buf);
  4212. btcoexist->stop_coex_dm = false;
  4213. halbtc8723b1ant_init_hw_config(btcoexist, false, false);
  4214. halbtc8723b1ant_init_coex_dm(btcoexist);
  4215. halbtc8723b1ant_query_bt_info(btcoexist);
  4216. }
  4217. }
  4218. void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist)
  4219. {
  4220. halbtc8723b1ant_init_hw_config(btcoexist, false, false);
  4221. /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
  4222. /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x2, 0xfffff, 0x0); */
  4223. halbtc8723b1ant_init_coex_dm(btcoexist);
  4224. }
  4225. void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist)
  4226. {
  4227. u32 bt_patch_ver;
  4228. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4229. "[BTCoex], ==========================Periodical===========================\n");
  4230. BTC_TRACE(trace_buf);
  4231. #if (BT_AUTO_REPORT_ONLY_8723B_1ANT == 0)
  4232. halbtc8723b1ant_query_bt_info(btcoexist);
  4233. #endif
  4234. halbtc8723b1ant_monitor_bt_ctr(btcoexist);
  4235. halbtc8723b1ant_monitor_wifi_ctr(btcoexist);
  4236. halbtc8723b1ant_monitor_bt_enable_disable(btcoexist);
  4237. if (halbtc8723b1ant_is_wifi_status_changed(btcoexist) ||
  4238. coex_dm->auto_tdma_adjust ||
  4239. btcoexist->bt_info.bt_enable_disable_change)
  4240. halbtc8723b1ant_run_coexist_mechanism(btcoexist);
  4241. if (((coex_sta->bt_coex_supported_version == 0) ||
  4242. (coex_sta->bt_coex_supported_version == 0xffff)) && (!coex_sta->bt_disabled))
  4243. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
  4244. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
  4245. btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
  4246. coex_sta->specific_pkt_period_cnt++;
  4247. /* sample to set bt to execute Ant detection */
  4248. /* btcoexist->btc_set_bt_ant_detection(btcoexist, 20, 14);
  4249. *
  4250. if (psd_scan->is_ant_det_enable)
  4251. {
  4252. if (psd_scan->psd_gen_count > psd_scan->realseconds)
  4253. psd_scan->psd_gen_count = 0;
  4254. halbtc8723b1ant_antenna_detection(btcoexist, psd_scan->realcent_freq, psd_scan->realoffset, psd_scan->realspan, psd_scan->realseconds);
  4255. psd_scan->psd_gen_total_count +=2;
  4256. psd_scan->psd_gen_count += 2;
  4257. }
  4258. */
  4259. }
  4260. /* Donot remove optimize off flag, otherwise antenna detection would trigger BT collapsed */
  4261. #ifdef PLATFORM_WINDOWS
  4262. #pragma optimize("", off)
  4263. #endif
  4264. void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
  4265. IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
  4266. {
  4267. #if BT_8723B_1ANT_ANTDET_ENABLE
  4268. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  4269. struct btc_board_info *board_info = &btcoexist->board_info;
  4270. /*boolean scan, roam;*/
  4271. if (seconds == 0) {
  4272. psd_scan->ant_det_try_count = 0;
  4273. psd_scan->ant_det_fail_count = 0;
  4274. ant_det_count = 0;
  4275. ant_det_fail_count = 0;
  4276. board_info->btdm_ant_det_finish = false;
  4277. board_info->btdm_ant_num_by_ant_det = 1;
  4278. return;
  4279. }
  4280. if (!board_info->btdm_ant_det_finish) {
  4281. psd_scan->ant_det_inteval_count =
  4282. psd_scan->ant_det_inteval_count + 2;
  4283. if (psd_scan->ant_det_inteval_count >=
  4284. BT_8723B_1ANT_ANTDET_RETRY_INTERVAL) {
  4285. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4286. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
  4287. BTC_TRACE(trace_buf);
  4288. halbtc8723b1ant_psd_antenna_detection_check(btcoexist);
  4289. if (board_info->btdm_ant_det_finish) {
  4290. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4291. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
  4292. BTC_TRACE(trace_buf);
  4293. #if 1
  4294. if (board_info->btdm_ant_num_by_ant_det == 2)
  4295. halbtc8723b1ant_mechanism_switch(
  4296. btcoexist, true);
  4297. else
  4298. halbtc8723b1ant_mechanism_switch(
  4299. btcoexist, false);
  4300. #endif
  4301. board_info->btdm_ant_det_complete_fail = false;
  4302. } else {
  4303. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4304. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
  4305. BTC_TRACE(trace_buf);
  4306. board_info->btdm_ant_det_complete_fail = true;
  4307. }
  4308. psd_scan->ant_det_inteval_count = 0;
  4309. } else {
  4310. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4311. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
  4312. psd_scan->ant_det_inteval_count);
  4313. BTC_TRACE(trace_buf);
  4314. }
  4315. }
  4316. #endif
  4317. /*
  4318. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  4319. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  4320. psd_scan->ant_det_bt_tx_time = seconds;
  4321. psd_scan->ant_det_bt_le_channel = cent_freq;
  4322. if (seconds == 0)
  4323. {
  4324. psd_scan->ant_det_try_count = 0;
  4325. psd_scan->ant_det_fail_count = 0;
  4326. ant_det_count = 0;
  4327. ant_det_fail_count = 0;
  4328. board_info->btdm_ant_det_finish = false;
  4329. board_info->btdm_ant_num_by_ant_det = 1;
  4330. return;
  4331. }
  4332. else
  4333. {
  4334. ant_det_count++;
  4335. psd_scan->ant_det_try_count = ant_det_count;
  4336. if (scan ||roam)
  4337. {
  4338. board_info->btdm_ant_det_finish = false;
  4339. psd_scan->ant_det_result = 6;
  4340. }
  4341. else if (coex_sta->num_of_profile >= 1)
  4342. {
  4343. board_info->btdm_ant_det_finish = false;
  4344. psd_scan->ant_det_result = 7;
  4345. }
  4346. else if (!psd_scan->ant_det_is_ant_det_available)
  4347. {
  4348. board_info->btdm_ant_det_finish = false;
  4349. psd_scan->ant_det_result = 9;
  4350. }
  4351. else if (coex_sta->c2h_bt_inquiry_page)
  4352. {
  4353. board_info->btdm_ant_det_finish = false;
  4354. psd_scan->ant_det_result = 10;
  4355. }
  4356. else
  4357. {
  4358. }
  4359. if (!board_info->btdm_ant_det_finish)
  4360. ant_det_fail_count++;
  4361. psd_scan->ant_det_fail_count = ant_det_fail_count;
  4362. }
  4363. */
  4364. }
  4365. void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist)
  4366. {
  4367. #if BT_8723B_1ANT_ANTDET_ENABLE
  4368. struct btc_board_info *board_info = &btcoexist->board_info;
  4369. if (psd_scan->ant_det_try_count != 0) {
  4370. halbtc8723b1ant_psd_show_antenna_detect_result(btcoexist);
  4371. if (board_info->btdm_ant_det_finish)
  4372. halbtc8723b1ant_psd_showdata(btcoexist);
  4373. return;
  4374. }
  4375. #endif
  4376. /* halbtc8723b1ant_show_psd_data(btcoexist); */
  4377. }
  4378. #endif
  4379. #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */