halbtc8723d1ant.c 178 KB

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  1. /* ************************************************************
  2. * Description:
  3. *
  4. * This file is for RTL8723D Co-exist mechanism
  5. *
  6. * History
  7. * 2012/11/15 Cosa first check in.
  8. *
  9. * ************************************************************ */
  10. /* ************************************************************
  11. * include files
  12. * ************************************************************ */
  13. #include "mp_precomp.h"
  14. #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  15. #if (RTL8723D_SUPPORT == 1)
  16. /* ************************************************************
  17. * Global variables, these are static variables
  18. * ************************************************************ */
  19. static u8 *trace_buf = &gl_btc_trace_buf[0];
  20. static struct coex_dm_8723d_1ant glcoex_dm_8723d_1ant;
  21. static struct coex_dm_8723d_1ant *coex_dm = &glcoex_dm_8723d_1ant;
  22. static struct coex_sta_8723d_1ant glcoex_sta_8723d_1ant;
  23. static struct coex_sta_8723d_1ant *coex_sta = &glcoex_sta_8723d_1ant;
  24. static struct psdscan_sta_8723d_1ant gl_psd_scan_8723d_1ant;
  25. static struct psdscan_sta_8723d_1ant *psd_scan = &gl_psd_scan_8723d_1ant;
  26. const char *const glbt_info_src_8723d_1ant[] = {
  27. "BT Info[wifi fw]",
  28. "BT Info[bt rsp]",
  29. "BT Info[bt auto report]",
  30. };
  31. /* ************************************************************
  32. * BtCoex Version Format:
  33. * 1. date : glcoex_ver_date_XXXXX_1ant
  34. * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
  35. * 3. BtCoexVersion : glcoex_ver_btdesired_XXXXX_1ant
  36. * 4. others : glcoex_ver_XXXXXX_XXXXX_1ant
  37. *
  38. * Variable should be indicated IC and Antenna numbers !!!
  39. * Please strictly follow this order and naming style !!!
  40. *
  41. * ************************************************************ */
  42. u32 glcoex_ver_date_8723d_1ant = 20161220;
  43. u32 glcoex_ver_8723d_1ant = 0x13;
  44. u32 glcoex_ver_btdesired_8723d_1ant = 0x10;
  45. /* ************************************************************
  46. * local function proto type if needed
  47. * ************************************************************
  48. * ************************************************************
  49. * local function start with halbtc8723d1ant_
  50. * ************************************************************ */
  51. u8 halbtc8723d1ant_bt_rssi_state(u8 level_num, u8 rssi_thresh, u8 rssi_thresh1)
  52. {
  53. s32 bt_rssi = 0;
  54. u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
  55. bt_rssi = coex_sta->bt_rssi;
  56. if (level_num == 2) {
  57. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  58. (coex_sta->pre_bt_rssi_state ==
  59. BTC_RSSI_STATE_STAY_LOW)) {
  60. if (bt_rssi >= (rssi_thresh +
  61. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  62. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  63. else
  64. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  65. } else {
  66. if (bt_rssi < rssi_thresh)
  67. bt_rssi_state = BTC_RSSI_STATE_LOW;
  68. else
  69. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  70. }
  71. } else if (level_num == 3) {
  72. if (rssi_thresh > rssi_thresh1) {
  73. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  74. "[BTCoex], BT Rssi thresh error!!\n");
  75. BTC_TRACE(trace_buf);
  76. return coex_sta->pre_bt_rssi_state;
  77. }
  78. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  79. (coex_sta->pre_bt_rssi_state ==
  80. BTC_RSSI_STATE_STAY_LOW)) {
  81. if (bt_rssi >= (rssi_thresh +
  82. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  83. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  84. else
  85. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  86. } else if ((coex_sta->pre_bt_rssi_state ==
  87. BTC_RSSI_STATE_MEDIUM) ||
  88. (coex_sta->pre_bt_rssi_state ==
  89. BTC_RSSI_STATE_STAY_MEDIUM)) {
  90. if (bt_rssi >= (rssi_thresh1 +
  91. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  92. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  93. else if (bt_rssi < rssi_thresh)
  94. bt_rssi_state = BTC_RSSI_STATE_LOW;
  95. else
  96. bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  97. } else {
  98. if (bt_rssi < rssi_thresh1)
  99. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  100. else
  101. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  102. }
  103. }
  104. coex_sta->pre_bt_rssi_state = bt_rssi_state;
  105. return bt_rssi_state;
  106. }
  107. u8 halbtc8723d1ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
  108. IN u8 index, IN u8 level_num, IN u8 rssi_thresh, IN u8 rssi_thresh1)
  109. {
  110. s32 wifi_rssi = 0;
  111. u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
  112. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  113. if (level_num == 2) {
  114. if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
  115. ||
  116. (coex_sta->pre_wifi_rssi_state[index] ==
  117. BTC_RSSI_STATE_STAY_LOW)) {
  118. if (wifi_rssi >= (rssi_thresh +
  119. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  120. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  121. else
  122. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  123. } else {
  124. if (wifi_rssi < rssi_thresh)
  125. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  126. else
  127. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  128. }
  129. } else if (level_num == 3) {
  130. if (rssi_thresh > rssi_thresh1) {
  131. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  132. "[BTCoex], wifi RSSI thresh error!!\n");
  133. BTC_TRACE(trace_buf);
  134. return coex_sta->pre_wifi_rssi_state[index];
  135. }
  136. if ((coex_sta->pre_wifi_rssi_state[index] == BTC_RSSI_STATE_LOW)
  137. ||
  138. (coex_sta->pre_wifi_rssi_state[index] ==
  139. BTC_RSSI_STATE_STAY_LOW)) {
  140. if (wifi_rssi >= (rssi_thresh +
  141. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  142. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  143. else
  144. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  145. } else if ((coex_sta->pre_wifi_rssi_state[index] ==
  146. BTC_RSSI_STATE_MEDIUM) ||
  147. (coex_sta->pre_wifi_rssi_state[index] ==
  148. BTC_RSSI_STATE_STAY_MEDIUM)) {
  149. if (wifi_rssi >= (rssi_thresh1 +
  150. BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT))
  151. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  152. else if (wifi_rssi < rssi_thresh)
  153. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  154. else
  155. wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  156. } else {
  157. if (wifi_rssi < rssi_thresh1)
  158. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  159. else
  160. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  161. }
  162. }
  163. coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
  164. return wifi_rssi_state;
  165. }
  166. void halbtc8723d1ant_update_ra_mask(IN struct btc_coexist *btcoexist,
  167. IN boolean force_exec, IN u32 dis_rate_mask)
  168. {
  169. coex_dm->cur_ra_mask = dis_rate_mask;
  170. if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
  171. btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
  172. &coex_dm->cur_ra_mask);
  173. coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
  174. }
  175. void halbtc8723d1ant_auto_rate_fallback_retry(IN struct btc_coexist *btcoexist,
  176. IN boolean force_exec, IN u8 type)
  177. {
  178. boolean wifi_under_b_mode = false;
  179. coex_dm->cur_arfr_type = type;
  180. if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
  181. switch (coex_dm->cur_arfr_type) {
  182. case 0: /* normal mode */
  183. btcoexist->btc_write_4byte(btcoexist, 0x430,
  184. coex_dm->backup_arfr_cnt1);
  185. btcoexist->btc_write_4byte(btcoexist, 0x434,
  186. coex_dm->backup_arfr_cnt2);
  187. break;
  188. case 1:
  189. btcoexist->btc_get(btcoexist,
  190. BTC_GET_BL_WIFI_UNDER_B_MODE,
  191. &wifi_under_b_mode);
  192. if (wifi_under_b_mode) {
  193. btcoexist->btc_write_4byte(btcoexist,
  194. 0x430, 0x0);
  195. btcoexist->btc_write_4byte(btcoexist,
  196. 0x434, 0x01010101);
  197. } else {
  198. btcoexist->btc_write_4byte(btcoexist,
  199. 0x430, 0x0);
  200. btcoexist->btc_write_4byte(btcoexist,
  201. 0x434, 0x04030201);
  202. }
  203. break;
  204. default:
  205. break;
  206. }
  207. }
  208. coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
  209. }
  210. void halbtc8723d1ant_retry_limit(IN struct btc_coexist *btcoexist,
  211. IN boolean force_exec, IN u8 type)
  212. {
  213. coex_dm->cur_retry_limit_type = type;
  214. if (force_exec ||
  215. (coex_dm->pre_retry_limit_type !=
  216. coex_dm->cur_retry_limit_type)) {
  217. switch (coex_dm->cur_retry_limit_type) {
  218. case 0: /* normal mode */
  219. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  220. coex_dm->backup_retry_limit);
  221. break;
  222. case 1: /* retry limit=8 */
  223. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  224. 0x0808);
  225. break;
  226. default:
  227. break;
  228. }
  229. }
  230. coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
  231. }
  232. void halbtc8723d1ant_ampdu_max_time(IN struct btc_coexist *btcoexist,
  233. IN boolean force_exec, IN u8 type)
  234. {
  235. coex_dm->cur_ampdu_time_type = type;
  236. if (force_exec ||
  237. (coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
  238. switch (coex_dm->cur_ampdu_time_type) {
  239. case 0: /* normal mode */
  240. btcoexist->btc_write_1byte(btcoexist, 0x456,
  241. coex_dm->backup_ampdu_max_time);
  242. break;
  243. case 1: /* AMPDU timw = 0x38 * 32us */
  244. btcoexist->btc_write_1byte(btcoexist, 0x456,
  245. 0x38);
  246. break;
  247. default:
  248. break;
  249. }
  250. }
  251. coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
  252. }
  253. void halbtc8723d1ant_limited_tx(IN struct btc_coexist *btcoexist,
  254. IN boolean force_exec, IN u8 ra_mask_type, IN u8 arfr_type,
  255. IN u8 retry_limit_type, IN u8 ampdu_time_type)
  256. {
  257. switch (ra_mask_type) {
  258. case 0: /* normal mode */
  259. halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
  260. 0x0);
  261. break;
  262. case 1: /* disable cck 1/2 */
  263. halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
  264. 0x00000003);
  265. break;
  266. case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
  267. halbtc8723d1ant_update_ra_mask(btcoexist, force_exec,
  268. 0x0001f1f7);
  269. break;
  270. default:
  271. break;
  272. }
  273. halbtc8723d1ant_auto_rate_fallback_retry(btcoexist, force_exec,
  274. arfr_type);
  275. halbtc8723d1ant_retry_limit(btcoexist, force_exec, retry_limit_type);
  276. halbtc8723d1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
  277. }
  278. void halbtc8723d1ant_limited_rx(IN struct btc_coexist *btcoexist,
  279. IN boolean force_exec, IN boolean rej_ap_agg_pkt,
  280. IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
  281. {
  282. boolean reject_rx_agg = rej_ap_agg_pkt;
  283. boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  284. u8 rx_agg_size = agg_buf_size;
  285. /* ============================================ */
  286. /* Rx Aggregation related setting */
  287. /* ============================================ */
  288. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  289. &reject_rx_agg);
  290. /* decide BT control aggregation buf size or not */
  291. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  292. &bt_ctrl_rx_agg_size);
  293. /* aggregation buf size, only work when BT control Rx aggregation size. */
  294. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  295. /* real update aggregation setting */
  296. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  297. }
  298. void halbtc8723d1ant_query_bt_info(IN struct btc_coexist *btcoexist)
  299. {
  300. u8 h2c_parameter[1] = {0};
  301. h2c_parameter[0] |= BIT(0); /* trigger */
  302. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  303. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  304. "[BTCoex], WL query BT info!!\n");
  305. BTC_TRACE(trace_buf);
  306. }
  307. void halbtc8723d1ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
  308. {
  309. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  310. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  311. static u8 num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
  312. cnt_autoslot_hang = 0;
  313. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  314. /* to avoid 0x76e[3] = 1 (WLAN_Act control by PTA) during IPS */
  315. /* if (! (btcoexist->btc_read_1byte(btcoexist, 0x76e) & 0x8) ) */
  316. reg_hp_txrx = 0x770;
  317. reg_lp_txrx = 0x774;
  318. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  319. reg_hp_tx = u32tmp & MASKLWORD;
  320. reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
  321. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  322. reg_lp_tx = u32tmp & MASKLWORD;
  323. reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
  324. coex_sta->high_priority_tx = reg_hp_tx;
  325. coex_sta->high_priority_rx = reg_hp_rx;
  326. coex_sta->low_priority_tx = reg_lp_tx;
  327. coex_sta->low_priority_rx = reg_lp_rx;
  328. if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  329. coex_dm->bt_status) {
  330. if (coex_sta->high_priority_rx >= 15) {
  331. if (cnt_overhead < 3)
  332. cnt_overhead++;
  333. if (cnt_overhead == 3)
  334. coex_sta->is_hiPri_rx_overhead = true;
  335. } else {
  336. if (cnt_overhead > 0)
  337. cnt_overhead--;
  338. if (cnt_overhead == 0)
  339. coex_sta->is_hiPri_rx_overhead = false;
  340. }
  341. } else
  342. coex_sta->is_hiPri_rx_overhead = false;
  343. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  344. "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n",
  345. reg_hp_rx, reg_hp_tx, reg_lp_rx, reg_lp_tx);
  346. BTC_TRACE(trace_buf);
  347. /* reset counter */
  348. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  349. if ((coex_sta->low_priority_tx > 1150) &&
  350. (!coex_sta->c2h_bt_inquiry_page))
  351. coex_sta->pop_event_cnt++;
  352. if ((coex_sta->low_priority_rx >= 1150) &&
  353. (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
  354. && (!coex_sta->under_ips) && (!coex_sta->c2h_bt_inquiry_page) &&
  355. (coex_sta->bt_link_exist)) {
  356. if (cnt_slave >= 2) {
  357. bt_link_info->slave_role = true;
  358. cnt_slave = 2;
  359. } else
  360. cnt_slave++;
  361. } else {
  362. if (cnt_slave == 0) {
  363. bt_link_info->slave_role = false;
  364. cnt_slave = 0;
  365. } else
  366. cnt_slave--;
  367. }
  368. if (coex_sta->is_tdma_btautoslot) {
  369. if ((coex_sta->low_priority_tx >= 1300) &&
  370. (coex_sta->low_priority_rx <= 150)) {
  371. if (cnt_autoslot_hang >= 2) {
  372. coex_sta->is_tdma_btautoslot_hang = true;
  373. cnt_autoslot_hang = 2;
  374. } else
  375. cnt_autoslot_hang++;
  376. } else {
  377. if (cnt_autoslot_hang == 0) {
  378. coex_sta->is_tdma_btautoslot_hang = false;
  379. cnt_autoslot_hang = 0;
  380. } else
  381. cnt_autoslot_hang--;
  382. }
  383. }
  384. if (!coex_sta->bt_disabled) {
  385. if ((coex_sta->high_priority_tx == 0) &&
  386. (coex_sta->high_priority_rx == 0) &&
  387. (coex_sta->low_priority_tx == 0) &&
  388. (coex_sta->low_priority_rx == 0)) {
  389. num_of_bt_counter_chk++;
  390. if (num_of_bt_counter_chk >= 3) {
  391. halbtc8723d1ant_query_bt_info(btcoexist);
  392. num_of_bt_counter_chk = 0;
  393. }
  394. }
  395. }
  396. }
  397. void halbtc8723d1ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
  398. {
  399. #if 1
  400. s32 wifi_rssi = 0;
  401. boolean wifi_busy = false, wifi_under_b_mode = false,
  402. wifi_scan = false;
  403. boolean bt_idle = false, wl_idle = false;
  404. static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
  405. wl_noisy_count1 = 3, wl_noisy_count2 = 0;
  406. u32 total_cnt, reg_val1, reg_val2, cck_cnt;
  407. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  408. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  409. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  410. &wifi_under_b_mode);
  411. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
  412. coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
  413. btcoexist, PHYDM_INFO_CRC32_OK_CCK);
  414. coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
  415. btcoexist, PHYDM_INFO_CRC32_OK_LEGACY);
  416. coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
  417. btcoexist, PHYDM_INFO_CRC32_OK_HT);
  418. coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
  419. btcoexist, PHYDM_INFO_CRC32_OK_VHT);
  420. coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
  421. btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
  422. coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter(
  423. btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
  424. coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
  425. btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
  426. coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
  427. btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
  428. cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
  429. if (cck_cnt > 250) {
  430. if (wl_noisy_count2 < 3)
  431. wl_noisy_count2++;
  432. if (wl_noisy_count2 == 3) {
  433. wl_noisy_count0 = 0;
  434. wl_noisy_count1 = 0;
  435. }
  436. } else if (cck_cnt < 50) {
  437. if (wl_noisy_count0 < 3)
  438. wl_noisy_count0++;
  439. if (wl_noisy_count0 == 3) {
  440. wl_noisy_count1 = 0;
  441. wl_noisy_count2 = 0;
  442. }
  443. } else {
  444. if (wl_noisy_count1 < 3)
  445. wl_noisy_count1++;
  446. if (wl_noisy_count1 == 3) {
  447. wl_noisy_count0 = 0;
  448. wl_noisy_count2 = 0;
  449. }
  450. }
  451. if (wl_noisy_count2 == 3)
  452. coex_sta->wl_noisy_level = 2;
  453. else if (wl_noisy_count1 == 3)
  454. coex_sta->wl_noisy_level = 1;
  455. else
  456. coex_sta->wl_noisy_level = 0;
  457. if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
  458. total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
  459. coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
  460. if ((coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_ACL_BUSY) ||
  461. (coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY) ||
  462. (coex_dm->bt_status == BT_8723D_1ANT_BT_STATUS_SCO_BUSY)) {
  463. if (coex_sta->crc_ok_cck > (total_cnt -
  464. coex_sta->crc_ok_cck)) {
  465. if (cck_lock_counter < 3)
  466. cck_lock_counter++;
  467. } else {
  468. if (cck_lock_counter > 0)
  469. cck_lock_counter--;
  470. }
  471. } else {
  472. if (cck_lock_counter > 0)
  473. cck_lock_counter--;
  474. }
  475. } else {
  476. if (cck_lock_counter > 0)
  477. cck_lock_counter--;
  478. }
  479. if (!coex_sta->pre_ccklock) {
  480. if (cck_lock_counter >= 3)
  481. coex_sta->cck_lock = true;
  482. else
  483. coex_sta->cck_lock = false;
  484. } else {
  485. if (cck_lock_counter == 0)
  486. coex_sta->cck_lock = false;
  487. else
  488. coex_sta->cck_lock = true;
  489. }
  490. if (coex_sta->cck_lock)
  491. coex_sta->cck_ever_lock = true;
  492. coex_sta->pre_ccklock = coex_sta->cck_lock;
  493. #endif
  494. }
  495. void halbtc8723d1ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
  496. {
  497. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  498. boolean bt_hs_on = false;
  499. boolean bt_busy = false;
  500. coex_sta->num_of_profile = 0;
  501. /* set link exist status */
  502. if (!(coex_sta->bt_info & BT_INFO_8723D_1ANT_B_CONNECTION)) {
  503. coex_sta->bt_link_exist = false;
  504. coex_sta->pan_exist = false;
  505. coex_sta->a2dp_exist = false;
  506. coex_sta->hid_exist = false;
  507. coex_sta->sco_exist = false;
  508. } else { /* connection exists */
  509. coex_sta->bt_link_exist = true;
  510. if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_FTP) {
  511. coex_sta->pan_exist = true;
  512. coex_sta->num_of_profile++;
  513. } else
  514. coex_sta->pan_exist = false;
  515. if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_A2DP) {
  516. coex_sta->a2dp_exist = true;
  517. coex_sta->num_of_profile++;
  518. } else
  519. coex_sta->a2dp_exist = false;
  520. if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_HID) {
  521. coex_sta->hid_exist = true;
  522. coex_sta->num_of_profile++;
  523. } else
  524. coex_sta->hid_exist = false;
  525. if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_SCO_ESCO) {
  526. coex_sta->sco_exist = true;
  527. coex_sta->num_of_profile++;
  528. } else
  529. coex_sta->sco_exist = false;
  530. }
  531. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  532. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  533. bt_link_info->sco_exist = coex_sta->sco_exist;
  534. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  535. bt_link_info->pan_exist = coex_sta->pan_exist;
  536. bt_link_info->hid_exist = coex_sta->hid_exist;
  537. bt_link_info->acl_busy = coex_sta->acl_busy;
  538. /* work around for HS mode. */
  539. if (bt_hs_on) {
  540. bt_link_info->pan_exist = true;
  541. bt_link_info->bt_link_exist = true;
  542. }
  543. /* check if Sco only */
  544. if (bt_link_info->sco_exist &&
  545. !bt_link_info->a2dp_exist &&
  546. !bt_link_info->pan_exist &&
  547. !bt_link_info->hid_exist)
  548. bt_link_info->sco_only = true;
  549. else
  550. bt_link_info->sco_only = false;
  551. /* check if A2dp only */
  552. if (!bt_link_info->sco_exist &&
  553. bt_link_info->a2dp_exist &&
  554. !bt_link_info->pan_exist &&
  555. !bt_link_info->hid_exist)
  556. bt_link_info->a2dp_only = true;
  557. else
  558. bt_link_info->a2dp_only = false;
  559. /* check if Pan only */
  560. if (!bt_link_info->sco_exist &&
  561. !bt_link_info->a2dp_exist &&
  562. bt_link_info->pan_exist &&
  563. !bt_link_info->hid_exist)
  564. bt_link_info->pan_only = true;
  565. else
  566. bt_link_info->pan_only = false;
  567. /* check if Hid only */
  568. if (!bt_link_info->sco_exist &&
  569. !bt_link_info->a2dp_exist &&
  570. !bt_link_info->pan_exist &&
  571. bt_link_info->hid_exist)
  572. bt_link_info->hid_only = true;
  573. else
  574. bt_link_info->hid_only = false;
  575. if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_INQ_PAGE) {
  576. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_INQ_PAGE;
  577. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  578. "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
  579. } else if (!(coex_sta->bt_info & BT_INFO_8723D_1ANT_B_CONNECTION)) {
  580. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
  581. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  582. "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
  583. } else if (coex_sta->bt_info == BT_INFO_8723D_1ANT_B_CONNECTION) {
  584. /* connection exists but no busy */
  585. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE;
  586. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  587. "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
  588. } else if (((coex_sta->bt_info & BT_INFO_8723D_1ANT_B_SCO_ESCO) ||
  589. (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_SCO_BUSY)) &&
  590. (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_ACL_BUSY)) {
  591. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY;
  592. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  593. "[BTCoex], BtInfoNotify(), BT ACL SCO busy!!!\n");
  594. } else if ((coex_sta->bt_info & BT_INFO_8723D_1ANT_B_SCO_ESCO) ||
  595. (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_SCO_BUSY)) {
  596. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_SCO_BUSY;
  597. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  598. "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
  599. } else if (coex_sta->bt_info & BT_INFO_8723D_1ANT_B_ACL_BUSY) {
  600. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_ACL_BUSY;
  601. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  602. "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
  603. } else {
  604. coex_dm->bt_status = BT_8723D_1ANT_BT_STATUS_MAX;
  605. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  606. "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
  607. }
  608. BTC_TRACE(trace_buf);
  609. if ((BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  610. (BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  611. (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
  612. bt_busy = true;
  613. else
  614. bt_busy = false;
  615. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  616. }
  617. void halbtc8723d1ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
  618. IN u8 type)
  619. {
  620. u8 h2c_parameter[3] = {0};
  621. u32 wifi_bw;
  622. u8 wifi_central_chnl;
  623. /* only 2.4G we need to inform bt the chnl mask */
  624. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  625. &wifi_central_chnl);
  626. if ((BTC_MEDIA_CONNECT == type) &&
  627. (wifi_central_chnl <= 14)) {
  628. h2c_parameter[0] =
  629. 0x1; /* enable BT AFH skip WL channel for 8723d because BT Rx LO interference */
  630. /* h2c_parameter[0] = 0x0; */
  631. h2c_parameter[1] = wifi_central_chnl;
  632. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  633. if (BTC_WIFI_BW_HT40 == wifi_bw)
  634. h2c_parameter[2] = 0x30;
  635. else
  636. h2c_parameter[2] = 0x20;
  637. }
  638. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  639. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  640. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  641. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  642. }
  643. u8 halbtc8723d1ant_action_algorithm(IN struct btc_coexist *btcoexist)
  644. {
  645. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  646. boolean bt_hs_on = false;
  647. u8 algorithm = BT_8723D_1ANT_COEX_ALGO_UNDEFINED;
  648. u8 num_of_diff_profile = 0;
  649. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  650. if (!bt_link_info->bt_link_exist) {
  651. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  652. "[BTCoex], No BT link exists!!!\n");
  653. BTC_TRACE(trace_buf);
  654. return algorithm;
  655. }
  656. if (bt_link_info->sco_exist)
  657. num_of_diff_profile++;
  658. if (bt_link_info->hid_exist)
  659. num_of_diff_profile++;
  660. if (bt_link_info->pan_exist)
  661. num_of_diff_profile++;
  662. if (bt_link_info->a2dp_exist)
  663. num_of_diff_profile++;
  664. if (num_of_diff_profile == 1) {
  665. if (bt_link_info->sco_exist) {
  666. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  667. "[BTCoex], BT Profile = SCO only\n");
  668. BTC_TRACE(trace_buf);
  669. algorithm = BT_8723D_1ANT_COEX_ALGO_SCO;
  670. } else {
  671. if (bt_link_info->hid_exist) {
  672. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  673. "[BTCoex], BT Profile = HID only\n");
  674. BTC_TRACE(trace_buf);
  675. algorithm = BT_8723D_1ANT_COEX_ALGO_HID;
  676. } else if (bt_link_info->a2dp_exist) {
  677. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  678. "[BTCoex], BT Profile = A2DP only\n");
  679. BTC_TRACE(trace_buf);
  680. algorithm = BT_8723D_1ANT_COEX_ALGO_A2DP;
  681. } else if (bt_link_info->pan_exist) {
  682. if (bt_hs_on) {
  683. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  684. "[BTCoex], BT Profile = PAN(HS) only\n");
  685. BTC_TRACE(trace_buf);
  686. algorithm =
  687. BT_8723D_1ANT_COEX_ALGO_PANHS;
  688. } else {
  689. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  690. "[BTCoex], BT Profile = PAN(EDR) only\n");
  691. BTC_TRACE(trace_buf);
  692. algorithm =
  693. BT_8723D_1ANT_COEX_ALGO_PANEDR;
  694. }
  695. }
  696. }
  697. } else if (num_of_diff_profile == 2) {
  698. if (bt_link_info->sco_exist) {
  699. if (bt_link_info->hid_exist) {
  700. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  701. "[BTCoex], BT Profile = SCO + HID\n");
  702. BTC_TRACE(trace_buf);
  703. algorithm = BT_8723D_1ANT_COEX_ALGO_HID;
  704. } else if (bt_link_info->a2dp_exist) {
  705. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  706. "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n");
  707. BTC_TRACE(trace_buf);
  708. algorithm = BT_8723D_1ANT_COEX_ALGO_SCO;
  709. } else if (bt_link_info->pan_exist) {
  710. if (bt_hs_on) {
  711. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  712. "[BTCoex], BT Profile = SCO + PAN(HS)\n");
  713. BTC_TRACE(trace_buf);
  714. algorithm = BT_8723D_1ANT_COEX_ALGO_SCO;
  715. } else {
  716. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  717. "[BTCoex], BT Profile = SCO + PAN(EDR)\n");
  718. BTC_TRACE(trace_buf);
  719. algorithm =
  720. BT_8723D_1ANT_COEX_ALGO_PANEDR_HID;
  721. }
  722. }
  723. } else {
  724. if (bt_link_info->hid_exist &&
  725. bt_link_info->a2dp_exist) {
  726. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  727. "[BTCoex], BT Profile = HID + A2DP\n");
  728. BTC_TRACE(trace_buf);
  729. algorithm = BT_8723D_1ANT_COEX_ALGO_HID_A2DP;
  730. } else if (bt_link_info->hid_exist &&
  731. bt_link_info->pan_exist) {
  732. if (bt_hs_on) {
  733. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  734. "[BTCoex], BT Profile = HID + PAN(HS)\n");
  735. BTC_TRACE(trace_buf);
  736. algorithm =
  737. BT_8723D_1ANT_COEX_ALGO_HID_A2DP;
  738. } else {
  739. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  740. "[BTCoex], BT Profile = HID + PAN(EDR)\n");
  741. BTC_TRACE(trace_buf);
  742. algorithm =
  743. BT_8723D_1ANT_COEX_ALGO_PANEDR_HID;
  744. }
  745. } else if (bt_link_info->pan_exist &&
  746. bt_link_info->a2dp_exist) {
  747. if (bt_hs_on) {
  748. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  749. "[BTCoex], BT Profile = A2DP + PAN(HS)\n");
  750. BTC_TRACE(trace_buf);
  751. algorithm =
  752. BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS;
  753. } else {
  754. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  755. "[BTCoex], BT Profile = A2DP + PAN(EDR)\n");
  756. BTC_TRACE(trace_buf);
  757. algorithm =
  758. BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP;
  759. }
  760. }
  761. }
  762. } else if (num_of_diff_profile == 3) {
  763. if (bt_link_info->sco_exist) {
  764. if (bt_link_info->hid_exist &&
  765. bt_link_info->a2dp_exist) {
  766. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  767. "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n");
  768. BTC_TRACE(trace_buf);
  769. algorithm = BT_8723D_1ANT_COEX_ALGO_HID;
  770. } else if (bt_link_info->hid_exist &&
  771. bt_link_info->pan_exist) {
  772. if (bt_hs_on) {
  773. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  774. "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n");
  775. BTC_TRACE(trace_buf);
  776. algorithm =
  777. BT_8723D_1ANT_COEX_ALGO_HID_A2DP;
  778. } else {
  779. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  780. "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n");
  781. BTC_TRACE(trace_buf);
  782. algorithm =
  783. BT_8723D_1ANT_COEX_ALGO_PANEDR_HID;
  784. }
  785. } else if (bt_link_info->pan_exist &&
  786. bt_link_info->a2dp_exist) {
  787. if (bt_hs_on) {
  788. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  789. "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n");
  790. BTC_TRACE(trace_buf);
  791. algorithm = BT_8723D_1ANT_COEX_ALGO_SCO;
  792. } else {
  793. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  794. "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n");
  795. BTC_TRACE(trace_buf);
  796. algorithm =
  797. BT_8723D_1ANT_COEX_ALGO_PANEDR_HID;
  798. }
  799. }
  800. } else {
  801. if (bt_link_info->hid_exist &&
  802. bt_link_info->pan_exist &&
  803. bt_link_info->a2dp_exist) {
  804. if (bt_hs_on) {
  805. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  806. "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n");
  807. BTC_TRACE(trace_buf);
  808. algorithm =
  809. BT_8723D_1ANT_COEX_ALGO_HID_A2DP;
  810. } else {
  811. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  812. "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n");
  813. BTC_TRACE(trace_buf);
  814. algorithm =
  815. BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR;
  816. }
  817. }
  818. }
  819. } else if (num_of_diff_profile >= 3) {
  820. if (bt_link_info->sco_exist) {
  821. if (bt_link_info->hid_exist &&
  822. bt_link_info->pan_exist &&
  823. bt_link_info->a2dp_exist) {
  824. if (bt_hs_on) {
  825. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  826. "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n");
  827. BTC_TRACE(trace_buf);
  828. } else {
  829. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  830. "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
  831. BTC_TRACE(trace_buf);
  832. algorithm =
  833. BT_8723D_1ANT_COEX_ALGO_PANEDR_HID;
  834. }
  835. }
  836. }
  837. }
  838. return algorithm;
  839. }
  840. void halbtc8723d1ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
  841. IN boolean enable_auto_report)
  842. {
  843. u8 h2c_parameter[1] = {0};
  844. h2c_parameter[0] = 0;
  845. if (enable_auto_report)
  846. h2c_parameter[0] |= BIT(0);
  847. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  848. }
  849. void halbtc8723d1ant_bt_auto_report(IN struct btc_coexist *btcoexist,
  850. IN boolean force_exec, IN boolean enable_auto_report)
  851. {
  852. coex_dm->cur_bt_auto_report = enable_auto_report;
  853. if (!force_exec) {
  854. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  855. return;
  856. }
  857. halbtc8723d1ant_set_bt_auto_report(btcoexist,
  858. coex_dm->cur_bt_auto_report);
  859. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  860. }
  861. void halbtc8723d1ant_set_fw_low_penalty_ra(IN struct btc_coexist
  862. *btcoexist, IN boolean low_penalty_ra)
  863. {
  864. #if 1
  865. u8 h2c_parameter[6] = {0};
  866. h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
  867. if (low_penalty_ra) {
  868. h2c_parameter[1] |= BIT(0);
  869. h2c_parameter[2] =
  870. 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
  871. h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
  872. h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
  873. h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
  874. }
  875. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
  876. #endif
  877. }
  878. void halbtc8723d1ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
  879. IN boolean force_exec, IN boolean low_penalty_ra)
  880. {
  881. #if 1
  882. coex_dm->cur_low_penalty_ra = low_penalty_ra;
  883. if (!force_exec) {
  884. if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
  885. return;
  886. }
  887. halbtc8723d1ant_set_fw_low_penalty_ra(btcoexist,
  888. coex_dm->cur_low_penalty_ra);
  889. #if 0
  890. if (low_penalty_ra)
  891. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
  892. else
  893. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
  894. #endif
  895. coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
  896. #endif
  897. }
  898. void halbtc8723d1ant_write_score_board(
  899. IN struct btc_coexist *btcoexist,
  900. IN u16 bitpos,
  901. IN boolean state
  902. )
  903. {
  904. static u16 originalval = 0x8002;
  905. if (state)
  906. originalval = originalval | bitpos;
  907. else
  908. originalval = originalval & (~bitpos);
  909. btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
  910. }
  911. void halbtc8723d1ant_read_score_board(
  912. IN struct btc_coexist *btcoexist,
  913. IN u16 *score_board_val
  914. )
  915. {
  916. *score_board_val = (btcoexist->btc_read_2byte(btcoexist,
  917. 0xaa)) & 0x7fff;
  918. }
  919. void halbtc8723d1ant_post_state_to_bt(
  920. IN struct btc_coexist *btcoexist,
  921. IN u16 type,
  922. IN boolean state
  923. )
  924. {
  925. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  926. "[BTCoex], halbtc8723d1ant_post_state_to_bt: type = %d, state =%d\n",
  927. type, state);
  928. BTC_TRACE(trace_buf);
  929. halbtc8723d1ant_write_score_board(btcoexist, (u16) type, state);
  930. }
  931. boolean halbtc8723d1ant_is_wifibt_status_changed(IN struct btc_coexist
  932. *btcoexist)
  933. {
  934. static boolean pre_wifi_busy = false, pre_under_4way = false,
  935. pre_bt_hs_on = false, pre_bt_off = false, pre_bt_slave = false;
  936. static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
  937. boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
  938. boolean wifi_connected = false;
  939. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  940. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  941. &wifi_connected);
  942. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  943. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  944. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  945. &under_4way);
  946. if (coex_sta->bt_disabled != pre_bt_off) {
  947. pre_bt_off = coex_sta->bt_disabled;
  948. if (coex_sta->bt_disabled)
  949. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  950. "[BTCoex], BT is disabled !!\n");
  951. else
  952. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  953. "[BTCoex], BT is enabled !!\n");
  954. BTC_TRACE(trace_buf);
  955. coex_sta->bt_coex_supported_feature = 0;
  956. coex_sta->bt_coex_supported_version = 0;
  957. coex_sta->bt_ble_scan_type = 0;
  958. coex_sta->bt_ble_scan_para[0] = 0;
  959. coex_sta->bt_ble_scan_para[1] = 0;
  960. coex_sta->bt_ble_scan_para[2] = 0;
  961. coex_sta->bt_reg_vendor_ac = 0xffff;
  962. coex_sta->bt_reg_vendor_ae = 0xffff;
  963. return true;
  964. }
  965. if (wifi_connected) {
  966. if (wifi_busy != pre_wifi_busy) {
  967. pre_wifi_busy = wifi_busy;
  968. if (wifi_busy)
  969. halbtc8723d1ant_post_state_to_bt(btcoexist,
  970. BT_8723D_1ANT_SCOREBOARD_UNDERTEST, true);
  971. else
  972. halbtc8723d1ant_post_state_to_bt(btcoexist,
  973. BT_8723D_1ANT_SCOREBOARD_UNDERTEST, false);
  974. return true;
  975. }
  976. if (under_4way != pre_under_4way) {
  977. pre_under_4way = under_4way;
  978. return true;
  979. }
  980. if (bt_hs_on != pre_bt_hs_on) {
  981. pre_bt_hs_on = bt_hs_on;
  982. return true;
  983. }
  984. if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
  985. pre_wl_noisy_level = coex_sta->wl_noisy_level;
  986. return true;
  987. }
  988. }
  989. if (!coex_sta->bt_disabled) {
  990. if (coex_sta->hid_busy_num != pre_hid_busy_num) {
  991. pre_hid_busy_num = coex_sta->hid_busy_num;
  992. return true;
  993. }
  994. }
  995. if (bt_link_info->slave_role != pre_bt_slave) {
  996. pre_bt_slave = bt_link_info->slave_role;
  997. return true;
  998. }
  999. return false;
  1000. }
  1001. void halbtc8723d1ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  1002. {
  1003. static u32 bt_disable_cnt = 0;
  1004. boolean bt_active = true, bt_disabled = false;
  1005. u16 u16tmp;
  1006. /* This function check if bt is disabled */
  1007. #if 0
  1008. if (coex_sta->high_priority_tx == 0 &&
  1009. coex_sta->high_priority_rx == 0 &&
  1010. coex_sta->low_priority_tx == 0 &&
  1011. coex_sta->low_priority_rx == 0)
  1012. bt_active = false;
  1013. if (coex_sta->high_priority_tx == 0xffff &&
  1014. coex_sta->high_priority_rx == 0xffff &&
  1015. coex_sta->low_priority_tx == 0xffff &&
  1016. coex_sta->low_priority_rx == 0xffff)
  1017. bt_active = false;
  1018. #else
  1019. /* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
  1020. halbtc8723d1ant_read_score_board(btcoexist, &u16tmp);
  1021. bt_active = u16tmp & BIT(1);
  1022. #endif
  1023. if (bt_active) {
  1024. bt_disable_cnt = 0;
  1025. bt_disabled = false;
  1026. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  1027. &bt_disabled);
  1028. } else {
  1029. bt_disable_cnt++;
  1030. if (bt_disable_cnt >= 2) {
  1031. bt_disabled = true;
  1032. bt_disable_cnt = 2;
  1033. }
  1034. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  1035. &bt_disabled);
  1036. }
  1037. if (bt_disabled)
  1038. halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
  1039. else
  1040. halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
  1041. if (coex_sta->bt_disabled != bt_disabled) {
  1042. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1043. "[BTCoex], BT is from %s to %s!!\n",
  1044. (coex_sta->bt_disabled ? "disabled" : "enabled"),
  1045. (bt_disabled ? "disabled" : "enabled"));
  1046. BTC_TRACE(trace_buf);
  1047. coex_sta->bt_disabled = bt_disabled;
  1048. }
  1049. }
  1050. void halbtc8723d1ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
  1051. boolean isenable)
  1052. {
  1053. #if BT_8723D_1ANT_COEX_DBG
  1054. if (isenable) {
  1055. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1);
  1056. /* enable GNT_BT to GPIO debug */
  1057. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0);
  1058. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0);
  1059. /* 0x48[20] = 0 for GPIO14 = GNT_WL*/
  1060. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x0);
  1061. /* 0x40[17] = 0 for GPIO14 = GNT_WL*/
  1062. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x42, 0x02, 0x0);
  1063. /* 0x66[9] = 0 for GPIO15 = GNT_B T*/
  1064. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x02, 0x0);
  1065. /* 0x66[7] = 0
  1066. for GPIO15 = GNT_BT*/
  1067. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, 0x80, 0x0);
  1068. /* 0x8[8] = 0 for GPIO15 = GNT_BT*/
  1069. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x9, 0x1, 0x0);
  1070. /* BT Vendor Reg 0x76[0] = 0 for GPIO15 = GNT_BT, this is not set here*/
  1071. } else {
  1072. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0);
  1073. /* Disable GNT_BT debug to GPIO, and enable chip_wakeup_host */
  1074. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x1);
  1075. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x1);
  1076. /* 0x48[20] = 0 for GPIO14 = GNT_WL*/
  1077. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x1);
  1078. }
  1079. #endif
  1080. }
  1081. u32 halbtc8723d1ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
  1082. IN u16 reg_addr)
  1083. {
  1084. u32 j = 0, delay_count = 0;
  1085. /* wait for ready bit before access 0x7c0 */
  1086. btcoexist->btc_write_4byte(btcoexist, 0x7c0, 0x800F0000 | reg_addr);
  1087. while (1) {
  1088. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
  1089. delay_ms(50);
  1090. delay_count++;
  1091. if (delay_count >= 10) {
  1092. delay_count = 0;
  1093. break;
  1094. }
  1095. } else
  1096. break;
  1097. }
  1098. return btcoexist->btc_read_4byte(btcoexist,
  1099. 0x7c8); /* get read data */
  1100. }
  1101. void halbtc8723d1ant_ltecoex_indirect_write_reg(IN struct btc_coexist
  1102. *btcoexist,
  1103. IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
  1104. {
  1105. u32 val, i = 0, j = 0, bitpos = 0, delay_count = 0;
  1106. if (bit_mask == 0x0)
  1107. return;
  1108. if (bit_mask == 0xffffffff) {
  1109. btcoexist->btc_write_4byte(btcoexist, 0x7c4,
  1110. reg_value); /* put write data */
  1111. /* wait for ready bit before access 0x7c0 */
  1112. while (1) {
  1113. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3) & BIT(5)) == 0) {
  1114. delay_ms(50);
  1115. delay_count++;
  1116. if (delay_count >= 10) {
  1117. delay_count = 0;
  1118. break;
  1119. }
  1120. } else
  1121. break;
  1122. }
  1123. btcoexist->btc_write_4byte(btcoexist, 0x7c0,
  1124. 0xc00F0000 | reg_addr);
  1125. } else {
  1126. for (i = 0; i <= 31; i++) {
  1127. if (((bit_mask >> i) & 0x1) == 0x1) {
  1128. bitpos = i;
  1129. break;
  1130. }
  1131. }
  1132. /* read back register value before write */
  1133. val = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  1134. reg_addr);
  1135. val = (val & (~bit_mask)) | (reg_value << bitpos);
  1136. btcoexist->btc_write_4byte(btcoexist, 0x7c4,
  1137. val); /* put write data */
  1138. /* wait for ready bit before access 0x7c0 */
  1139. while (1) {
  1140. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3) & BIT(5)) == 0) {
  1141. delay_ms(50);
  1142. delay_count++;
  1143. if (delay_count >= 10) {
  1144. delay_count = 0;
  1145. break;
  1146. }
  1147. } else
  1148. break;
  1149. }
  1150. btcoexist->btc_write_4byte(btcoexist, 0x7c0,
  1151. 0xc00F0000 | reg_addr);
  1152. }
  1153. }
  1154. void halbtc8723d1ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
  1155. IN boolean enable)
  1156. {
  1157. u8 val;
  1158. val = (enable) ? 1 : 0;
  1159. halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80,
  1160. val); /* 0x38[7] */
  1161. }
  1162. void halbtc8723d1ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
  1163. IN boolean wifi_control)
  1164. {
  1165. u8 val;
  1166. val = (wifi_control) ? 1 : 0;
  1167. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4,
  1168. val); /* 0x70[26] */
  1169. }
  1170. void halbtc8723d1ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
  1171. IN u8 control_block, IN boolean sw_control, IN u8 state)
  1172. {
  1173. u32 val = 0, val_orig = 0;
  1174. if (!sw_control)
  1175. val = 0x0;
  1176. else if (state & 0x1)
  1177. val = 0x3;
  1178. else
  1179. val = 0x1;
  1180. val_orig = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  1181. 0x38);
  1182. switch (control_block) {
  1183. case BT_8723D_1ANT_GNT_BLOCK_RFC_BB:
  1184. default:
  1185. val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
  1186. break;
  1187. case BT_8723D_1ANT_GNT_BLOCK_RFC:
  1188. val = (val << 14) | (val_orig & 0xffff3fff);
  1189. break;
  1190. case BT_8723D_1ANT_GNT_BLOCK_BB:
  1191. val = (val << 10) | (val_orig & 0xfffff3ff);
  1192. break;
  1193. }
  1194. halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist,
  1195. 0x38, 0xffffffff, val);
  1196. }
  1197. void halbtc8723d1ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
  1198. IN u8 control_block, IN boolean sw_control, IN u8 state)
  1199. {
  1200. u32 val = 0, val_orig = 0;
  1201. if (!sw_control)
  1202. val = 0x0;
  1203. else if (state & 0x1)
  1204. val = 0x3;
  1205. else
  1206. val = 0x1;
  1207. val_orig = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  1208. 0x38);
  1209. switch (control_block) {
  1210. case BT_8723D_1ANT_GNT_BLOCK_RFC_BB:
  1211. default:
  1212. val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
  1213. break;
  1214. case BT_8723D_1ANT_GNT_BLOCK_RFC:
  1215. val = (val << 12) | (val_orig & 0xffffcfff);
  1216. break;
  1217. case BT_8723D_1ANT_GNT_BLOCK_BB:
  1218. val = (val << 8) | (val_orig & 0xfffffcff);
  1219. break;
  1220. }
  1221. halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, 0x38,
  1222. 0xffffffff, val);
  1223. }
  1224. void halbtc8723d1ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
  1225. IN u8 table_type, IN u16 table_content)
  1226. {
  1227. u16 reg_addr = 0x0000;
  1228. switch (table_type) {
  1229. case BT_8723D_1ANT_CTT_WL_VS_LTE:
  1230. reg_addr = 0xa0;
  1231. break;
  1232. case BT_8723D_1ANT_CTT_BT_VS_LTE:
  1233. reg_addr = 0xa4;
  1234. break;
  1235. }
  1236. if (reg_addr != 0x0000)
  1237. halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
  1238. 0xffff, table_content); /* 0xa0[15:0] or 0xa4[15:0] */
  1239. }
  1240. void halbtc8723d1ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
  1241. IN u8 table_type, IN u8 table_content)
  1242. {
  1243. u16 reg_addr = 0x0000;
  1244. switch (table_type) {
  1245. case BT_8723D_1ANT_LBTT_WL_BREAK_LTE:
  1246. reg_addr = 0xa8;
  1247. break;
  1248. case BT_8723D_1ANT_LBTT_BT_BREAK_LTE:
  1249. reg_addr = 0xac;
  1250. break;
  1251. case BT_8723D_1ANT_LBTT_LTE_BREAK_WL:
  1252. reg_addr = 0xb0;
  1253. break;
  1254. case BT_8723D_1ANT_LBTT_LTE_BREAK_BT:
  1255. reg_addr = 0xb4;
  1256. break;
  1257. }
  1258. if (reg_addr != 0x0000)
  1259. halbtc8723d1ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
  1260. 0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
  1261. }
  1262. void halbtc8723d1ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
  1263. IN boolean force_exec, IN u8 interval,
  1264. IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
  1265. IN u8 val0x6c4_b3)
  1266. {
  1267. static u8 pre_h2c_parameter[6] = {0};
  1268. u8 cur_h2c_parameter[6] = {0};
  1269. u8 i, match_cnt = 0;
  1270. cur_h2c_parameter[0] = 0x7; /* op_code, 0x7= wlan toggle slot*/
  1271. cur_h2c_parameter[1] = interval;
  1272. cur_h2c_parameter[2] = val0x6c4_b0;
  1273. cur_h2c_parameter[3] = val0x6c4_b1;
  1274. cur_h2c_parameter[4] = val0x6c4_b2;
  1275. cur_h2c_parameter[5] = val0x6c4_b3;
  1276. if (!force_exec) {
  1277. for (i = 1; i <= 5; i++) {
  1278. if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
  1279. break;
  1280. match_cnt++;
  1281. }
  1282. if (match_cnt == 5)
  1283. return;
  1284. }
  1285. for (i = 1; i <= 5; i++)
  1286. pre_h2c_parameter[i] = cur_h2c_parameter[i];
  1287. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
  1288. }
  1289. void halbtc8723d1ant_set_coex_table(IN struct btc_coexist *btcoexist,
  1290. IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
  1291. {
  1292. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  1293. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  1294. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  1295. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  1296. }
  1297. void halbtc8723d1ant_coex_table(IN struct btc_coexist *btcoexist,
  1298. IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
  1299. IN u32 val0x6c8, IN u8 val0x6cc)
  1300. {
  1301. coex_dm->cur_val0x6c0 = val0x6c0;
  1302. coex_dm->cur_val0x6c4 = val0x6c4;
  1303. coex_dm->cur_val0x6c8 = val0x6c8;
  1304. coex_dm->cur_val0x6cc = val0x6cc;
  1305. if (!force_exec) {
  1306. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  1307. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  1308. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  1309. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  1310. return;
  1311. }
  1312. halbtc8723d1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
  1313. val0x6cc);
  1314. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  1315. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  1316. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  1317. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  1318. }
  1319. void halbtc8723d1ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
  1320. IN boolean force_exec, IN u8 type)
  1321. {
  1322. u32 break_table;
  1323. u8 select_table;
  1324. coex_sta->coex_table_type = type;
  1325. if (coex_sta->concurrent_rx_mode_on == true) {
  1326. break_table = 0xf0ffffff; /* set WL hi-pri can break BT */
  1327. select_table =
  1328. 0xb; /* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
  1329. } else {
  1330. break_table = 0xffffff;
  1331. select_table = 0x3;
  1332. }
  1333. switch (type) {
  1334. case 0:
  1335. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1336. 0x55555555, 0x55555555, break_table,
  1337. select_table);
  1338. break;
  1339. case 1:
  1340. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1341. 0x55555555, 0x5a5a5a5a, break_table,
  1342. select_table);
  1343. break;
  1344. case 2:
  1345. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1346. 0xaa5a5a5a, 0xaa5a5a5a, break_table,
  1347. select_table);
  1348. break;
  1349. case 3:
  1350. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1351. 0x55555555, 0x5a5a5a5a, break_table,
  1352. select_table);
  1353. break;
  1354. case 4:
  1355. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1356. 0xa5555555, 0x5a5a5a5a, break_table,
  1357. select_table);
  1358. break;
  1359. case 5:
  1360. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1361. 0x5a5a5a5a, 0x5a5a5a5a, break_table,
  1362. select_table);
  1363. break;
  1364. case 6:
  1365. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1366. 0xa5555555, 0x5a5a5a5a, break_table,
  1367. select_table);
  1368. break;
  1369. case 7:
  1370. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1371. 0xaa555555, 0xaa555555, break_table,
  1372. select_table);
  1373. break;
  1374. case 8:
  1375. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1376. 0xa5555555, 0xaaaaaaaa, break_table,
  1377. select_table);
  1378. break;
  1379. case 9:
  1380. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1381. 0x5a5a5a5a, 0xaaaa5aaa, break_table,
  1382. select_table);
  1383. break;
  1384. case 10:
  1385. halbtc8723d1ant_coex_table(btcoexist, force_exec,
  1386. 0xaaaaaaaa, 0xaaaaaaaa, break_table,
  1387. select_table);
  1388. break;
  1389. default:
  1390. break;
  1391. }
  1392. }
  1393. void halbtc8723d1ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1394. IN boolean enable)
  1395. {
  1396. u8 h2c_parameter[1] = {0};
  1397. if (enable) {
  1398. h2c_parameter[0] |= BIT(0); /* function enable */
  1399. }
  1400. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  1401. }
  1402. void halbtc8723d1ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1403. IN boolean force_exec, IN boolean enable)
  1404. {
  1405. coex_dm->cur_ignore_wlan_act = enable;
  1406. if (!force_exec) {
  1407. if (coex_dm->pre_ignore_wlan_act ==
  1408. coex_dm->cur_ignore_wlan_act)
  1409. return;
  1410. }
  1411. halbtc8723d1ant_set_fw_ignore_wlan_act(btcoexist, enable);
  1412. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  1413. }
  1414. void halbtc8723d1ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
  1415. IN u8 lps_val, IN u8 rpwm_val)
  1416. {
  1417. u8 lps = lps_val;
  1418. u8 rpwm = rpwm_val;
  1419. btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
  1420. btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
  1421. }
  1422. void halbtc8723d1ant_lps_rpwm(IN struct btc_coexist *btcoexist,
  1423. IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
  1424. {
  1425. coex_dm->cur_lps = lps_val;
  1426. coex_dm->cur_rpwm = rpwm_val;
  1427. if (!force_exec) {
  1428. if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
  1429. (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
  1430. return;
  1431. }
  1432. halbtc8723d1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
  1433. coex_dm->pre_lps = coex_dm->cur_lps;
  1434. coex_dm->pre_rpwm = coex_dm->cur_rpwm;
  1435. }
  1436. void halbtc8723d1ant_ps_tdma_check_for_power_save_state(
  1437. IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
  1438. {
  1439. u8 lps_mode = 0x0;
  1440. u8 h2c_parameter[5] = {0x8, 0, 0, 0, 0};
  1441. btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
  1442. if (lps_mode) { /* already under LPS state */
  1443. if (new_ps_state) {
  1444. /* keep state under LPS, do nothing. */
  1445. } else {
  1446. /* will leave LPS state, turn off psTdma first */
  1447. /*halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1448. 8); */
  1449. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1450. h2c_parameter);
  1451. }
  1452. } else { /* NO PS state */
  1453. if (new_ps_state) {
  1454. /* will enter LPS state, turn off psTdma first */
  1455. /*halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1456. 8);*/
  1457. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1458. h2c_parameter);
  1459. } else {
  1460. /* keep state under NO PS state, do nothing. */
  1461. }
  1462. }
  1463. }
  1464. void halbtc8723d1ant_power_save_state(IN struct btc_coexist *btcoexist,
  1465. IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
  1466. {
  1467. boolean low_pwr_disable = false;
  1468. switch (ps_type) {
  1469. case BTC_PS_WIFI_NATIVE:
  1470. /* recover to original 32k low power setting */
  1471. coex_sta->force_lps_on = false;
  1472. low_pwr_disable = false;
  1473. btcoexist->btc_set(btcoexist,
  1474. BTC_SET_ACT_DISABLE_LOW_POWER,
  1475. &low_pwr_disable);
  1476. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
  1477. NULL);
  1478. break;
  1479. case BTC_PS_LPS_ON:
  1480. coex_sta->force_lps_on = true;
  1481. halbtc8723d1ant_ps_tdma_check_for_power_save_state(
  1482. btcoexist, true);
  1483. halbtc8723d1ant_lps_rpwm(btcoexist, NORMAL_EXEC,
  1484. lps_val, rpwm_val);
  1485. /* when coex force to enter LPS, do not enter 32k low power. */
  1486. low_pwr_disable = true;
  1487. btcoexist->btc_set(btcoexist,
  1488. BTC_SET_ACT_DISABLE_LOW_POWER,
  1489. &low_pwr_disable);
  1490. /* power save must executed before psTdma. */
  1491. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
  1492. NULL);
  1493. break;
  1494. case BTC_PS_LPS_OFF:
  1495. coex_sta->force_lps_on = false;
  1496. halbtc8723d1ant_ps_tdma_check_for_power_save_state(
  1497. btcoexist, false);
  1498. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
  1499. NULL);
  1500. break;
  1501. default:
  1502. break;
  1503. }
  1504. }
  1505. void halbtc8723d1ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
  1506. IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
  1507. {
  1508. u8 h2c_parameter[5] = {0};
  1509. u8 real_byte1 = byte1, real_byte5 = byte5;
  1510. boolean ap_enable = false;
  1511. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1512. if (byte5 & BIT(2))
  1513. coex_sta->is_tdma_btautoslot = true;
  1514. else
  1515. coex_sta->is_tdma_btautoslot = false;
  1516. /* release bt-auto slot for auto-slot hang is detected!! */
  1517. if (coex_sta->is_tdma_btautoslot)
  1518. if ((coex_sta->is_tdma_btautoslot_hang) ||
  1519. (bt_link_info->slave_role))
  1520. byte5 = byte5 & 0xfb;
  1521. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1522. &ap_enable);
  1523. if (ap_enable) {
  1524. if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1525. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1526. "[BTCoex], FW for AP mode\n");
  1527. BTC_TRACE(trace_buf);
  1528. real_byte1 &= ~BIT(4);
  1529. real_byte1 |= BIT(5);
  1530. real_byte5 |= BIT(5);
  1531. real_byte5 &= ~BIT(6);
  1532. halbtc8723d1ant_power_save_state(btcoexist,
  1533. BTC_PS_WIFI_NATIVE, 0x0,
  1534. 0x0);
  1535. }
  1536. } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1537. halbtc8723d1ant_power_save_state(
  1538. btcoexist, BTC_PS_LPS_ON, 0x50,
  1539. 0x4);
  1540. } else {
  1541. halbtc8723d1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
  1542. 0x0,
  1543. 0x0);
  1544. }
  1545. h2c_parameter[0] = real_byte1;
  1546. h2c_parameter[1] = byte2;
  1547. h2c_parameter[2] = byte3;
  1548. h2c_parameter[3] = byte4;
  1549. h2c_parameter[4] = real_byte5;
  1550. coex_dm->ps_tdma_para[0] = real_byte1;
  1551. coex_dm->ps_tdma_para[1] = byte2;
  1552. coex_dm->ps_tdma_para[2] = byte3;
  1553. coex_dm->ps_tdma_para[3] = byte4;
  1554. coex_dm->ps_tdma_para[4] = real_byte5;
  1555. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1556. }
  1557. void halbtc8723d1ant_ps_tdma(IN struct btc_coexist *btcoexist,
  1558. IN boolean force_exec, IN boolean turn_on, IN u8 type)
  1559. {
  1560. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1561. struct btc_board_info *board_info = &btcoexist->board_info;
  1562. boolean wifi_busy = false;
  1563. static u8 psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
  1564. static boolean pre_wifi_busy = false;
  1565. #if BT_8723D_1ANT_ANTDET_ENABLE
  1566. if (board_info->btdm_ant_num_by_ant_det == 2) {
  1567. #if 0
  1568. if (turn_on)
  1569. type = type +
  1570. 100;
  1571. #endif
  1572. }
  1573. #endif
  1574. coex_dm->cur_ps_tdma_on = turn_on;
  1575. coex_dm->cur_ps_tdma = type;
  1576. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1577. if (wifi_busy != pre_wifi_busy) {
  1578. force_exec = true;
  1579. pre_wifi_busy = wifi_busy;
  1580. }
  1581. /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
  1582. if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
  1583. psTdmaByte4Modify = 0x1;
  1584. else
  1585. psTdmaByte4Modify = 0x0;
  1586. if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
  1587. force_exec = true;
  1588. pre_psTdmaByte4Modify = psTdmaByte4Modify;
  1589. }
  1590. if (!force_exec) {
  1591. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1592. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1593. return;
  1594. }
  1595. if (coex_dm->cur_ps_tdma_on) {
  1596. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1597. "[BTCoex], ********** TDMA(on, %d) **********\n",
  1598. coex_dm->cur_ps_tdma);
  1599. BTC_TRACE(trace_buf);
  1600. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
  1601. 0x1); /* enable TBTT nterrupt */
  1602. } else {
  1603. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1604. "[BTCoex], ********** TDMA(off, %d) **********\n",
  1605. coex_dm->cur_ps_tdma);
  1606. BTC_TRACE(trace_buf);
  1607. }
  1608. if (turn_on) {
  1609. switch (type) {
  1610. default:
  1611. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1612. 0x61, 0x35, 0x03, 0x11, 0x11);
  1613. break;
  1614. case 3:
  1615. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1616. 0x51, 0x3a, 0x03, 0x10, 0x50);
  1617. break;
  1618. case 4:
  1619. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1620. 0x51, 0x21, 0x03, 0x10, 0x50);
  1621. break;
  1622. case 5:
  1623. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1624. 0x61, 0x15, 0x03, 0x11, 0x11);
  1625. break;
  1626. case 6:
  1627. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1628. 0x61, 0x20, 0x03, 0x11, 0x11);
  1629. break;
  1630. case 7:
  1631. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1632. 0x51, 0x10, 0x03, 0x10, 0x54 |
  1633. psTdmaByte4Modify);
  1634. break;
  1635. case 8:
  1636. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1637. 0x51, 0x10, 0x03, 0x10, 0x54 |
  1638. psTdmaByte4Modify);
  1639. break;
  1640. case 9:
  1641. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1642. 0x55, 0x10, 0x03, 0x10, 0x54 |
  1643. psTdmaByte4Modify);
  1644. break;
  1645. case 10:
  1646. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1647. 0x61, 0x30, 0x03, 0x11, 0x10);
  1648. break;
  1649. case 11:
  1650. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1651. 0x65, 0x25, 0x03, 0x11, 0x11 |
  1652. psTdmaByte4Modify);
  1653. break;
  1654. case 12:
  1655. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1656. 0x55, 0x30, 0x03, 0x10, 0x50 |
  1657. psTdmaByte4Modify);
  1658. break;
  1659. case 13:
  1660. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1661. 0x51, 0x25, 0x03, 0x10, 0x50 |
  1662. psTdmaByte4Modify);
  1663. break;
  1664. case 14:
  1665. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1666. 0x51, 0x15, 0x03, 0x10, 0x50 |
  1667. psTdmaByte4Modify);
  1668. break;
  1669. case 15:
  1670. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1671. 0x51, 0x20, 0x03, 0x10, 0x50 |
  1672. psTdmaByte4Modify);
  1673. break;
  1674. case 16:
  1675. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1676. 0x61, 0x10, 0x03, 0x11, 0x15 |
  1677. psTdmaByte4Modify);
  1678. break;
  1679. case 17:
  1680. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1681. 0x61, 0x10, 0x03, 0x11, 0x14);
  1682. break;
  1683. case 18:
  1684. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1685. 0x51, 0x30, 0x03, 0x10, 0x50 |
  1686. psTdmaByte4Modify);
  1687. break;
  1688. case 19:
  1689. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1690. 0x61, 0x15, 0x03, 0x11, 0x10);
  1691. break;
  1692. case 20:
  1693. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1694. 0x61, 0x30, 0x03, 0x11, 0x10);
  1695. break;
  1696. case 21:
  1697. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1698. 0x61, 0x30, 0x03, 0x11, 0x10);
  1699. break;
  1700. case 22:
  1701. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1702. 0x61, 0x25, 0x03, 0x11, 0x10);
  1703. break;
  1704. case 23:
  1705. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1706. 0x61, 0x10, 0x03, 0x11, 0x10);
  1707. break;
  1708. case 27:
  1709. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1710. 0x61, 0x10, 0x03, 0x11, 0x15);
  1711. break;
  1712. case 32:
  1713. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1714. 0x61, 0x35, 0x03, 0x11, 0x11);
  1715. break;
  1716. case 33:
  1717. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1718. 0x61, 0x35, 0x03, 0x11, 0x10);
  1719. break;
  1720. case 57:
  1721. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1722. 0x51, 0x10, 0x03, 0x10, 0x50 |
  1723. psTdmaByte4Modify);
  1724. break;
  1725. case 58:
  1726. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1727. 0x51, 0x10, 0x03, 0x10, 0x50 |
  1728. psTdmaByte4Modify);
  1729. break;
  1730. case 67:
  1731. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1732. 0x61, 0x10, 0x03, 0x11, 0x10 |
  1733. psTdmaByte4Modify);
  1734. break;
  1735. /* 1-Ant to 2-Ant TDMA case */
  1736. case 103:
  1737. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1738. 0xd3, 0x3a, 0x03, 0x70, 0x10);
  1739. break;
  1740. case 104:
  1741. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1742. 0xd3, 0x21, 0x03, 0x70, 0x10);
  1743. break;
  1744. case 105:
  1745. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1746. 0xe3, 0x15, 0x03, 0x71, 0x11);
  1747. break;
  1748. case 106:
  1749. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1750. 0xe3, 0x20, 0x03, 0x71, 0x11);
  1751. break;
  1752. case 107:
  1753. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1754. 0xd3, 0x10, 0x03, 0x70, 0x14 |
  1755. psTdmaByte4Modify);
  1756. break;
  1757. case 108:
  1758. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1759. 0xd3, 0x10, 0x03, 0x70, 0x14 |
  1760. psTdmaByte4Modify);
  1761. break;
  1762. case 113:
  1763. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1764. 0xd3, 0x25, 0x03, 0x70, 0x10 |
  1765. psTdmaByte4Modify);
  1766. break;
  1767. case 114:
  1768. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1769. 0xd3, 0x15, 0x03, 0x70, 0x10 |
  1770. psTdmaByte4Modify);
  1771. break;
  1772. case 115:
  1773. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1774. 0xd3, 0x20, 0x03, 0x70, 0x10 |
  1775. psTdmaByte4Modify);
  1776. break;
  1777. case 117:
  1778. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1779. 0xe3, 0x10, 0x03, 0x71, 0x14 |
  1780. psTdmaByte4Modify);
  1781. break;
  1782. case 119:
  1783. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1784. 0xe3, 0x15, 0x03, 0x71, 0x10);
  1785. break;
  1786. case 120:
  1787. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1788. 0xe3, 0x30, 0x03, 0x71, 0x10);
  1789. break;
  1790. case 121:
  1791. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1792. 0xe3, 0x30, 0x03, 0x71, 0x10);
  1793. break;
  1794. case 122:
  1795. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1796. 0xe3, 0x25, 0x03, 0x71, 0x10);
  1797. break;
  1798. case 132:
  1799. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1800. 0xe3, 0x35, 0x03, 0x71, 0x11);
  1801. break;
  1802. case 133:
  1803. halbtc8723d1ant_set_fw_pstdma(btcoexist,
  1804. 0xe3, 0x35, 0x03, 0x71, 0x10);
  1805. break;
  1806. }
  1807. } else {
  1808. /* disable PS tdma */
  1809. switch (type) {
  1810. case 8: /* PTA Control */
  1811. halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x8,
  1812. 0x0, 0x0, 0x0, 0x0);
  1813. break;
  1814. case 0:
  1815. default: /* Software control, Antenna at BT side */
  1816. halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x0,
  1817. 0x0, 0x0, 0x0, 0x0);
  1818. break;
  1819. case 1: /* 2-Ant, 0x778=3, antenna control by antenna diversity */
  1820. halbtc8723d1ant_set_fw_pstdma(btcoexist, 0x0,
  1821. 0x0, 0x0, 0x48, 0x0);
  1822. break;
  1823. }
  1824. }
  1825. /* update pre state */
  1826. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1827. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1828. }
  1829. void halbtc8723d1ant_set_ant_path(IN struct btc_coexist *btcoexist,
  1830. IN u8 ant_pos_type, IN boolean force_exec,
  1831. IN u8 phase)
  1832. {
  1833. struct btc_board_info *board_info = &btcoexist->board_info;
  1834. u32 cnt_bt_cal_chk = 0;
  1835. boolean is_in_mp_mode = false, is_hw_ant_div_on = false;
  1836. u8 u8tmp0 = 0, u8tmp1 = 0;
  1837. u32 u32tmp1 = 0, u32tmp2 = 0, u32tmp3 = 0;
  1838. u16 u16tmp0, u16tmp1 = 0;
  1839. #if BT_8723D_1ANT_ANTDET_ENABLE
  1840. if (ant_pos_type == BTC_ANT_PATH_PTA) {
  1841. if ((board_info->btdm_ant_det_finish) &&
  1842. (board_info->btdm_ant_num_by_ant_det == 2)) {
  1843. if (board_info->btdm_ant_pos ==
  1844. BTC_ANTENNA_AT_MAIN_PORT)
  1845. ant_pos_type = BTC_ANT_PATH_WIFI;
  1846. else
  1847. ant_pos_type = BTC_ANT_PATH_BT;
  1848. }
  1849. }
  1850. #endif
  1851. u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  1852. 0x38);
  1853. /* To avoid indirect access fail */
  1854. if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
  1855. force_exec = true;
  1856. coex_sta->gnt_error_cnt++;
  1857. }
  1858. #if BT_8723D_1ANT_COEX_DBG
  1859. u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  1860. u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
  1861. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  1862. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  1863. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  1864. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1865. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before Set Ant Pat)\n",
  1866. u8tmp0, u16tmp1, u8tmp1);
  1867. BTC_TRACE(trace_buf);
  1868. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1869. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x(Before Set Ant Path)\n",
  1870. u32tmp1, u32tmp2, u16tmp0);
  1871. BTC_TRACE(trace_buf);
  1872. #endif
  1873. coex_dm->cur_ant_pos_type = ant_pos_type;
  1874. if (!force_exec) {
  1875. if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
  1876. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1877. "[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
  1878. BTC_TRACE(trace_buf);
  1879. return;
  1880. }
  1881. }
  1882. coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
  1883. switch (phase) {
  1884. case BT_8723D_1ANT_PHASE_COEX_POWERON:
  1885. /* Set Path control to WL */
  1886. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1887. 0x80, 0x0);
  1888. /* set Path control owner to WL at initial step */
  1889. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  1890. BT_8723D_1ANT_PCO_BTSIDE);
  1891. /* set GNT_BT to SW high */
  1892. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  1893. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1894. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1895. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  1896. /* Set GNT_WL to SW low */
  1897. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  1898. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1899. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1900. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  1901. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1902. ant_pos_type = BTC_ANT_PATH_BT;
  1903. coex_sta->run_time_state = false;
  1904. break;
  1905. case BT_8723D_1ANT_PHASE_COEX_INIT:
  1906. /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
  1907. halbtc8723d1ant_ltecoex_enable(btcoexist, 0x0);
  1908. /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
  1909. halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
  1910. BT_8723D_1ANT_CTT_WL_VS_LTE, 0xffff);
  1911. /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
  1912. halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
  1913. BT_8723D_1ANT_CTT_BT_VS_LTE, 0xffff);
  1914. /* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */
  1915. while (cnt_bt_cal_chk <= 20) {
  1916. u8tmp0 = btcoexist->btc_read_1byte(btcoexist,
  1917. 0x49d);
  1918. cnt_bt_cal_chk++;
  1919. if (u8tmp0 & BIT(0)) {
  1920. BTC_SPRINTF(trace_buf,
  1921. BT_TMP_BUF_SIZE,
  1922. "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n",
  1923. cnt_bt_cal_chk);
  1924. BTC_TRACE(trace_buf);
  1925. delay_ms(50);
  1926. } else {
  1927. BTC_SPRINTF(trace_buf,
  1928. BT_TMP_BUF_SIZE,
  1929. "[BTCoex], ********** WL is NOT calibrating (wait cnt=%d)**********\n",
  1930. cnt_bt_cal_chk);
  1931. BTC_TRACE(trace_buf);
  1932. break;
  1933. }
  1934. }
  1935. /* Set Path control to WL */
  1936. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1937. 0x80, 0x1);
  1938. /* set Path control owner to WL at initial step */
  1939. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  1940. BT_8723D_1ANT_PCO_WLSIDE);
  1941. /* set GNT_BT to SW high */
  1942. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  1943. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1944. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1945. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  1946. /* Set GNT_WL to SW low */
  1947. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  1948. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1949. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1950. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  1951. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1952. ant_pos_type = BTC_ANT_PATH_BT;
  1953. coex_sta->run_time_state = false;
  1954. break;
  1955. case BT_8723D_1ANT_PHASE_WLANONLY_INIT:
  1956. /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
  1957. halbtc8723d1ant_ltecoex_enable(btcoexist, 0x0);
  1958. /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
  1959. halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
  1960. BT_8723D_1ANT_CTT_WL_VS_LTE, 0xffff);
  1961. /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
  1962. halbtc8723d1ant_ltecoex_set_coex_table(btcoexist,
  1963. BT_8723D_1ANT_CTT_BT_VS_LTE, 0xffff);
  1964. /* Set Path control to WL */
  1965. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1966. 0x80, 0x1);
  1967. /* set Path control owner to WL at initial step */
  1968. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  1969. BT_8723D_1ANT_PCO_WLSIDE);
  1970. /* set GNT_BT to SW low */
  1971. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  1972. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1973. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1974. BT_8723D_1ANT_SIG_STA_SET_TO_LOW);
  1975. /* Set GNT_WL to SW high */
  1976. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  1977. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  1978. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  1979. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  1980. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1981. ant_pos_type = BTC_ANT_PATH_WIFI;
  1982. coex_sta->run_time_state = false;
  1983. break;
  1984. case BT_8723D_1ANT_PHASE_WLAN_OFF:
  1985. /* Disable LTE Coex Function in WiFi side */
  1986. halbtc8723d1ant_ltecoex_enable(btcoexist, 0x0);
  1987. /* Set Path control to BT */
  1988. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1989. 0x80, 0x0);
  1990. /* set Path control owner to BT */
  1991. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  1992. BT_8723D_1ANT_PCO_BTSIDE);
  1993. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1994. ant_pos_type = BTC_ANT_PATH_BT;
  1995. coex_sta->run_time_state = false;
  1996. break;
  1997. case BT_8723D_1ANT_PHASE_2G_RUNTIME:
  1998. /* wait for WL/BT IQK finish, keep 0x38 = 0xff00 for WL IQK */
  1999. while (cnt_bt_cal_chk <= 20) {
  2000. u8tmp0 = btcoexist->btc_read_1byte(btcoexist,
  2001. 0x1e6);
  2002. u8tmp1 = btcoexist->btc_read_1byte(btcoexist,
  2003. 0x49d);
  2004. cnt_bt_cal_chk++;
  2005. if ((u8tmp0 & BIT(0)) || (u8tmp1 & BIT(0))) {
  2006. BTC_SPRINTF(trace_buf,
  2007. BT_TMP_BUF_SIZE,
  2008. "[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
  2009. cnt_bt_cal_chk);
  2010. BTC_TRACE(trace_buf);
  2011. delay_ms(50);
  2012. } else {
  2013. BTC_SPRINTF(trace_buf,
  2014. BT_TMP_BUF_SIZE,
  2015. "[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
  2016. cnt_bt_cal_chk);
  2017. BTC_TRACE(trace_buf);
  2018. break;
  2019. }
  2020. }
  2021. /* Set Path control to WL */
  2022. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1); */
  2023. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  2024. BT_8723D_1ANT_PCO_WLSIDE);
  2025. /* set GNT_BT to PTA */
  2026. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  2027. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2028. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA,
  2029. BT_8723D_1ANT_SIG_STA_SET_BY_HW);
  2030. /* Set GNT_WL to PTA */
  2031. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  2032. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2033. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA,
  2034. BT_8723D_1ANT_SIG_STA_SET_BY_HW);
  2035. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  2036. ant_pos_type = BTC_ANT_PATH_PTA;
  2037. coex_sta->run_time_state = true;
  2038. break;
  2039. case BT_8723D_1ANT_PHASE_BTMPMODE:
  2040. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  2041. BT_8723D_1ANT_PCO_WLSIDE);
  2042. /* Set Path control to WL */
  2043. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  2044. 0x80, 0x1);
  2045. /* set GNT_BT to high */
  2046. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  2047. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2048. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  2049. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  2050. /* Set GNT_WL to low */
  2051. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  2052. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2053. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  2054. BT_8723D_1ANT_SIG_STA_SET_TO_LOW);
  2055. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  2056. ant_pos_type = BTC_ANT_PATH_BT;
  2057. coex_sta->run_time_state = false;
  2058. break;
  2059. case BT_8723D_1ANT_PHASE_ANTENNA_DET:
  2060. halbtc8723d1ant_ltecoex_pathcontrol_owner(btcoexist,
  2061. BT_8723D_1ANT_PCO_WLSIDE);
  2062. /* Set Path control to WL */
  2063. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  2064. 0x80, 0x1);
  2065. /* set GNT_BT to high */
  2066. halbtc8723d1ant_ltecoex_set_gnt_bt(btcoexist,
  2067. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2068. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  2069. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  2070. /* Set GNT_WL to high */
  2071. halbtc8723d1ant_ltecoex_set_gnt_wl(btcoexist,
  2072. BT_8723D_1ANT_GNT_BLOCK_RFC_BB,
  2073. BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW,
  2074. BT_8723D_1ANT_SIG_STA_SET_TO_HIGH);
  2075. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  2076. ant_pos_type = BTC_ANT_PATH_BT;
  2077. coex_sta->run_time_state = false;
  2078. break;
  2079. }
  2080. is_hw_ant_div_on = board_info->ant_div_cfg;
  2081. if ((is_hw_ant_div_on) && (phase != BT_8723D_1ANT_PHASE_ANTENNA_DET))
  2082. if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT)
  2083. /* 0x948 = 0x200, 0x0 while antenna diversity */
  2084. btcoexist->btc_write_2byte(btcoexist, 0x948, 0x100);
  2085. else /* 0x948 = 0x80, 0x0 while antenna diversity */
  2086. btcoexist->btc_write_2byte(btcoexist, 0x948, 0x40);
  2087. else if ((is_hw_ant_div_on == false) &&
  2088. (phase != BT_8723D_1ANT_PHASE_WLAN_OFF)) { /* internal switch setting */
  2089. switch (ant_pos_type) {
  2090. case BTC_ANT_PATH_WIFI:
  2091. if (board_info->btdm_ant_pos ==
  2092. BTC_ANTENNA_AT_MAIN_PORT)
  2093. btcoexist->btc_write_2byte(
  2094. btcoexist, 0x948, 0x0);
  2095. else
  2096. btcoexist->btc_write_2byte(
  2097. btcoexist, 0x948, 0x280);
  2098. break;
  2099. case BTC_ANT_PATH_BT:
  2100. if (board_info->btdm_ant_pos ==
  2101. BTC_ANTENNA_AT_MAIN_PORT)
  2102. btcoexist->btc_write_2byte(
  2103. btcoexist, 0x948, 0x280);
  2104. else
  2105. btcoexist->btc_write_2byte(
  2106. btcoexist, 0x948, 0x0);
  2107. break;
  2108. default:
  2109. case BTC_ANT_PATH_PTA:
  2110. if (board_info->btdm_ant_pos ==
  2111. BTC_ANTENNA_AT_MAIN_PORT)
  2112. btcoexist->btc_write_2byte(
  2113. btcoexist, 0x948,
  2114. 0x200);
  2115. else
  2116. btcoexist->btc_write_2byte(
  2117. btcoexist, 0x948, 0x80);
  2118. break;
  2119. }
  2120. }
  2121. #if BT_8723D_1ANT_COEX_DBG
  2122. u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  2123. u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  2124. u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
  2125. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  2126. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  2127. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  2128. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2129. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
  2130. u8tmp0, u16tmp1, u8tmp1);
  2131. BTC_TRACE(trace_buf);
  2132. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2133. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x(After Set Ant Path)\n",
  2134. u32tmp1, u32tmp2, u16tmp0);
  2135. BTC_TRACE(trace_buf);
  2136. #endif
  2137. }
  2138. boolean halbtc8723d1ant_is_common_action(IN struct btc_coexist *btcoexist)
  2139. {
  2140. boolean common = false, wifi_connected = false, wifi_busy = false;
  2141. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2142. &wifi_connected);
  2143. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2144. if (!wifi_connected &&
  2145. BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2146. coex_dm->bt_status) {
  2147. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2148. "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
  2149. BTC_TRACE(trace_buf);
  2150. common = true;
  2151. } else if (wifi_connected &&
  2152. (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2153. coex_dm->bt_status)) {
  2154. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2155. "[BTCoex], Wifi connected + BT non connected-idle!!\n");
  2156. BTC_TRACE(trace_buf);
  2157. common = true;
  2158. } else if (!wifi_connected &&
  2159. (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
  2160. coex_dm->bt_status)) {
  2161. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2162. "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
  2163. BTC_TRACE(trace_buf);
  2164. common = true;
  2165. } else if (wifi_connected &&
  2166. (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
  2167. coex_dm->bt_status)) {
  2168. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2169. "[BTCoex], Wifi connected + BT connected-idle!!\n");
  2170. BTC_TRACE(trace_buf);
  2171. common = true;
  2172. } else if (!wifi_connected &&
  2173. (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE !=
  2174. coex_dm->bt_status)) {
  2175. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2176. "[BTCoex], Wifi non connected-idle + BT Busy!!\n");
  2177. BTC_TRACE(trace_buf);
  2178. common = true;
  2179. } else {
  2180. if (wifi_busy) {
  2181. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2182. "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
  2183. BTC_TRACE(trace_buf);
  2184. } else {
  2185. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2186. "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
  2187. BTC_TRACE(trace_buf);
  2188. }
  2189. common = false;
  2190. }
  2191. return common;
  2192. }
  2193. /* *********************************************
  2194. *
  2195. * Non-Software Coex Mechanism start
  2196. *
  2197. * ********************************************* */
  2198. void halbtc8723d1ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
  2199. {
  2200. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  2201. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
  2202. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  2203. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2204. }
  2205. void halbtc8723d1ant_action_bt_hs(IN struct btc_coexist *btcoexist)
  2206. {
  2207. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  2208. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2209. }
  2210. void halbtc8723d1ant_action_bt_relink(IN struct btc_coexist *btcoexist)
  2211. {
  2212. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  2213. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2214. coex_sta->bt_relink_downcount = 2;
  2215. }
  2216. void halbtc8723d1ant_action_bt_idle(IN struct btc_coexist *btcoexist)
  2217. {
  2218. boolean wifi_busy = false;
  2219. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2220. if (!wifi_busy) {
  2221. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
  2222. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  2223. } else {
  2224. /* if wl busy */
  2225. if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2226. coex_dm->bt_status) {
  2227. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2228. NORMAL_EXEC, 8);
  2229. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
  2230. } else {
  2231. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2232. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
  2233. }
  2234. }
  2235. }
  2236. void halbtc8723d1ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
  2237. {
  2238. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2239. boolean wifi_connected = false, wifi_busy = false, bt_busy = false;
  2240. boolean wifi_scan = false, wifi_link = false, wifi_roam = false;
  2241. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2242. &wifi_connected);
  2243. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2244. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  2245. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
  2246. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
  2247. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
  2248. if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
  2249. || (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
  2250. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2251. "[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
  2252. BTC_TRACE(trace_buf);
  2253. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2254. if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
  2255. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
  2256. else
  2257. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
  2258. } else if ((!wifi_connected) && (!wifi_scan)) {
  2259. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  2260. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2261. } else if (bt_link_info->pan_exist) {
  2262. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  2263. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2264. } else if (bt_link_info->a2dp_exist) {
  2265. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
  2266. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2267. } else {
  2268. if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
  2269. || (coex_sta->wifi_is_high_pri_task))
  2270. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
  2271. else
  2272. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
  2273. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2274. }
  2275. }
  2276. void halbtc8723d1ant_action_bt_sco_hid_only_busy(IN struct btc_coexist
  2277. *btcoexist)
  2278. {
  2279. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2280. boolean wifi_connected = false, wifi_busy = false;
  2281. u32 wifi_bw = 1;
  2282. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2283. &wifi_connected);
  2284. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
  2285. &wifi_bw);
  2286. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2287. if (bt_link_info->sco_exist) {
  2288. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2289. true, 5);
  2290. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2291. NORMAL_EXEC, 5);
  2292. } else if (coex_sta->hid_busy_num >= 2) {
  2293. /*for 4/18 hid */
  2294. /* if 11bg mode */
  2295. if (wifi_bw == 0) {
  2296. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2297. NORMAL_EXEC, 6);
  2298. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2299. NORMAL_EXEC,
  2300. 0x1, 0xaa,
  2301. 0x5a, 0xaa,
  2302. 0xaa);
  2303. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2304. 11);
  2305. } else {
  2306. if (wifi_busy) {
  2307. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2308. NORMAL_EXEC, 6);
  2309. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2310. NORMAL_EXEC,
  2311. 0x2, 0xaa,
  2312. 0x5a, 0xaa,
  2313. 0xaa);
  2314. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2315. 11);
  2316. } else {
  2317. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2318. true, 6);
  2319. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2320. NORMAL_EXEC, 3);
  2321. }
  2322. }
  2323. } else {
  2324. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2325. true, 6);
  2326. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2327. NORMAL_EXEC, 3);
  2328. }
  2329. }
  2330. void halbtc8723d1ant_action_wifi_only(IN struct btc_coexist *btcoexist)
  2331. {
  2332. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  2333. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
  2334. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  2335. /* halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0); */
  2336. halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 10);
  2337. }
  2338. void halbtc8723d1ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
  2339. {
  2340. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2341. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  2342. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
  2343. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  2344. if ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2345. coex_dm->bt_status) ||
  2346. (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
  2347. coex_dm->bt_status))
  2348. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2349. else if (!bt_link_info->pan_exist)
  2350. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2351. else
  2352. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2353. }
  2354. void halbtc8723d1ant_action_wifi_linkscan_process(IN struct btc_coexist
  2355. *btcoexist)
  2356. {
  2357. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2358. if (bt_link_info->pan_exist) {
  2359. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  2360. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2361. } else if (bt_link_info->a2dp_exist) {
  2362. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 27);
  2363. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2364. } else {
  2365. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
  2366. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2367. }
  2368. }
  2369. void halbtc8723d1ant_action_wifi_connected_bt_acl_busy(IN struct btc_coexist
  2370. *btcoexist)
  2371. {
  2372. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2373. boolean wifi_busy = false, wifi_turbo = false;
  2374. u32 wifi_bw = 1;
  2375. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2376. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2377. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &coex_sta->scan_ap_num);
  2378. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2379. "############# [BTCoex], scan_ap_num = %d, wl_noisy_level = %d\n",
  2380. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2381. BTC_TRACE(trace_buf);
  2382. #if 1
  2383. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2384. wifi_turbo = true;
  2385. #endif
  2386. if ((coex_sta->bt_relink_downcount != 0)
  2387. && (!bt_link_info->pan_exist) && (wifi_busy)) {
  2388. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2389. "############# [BTCoex], BT Re-Link + A2DP + WL busy\n");
  2390. BTC_TRACE(trace_buf);
  2391. /*halbtc8821c1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);*/
  2392. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
  2393. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2394. } else if (bt_link_info->a2dp_only) { /* A2DP */
  2395. if (!wifi_busy) {
  2396. /*halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2397. 32);*/
  2398. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2399. 27);
  2400. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2401. NORMAL_EXEC, 4);
  2402. } else {
  2403. if (coex_sta->wl_noisy_level == 2)
  2404. halbtc8723d1ant_ps_tdma(btcoexist,
  2405. NORMAL_EXEC, true, 17);
  2406. else
  2407. halbtc8723d1ant_ps_tdma(btcoexist,
  2408. NORMAL_EXEC, true, 7);
  2409. if (wifi_turbo)
  2410. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2411. NORMAL_EXEC, 8);
  2412. else
  2413. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2414. NORMAL_EXEC, 4);
  2415. }
  2416. } else if (((bt_link_info->a2dp_exist) &&
  2417. (bt_link_info->pan_exist)) ||
  2418. (bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
  2419. bt_link_info->pan_exist)) { /* A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP) */
  2420. if ((bt_link_info->hid_exist) && (coex_sta->hid_busy_num >= 2)) {
  2421. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2422. NORMAL_EXEC, 6);
  2423. if (wifi_bw == 0) /* 11bg mode */
  2424. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2425. NORMAL_EXEC,
  2426. 0x1, 0xaa,
  2427. 0x5a, 0xaa,
  2428. 0xaa);
  2429. else
  2430. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2431. NORMAL_EXEC,
  2432. 0x2, 0xaa,
  2433. 0x5a, 0xaa,
  2434. 0xaa);
  2435. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2436. 12);
  2437. } else if (wifi_busy) {
  2438. if (((coex_sta->a2dp_bit_pool > 40) &&
  2439. (coex_sta->a2dp_bit_pool < 255)) ||
  2440. (!coex_sta->is_A2DP_3M))
  2441. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2442. true, 15);
  2443. else if (wifi_turbo)
  2444. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2445. true, 18);
  2446. else
  2447. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2448. true, 13);
  2449. } else
  2450. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2451. 14);
  2452. if (bt_link_info->hid_exist)
  2453. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2454. else if (wifi_turbo)
  2455. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2456. NORMAL_EXEC, 8);
  2457. else
  2458. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2459. NORMAL_EXEC, 4);
  2460. } else if (bt_link_info->hid_exist &&
  2461. bt_link_info->a2dp_exist) { /* HID+A2DP */
  2462. if ((wifi_busy) && (coex_sta->hid_busy_num >= 2)) { /*for 4/18 hid */
  2463. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2464. NORMAL_EXEC, 6);
  2465. if (wifi_bw == 0) /* 11bg mode */
  2466. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2467. NORMAL_EXEC,
  2468. 0x1, 0xaa,
  2469. 0x5a, 0xaa,
  2470. 0xaa);
  2471. else
  2472. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2473. NORMAL_EXEC,
  2474. 0x2, 0xaa,
  2475. 0x5a, 0xaa,
  2476. 0xaa);
  2477. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2478. 9);
  2479. } else {
  2480. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2481. 8);
  2482. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2483. NORMAL_EXEC, 1);
  2484. }
  2485. } else if ((bt_link_info->pan_only)
  2486. || (bt_link_info->hid_exist && bt_link_info->pan_exist)) {
  2487. /* PAN(OPP,FTP), HID+PAN(OPP,FTP) */
  2488. if ((bt_link_info->hid_exist) && (bt_link_info->pan_exist) &&
  2489. (coex_sta->hid_busy_num >= 2)) {
  2490. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2491. NORMAL_EXEC, 6);
  2492. if (wifi_bw == 0) /* 11bg mode */
  2493. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2494. NORMAL_EXEC,
  2495. 0x1, 0xaa,
  2496. 0x5a, 0xaa,
  2497. 0xaa);
  2498. else
  2499. halbtc8723d1ant_set_wltoggle_coex_table(btcoexist,
  2500. NORMAL_EXEC,
  2501. 0x2, 0xaa,
  2502. 0x5a, 0xaa,
  2503. 0xaa);
  2504. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2505. 12);
  2506. } else {
  2507. if (!wifi_busy)
  2508. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2509. 4);
  2510. else
  2511. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2512. 3);
  2513. if (bt_link_info->hid_exist)
  2514. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2515. else if (wifi_turbo)
  2516. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2517. NORMAL_EXEC, 8);
  2518. else
  2519. halbtc8723d1ant_coex_table_with_type(btcoexist,
  2520. NORMAL_EXEC, 4);
  2521. }
  2522. } else {
  2523. /* BT no-profile busy (0x9) */
  2524. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
  2525. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2526. }
  2527. }
  2528. void halbtc8723d1ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
  2529. {
  2530. /* tdma and coex table */
  2531. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  2532. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, NORMAL_EXEC,
  2533. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  2534. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2535. }
  2536. void halbtc8723d1ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
  2537. {
  2538. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2539. boolean wifi_busy = false;
  2540. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2541. "[BTCoex], CoexForWifiConnect()===>\n");
  2542. BTC_TRACE(trace_buf);
  2543. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  2544. NORMAL_EXEC,
  2545. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  2546. if (BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
  2547. if (bt_link_info->hid_only) /* HID only */
  2548. halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist);
  2549. else
  2550. halbtc8723d1ant_action_wifi_connected_bt_acl_busy(btcoexist);
  2551. } else if ((BT_8723D_1ANT_BT_STATUS_SCO_BUSY ==
  2552. coex_dm->bt_status) ||
  2553. (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY ==
  2554. coex_dm->bt_status)) {
  2555. halbtc8723d1ant_action_bt_sco_hid_only_busy(btcoexist);
  2556. } else
  2557. halbtc8723d1ant_action_bt_idle(btcoexist);
  2558. }
  2559. void halbtc8723d1ant_run_sw_coexist_mechanism(IN struct btc_coexist *btcoexist)
  2560. {
  2561. u8 algorithm = 0;
  2562. algorithm = halbtc8723d1ant_action_algorithm(btcoexist);
  2563. coex_dm->cur_algorithm = algorithm;
  2564. if (halbtc8723d1ant_is_common_action(btcoexist)) {
  2565. } else {
  2566. switch (coex_dm->cur_algorithm) {
  2567. case BT_8723D_1ANT_COEX_ALGO_SCO:
  2568. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2569. "[BTCoex], Action algorithm = SCO.\n");
  2570. BTC_TRACE(trace_buf);
  2571. break;
  2572. case BT_8723D_1ANT_COEX_ALGO_HID:
  2573. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2574. "[BTCoex], Action algorithm = HID.\n");
  2575. BTC_TRACE(trace_buf);
  2576. break;
  2577. case BT_8723D_1ANT_COEX_ALGO_A2DP:
  2578. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2579. "[BTCoex], Action algorithm = A2DP.\n");
  2580. BTC_TRACE(trace_buf);
  2581. break;
  2582. case BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS:
  2583. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2584. "[BTCoex], Action algorithm = A2DP+PAN(HS).\n");
  2585. BTC_TRACE(trace_buf);
  2586. break;
  2587. case BT_8723D_1ANT_COEX_ALGO_PANEDR:
  2588. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2589. "[BTCoex], Action algorithm = PAN(EDR).\n");
  2590. BTC_TRACE(trace_buf);
  2591. break;
  2592. case BT_8723D_1ANT_COEX_ALGO_PANHS:
  2593. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2594. "[BTCoex], Action algorithm = HS mode.\n");
  2595. BTC_TRACE(trace_buf);
  2596. break;
  2597. case BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP:
  2598. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2599. "[BTCoex], Action algorithm = PAN+A2DP.\n");
  2600. BTC_TRACE(trace_buf);
  2601. break;
  2602. case BT_8723D_1ANT_COEX_ALGO_PANEDR_HID:
  2603. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2604. "[BTCoex], Action algorithm = PAN(EDR)+HID.\n");
  2605. BTC_TRACE(trace_buf);
  2606. break;
  2607. case BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
  2608. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2609. "[BTCoex], Action algorithm = HID+A2DP+PAN.\n");
  2610. BTC_TRACE(trace_buf);
  2611. break;
  2612. case BT_8723D_1ANT_COEX_ALGO_HID_A2DP:
  2613. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2614. "[BTCoex], Action algorithm = HID+A2DP.\n");
  2615. BTC_TRACE(trace_buf);
  2616. break;
  2617. default:
  2618. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2619. "[BTCoex], Action algorithm = coexist All Off!!\n");
  2620. BTC_TRACE(trace_buf);
  2621. break;
  2622. }
  2623. coex_dm->pre_algorithm = coex_dm->cur_algorithm;
  2624. }
  2625. }
  2626. void halbtc8723d1ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
  2627. {
  2628. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2629. boolean wifi_connected = false, bt_hs_on = false;
  2630. boolean increase_scan_dev_num = false;
  2631. boolean bt_ctrl_agg_buf_size = false;
  2632. boolean miracast_plus_bt = false, wifi_under_5g = false;
  2633. u8 agg_buf_size = 5;
  2634. u32 wifi_link_status = 0;
  2635. u32 num_of_wifi_link = 0, wifi_bw;
  2636. u8 iot_peer = BTC_IOT_PEER_UNKNOWN;
  2637. boolean scan = false, link = false, roam = false, under_4way = false;
  2638. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2639. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2640. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2641. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  2642. &under_4way);
  2643. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2644. "[BTCoex], RunCoexistMechanism()===>\n");
  2645. BTC_TRACE(trace_buf);
  2646. if (btcoexist->manual_control) {
  2647. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2648. "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
  2649. BTC_TRACE(trace_buf);
  2650. return;
  2651. }
  2652. if (btcoexist->stop_coex_dm) {
  2653. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2654. "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n");
  2655. BTC_TRACE(trace_buf);
  2656. return;
  2657. }
  2658. if (coex_sta->under_ips) {
  2659. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2660. "[BTCoex], wifi is under IPS !!!\n");
  2661. BTC_TRACE(trace_buf);
  2662. return;
  2663. }
  2664. if (!coex_sta->run_time_state) {
  2665. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2666. "[BTCoex], return for run_time_state = false !!!\n");
  2667. BTC_TRACE(trace_buf);
  2668. return;
  2669. }
  2670. if (coex_sta->freeze_coexrun_by_btinfo) {
  2671. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2672. "[BTCoex], BtInfoNotify(), return for freeze_coexrun_by_btinfo\n");
  2673. BTC_TRACE(trace_buf);
  2674. return;
  2675. }
  2676. if (coex_sta->bt_whck_test) {
  2677. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2678. "[BTCoex], BT is under WHCK TEST!!!\n");
  2679. BTC_TRACE(trace_buf);
  2680. halbtc8723d1ant_action_bt_whql_test(btcoexist);
  2681. return;
  2682. }
  2683. if (coex_sta->bt_disabled) {
  2684. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2685. "[BTCoex], BT is disabled !!!\n");
  2686. halbtc8723d1ant_action_wifi_only(btcoexist);
  2687. return;
  2688. }
  2689. if (coex_sta->c2h_bt_inquiry_page) {
  2690. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2691. "[BTCoex], BT is under inquiry/page scan !!\n");
  2692. BTC_TRACE(trace_buf);
  2693. halbtc8723d1ant_action_bt_inquiry(btcoexist);
  2694. return;
  2695. }
  2696. if (coex_sta->is_setupLink) {
  2697. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2698. "[BTCoex], BT is re-link !!!\n");
  2699. halbtc8723d1ant_action_bt_relink(btcoexist);
  2700. return;
  2701. }
  2702. if ((BT_8723D_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  2703. (BT_8723D_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  2704. (BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
  2705. increase_scan_dev_num = true;
  2706. btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
  2707. &increase_scan_dev_num);
  2708. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  2709. &wifi_link_status);
  2710. num_of_wifi_link = wifi_link_status >> 16;
  2711. if ((num_of_wifi_link >= 2) ||
  2712. (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
  2713. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2714. "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
  2715. num_of_wifi_link, wifi_link_status);
  2716. BTC_TRACE(trace_buf);
  2717. if (bt_link_info->bt_link_exist)
  2718. miracast_plus_bt = true;
  2719. else
  2720. miracast_plus_bt = false;
  2721. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  2722. &miracast_plus_bt);
  2723. halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
  2724. false, 0x5);
  2725. if (scan || link || roam || under_4way) {
  2726. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2727. "[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
  2728. scan, link, roam, under_4way);
  2729. BTC_TRACE(trace_buf);
  2730. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2731. "[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
  2732. BTC_TRACE(trace_buf);
  2733. halbtc8723d1ant_action_wifi_linkscan_process(btcoexist);
  2734. } else
  2735. halbtc8723d1ant_action_wifi_multi_port(btcoexist);
  2736. return;
  2737. } else {
  2738. miracast_plus_bt = false;
  2739. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  2740. &miracast_plus_bt);
  2741. }
  2742. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2743. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2744. &wifi_connected);
  2745. if ((bt_link_info->bt_link_exist) && (wifi_connected)) {
  2746. btcoexist->btc_get(btcoexist, BTC_GET_U1_IOT_PEER, &iot_peer);
  2747. if (BTC_IOT_PEER_CISCO == iot_peer) {
  2748. if (BTC_WIFI_BW_HT40 == wifi_bw)
  2749. halbtc8723d1ant_limited_rx(btcoexist,
  2750. NORMAL_EXEC, false, true, 0x10);
  2751. else
  2752. halbtc8723d1ant_limited_rx(btcoexist,
  2753. NORMAL_EXEC, false, true, 0x8);
  2754. } else
  2755. halbtc8723d1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
  2756. 0x5);
  2757. }
  2758. halbtc8723d1ant_run_sw_coexist_mechanism(
  2759. btcoexist); /* just print debug message */
  2760. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  2761. if (bt_hs_on) {
  2762. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2763. "############# [BTCoex], BT Is hs\n");
  2764. BTC_TRACE(trace_buf);
  2765. halbtc8723d1ant_action_bt_hs(btcoexist);
  2766. return;
  2767. }
  2768. if ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2769. coex_dm->bt_status) ||
  2770. (BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE ==
  2771. coex_dm->bt_status)) {
  2772. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2773. "############# [BTCoex], BT Is idle\n");
  2774. BTC_TRACE(trace_buf);
  2775. halbtc8723d1ant_action_bt_idle(btcoexist);
  2776. return;
  2777. }
  2778. if (scan || link || roam || under_4way) {
  2779. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2780. "[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
  2781. scan, link, roam, under_4way);
  2782. BTC_TRACE(trace_buf);
  2783. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2784. "[BTCoex], wifi is under linkscan process!!\n");
  2785. BTC_TRACE(trace_buf);
  2786. halbtc8723d1ant_action_wifi_linkscan_process(btcoexist);
  2787. } else if (wifi_connected) {
  2788. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2789. "[BTCoex], wifi is under connected!!\n");
  2790. BTC_TRACE(trace_buf);
  2791. halbtc8723d1ant_action_wifi_connected(btcoexist);
  2792. } else {
  2793. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2794. "[BTCoex], wifi is under not-connected!!\n");
  2795. BTC_TRACE(trace_buf);
  2796. halbtc8723d1ant_action_wifi_not_connected(btcoexist);
  2797. }
  2798. }
  2799. void halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  2800. {
  2801. /* force to reset coex mechanism */
  2802. halbtc8723d1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
  2803. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2804. "[BTCoex], Coex Mechanism Init!!\n");
  2805. BTC_TRACE(trace_buf);
  2806. coex_sta->pop_event_cnt = 0;
  2807. coex_sta->cnt_RemoteNameReq = 0;
  2808. coex_sta->cnt_ReInit = 0;
  2809. coex_sta->cnt_setupLink = 0;
  2810. coex_sta->cnt_IgnWlanAct = 0;
  2811. coex_sta->cnt_Page = 0;
  2812. coex_sta->cnt_RoleSwitch = 0;
  2813. halbtc8723d1ant_query_bt_info(btcoexist);
  2814. }
  2815. void halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
  2816. IN boolean back_up, IN boolean wifi_only)
  2817. {
  2818. u32 u32tmp1 = 0, u32tmp2 = 0;
  2819. u16 u16tmp1 = 0;
  2820. u8 u8tmp0 = 0, u8tmp1 = 0;
  2821. struct btc_board_info *board_info = &btcoexist->board_info;
  2822. u8 i = 0;
  2823. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2824. "[BTCoex], 1Ant Init HW Config!!\n");
  2825. BTC_TRACE(trace_buf);
  2826. #if BT_8723D_1ANT_COEX_DBG
  2827. u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  2828. 0x38);
  2829. u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  2830. 0x54);
  2831. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  2832. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  2833. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  2834. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2835. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before init_hw_config)\n",
  2836. u8tmp0, u16tmp1, u8tmp1);
  2837. BTC_TRACE(trace_buf);
  2838. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2839. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x (Before init_hw_config)\n",
  2840. u32tmp1, u32tmp2);
  2841. BTC_TRACE(trace_buf);
  2842. #endif
  2843. coex_sta->bt_coex_supported_feature = 0;
  2844. coex_sta->bt_coex_supported_version = 0;
  2845. coex_sta->bt_ble_scan_type = 0;
  2846. coex_sta->bt_ble_scan_para[0] = 0;
  2847. coex_sta->bt_ble_scan_para[1] = 0;
  2848. coex_sta->bt_ble_scan_para[2] = 0;
  2849. coex_sta->bt_reg_vendor_ac = 0xffff;
  2850. coex_sta->bt_reg_vendor_ae = 0xffff;
  2851. coex_sta->isolation_btween_wb = BT_8723D_1ANT_DEFAULT_ISOLATION;
  2852. coex_sta->gnt_error_cnt = 0;
  2853. coex_sta->bt_relink_downcount = 0;
  2854. for (i = 0; i <= 9; i++)
  2855. coex_sta->bt_afh_map[i] = 0;
  2856. /* 0xf0[15:12] --> Chip Cut information */
  2857. coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
  2858. 0xf1) & 0xf0) >> 4;
  2859. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
  2860. 0x1); /* enable TBTT nterrupt */
  2861. /* BT report packet sample rate */
  2862. btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5);
  2863. /* Init 0x778 = 0x1 for 1-Ant */
  2864. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1);
  2865. /* Enable PTA (3-wire function form BT side) */
  2866. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
  2867. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x1);
  2868. /* Enable PTA (tx/rx signal form WiFi side) */
  2869. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1);
  2870. halbtc8723d1ant_enable_gnt_to_gpio(btcoexist, true);
  2871. #if 0
  2872. /* check if WL firmware download ok */
  2873. if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
  2874. halbtc8723d1ant_post_state_to_bt(btcoexist,
  2875. BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
  2876. #endif
  2877. /* PTA parameter */
  2878. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
  2879. halbtc8723d1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  2880. psd_scan->ant_det_is_ant_det_available = true;
  2881. /* Antenna config */
  2882. if (wifi_only) {
  2883. coex_sta->concurrent_rx_mode_on = false;
  2884. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
  2885. FORCE_EXEC,
  2886. BT_8723D_1ANT_PHASE_WLANONLY_INIT);
  2887. btcoexist->stop_coex_dm = true;
  2888. } else {
  2889. /*Set BT polluted packet on for Tx rate adaptive not including Tx retry break by PTA, 0x45c[19] =1 */
  2890. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
  2891. coex_sta->concurrent_rx_mode_on = true;
  2892. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1);
  2893. /* RF 0x1[0] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx */
  2894. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x1, 0x0);
  2895. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  2896. FORCE_EXEC,
  2897. BT_8723D_1ANT_PHASE_COEX_INIT);
  2898. btcoexist->stop_coex_dm = false;
  2899. }
  2900. if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
  2901. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2902. "[BTCoex], ********** Single Antenna, Antenna at Main Port: S1**********\n");
  2903. BTC_TRACE(trace_buf);
  2904. } else {
  2905. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2906. "[BTCoex], ********** Single Antenna, Antenna at Aux Port: S0**********\n");
  2907. BTC_TRACE(trace_buf);
  2908. }
  2909. }
  2910. u32 halbtc8723d1ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
  2911. {
  2912. u8 j;
  2913. u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
  2914. u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
  2915. 174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
  2916. 32, 23, 15, 7, 0
  2917. };
  2918. if (val == 0)
  2919. return 0;
  2920. tmp = val;
  2921. while (1) {
  2922. if (tmp == 1)
  2923. break;
  2924. else {
  2925. tmp = (tmp >> 1);
  2926. shiftcount++;
  2927. }
  2928. }
  2929. val_integerd_b = shiftcount + 1;
  2930. tmp2 = 1;
  2931. for (j = 1; j <= val_integerd_b; j++)
  2932. tmp2 = tmp2 * 2;
  2933. tmp = (val * 100) / tmp2;
  2934. tindex = tmp / 5;
  2935. if (tindex > 20)
  2936. tindex = 20;
  2937. val_fractiond_b = table_fraction[tindex];
  2938. result = val_integerd_b * 100 - val_fractiond_b;
  2939. return result;
  2940. }
  2941. void halbtc8723d1ant_psd_show_antenna_detect_result(IN struct btc_coexist
  2942. *btcoexist)
  2943. {
  2944. u8 *cli_buf = btcoexist->cli_buf;
  2945. struct btc_board_info *board_info = &btcoexist->board_info;
  2946. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2947. "\r\n============[Antenna Detection info] ============\n");
  2948. CL_PRINTF(cli_buf);
  2949. if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT */
  2950. if (board_info->btdm_ant_num_by_ant_det == 1)
  2951. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2952. "\r\n %-35s = %s (%d~%d)",
  2953. "Ant Det Result", "1-Antenna",
  2954. BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT,
  2955. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
  2956. else {
  2957. if (psd_scan->ant_det_psd_scan_peak_val >
  2958. (BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
  2959. * 100)
  2960. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2961. "\r\n %-35s = %s (>%d)",
  2962. "Ant Det Result", "2-Antenna (Bad-Isolation)",
  2963. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2964. else
  2965. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2966. "\r\n %-35s = %s (%d~%d)",
  2967. "Ant Det Result", "2-Antenna (Good-Isolation)",
  2968. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION,
  2969. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2970. }
  2971. } else if (psd_scan->ant_det_result == 1)
  2972. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
  2973. "Ant Det Result", "2-Antenna (Bad-Isolation)",
  2974. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2975. else if (psd_scan->ant_det_result == 2)
  2976. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  2977. "Ant Det Result", "2-Antenna (Good-Isolation)",
  2978. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  2979. + psd_scan->ant_det_thres_offset,
  2980. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  2981. else
  2982. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  2983. "Ant Det Result", "1-Antenna",
  2984. BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT,
  2985. BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  2986. + psd_scan->ant_det_thres_offset);
  2987. CL_PRINTF(cli_buf);
  2988. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
  2989. "Antenna Detection Finish",
  2990. (board_info->btdm_ant_det_finish
  2991. ? "Yes" : "No"));
  2992. CL_PRINTF(cli_buf);
  2993. switch (psd_scan->ant_det_result) {
  2994. case 0:
  2995. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  2996. "(BT is not available)");
  2997. break;
  2998. case 1: /* 2-Ant bad-isolation */
  2999. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3000. "(BT is available)");
  3001. break;
  3002. case 2: /* 2-Ant good-isolation */
  3003. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3004. "(BT is available)");
  3005. break;
  3006. case 3: /* 1-Ant */
  3007. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3008. "(BT is available)");
  3009. break;
  3010. case 4:
  3011. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3012. "(Uncertainty result)");
  3013. break;
  3014. case 5:
  3015. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
  3016. break;
  3017. case 6:
  3018. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3019. "(WiFi is Scanning)");
  3020. break;
  3021. case 7:
  3022. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3023. "(BT is not idle)");
  3024. break;
  3025. case 8:
  3026. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3027. "(Abort by WiFi Scanning)");
  3028. break;
  3029. case 9:
  3030. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3031. "(Antenna Init is not ready)");
  3032. break;
  3033. case 10:
  3034. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3035. "(BT is Inquiry or page)");
  3036. break;
  3037. case 11:
  3038. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3039. "(BT is Disabled)");
  3040. case 12:
  3041. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3042. "(BT is available, result from BT");
  3043. break;
  3044. }
  3045. CL_PRINTF(cli_buf);
  3046. if (psd_scan->ant_det_result == 12) {
  3047. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
  3048. "PSD Scan Peak Value",
  3049. psd_scan->ant_det_psd_scan_peak_val / 100);
  3050. CL_PRINTF(cli_buf);
  3051. return;
  3052. }
  3053. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3054. "Ant Detect Total Count", psd_scan->ant_det_try_count);
  3055. CL_PRINTF(cli_buf);
  3056. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3057. "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
  3058. CL_PRINTF(cli_buf);
  3059. if ((!board_info->btdm_ant_det_finish) &&
  3060. (psd_scan->ant_det_result != 5))
  3061. return;
  3062. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
  3063. (psd_scan->ant_det_result ? "ok" : "fail"));
  3064. CL_PRINTF(cli_buf);
  3065. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
  3066. psd_scan->ant_det_bt_tx_time);
  3067. CL_PRINTF(cli_buf);
  3068. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
  3069. psd_scan->ant_det_bt_le_channel);
  3070. CL_PRINTF(cli_buf);
  3071. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
  3072. "WiFi PSD Cent-Ch/Offset/Span",
  3073. psd_scan->real_cent_freq, psd_scan->real_offset,
  3074. psd_scan->real_span);
  3075. CL_PRINTF(cli_buf);
  3076. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
  3077. "PSD Pre-Scan Peak Value",
  3078. psd_scan->ant_det_pre_psdscan_peak_val / 100);
  3079. CL_PRINTF(cli_buf);
  3080. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
  3081. "PSD Pre-Scan result",
  3082. (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
  3083. BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
  3084. + psd_scan->ant_det_thres_offset);
  3085. CL_PRINTF(cli_buf);
  3086. if (psd_scan->ant_det_result == 5)
  3087. return;
  3088. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
  3089. "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
  3090. CL_PRINTF(cli_buf);
  3091. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
  3092. "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
  3093. CL_PRINTF(cli_buf);
  3094. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
  3095. (board_info->tfbga_package) ? "Yes" : "No");
  3096. CL_PRINTF(cli_buf);
  3097. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3098. "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
  3099. CL_PRINTF(cli_buf);
  3100. }
  3101. void halbtc8723d1ant_psd_showdata(IN struct btc_coexist *btcoexist)
  3102. {
  3103. u8 *cli_buf = btcoexist->cli_buf;
  3104. u32 delta_freq_per_point;
  3105. u32 freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
  3106. if (psd_scan->ant_det_result == 12)
  3107. return;
  3108. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3109. "\r\n\n============[PSD info] (%d)============\n",
  3110. psd_scan->psd_gen_count);
  3111. CL_PRINTF(cli_buf);
  3112. if (psd_scan->psd_gen_count == 0) {
  3113. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
  3114. CL_PRINTF(cli_buf);
  3115. return;
  3116. }
  3117. if (psd_scan->psd_point == 0)
  3118. delta_freq_per_point = 0;
  3119. else
  3120. delta_freq_per_point = psd_scan->psd_band_width /
  3121. psd_scan->psd_point;
  3122. /* if (psd_scan->is_psd_show_max_only) */
  3123. if (0) {
  3124. psd_rep1 = psd_scan->psd_max_value / 100;
  3125. psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
  3126. freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
  3127. psd_scan->psd_max_value_point * delta_freq_per_point);
  3128. freq1 = freq / 1000000;
  3129. freq2 = freq / 1000 - freq1 * 1000;
  3130. if (freq2 < 100)
  3131. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3132. "\r\n Freq = %d.0%d MHz",
  3133. freq1, freq2);
  3134. else
  3135. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3136. "\r\n Freq = %d.%d MHz",
  3137. freq1, freq2);
  3138. if (psd_rep2 < 10)
  3139. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3140. ", Value = %d.0%d dB, (%d)\n",
  3141. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  3142. else
  3143. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3144. ", Value = %d.%d dB, (%d)\n",
  3145. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  3146. CL_PRINTF(cli_buf);
  3147. } else {
  3148. m = psd_scan->psd_start_point;
  3149. n = psd_scan->psd_start_point;
  3150. i = 1;
  3151. j = 1;
  3152. while (1) {
  3153. do {
  3154. freq = ((psd_scan->real_cent_freq - 20) *
  3155. 1000000 + m *
  3156. delta_freq_per_point);
  3157. freq1 = freq / 1000000;
  3158. freq2 = freq / 1000 - freq1 * 1000;
  3159. if (i == 1) {
  3160. if (freq2 == 0)
  3161. CL_SPRINTF(cli_buf,
  3162. BT_TMP_BUF_SIZE,
  3163. "\r\n Freq%6d.000",
  3164. freq1);
  3165. else if (freq2 < 100)
  3166. CL_SPRINTF(cli_buf,
  3167. BT_TMP_BUF_SIZE,
  3168. "\r\n Freq%6d.0%2d",
  3169. freq1,
  3170. freq2);
  3171. else
  3172. CL_SPRINTF(cli_buf,
  3173. BT_TMP_BUF_SIZE,
  3174. "\r\n Freq%6d.%3d",
  3175. freq1,
  3176. freq2);
  3177. } else if ((i % 8 == 0) ||
  3178. (m == psd_scan->psd_stop_point)) {
  3179. if (freq2 == 0)
  3180. CL_SPRINTF(cli_buf,
  3181. BT_TMP_BUF_SIZE,
  3182. "%6d.000\n", freq1);
  3183. else if (freq2 < 100)
  3184. CL_SPRINTF(cli_buf,
  3185. BT_TMP_BUF_SIZE,
  3186. "%6d.0%2d\n", freq1,
  3187. freq2);
  3188. else
  3189. CL_SPRINTF(cli_buf,
  3190. BT_TMP_BUF_SIZE,
  3191. "%6d.%3d\n", freq1,
  3192. freq2);
  3193. } else {
  3194. if (freq2 == 0)
  3195. CL_SPRINTF(cli_buf,
  3196. BT_TMP_BUF_SIZE,
  3197. "%6d.000", freq1);
  3198. else if (freq2 < 100)
  3199. CL_SPRINTF(cli_buf,
  3200. BT_TMP_BUF_SIZE,
  3201. "%6d.0%2d", freq1,
  3202. freq2);
  3203. else
  3204. CL_SPRINTF(cli_buf,
  3205. BT_TMP_BUF_SIZE,
  3206. "%6d.%3d", freq1,
  3207. freq2);
  3208. }
  3209. i++;
  3210. m++;
  3211. CL_PRINTF(cli_buf);
  3212. } while ((i <= 8) && (m <= psd_scan->psd_stop_point));
  3213. do {
  3214. psd_rep1 = psd_scan->psd_report_max_hold[n] /
  3215. 100;
  3216. psd_rep2 = psd_scan->psd_report_max_hold[n] -
  3217. psd_rep1 *
  3218. 100;
  3219. if (j == 1) {
  3220. if (psd_rep2 < 10)
  3221. CL_SPRINTF(cli_buf,
  3222. BT_TMP_BUF_SIZE,
  3223. "\r\n Val %7d.0%d",
  3224. psd_rep1,
  3225. psd_rep2);
  3226. else
  3227. CL_SPRINTF(cli_buf,
  3228. BT_TMP_BUF_SIZE,
  3229. "\r\n Val %7d.%d",
  3230. psd_rep1,
  3231. psd_rep2);
  3232. } else if ((j % 8 == 0) ||
  3233. (n == psd_scan->psd_stop_point)) {
  3234. if (psd_rep2 < 10)
  3235. CL_SPRINTF(cli_buf,
  3236. BT_TMP_BUF_SIZE,
  3237. "%7d.0%d\n", psd_rep1,
  3238. psd_rep2);
  3239. else
  3240. CL_SPRINTF(cli_buf,
  3241. BT_TMP_BUF_SIZE,
  3242. "%7d.%d\n", psd_rep1,
  3243. psd_rep2);
  3244. } else {
  3245. if (psd_rep2 < 10)
  3246. CL_SPRINTF(cli_buf,
  3247. BT_TMP_BUF_SIZE,
  3248. "%7d.0%d", psd_rep1,
  3249. psd_rep2);
  3250. else
  3251. CL_SPRINTF(cli_buf,
  3252. BT_TMP_BUF_SIZE,
  3253. "%7d.%d", psd_rep1,
  3254. psd_rep2);
  3255. }
  3256. j++;
  3257. n++;
  3258. CL_PRINTF(cli_buf);
  3259. } while ((j <= 8) && (n <= psd_scan->psd_stop_point));
  3260. if ((m > psd_scan->psd_stop_point) ||
  3261. (n > psd_scan->psd_stop_point))
  3262. break;
  3263. else {
  3264. i = 1;
  3265. j = 1;
  3266. }
  3267. }
  3268. }
  3269. }
  3270. #ifdef PLATFORM_WINDOWS
  3271. #pragma optimize("", off)
  3272. #endif
  3273. void halbtc8723d1ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
  3274. IN u32 gen_count)
  3275. {
  3276. u32 i = 0;
  3277. u32 loop_i_max = 0, loop_val_max = 0;
  3278. if (gen_count == 1) {
  3279. memcpy(psd_scan->psd_report_max_hold,
  3280. psd_scan->psd_report,
  3281. BT_8723D_1ANT_ANTDET_PSD_POINTS * sizeof(u32));
  3282. }
  3283. for (i = psd_scan->psd_start_point;
  3284. i <= psd_scan->psd_stop_point; i++) {
  3285. /* update max-hold value at each freq point */
  3286. if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
  3287. psd_scan->psd_report_max_hold[i] =
  3288. psd_scan->psd_report[i];
  3289. /* search the max value in this seep */
  3290. if (psd_scan->psd_report[i] > loop_val_max) {
  3291. loop_val_max = psd_scan->psd_report[i];
  3292. loop_i_max = i;
  3293. }
  3294. }
  3295. if (gen_count <= BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT)
  3296. psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
  3297. }
  3298. #ifdef PLATFORM_WINDOWS
  3299. #pragma optimize("", off)
  3300. #endif
  3301. u32 halbtc8723d1ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
  3302. {
  3303. /* reg 0x808[9:0]: FFT data x */
  3304. /* reg 0x808[22]: 0-->1 to get 1 FFT data y */
  3305. /* reg 0x8b4[15:0]: FFT data y report */
  3306. u32 val = 0, psd_report = 0;
  3307. int k = 0;
  3308. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3309. val &= 0xffbffc00;
  3310. val |= point;
  3311. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3312. val |= 0x00400000;
  3313. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3314. while (1) {
  3315. if (k++ > BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY)
  3316. break;
  3317. }
  3318. val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
  3319. psd_report = val & 0x0000ffff;
  3320. return psd_report;
  3321. }
  3322. #ifdef PLATFORM_WINDOWS
  3323. #pragma optimize("", off)
  3324. #endif
  3325. boolean halbtc8723d1ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
  3326. IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
  3327. IN u32 avgnum, IN u32 loopcnt)
  3328. {
  3329. u32 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
  3330. u32 points1 = 0, psd_report = 0;
  3331. u32 start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
  3332. u32 psd_center_freq = 20 * 10 ^ 6;
  3333. boolean outloop = false, scan , roam, is_sweep_ok = true;
  3334. u8 flag = 0;
  3335. u32 tmp = 0, u32tmp1 = 0;
  3336. u32 wifi_original_channel = 1;
  3337. u32 psd_sum = 0, avg_cnt = 0;
  3338. u32 i_max = 0, val_max = 0, val_max2 = 0;
  3339. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3340. "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
  3341. BTC_TRACE(trace_buf);
  3342. do {
  3343. switch (flag) {
  3344. case 0: /* Get PSD parameters */
  3345. default:
  3346. psd_scan->psd_band_width = 40 * 1000000;
  3347. psd_scan->psd_point = points;
  3348. psd_scan->psd_start_base = points / 2;
  3349. psd_scan->psd_avg_num = avgnum;
  3350. psd_scan->real_cent_freq = cent_freq;
  3351. psd_scan->real_offset = offset;
  3352. psd_scan->real_span = span;
  3353. points1 = psd_scan->psd_point;
  3354. delta_freq_per_point = psd_scan->psd_band_width /
  3355. psd_scan->psd_point;
  3356. /* PSD point setup */
  3357. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3358. val &= 0xffff0fff;
  3359. switch (psd_scan->psd_point) {
  3360. case 128:
  3361. val |= 0x0;
  3362. break;
  3363. case 256:
  3364. default:
  3365. val |= 0x00004000;
  3366. break;
  3367. case 512:
  3368. val |= 0x00008000;
  3369. break;
  3370. case 1024:
  3371. val |= 0x0000c000;
  3372. break;
  3373. }
  3374. switch (psd_scan->psd_avg_num) {
  3375. case 1:
  3376. val |= 0x0;
  3377. break;
  3378. case 8:
  3379. val |= 0x00001000;
  3380. break;
  3381. case 16:
  3382. val |= 0x00002000;
  3383. break;
  3384. case 32:
  3385. default:
  3386. val |= 0x00003000;
  3387. break;
  3388. }
  3389. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3390. flag = 1;
  3391. break;
  3392. case 1: /* calculate the PSD point index from freq/offset/span */
  3393. psd_center_freq = psd_scan->psd_band_width / 2 +
  3394. offset * (1000000);
  3395. start_p = psd_scan->psd_start_base + (psd_center_freq -
  3396. span * (1000000) / 2) / delta_freq_per_point;
  3397. psd_scan->psd_start_point = start_p -
  3398. psd_scan->psd_start_base;
  3399. stop_p = psd_scan->psd_start_base + (psd_center_freq +
  3400. span * (1000000) / 2) / delta_freq_per_point;
  3401. psd_scan->psd_stop_point = stop_p -
  3402. psd_scan->psd_start_base - 1;
  3403. flag = 2;
  3404. break;
  3405. case 2: /* set RF channel/BW/Mode */
  3406. /* set 3-wire off */
  3407. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  3408. val |= 0x00300000;
  3409. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  3410. /* CCK off */
  3411. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  3412. val &= 0xfeffffff;
  3413. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  3414. /* Tx-pause on */
  3415. btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
  3416. /* store WiFi original channel */
  3417. wifi_original_channel = btcoexist->btc_get_rf_reg(
  3418. btcoexist, BTC_RF_A, 0x18, 0x3ff);
  3419. /* Set RF channel */
  3420. if (cent_freq == 2484)
  3421. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  3422. 0x18, 0x3ff, 0xe);
  3423. else
  3424. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  3425. 0x18, 0x3ff, (cent_freq - 2412) / 5 +
  3426. 1); /* WiFi TRx Mask on */
  3427. /* save original RCK value */
  3428. u32tmp1 = btcoexist->btc_get_rf_reg(
  3429. btcoexist, BTC_RF_A, 0x1d, 0xfffff);
  3430. /* Enter debug mode */
  3431. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
  3432. 0x2, 0x1);
  3433. /* Set RF Rx filter corner */
  3434. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
  3435. 0xfffff, 0x2e);
  3436. /* Set RF mode = Rx, RF Gain = 0x320a0 */
  3437. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
  3438. 0xfffff, 0x320a0);
  3439. while (1) {
  3440. if (k++ > BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY)
  3441. break;
  3442. }
  3443. flag = 3;
  3444. break;
  3445. case 3:
  3446. psd_scan->psd_gen_count = 0;
  3447. for (j = 1; j <= loopcnt; j++) {
  3448. btcoexist->btc_get(btcoexist,
  3449. BTC_GET_BL_WIFI_SCAN, &scan);
  3450. btcoexist->btc_get(btcoexist,
  3451. BTC_GET_BL_WIFI_ROAM, &roam);
  3452. if (scan || roam) {
  3453. is_sweep_ok = false;
  3454. break;
  3455. }
  3456. memset(psd_scan->psd_report, 0,
  3457. psd_scan->psd_point * sizeof(u32));
  3458. start_p = psd_scan->psd_start_point +
  3459. psd_scan->psd_start_base;
  3460. stop_p = psd_scan->psd_stop_point +
  3461. psd_scan->psd_start_base + 1;
  3462. i = start_p;
  3463. point_index = 0;
  3464. while (i < stop_p) {
  3465. if (i >= points1)
  3466. psd_report =
  3467. halbtc8723d1ant_psd_getdata(
  3468. btcoexist, i - points1);
  3469. else
  3470. psd_report =
  3471. halbtc8723d1ant_psd_getdata(
  3472. btcoexist, i);
  3473. if (psd_report == 0)
  3474. tmp = 0;
  3475. else
  3476. /* tmp = 20*log10((double)psd_report); */
  3477. /* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
  3478. tmp = 6 * halbtc8723d1ant_psd_log2base(
  3479. btcoexist, psd_report);
  3480. n = i - psd_scan->psd_start_base;
  3481. psd_scan->psd_report[n] = tmp;
  3482. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3483. "Point=%d, psd_dB_data = %d\n",
  3484. i, psd_scan->psd_report[n]);
  3485. BTC_TRACE(trace_buf);
  3486. i++;
  3487. }
  3488. halbtc8723d1ant_psd_maxholddata(btcoexist, j);
  3489. psd_scan->psd_gen_count = j;
  3490. /*Accumulate Max PSD value in this loop if the value > threshold */
  3491. if (psd_scan->psd_loop_max_value[j - 1] >=
  3492. 4000) {
  3493. psd_sum = psd_sum +
  3494. psd_scan->psd_loop_max_value[j -
  3495. 1];
  3496. avg_cnt++;
  3497. }
  3498. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3499. "Loop=%d, Max_dB_data = %d\n",
  3500. j, psd_scan->psd_loop_max_value[j
  3501. - 1]);
  3502. BTC_TRACE(trace_buf);
  3503. }
  3504. if (loopcnt == BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT) {
  3505. /* search the Max Value between each-freq-point-max-hold value of all sweep*/
  3506. for (i = 1;
  3507. i <= BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT;
  3508. i++) {
  3509. if (i == 1) {
  3510. i_max = i;
  3511. val_max = psd_scan->psd_loop_max_value[i
  3512. - 1];
  3513. val_max2 =
  3514. psd_scan->psd_loop_max_value[i
  3515. - 1];
  3516. } else if (
  3517. psd_scan->psd_loop_max_value[i -
  3518. 1] > val_max) {
  3519. val_max2 = val_max;
  3520. i_max = i;
  3521. val_max = psd_scan->psd_loop_max_value[i
  3522. - 1];
  3523. } else if (
  3524. psd_scan->psd_loop_max_value[i -
  3525. 1] > val_max2)
  3526. val_max2 =
  3527. psd_scan->psd_loop_max_value[i
  3528. - 1];
  3529. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3530. "i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
  3531. i, psd_scan->psd_loop_max_value[i
  3532. - 1],
  3533. val_max, val_max2);
  3534. BTC_TRACE(trace_buf);
  3535. }
  3536. psd_scan->psd_max_value_point = i_max;
  3537. psd_scan->psd_max_value = val_max;
  3538. psd_scan->psd_max_value2 = val_max2;
  3539. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3540. "val_max = %d, val_max2 = %d\n",
  3541. psd_scan->psd_max_value,
  3542. psd_scan->psd_max_value2);
  3543. BTC_TRACE(trace_buf);
  3544. }
  3545. if (avg_cnt != 0) {
  3546. psd_scan->psd_avg_value = (psd_sum / avg_cnt);
  3547. if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
  3548. psd_scan->psd_avg_value++;
  3549. } else
  3550. psd_scan->psd_avg_value = 0;
  3551. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3552. "AvgLoop=%d, Avg_dB_data = %d\n",
  3553. avg_cnt, psd_scan->psd_avg_value);
  3554. BTC_TRACE(trace_buf);
  3555. flag = 100;
  3556. break;
  3557. case 99: /* error */
  3558. outloop = true;
  3559. break;
  3560. case 100: /* recovery */
  3561. /* set 3-wire on */
  3562. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  3563. val &= 0xffcfffff;
  3564. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  3565. /* CCK on */
  3566. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  3567. val |= 0x01000000;
  3568. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  3569. /* Tx-pause off */
  3570. btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
  3571. /* PSD off */
  3572. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3573. val &= 0xffbfffff;
  3574. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3575. /* restore RF Rx filter corner */
  3576. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
  3577. 0xfffff, u32tmp1);
  3578. /* Exit debug mode */
  3579. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
  3580. 0x2, 0x0);
  3581. /* restore WiFi original channel */
  3582. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
  3583. 0x3ff, wifi_original_channel);
  3584. outloop = true;
  3585. break;
  3586. }
  3587. } while (!outloop);
  3588. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3589. "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
  3590. BTC_TRACE(trace_buf);
  3591. return is_sweep_ok;
  3592. }
  3593. #ifdef PLATFORM_WINDOWS
  3594. #pragma optimize("", off)
  3595. #endif
  3596. boolean halbtc8723d1ant_psd_antenna_detection(IN struct btc_coexist
  3597. *btcoexist)
  3598. {
  3599. u32 i = 0;
  3600. u32 wlpsd_cent_freq = 2484, wlpsd_span = 2;
  3601. s32 wlpsd_offset = -4;
  3602. u32 bt_tx_time, bt_le_channel;
  3603. u8 bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
  3604. u8 h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
  3605. u8 state = 0;
  3606. boolean outloop = false, bt_resp = false, ant_det_finish = false;
  3607. u32 freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
  3608. u32tmp, u32tmp0, u32tmp1, u32tmp2 ;
  3609. struct btc_board_info *board_info = &btcoexist->board_info;
  3610. memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
  3611. memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
  3612. psd_scan->ant_det_bt_tx_time =
  3613. BT_8723D_1ANT_ANTDET_BTTXTIME; /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
  3614. psd_scan->ant_det_bt_le_channel = BT_8723D_1ANT_ANTDET_BTTXCHANNEL;
  3615. bt_tx_time = psd_scan->ant_det_bt_tx_time;
  3616. bt_le_channel = psd_scan->ant_det_bt_le_channel;
  3617. if (board_info->tfbga_package) /* for TFBGA */
  3618. psd_scan->ant_det_thres_offset = 5;
  3619. else
  3620. psd_scan->ant_det_thres_offset = 0;
  3621. do {
  3622. switch (state) {
  3623. case 0:
  3624. if (bt_le_channel == 39)
  3625. wlpsd_cent_freq = 2484;
  3626. else {
  3627. for (i = 1; i <= 13; i++) {
  3628. if (bt_le_ch[i - 1] ==
  3629. bt_le_channel) {
  3630. wlpsd_cent_freq = 2412
  3631. + (i - 1) * 5;
  3632. break;
  3633. }
  3634. }
  3635. if (i == 14) {
  3636. BTC_SPRINTF(trace_buf,
  3637. BT_TMP_BUF_SIZE,
  3638. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
  3639. bt_le_channel);
  3640. BTC_TRACE(trace_buf);
  3641. outloop = true;
  3642. break;
  3643. }
  3644. }
  3645. #if 0
  3646. wlpsd_sweep_count = bt_tx_time * 238 /
  3647. 100; /* bt_tx_time/0.42 */
  3648. wlpsd_sweep_count = wlpsd_sweep_count / 5;
  3649. if (wlpsd_sweep_count % 5 != 0)
  3650. wlpsd_sweep_count = (wlpsd_sweep_count /
  3651. 5 + 1) * 5;
  3652. #endif
  3653. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3654. "xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n",
  3655. bt_tx_time, bt_le_channel);
  3656. BTC_TRACE(trace_buf);
  3657. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3658. "xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d, wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
  3659. wlpsd_cent_freq,
  3660. wlpsd_offset,
  3661. wlpsd_span,
  3662. BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT);
  3663. BTC_TRACE(trace_buf);
  3664. state = 1;
  3665. break;
  3666. case 1: /* stop coex DM & set antenna path */
  3667. /* Stop Coex DM */
  3668. btcoexist->stop_coex_dm = true;
  3669. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3670. "xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
  3671. BTC_TRACE(trace_buf);
  3672. /* Set TDMA off, */
  3673. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC,
  3674. false, 0);
  3675. /* Set coex table */
  3676. halbtc8723d1ant_coex_table_with_type(btcoexist,
  3677. FORCE_EXEC, 0);
  3678. if (board_info->btdm_ant_pos ==
  3679. BTC_ANTENNA_AT_MAIN_PORT) {
  3680. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3681. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
  3682. BTC_TRACE(trace_buf);
  3683. } else {
  3684. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3685. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
  3686. BTC_TRACE(trace_buf);
  3687. }
  3688. /* Set Antenna path, switch WiFi to un-certain antenna port */
  3689. /* Set Antenna Path, both GNT_WL/GNT_BT = 1, and control by SW */
  3690. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  3691. FORCE_EXEC,
  3692. BT_8723D_1ANT_PHASE_ANTENNA_DET);
  3693. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3694. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
  3695. BTC_TRACE(trace_buf);
  3696. /* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
  3697. h2c_parameter[0] = 0x1;
  3698. h2c_parameter[1] = 0xd;
  3699. h2c_parameter[2] = 0x14;
  3700. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3701. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  3702. h2c_parameter[1],
  3703. h2c_parameter[2]);
  3704. BTC_TRACE(trace_buf);
  3705. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  3706. h2c_parameter);
  3707. u32tmp = btcoexist->btc_read_2byte(btcoexist, 0x948);
  3708. u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
  3709. u32tmp1 = halbtc8723d1ant_ltecoex_indirect_read_reg(
  3710. btcoexist, 0x38);
  3711. u32tmp2 = halbtc8723d1ant_ltecoex_indirect_read_reg(
  3712. btcoexist, 0x54);
  3713. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3714. "[BTCoex], ********** 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det)\n",
  3715. u32tmp, u32tmp0, u32tmp1, u32tmp2);
  3716. BTC_TRACE(trace_buf);
  3717. state = 2;
  3718. break;
  3719. case 2: /* Pre-sweep background psd */
  3720. if (!halbtc8723d1ant_psd_sweep_point(btcoexist,
  3721. wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
  3722. BT_8723D_1ANT_ANTDET_PSD_POINTS,
  3723. BT_8723D_1ANT_ANTDET_PSD_AVGNUM, 3)) {
  3724. ant_det_finish = false;
  3725. board_info->btdm_ant_num_by_ant_det = 1;
  3726. psd_scan->ant_det_result = 8;
  3727. state = 99;
  3728. break;
  3729. }
  3730. psd_scan->ant_det_pre_psdscan_peak_val =
  3731. psd_scan->psd_max_value;
  3732. if (psd_scan->ant_det_pre_psdscan_peak_val >
  3733. (BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
  3734. + psd_scan->ant_det_thres_offset) * 100) {
  3735. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3736. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
  3737. psd_scan->ant_det_pre_psdscan_peak_val /
  3738. 100,
  3739. BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
  3740. + psd_scan->ant_det_thres_offset);
  3741. BTC_TRACE(trace_buf);
  3742. ant_det_finish = false;
  3743. board_info->btdm_ant_num_by_ant_det = 1;
  3744. psd_scan->ant_det_result = 5;
  3745. state = 99;
  3746. } else {
  3747. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3748. "xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
  3749. psd_scan->ant_det_pre_psdscan_peak_val /
  3750. 100,
  3751. BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND
  3752. + psd_scan->ant_det_thres_offset);
  3753. BTC_TRACE(trace_buf);
  3754. state = 3;
  3755. }
  3756. break;
  3757. case 3:
  3758. bt_resp = btcoexist->btc_set_bt_ant_detection(
  3759. btcoexist, (u8)(bt_tx_time & 0xff),
  3760. (u8)(bt_le_channel & 0xff));
  3761. /* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
  3762. delay_ms(20);
  3763. if (!halbtc8723d1ant_psd_sweep_point(btcoexist,
  3764. wlpsd_cent_freq, wlpsd_offset,
  3765. wlpsd_span,
  3766. BT_8723D_1ANT_ANTDET_PSD_POINTS,
  3767. BT_8723D_1ANT_ANTDET_PSD_AVGNUM,
  3768. BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT)) {
  3769. ant_det_finish = false;
  3770. board_info->btdm_ant_num_by_ant_det = 1;
  3771. psd_scan->ant_det_result = 8;
  3772. state = 99;
  3773. break;
  3774. }
  3775. #if 1
  3776. psd_scan->ant_det_psd_scan_peak_val =
  3777. psd_scan->psd_max_value;
  3778. #endif
  3779. #if 0
  3780. psd_scan->ant_det_psd_scan_peak_val =
  3781. ((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
  3782. 800) ?
  3783. psd_scan->psd_max_value : ((
  3784. psd_scan->psd_max_value -
  3785. psd_scan->psd_max_value2 <= 300) ?
  3786. psd_scan->psd_avg_value :
  3787. psd_scan->psd_max_value2);
  3788. #endif
  3789. psd_scan->ant_det_psd_scan_peak_freq =
  3790. psd_scan->psd_max_value_point;
  3791. state = 4;
  3792. break;
  3793. case 4:
  3794. if (psd_scan->psd_point == 0)
  3795. delta_freq_per_point = 0;
  3796. else
  3797. delta_freq_per_point =
  3798. psd_scan->psd_band_width /
  3799. psd_scan->psd_point;
  3800. psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
  3801. psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
  3802. psd_rep1 *
  3803. 100;
  3804. freq = ((psd_scan->real_cent_freq - 20) *
  3805. 1000000 + psd_scan->psd_max_value_point
  3806. * delta_freq_per_point);
  3807. freq1 = freq / 1000000;
  3808. freq2 = freq / 1000 - freq1 * 1000;
  3809. if (freq2 < 100) {
  3810. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3811. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
  3812. freq1, freq2);
  3813. BTC_TRACE(trace_buf);
  3814. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  3815. BT_8723D_1ANT_ANTDET_BUF_LEN,
  3816. "%d.0%d", freq1, freq2);
  3817. } else {
  3818. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3819. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
  3820. freq1, freq2);
  3821. BTC_TRACE(trace_buf);
  3822. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  3823. BT_8723D_1ANT_ANTDET_BUF_LEN,
  3824. "%d.%d", freq1, freq2);
  3825. }
  3826. if (psd_rep2 < 10) {
  3827. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3828. ", Value = %d.0%d dB\n",
  3829. psd_rep1, psd_rep2);
  3830. BTC_TRACE(trace_buf);
  3831. CL_SPRINTF(psd_scan->ant_det_peak_val,
  3832. BT_8723D_1ANT_ANTDET_BUF_LEN,
  3833. "%d.0%d", psd_rep1, psd_rep2);
  3834. } else {
  3835. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3836. ", Value = %d.%d dB\n",
  3837. psd_rep1, psd_rep2);
  3838. BTC_TRACE(trace_buf);
  3839. CL_SPRINTF(psd_scan->ant_det_peak_val,
  3840. BT_8723D_1ANT_ANTDET_BUF_LEN,
  3841. "%d.%d", psd_rep1, psd_rep2);
  3842. }
  3843. psd_scan->ant_det_is_btreply_available = true;
  3844. if (bt_resp == false) {
  3845. psd_scan->ant_det_is_btreply_available =
  3846. false;
  3847. psd_scan->ant_det_result = 0;
  3848. ant_det_finish = false;
  3849. board_info->btdm_ant_num_by_ant_det = 1;
  3850. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3851. "xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
  3852. BTC_TRACE(trace_buf);
  3853. } else if (psd_scan->ant_det_psd_scan_peak_val >
  3854. (BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
  3855. * 100) {
  3856. psd_scan->ant_det_result = 1;
  3857. ant_det_finish = true;
  3858. board_info->btdm_ant_num_by_ant_det = 2;
  3859. coex_sta->isolation_btween_wb = (u8)(85 -
  3860. psd_scan->ant_det_psd_scan_peak_val /
  3861. 100) & 0xff;
  3862. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3863. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
  3864. BTC_TRACE(trace_buf);
  3865. } else if (psd_scan->ant_det_psd_scan_peak_val >
  3866. (BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  3867. + psd_scan->ant_det_thres_offset) * 100) {
  3868. psd_scan->ant_det_result = 2;
  3869. ant_det_finish = true;
  3870. board_info->btdm_ant_num_by_ant_det = 2;
  3871. coex_sta->isolation_btween_wb = (u8)(85 -
  3872. psd_scan->ant_det_psd_scan_peak_val /
  3873. 100) & 0xff;
  3874. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3875. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
  3876. BTC_TRACE(trace_buf);
  3877. } else if (psd_scan->ant_det_psd_scan_peak_val >
  3878. (BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT) *
  3879. 100) {
  3880. psd_scan->ant_det_result = 3;
  3881. ant_det_finish = true;
  3882. board_info->btdm_ant_num_by_ant_det = 1;
  3883. coex_sta->isolation_btween_wb = (u8)(85 -
  3884. psd_scan->ant_det_psd_scan_peak_val /
  3885. 100) & 0xff;
  3886. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3887. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
  3888. BTC_TRACE(trace_buf);
  3889. } else {
  3890. psd_scan->ant_det_result = 4;
  3891. ant_det_finish = false;
  3892. board_info->btdm_ant_num_by_ant_det = 1;
  3893. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3894. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
  3895. BTC_TRACE(trace_buf);
  3896. }
  3897. state = 99;
  3898. break;
  3899. case 99: /* restore setup */
  3900. /* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
  3901. h2c_parameter[0] = 0x0;
  3902. h2c_parameter[1] = 0x0;
  3903. h2c_parameter[2] = 0x0;
  3904. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3905. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  3906. h2c_parameter[1], h2c_parameter[2]);
  3907. BTC_TRACE(trace_buf);
  3908. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  3909. h2c_parameter);
  3910. /* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
  3911. /* Set Antenna path, switch WiFi to certain antenna port */
  3912. halbtc8723d1ant_set_ant_path(btcoexist,
  3913. BTC_ANT_PATH_AUTO, FORCE_EXEC,
  3914. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  3915. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3916. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
  3917. BTC_TRACE(trace_buf);
  3918. btcoexist->stop_coex_dm = false;
  3919. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3920. "xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
  3921. BTC_TRACE(trace_buf);
  3922. outloop = true;
  3923. break;
  3924. }
  3925. } while (!outloop);
  3926. return ant_det_finish;
  3927. }
  3928. #ifdef PLATFORM_WINDOWS
  3929. #pragma optimize("", off)
  3930. #endif
  3931. boolean halbtc8723d1ant_psd_antenna_detection_check(IN struct btc_coexist
  3932. *btcoexist)
  3933. {
  3934. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  3935. struct btc_board_info *board_info = &btcoexist->board_info;
  3936. boolean scan, roam, ant_det_finish = false;
  3937. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  3938. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  3939. ant_det_count++;
  3940. psd_scan->ant_det_try_count = ant_det_count;
  3941. if (scan || roam) {
  3942. ant_det_finish = false;
  3943. psd_scan->ant_det_result = 6;
  3944. } else if (coex_sta->bt_disabled) {
  3945. ant_det_finish = false;
  3946. psd_scan->ant_det_result = 11;
  3947. } else if (coex_sta->num_of_profile >= 1) {
  3948. ant_det_finish = false;
  3949. psd_scan->ant_det_result = 7;
  3950. } else if (
  3951. !psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
  3952. ant_det_finish = false;
  3953. psd_scan->ant_det_result = 9;
  3954. } else if (coex_sta->c2h_bt_inquiry_page) {
  3955. ant_det_finish = false;
  3956. psd_scan->ant_det_result = 10;
  3957. } else {
  3958. ant_det_finish = halbtc8723d1ant_psd_antenna_detection(
  3959. btcoexist);
  3960. delay_ms(psd_scan->ant_det_bt_tx_time);
  3961. }
  3962. /* board_info->ant_det_result = psd_scan->ant_det_result; */
  3963. if (!ant_det_finish)
  3964. ant_det_fail_count++;
  3965. psd_scan->ant_det_fail_count = ant_det_fail_count;
  3966. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3967. "xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
  3968. psd_scan->ant_det_result,
  3969. psd_scan->ant_det_fail_count,
  3970. ant_det_finish == true ? "Yes" : "No");
  3971. BTC_TRACE(trace_buf);
  3972. return ant_det_finish;
  3973. }
  3974. /* ************************************************************
  3975. * work around function start with wa_halbtc8723d1ant_
  3976. * ************************************************************
  3977. * ************************************************************
  3978. * extern function start with ex_halbtc8723d1ant_
  3979. * ************************************************************ */
  3980. void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist)
  3981. {
  3982. struct btc_board_info *board_info = &btcoexist->board_info;
  3983. u8 u8tmp = 0x0;
  3984. u16 u16tmp = 0x0;
  3985. u32 value = 0;
  3986. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3987. "xxxxxxxxxxxxxxxx Execute 8723d 1-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n");
  3988. BTC_TRACE(trace_buf);
  3989. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3990. "Ant Det Finish = %s, Ant Det Number = %d\n",
  3991. (board_info->btdm_ant_det_finish ? "Yes" : "No"),
  3992. board_info->btdm_ant_num_by_ant_det);
  3993. BTC_TRACE(trace_buf);
  3994. btcoexist->stop_coex_dm = true;
  3995. psd_scan->ant_det_is_ant_det_available = false;
  3996. /* enable BB, REG_SYS_FUNC_EN such that we can write BB Register correctly. */
  3997. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
  3998. btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
  3999. /* Local setting bit define */
  4000. /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
  4001. /* BIT1: "0" for internal switch; "1" for external switch */
  4002. /* BIT2: "0" for one antenna; "1" for two antenna */
  4003. /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
  4004. /* Set Antenna Path to BT side */
  4005. /* Check efuse 0xc3[6] for Single Antenna Path */
  4006. if (board_info->single_ant_path == 0) {
  4007. /* set to S1 */
  4008. board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
  4009. u8tmp = 0;
  4010. value = 1;
  4011. } else if (board_info->single_ant_path == 1) {
  4012. /* set to S0 */
  4013. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  4014. u8tmp = 1;
  4015. value = 0;
  4016. }
  4017. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4018. "[BTCoex], ********** (Power On) single_ant_path = %d, btdm_ant_pos = %d **********\n",
  4019. board_info->single_ant_path , board_info->btdm_ant_pos);
  4020. BTC_TRACE(trace_buf);
  4021. /* Set Antenna Path to BT side */
  4022. halbtc8723d1ant_set_ant_path(btcoexist,
  4023. BTC_ANT_PATH_AUTO,
  4024. FORCE_EXEC,
  4025. BT_8723D_1ANT_PHASE_COEX_POWERON);
  4026. /* Write Single Antenna Position to Registry to tell BT for 8723d. This line can be removed
  4027. since BT EFuse also add "single antenna position" in EFuse for 8723d*/
  4028. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
  4029. &value);
  4030. /* Save"single antenna position" info in Local register setting for FW reading, because FW may not ready at power on */
  4031. if (btcoexist->chip_interface == BTC_INTF_PCI)
  4032. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0, u8tmp);
  4033. else if (btcoexist->chip_interface == BTC_INTF_USB)
  4034. btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
  4035. else if (btcoexist->chip_interface == BTC_INTF_SDIO)
  4036. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp);
  4037. /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
  4038. halbtc8723d1ant_enable_gnt_to_gpio(btcoexist, true);
  4039. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4040. "[BTCoex], ********** LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
  4041. halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38));
  4042. BTC_TRACE(trace_buf);
  4043. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4044. "[BTCoex], ********** MAC Reg 0x70/ BB Reg 0x948 (Power-On) = 0x%x / 0x%x**********\n",
  4045. btcoexist->btc_read_4byte(btcoexist, 0x70),
  4046. btcoexist->btc_read_2byte(btcoexist, 0x948));
  4047. BTC_TRACE(trace_buf);
  4048. }
  4049. void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
  4050. {
  4051. }
  4052. void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
  4053. IN boolean wifi_only)
  4054. {
  4055. halbtc8723d1ant_init_hw_config(btcoexist, true, wifi_only);
  4056. }
  4057. void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  4058. {
  4059. halbtc8723d1ant_init_coex_dm(btcoexist);
  4060. }
  4061. void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist)
  4062. {
  4063. struct btc_board_info *board_info = &btcoexist->board_info;
  4064. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  4065. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  4066. u8 *cli_buf = btcoexist->cli_buf;
  4067. u8 u8tmp[4], i, ps_tdma_case = 0;
  4068. u16 u16tmp[4];
  4069. u32 u32tmp[4];
  4070. u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck;
  4071. u32 fw_ver = 0, bt_patch_ver = 0, bt_coex_ver = 0;
  4072. static u8 pop_report_in_10s = 0, cnt = 0;
  4073. u32 phyver = 0;
  4074. boolean lte_coex_on = false;
  4075. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4076. "\r\n ============[BT Coexist info]============");
  4077. CL_PRINTF(cli_buf);
  4078. if (btcoexist->manual_control) {
  4079. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4080. "\r\n ============[Under Manual Control]============");
  4081. CL_PRINTF(cli_buf);
  4082. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4083. "\r\n ==========================================");
  4084. CL_PRINTF(cli_buf);
  4085. }
  4086. if (btcoexist->stop_coex_dm) {
  4087. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4088. "\r\n ============[Coex is STOPPED]============");
  4089. CL_PRINTF(cli_buf);
  4090. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4091. "\r\n ==========================================");
  4092. CL_PRINTF(cli_buf);
  4093. }
  4094. if (!coex_sta->bt_disabled) {
  4095. if (coex_sta->bt_coex_supported_feature == 0)
  4096. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
  4097. &coex_sta->bt_coex_supported_feature);
  4098. if ((coex_sta->bt_coex_supported_version == 0) ||
  4099. (coex_sta->bt_coex_supported_version == 0xffff))
  4100. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
  4101. &coex_sta->bt_coex_supported_version);
  4102. if (coex_sta->bt_reg_vendor_ac == 0xffff)
  4103. coex_sta->bt_reg_vendor_ac = (u16)(
  4104. btcoexist->btc_get_bt_reg(btcoexist, 3,
  4105. 0xac) & 0xffff);
  4106. if (coex_sta->bt_reg_vendor_ae == 0xffff)
  4107. coex_sta->bt_reg_vendor_ae = (u16)(
  4108. btcoexist->btc_get_bt_reg(btcoexist, 3,
  4109. 0xae) & 0xffff);
  4110. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
  4111. &bt_patch_ver);
  4112. btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
  4113. if (coex_sta->num_of_profile > 0) {
  4114. cnt++;
  4115. if (cnt >= 3) {
  4116. btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
  4117. &coex_sta->bt_afh_map[0]);
  4118. cnt = 0;
  4119. }
  4120. }
  4121. }
  4122. if (psd_scan->ant_det_try_count == 0) {
  4123. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
  4124. "Ant PG Num/ Mech/ Pos",
  4125. board_info->pg_ant_num, board_info->btdm_ant_num,
  4126. (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
  4127. CL_PRINTF(cli_buf);
  4128. } else {
  4129. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4130. "\r\n %-35s = %d/ %d/ %s (%d/%d/%d)",
  4131. "Ant PG Num/ Mech(Ant_Det)/ Pos",
  4132. board_info->pg_ant_num,
  4133. board_info->btdm_ant_num_by_ant_det,
  4134. (board_info->btdm_ant_pos == 1 ? "S1" : "S0"),
  4135. psd_scan->ant_det_try_count,
  4136. psd_scan->ant_det_fail_count,
  4137. psd_scan->ant_det_result);
  4138. CL_PRINTF(cli_buf);
  4139. if (board_info->btdm_ant_det_finish) {
  4140. if (psd_scan->ant_det_result != 12)
  4141. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4142. "\r\n %-35s = %s",
  4143. "Ant Det PSD Value",
  4144. psd_scan->ant_det_peak_val);
  4145. else
  4146. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4147. "\r\n %-35s = %d",
  4148. "Ant Det PSD Value",
  4149. psd_scan->ant_det_psd_scan_peak_val
  4150. / 100);
  4151. CL_PRINTF(cli_buf);
  4152. }
  4153. }
  4154. if (board_info->ant_det_result_five_complete) {
  4155. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4156. "\r\n %-35s = %d/ %d",
  4157. "AntDet(Registry) Num/PSD Value",
  4158. board_info->btdm_ant_num_by_ant_det,
  4159. (board_info->antdetval & 0x7f));
  4160. CL_PRINTF(cli_buf);
  4161. }
  4162. bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
  4163. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  4164. phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
  4165. bt_coex_ver = ((coex_sta->bt_coex_supported_version & 0xff00) >> 8);
  4166. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4167. "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
  4168. "CoexVer WL/ BT_Desired/ BT_Report",
  4169. glcoex_ver_date_8723d_1ant, glcoex_ver_8723d_1ant,
  4170. glcoex_ver_btdesired_8723d_1ant,
  4171. bt_coex_ver,
  4172. (bt_coex_ver == 0xff ? "Unknown" :
  4173. (coex_sta->bt_disabled ? "BT-disable" :
  4174. (bt_coex_ver >= glcoex_ver_btdesired_8723d_1ant ?
  4175. "Match" : "Mis-Match"))));
  4176. CL_PRINTF(cli_buf);
  4177. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4178. "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
  4179. "W_FW/ B_FW/ Phy/ Kt",
  4180. fw_ver, bt_patch_ver, phyver,
  4181. coex_sta->cut_version + 65);
  4182. CL_PRINTF(cli_buf);
  4183. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
  4184. "Wifi channel informed to BT",
  4185. coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
  4186. coex_dm->wifi_chnl_info[2]);
  4187. CL_PRINTF(cli_buf);
  4188. /* wifi status */
  4189. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4190. "============[Wifi Status]============");
  4191. CL_PRINTF(cli_buf);
  4192. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
  4193. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4194. "============[BT Status]============");
  4195. CL_PRINTF(cli_buf);
  4196. pop_report_in_10s++;
  4197. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4198. "\r\n %-35s = [%s/ %d dBm/ %d/ %d] ",
  4199. "BT [status/ rssi/ retryCnt/ popCnt]",
  4200. ((coex_sta->bt_disabled) ? ("disabled") : ((
  4201. coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page")
  4202. : ((BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  4203. coex_dm->bt_status) ? "non-connected idle" :
  4204. ((BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
  4205. ? "connected-idle" : "busy")))),
  4206. coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
  4207. coex_sta->pop_event_cnt);
  4208. CL_PRINTF(cli_buf);
  4209. if (pop_report_in_10s >= 5) {
  4210. coex_sta->pop_event_cnt = 0;
  4211. pop_report_in_10s = 0;
  4212. }
  4213. if (coex_sta->num_of_profile != 0)
  4214. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4215. "\r\n %-35s = %s%s%s%s%s",
  4216. "Profiles",
  4217. ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
  4218. ((bt_link_info->sco_exist) ? "SCO," : ""),
  4219. ((bt_link_info->hid_exist) ?
  4220. ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
  4221. "HID(2/18),") : ""),
  4222. ((bt_link_info->pan_exist) ? "PAN," : ""),
  4223. ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
  4224. else
  4225. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4226. "\r\n %-35s = None",
  4227. "Profiles");
  4228. CL_PRINTF(cli_buf);
  4229. if (bt_link_info->a2dp_exist) {
  4230. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s",
  4231. "A2DP Rate/Bitpool/Auto_Slot",
  4232. ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
  4233. coex_sta->a2dp_bit_pool,
  4234. ((coex_sta->is_autoslot) ? "On" : "Off")
  4235. );
  4236. CL_PRINTF(cli_buf);
  4237. }
  4238. if (bt_link_info->hid_exist) {
  4239. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4240. "HID PairNum/Forbid_Slot",
  4241. coex_sta->hid_pair_cnt,
  4242. coex_sta->forbidden_slot
  4243. );
  4244. CL_PRINTF(cli_buf);
  4245. }
  4246. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s/ 0x%x",
  4247. "Role/RoleSwCnt/IgnWlact/Feature",
  4248. ((bt_link_info->slave_role) ? "Slave" : "Master"),
  4249. coex_sta->cnt_RoleSwitch,
  4250. ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
  4251. coex_sta->bt_coex_supported_feature);
  4252. CL_PRINTF(cli_buf);
  4253. if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
  4254. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4255. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4256. "BLEScan Type/TV/Init/Ble",
  4257. coex_sta->bt_ble_scan_type,
  4258. (coex_sta->bt_ble_scan_type & 0x1 ?
  4259. coex_sta->bt_ble_scan_para[0] : 0x0),
  4260. (coex_sta->bt_ble_scan_type & 0x2 ?
  4261. coex_sta->bt_ble_scan_para[1] : 0x0),
  4262. (coex_sta->bt_ble_scan_type & 0x4 ?
  4263. coex_sta->bt_ble_scan_para[2] : 0x0));
  4264. CL_PRINTF(cli_buf);
  4265. }
  4266. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
  4267. "ReInit/ReLink/IgnWlact/Page/NameReq",
  4268. coex_sta->cnt_ReInit,
  4269. coex_sta->cnt_setupLink,
  4270. coex_sta->cnt_IgnWlanAct,
  4271. coex_sta->cnt_Page,
  4272. coex_sta->cnt_RemoteNameReq
  4273. );
  4274. CL_PRINTF(cli_buf);
  4275. halbtc8723d1ant_read_score_board(btcoexist, &u16tmp[0]);
  4276. if ((coex_sta->bt_reg_vendor_ae == 0xffff) ||
  4277. (coex_sta->bt_reg_vendor_ac == 0xffff))
  4278. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = x/ x/ %04x",
  4279. "0xae[4]/0xac[1:0]/Scoreboard", u16tmp[0]);
  4280. else
  4281. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4282. "\r\n %-35s = 0x%x/ 0x%x/ %04x",
  4283. "0xae[4]/0xac[1:0]/Scoreboard",
  4284. ((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
  4285. coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
  4286. CL_PRINTF(cli_buf);
  4287. if (coex_sta->num_of_profile > 0) {
  4288. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4289. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
  4290. "AFH MAP",
  4291. coex_sta->bt_afh_map[0],
  4292. coex_sta->bt_afh_map[1],
  4293. coex_sta->bt_afh_map[2],
  4294. coex_sta->bt_afh_map[3],
  4295. coex_sta->bt_afh_map[4],
  4296. coex_sta->bt_afh_map[5],
  4297. coex_sta->bt_afh_map[6],
  4298. coex_sta->bt_afh_map[7],
  4299. coex_sta->bt_afh_map[8],
  4300. coex_sta->bt_afh_map[9]
  4301. );
  4302. CL_PRINTF(cli_buf);
  4303. }
  4304. for (i = 0; i < BT_INFO_SRC_8723D_1ANT_MAX; i++) {
  4305. if (coex_sta->bt_info_c2h_cnt[i]) {
  4306. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4307. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x (%d)",
  4308. glbt_info_src_8723d_1ant[i],
  4309. coex_sta->bt_info_c2h[i][0],
  4310. coex_sta->bt_info_c2h[i][1],
  4311. coex_sta->bt_info_c2h[i][2],
  4312. coex_sta->bt_info_c2h[i][3],
  4313. coex_sta->bt_info_c2h[i][4],
  4314. coex_sta->bt_info_c2h[i][5],
  4315. coex_sta->bt_info_c2h[i][6],
  4316. coex_sta->bt_info_c2h_cnt[i]);
  4317. CL_PRINTF(cli_buf);
  4318. }
  4319. }
  4320. if (btcoexist->manual_control)
  4321. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4322. "============[mechanisms] (before Manual)============");
  4323. else
  4324. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4325. "============[Mechanisms]============");
  4326. CL_PRINTF(cli_buf);
  4327. ps_tdma_case = coex_dm->cur_ps_tdma;
  4328. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4329. "\r\n %-35s = %02x %02x %02x %02x %02x (case-%d, %s)",
  4330. "TDMA",
  4331. coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
  4332. coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
  4333. coex_dm->ps_tdma_para[4], ps_tdma_case,
  4334. (coex_dm->cur_ps_tdma_on ? "TDMA On" : "TDMA Off"));
  4335. CL_PRINTF(cli_buf);
  4336. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  4337. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  4338. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  4339. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4340. "\r\n %-35s = %d/ 0x%x/ 0x%x/ 0x%x",
  4341. "Table/0x6c0/0x6c4/0x6c8",
  4342. coex_sta->coex_table_type, u32tmp[0], u32tmp[1], u32tmp[2]);
  4343. CL_PRINTF(cli_buf);
  4344. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  4345. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc);
  4346. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4347. "\r\n %-35s = 0x%x/ 0x%x",
  4348. "0x778/0x6cc",
  4349. u8tmp[0], u32tmp[0]);
  4350. CL_PRINTF(cli_buf);
  4351. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
  4352. "AntDiv/ ForceLPS",
  4353. ((board_info->ant_div_cfg) ? "On" : "Off"),
  4354. ((coex_sta->force_lps_on) ? "On" : "Off"));
  4355. CL_PRINTF(cli_buf);
  4356. u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  4357. lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? true : false;
  4358. if (lte_coex_on) {
  4359. u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4360. 0xa0);
  4361. u32tmp[1] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4362. 0xa4);
  4363. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  4364. "LTE Coex Table W_L/B_L",
  4365. u32tmp[0] & 0xffff, u32tmp[1] & 0xffff);
  4366. CL_PRINTF(cli_buf);
  4367. u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4368. 0xa8);
  4369. u32tmp[1] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4370. 0xac);
  4371. u32tmp[2] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4372. 0xb0);
  4373. u32tmp[3] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist,
  4374. 0xb4);
  4375. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4376. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4377. "LTE Break Table W_L/B_L/L_W/L_B",
  4378. u32tmp[0] & 0xffff, u32tmp[1] & 0xffff,
  4379. u32tmp[2] & 0xffff, u32tmp[3] & 0xffff);
  4380. CL_PRINTF(cli_buf);
  4381. }
  4382. /* Hw setting */
  4383. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4384. "============[Hw setting]============");
  4385. CL_PRINTF(cli_buf);
  4386. /*
  4387. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
  4388. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
  4389. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
  4390. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
  4391. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  4392. "0x430/0x434/0x42a/0x456",
  4393. u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
  4394. CL_PRINTF(cli_buf);
  4395. */
  4396. u32tmp[0] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  4397. u32tmp[1] = halbtc8723d1ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  4398. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
  4399. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
  4400. "LTE Coex/Path Owner",
  4401. ((lte_coex_on) ? "On" : "Off") ,
  4402. ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
  4403. CL_PRINTF(cli_buf);
  4404. if (lte_coex_on) {
  4405. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4406. "\r\n %-35s = %d/ %d/ %d/ %d",
  4407. "LTE 3Wire/OPMode/UART/UARTMode",
  4408. (int)((u32tmp[0] & BIT(6)) >> 6),
  4409. (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
  4410. (int)((u32tmp[0] & BIT(3)) >> 3),
  4411. (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0))));
  4412. CL_PRINTF(cli_buf);
  4413. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4414. "LTE_Busy/UART_Busy",
  4415. (int)((u32tmp[1] & BIT(1)) >> 1), (int)(u32tmp[1] & BIT(0)));
  4416. CL_PRINTF(cli_buf);
  4417. }
  4418. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4419. "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
  4420. "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
  4421. ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
  4422. ((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
  4423. ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
  4424. ((u32tmp[0] & BIT(10)) ? "SW" : "HW"),
  4425. ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
  4426. coex_sta->gnt_error_cnt);
  4427. CL_PRINTF(cli_buf);
  4428. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4429. "GNT_WL/GNT_BT",
  4430. (int)((u32tmp[1] & BIT(2)) >> 2),
  4431. (int)((u32tmp[1] & BIT(3)) >> 3));
  4432. CL_PRINTF(cli_buf);
  4433. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x948);
  4434. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
  4435. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  4436. "0x948/0x67[7]",
  4437. u16tmp[0], (int)((u8tmp[0] & BIT(7)) >> 7));
  4438. CL_PRINTF(cli_buf);
  4439. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x964);
  4440. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x864);
  4441. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0xab7);
  4442. u8tmp[3] = btcoexist->btc_read_1byte(btcoexist, 0xa01);
  4443. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4444. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4445. "0x964[1]/0x864[0]/0xab7[5]/0xa01[7]",
  4446. (int)((u8tmp[0] & BIT(1)) >> 1), (int)((u8tmp[1] & BIT(0))),
  4447. (int)((u8tmp[2] & BIT(3)) >> 3),
  4448. (int)((u8tmp[3] & BIT(7)) >> 7));
  4449. CL_PRINTF(cli_buf);
  4450. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
  4451. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  4452. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
  4453. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  4454. "0x4c6[4]/0x40[5]/0x45e[3](TxRetry)",
  4455. (int)((u8tmp[0] & BIT(4)) >> 4),
  4456. (int)((u8tmp[1] & BIT(5)) >> 5),
  4457. (int)((u8tmp[2] & BIT(3)) >> 3));
  4458. CL_PRINTF(cli_buf);
  4459. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  4460. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  4461. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953);
  4462. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s",
  4463. "0x550/0x522/4-RxAGC",
  4464. u32tmp[0], u8tmp[0], (u8tmp[1] & 0x2) ? "On" : "Off");
  4465. CL_PRINTF(cli_buf);
  4466. fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_OFDM);
  4467. fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_CCK);
  4468. cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_OFDM);
  4469. cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_CCK);
  4470. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4471. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4472. "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
  4473. cca_cck, fa_cck, cca_ofdm, fa_ofdm);
  4474. CL_PRINTF(cli_buf);
  4475. #if 1
  4476. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  4477. "CRC_OK CCK/11g/11n/11n-agg",
  4478. coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
  4479. coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
  4480. CL_PRINTF(cli_buf);
  4481. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  4482. "CRC_Err CCK/11g/11n/11n-agg",
  4483. coex_sta->crc_err_cck, coex_sta->crc_err_11g,
  4484. coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
  4485. CL_PRINTF(cli_buf);
  4486. #endif
  4487. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
  4488. "WlHiPri/ Locking/ Locked/ Noisy",
  4489. (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
  4490. (coex_sta->cck_lock ? "Yes" : "No"),
  4491. (coex_sta->cck_ever_lock ? "Yes" : "No"),
  4492. coex_sta->wl_noisy_level);
  4493. CL_PRINTF(cli_buf);
  4494. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
  4495. "0x770(Hi-pri rx/tx)",
  4496. coex_sta->high_priority_rx, coex_sta->high_priority_tx,
  4497. (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
  4498. CL_PRINTF(cli_buf);
  4499. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
  4500. "0x774(Lo-pri rx/tx)",
  4501. coex_sta->low_priority_rx, coex_sta->low_priority_tx,
  4502. (bt_link_info->slave_role ? "(Slave!!)" : (
  4503. coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
  4504. CL_PRINTF(cli_buf);
  4505. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  4506. }
  4507. void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4508. {
  4509. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  4510. return;
  4511. if (BTC_IPS_ENTER == type) {
  4512. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4513. "[BTCoex], IPS ENTER notify\n");
  4514. BTC_TRACE(trace_buf);
  4515. coex_sta->under_ips = true;
  4516. /* Write WL "Active" in Score-board for LPS off */
  4517. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4518. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4519. BT_8723D_1ANT_SCOREBOARD_ONOFF |
  4520. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4521. BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
  4522. false);
  4523. halbtc8723d1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  4524. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4525. FORCE_EXEC,
  4526. BT_8723D_1ANT_PHASE_WLAN_OFF);
  4527. halbtc8723d1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  4528. } else if (BTC_IPS_LEAVE == type) {
  4529. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4530. "[BTCoex], IPS LEAVE notify\n");
  4531. BTC_TRACE(trace_buf);
  4532. #if 0
  4533. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4534. BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
  4535. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4536. BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
  4537. #endif
  4538. halbtc8723d1ant_init_hw_config(btcoexist, false, false);
  4539. halbtc8723d1ant_init_coex_dm(btcoexist);;
  4540. coex_sta->under_ips = false;
  4541. }
  4542. }
  4543. void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4544. {
  4545. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  4546. return;
  4547. if (BTC_LPS_ENABLE == type) {
  4548. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4549. "[BTCoex], LPS ENABLE notify\n");
  4550. BTC_TRACE(trace_buf);
  4551. coex_sta->under_lps = true;
  4552. if (coex_sta->force_lps_on == true) { /* LPS No-32K */
  4553. /* Write WL "Active" in Score-board for PS-TDMA */
  4554. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4555. BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
  4556. } else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */
  4557. /* Write WL "Non-Active" in Score-board for Native-PS */
  4558. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4559. BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
  4560. }
  4561. } else if (BTC_LPS_DISABLE == type) {
  4562. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4563. "[BTCoex], LPS DISABLE notify\n");
  4564. BTC_TRACE(trace_buf);
  4565. coex_sta->under_lps = false;
  4566. /* Write WL "Active" in Score-board for LPS off */
  4567. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4568. BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
  4569. }
  4570. }
  4571. void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
  4572. IN u8 type)
  4573. {
  4574. boolean wifi_connected = false;
  4575. if (btcoexist->manual_control ||
  4576. btcoexist->stop_coex_dm)
  4577. return;
  4578. coex_sta->freeze_coexrun_by_btinfo = false;
  4579. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4580. &wifi_connected);
  4581. halbtc8723d1ant_query_bt_info(btcoexist);
  4582. if (BTC_SCAN_START == type) {
  4583. if (!wifi_connected)
  4584. coex_sta->wifi_is_high_pri_task = true;
  4585. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4586. "[BTCoex], SCAN START notify\n");
  4587. BTC_TRACE(trace_buf);
  4588. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4589. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4590. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4591. BT_8723D_1ANT_SCOREBOARD_ONOFF,
  4592. true);
  4593. /* Force antenna setup for no scan result issue */
  4594. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4595. FORCE_EXEC,
  4596. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  4597. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4598. } else {
  4599. coex_sta->wifi_is_high_pri_task = false;
  4600. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  4601. &coex_sta->scan_ap_num);
  4602. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4603. "[BTCoex], SCAN FINISH notify (Scan-AP = %d)\n",
  4604. coex_sta->scan_ap_num);
  4605. BTC_TRACE(trace_buf);
  4606. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4607. }
  4608. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4609. "[BTCoex], SCAN Notify() end\n");
  4610. BTC_TRACE(trace_buf);
  4611. }
  4612. void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
  4613. IN u8 type)
  4614. {
  4615. boolean wifi_connected = false;
  4616. if (btcoexist->manual_control ||
  4617. btcoexist->stop_coex_dm)
  4618. return;
  4619. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4620. &wifi_connected);
  4621. if (BTC_ASSOCIATE_START == type) {
  4622. coex_sta->wifi_is_high_pri_task = true;
  4623. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4624. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4625. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4626. BT_8723D_1ANT_SCOREBOARD_ONOFF,
  4627. true);
  4628. /* Force antenna setup for no scan result issue */
  4629. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4630. FORCE_EXEC,
  4631. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  4632. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4633. "[BTCoex], CONNECT START notify\n");
  4634. BTC_TRACE(trace_buf);
  4635. coex_dm->arp_cnt = 0;
  4636. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4637. /* To keep TDMA case during connect process,
  4638. to avoid changed by Btinfo and runcoexmechanism */
  4639. coex_sta->freeze_coexrun_by_btinfo = true;
  4640. } else {
  4641. coex_sta->wifi_is_high_pri_task = false;
  4642. coex_sta->freeze_coexrun_by_btinfo = false;
  4643. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4644. "[BTCoex], CONNECT FINISH notify\n");
  4645. BTC_TRACE(trace_buf);
  4646. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4647. }
  4648. }
  4649. void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
  4650. IN u8 type)
  4651. {
  4652. boolean wifi_under_b_mode = false;
  4653. if (btcoexist->manual_control ||
  4654. btcoexist->stop_coex_dm)
  4655. return;
  4656. if (BTC_MEDIA_CONNECT == type) {
  4657. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4658. "[BTCoex], MEDIA connect notify\n");
  4659. BTC_TRACE(trace_buf);
  4660. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4661. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4662. BT_8723D_1ANT_SCOREBOARD_ONOFF,
  4663. true);
  4664. /* Force antenna setup for no scan result issue */
  4665. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4666. FORCE_EXEC,
  4667. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  4668. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  4669. &wifi_under_b_mode);
  4670. /* Set CCK Tx/Rx high Pri except 11b mode */
  4671. if (wifi_under_b_mode) {
  4672. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  4673. 0x00); /* CCK Tx */
  4674. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  4675. 0x00); /* CCK Rx */
  4676. } else {
  4677. /* btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x10); */ /*CCK Tx */
  4678. /* btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x10); */ /*CCK Rx */
  4679. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  4680. 0x00); /* CCK Tx */
  4681. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  4682. 0x10); /* CCK Rx */
  4683. }
  4684. coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
  4685. 0x430);
  4686. coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
  4687. 0x434);
  4688. coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
  4689. btcoexist, 0x42a);
  4690. coex_dm->backup_ampdu_max_time = btcoexist->btc_read_1byte(
  4691. btcoexist, 0x456);
  4692. } else {
  4693. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4694. "[BTCoex], MEDIA disconnect notify\n");
  4695. BTC_TRACE(trace_buf);
  4696. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4697. BT_8723D_1ANT_SCOREBOARD_ACTIVE, false);
  4698. btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
  4699. btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
  4700. coex_sta->cck_ever_lock = false;
  4701. }
  4702. halbtc8723d1ant_update_wifi_channel_info(btcoexist, type);
  4703. }
  4704. void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
  4705. IN u8 type)
  4706. {
  4707. boolean under_4way = false;
  4708. if (btcoexist->manual_control ||
  4709. btcoexist->stop_coex_dm)
  4710. return;
  4711. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  4712. &under_4way);
  4713. if (under_4way) {
  4714. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4715. "[BTCoex], specific Packet ---- under_4way!!\n");
  4716. BTC_TRACE(trace_buf);
  4717. coex_sta->wifi_is_high_pri_task = true;
  4718. coex_sta->specific_pkt_period_cnt = 2;
  4719. } else if (BTC_PACKET_ARP == type) {
  4720. coex_dm->arp_cnt++;
  4721. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4722. "[BTCoex], specific Packet ARP notify -cnt = %d\n",
  4723. coex_dm->arp_cnt);
  4724. BTC_TRACE(trace_buf);
  4725. } else {
  4726. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4727. "[BTCoex], specific Packet DHCP or EAPOL notify [Type = %d]\n",
  4728. type);
  4729. BTC_TRACE(trace_buf);
  4730. coex_sta->wifi_is_high_pri_task = true;
  4731. coex_sta->specific_pkt_period_cnt = 2;
  4732. }
  4733. if (coex_sta->wifi_is_high_pri_task) {
  4734. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4735. BT_8723D_1ANT_SCOREBOARD_SCAN, true);
  4736. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4737. }
  4738. }
  4739. void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
  4740. IN u8 *tmp_buf, IN u8 length)
  4741. {
  4742. u8 i, rsp_source = 0;
  4743. boolean wifi_connected = false;
  4744. boolean wifi_scan = false, wifi_link = false, wifi_roam = false,
  4745. wifi_busy = false;
  4746. static boolean is_scoreboard_scan = false;
  4747. if (psd_scan->is_AntDet_running == true) {
  4748. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4749. "[BTCoex], bt_info_notify return for AntDet is running\n");
  4750. BTC_TRACE(trace_buf);
  4751. return;
  4752. }
  4753. rsp_source = tmp_buf[0] & 0xf;
  4754. if (rsp_source >= BT_INFO_SRC_8723D_1ANT_MAX)
  4755. rsp_source = BT_INFO_SRC_8723D_1ANT_WIFI_FW;
  4756. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  4757. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4758. "[BTCoex], Bt_info[%d], len=%d, data=[", rsp_source,
  4759. length);
  4760. BTC_TRACE(trace_buf);
  4761. for (i = 0; i < length; i++) {
  4762. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  4763. if (i == length - 1) {
  4764. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
  4765. tmp_buf[i]);
  4766. BTC_TRACE(trace_buf);
  4767. } else {
  4768. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
  4769. tmp_buf[i]);
  4770. BTC_TRACE(trace_buf);
  4771. }
  4772. }
  4773. coex_sta->bt_info = coex_sta->bt_info_c2h[rsp_source][1];
  4774. coex_sta->bt_info_ext = coex_sta->bt_info_c2h[rsp_source][4];
  4775. coex_sta->bt_info_ext2 = coex_sta->bt_info_c2h[rsp_source][5];
  4776. if (BT_INFO_SRC_8723D_1ANT_WIFI_FW != rsp_source) {
  4777. /* if 0xff, it means BT is under WHCK test */
  4778. coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? true :
  4779. false);
  4780. coex_sta->bt_create_connection = ((
  4781. coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? true :
  4782. false);
  4783. /* unit: %, value-100 to translate to unit: dBm */
  4784. coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 +
  4785. 10;
  4786. coex_sta->c2h_bt_remote_name_req = ((
  4787. coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? true :
  4788. false);
  4789. coex_sta->is_A2DP_3M = ((coex_sta->bt_info_c2h[rsp_source][2] &
  4790. 0x10) ? true : false);
  4791. coex_sta->acl_busy = ((coex_sta->bt_info_c2h[rsp_source][1] &
  4792. 0x9) ? true : false);
  4793. coex_sta->voice_over_HOGP = ((coex_sta->bt_info_ext & 0x10) ?
  4794. true : false);
  4795. coex_sta->c2h_bt_inquiry_page = ((coex_sta->bt_info &
  4796. BT_INFO_8723D_1ANT_B_INQ_PAGE) ? true : false);
  4797. coex_sta->a2dp_bit_pool = (((
  4798. coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
  4799. coex_sta->bt_info_c2h[rsp_source][6] : 0);
  4800. coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
  4801. 0xf;
  4802. coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8;
  4803. coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7;
  4804. coex_sta->hid_busy_num = (coex_sta->bt_info_ext2 & 0x30) >> 4;
  4805. coex_sta->hid_pair_cnt = (coex_sta->bt_info_ext2 & 0xc0) >> 6;
  4806. if (coex_sta->bt_retry_cnt >= 1)
  4807. coex_sta->pop_event_cnt++;
  4808. if (coex_sta->c2h_bt_remote_name_req)
  4809. coex_sta->cnt_RemoteNameReq++;
  4810. if (coex_sta->bt_info_ext & BIT(1))
  4811. coex_sta->cnt_ReInit++;
  4812. if (coex_sta->bt_info_ext & BIT(2)) {
  4813. coex_sta->cnt_setupLink++;
  4814. coex_sta->is_setupLink = true;
  4815. } else
  4816. coex_sta->is_setupLink = false;
  4817. if (coex_sta->bt_info_ext & BIT(3))
  4818. coex_sta->cnt_IgnWlanAct++;
  4819. if (coex_sta->bt_info_ext & BIT(6))
  4820. coex_sta->cnt_RoleSwitch++;
  4821. if (coex_sta->bt_create_connection) {
  4822. coex_sta->cnt_Page++;
  4823. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
  4824. &wifi_busy);
  4825. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
  4826. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
  4827. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
  4828. if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
  4829. (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
  4830. is_scoreboard_scan = true;
  4831. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4832. BT_8723D_1ANT_SCOREBOARD_SCAN, true);
  4833. } else
  4834. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4835. BT_8723D_1ANT_SCOREBOARD_SCAN, false);
  4836. } else {
  4837. if (is_scoreboard_scan) {
  4838. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4839. BT_8723D_1ANT_SCOREBOARD_SCAN, false);
  4840. is_scoreboard_scan = false;
  4841. }
  4842. }
  4843. /* Here we need to resend some wifi info to BT */
  4844. /* because bt is reset and loss of the info. */
  4845. if ((!btcoexist->manual_control) &&
  4846. (!btcoexist->stop_coex_dm)) {
  4847. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4848. &wifi_connected);
  4849. /* Re-Init */
  4850. if ((coex_sta->bt_info_ext & BIT(1))) {
  4851. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4852. "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
  4853. BTC_TRACE(trace_buf);
  4854. if (wifi_connected)
  4855. halbtc8723d1ant_update_wifi_channel_info(
  4856. btcoexist, BTC_MEDIA_CONNECT);
  4857. else
  4858. halbtc8723d1ant_update_wifi_channel_info(
  4859. btcoexist,
  4860. BTC_MEDIA_DISCONNECT);
  4861. }
  4862. /* If Ignore_WLanAct && not SetUp_Link or Role_Switch */
  4863. if ((coex_sta->bt_info_ext & BIT(3)) &&
  4864. (!(coex_sta->bt_info_ext & BIT(2))) &&
  4865. (!(coex_sta->bt_info_ext & BIT(6)))) {
  4866. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4867. "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
  4868. BTC_TRACE(trace_buf);
  4869. halbtc8723d1ant_ignore_wlan_act(btcoexist,
  4870. FORCE_EXEC, false);
  4871. } else {
  4872. if (coex_sta->bt_info_ext & BIT(2)) {
  4873. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4874. "[BTCoex], BT ignore Wlan active because Re-link!!\n");
  4875. BTC_TRACE(trace_buf);
  4876. } else if (coex_sta->bt_info_ext & BIT(6)) {
  4877. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4878. "[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
  4879. BTC_TRACE(trace_buf);
  4880. }
  4881. }
  4882. }
  4883. }
  4884. if ((coex_sta->bt_info_ext & BIT(5))) {
  4885. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4886. "[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
  4887. BTC_TRACE(trace_buf);
  4888. coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);
  4889. if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
  4890. coex_sta->bt_ble_scan_para[0] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1);
  4891. if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
  4892. coex_sta->bt_ble_scan_para[1] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2);
  4893. if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
  4894. coex_sta->bt_ble_scan_para[2] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
  4895. }
  4896. halbtc8723d1ant_update_bt_link_info(btcoexist);
  4897. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  4898. }
  4899. void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
  4900. IN u8 type)
  4901. {
  4902. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n");
  4903. BTC_TRACE(trace_buf);
  4904. if (BTC_RF_ON == type) {
  4905. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4906. "[BTCoex], RF is turned ON!!\n");
  4907. BTC_TRACE(trace_buf);
  4908. btcoexist->stop_coex_dm = false;
  4909. #if 0
  4910. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4911. BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
  4912. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4913. BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
  4914. #endif
  4915. } else if (BTC_RF_OFF == type) {
  4916. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4917. "[BTCoex], RF is turned OFF!!\n");
  4918. BTC_TRACE(trace_buf);
  4919. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4920. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4921. BT_8723D_1ANT_SCOREBOARD_ONOFF |
  4922. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4923. BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
  4924. false);
  4925. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  4926. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4927. FORCE_EXEC,
  4928. BT_8723D_1ANT_PHASE_WLAN_OFF);
  4929. btcoexist->stop_coex_dm = true;
  4930. }
  4931. }
  4932. void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist)
  4933. {
  4934. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
  4935. BTC_TRACE(trace_buf);
  4936. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4937. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4938. BT_8723D_1ANT_SCOREBOARD_ONOFF |
  4939. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4940. BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
  4941. false);
  4942. halbtc8723d1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  4943. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO, FORCE_EXEC,
  4944. BT_8723D_1ANT_PHASE_WLAN_OFF);
  4945. halbtc8723d1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  4946. ex_halbtc8723d1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  4947. btcoexist->stop_coex_dm = true;
  4948. }
  4949. void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
  4950. IN u8 pnp_state)
  4951. {
  4952. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
  4953. BTC_TRACE(trace_buf);
  4954. if ((BTC_WIFI_PNP_SLEEP == pnp_state) ||
  4955. (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state)) {
  4956. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4957. "[BTCoex], Pnp notify to SLEEP\n");
  4958. BTC_TRACE(trace_buf);
  4959. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4960. BT_8723D_1ANT_SCOREBOARD_ACTIVE |
  4961. BT_8723D_1ANT_SCOREBOARD_ONOFF |
  4962. BT_8723D_1ANT_SCOREBOARD_SCAN |
  4963. BT_8723D_1ANT_SCOREBOARD_UNDERTEST,
  4964. false);
  4965. if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
  4966. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4967. FORCE_EXEC,
  4968. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  4969. } else {
  4970. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  4971. FORCE_EXEC,
  4972. BT_8723D_1ANT_PHASE_WLAN_OFF);
  4973. }
  4974. btcoexist->stop_coex_dm = true;
  4975. } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
  4976. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4977. "[BTCoex], Pnp notify to WAKE UP\n");
  4978. BTC_TRACE(trace_buf);
  4979. #if 0
  4980. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4981. BT_8723D_1ANT_SCOREBOARD_ACTIVE, true);
  4982. halbtc8723d1ant_post_state_to_bt(btcoexist,
  4983. BT_8723D_1ANT_SCOREBOARD_ONOFF, true);
  4984. #endif
  4985. btcoexist->stop_coex_dm = false;
  4986. }
  4987. }
  4988. void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist)
  4989. {
  4990. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4991. "[BTCoex], *****************Coex DM Reset*****************\n");
  4992. BTC_TRACE(trace_buf);
  4993. halbtc8723d1ant_init_hw_config(btcoexist, false, false);
  4994. halbtc8723d1ant_init_coex_dm(btcoexist);
  4995. }
  4996. void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist)
  4997. {
  4998. struct btc_board_info *board_info = &btcoexist->board_info;
  4999. boolean wifi_busy = false;
  5000. u4Byte value = 0;
  5001. u32 bt_patch_ver;
  5002. static u8 cnt = 0;
  5003. boolean bt_relink_finish = false;
  5004. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5005. "[BTCoex], ************* Periodical *************\n");
  5006. BTC_TRACE(trace_buf);
  5007. #if (BT_AUTO_REPORT_ONLY_8723D_1ANT == 0)
  5008. halbtc8723d1ant_query_bt_info(btcoexist);
  5009. #endif
  5010. halbtc8723d1ant_monitor_bt_ctr(btcoexist);
  5011. halbtc8723d1ant_monitor_wifi_ctr(btcoexist);
  5012. halbtc8723d1ant_monitor_bt_enable_disable(btcoexist);
  5013. #if 0
  5014. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  5015. /* halbtc8723d1ant_read_score_board(btcoexist, &bt_scoreboard_val); */
  5016. if (wifi_busy) {
  5017. halbtc8723d1ant_post_state_to_bt(btcoexist,
  5018. BT_8723D_1ANT_SCOREBOARD_UNDERTEST, true);
  5019. /*
  5020. halbtc8723d1ant_post_state_to_bt(btcoexist,
  5021. BT_8723D_1ANT_SCOREBOARD_WLBUSY, true);
  5022. if (bt_scoreboard_val & BIT(6))
  5023. halbtc8723d1ant_query_bt_info(btcoexist); */
  5024. } else {
  5025. halbtc8723d1ant_post_state_to_bt(btcoexist,
  5026. BT_8723D_1ANT_SCOREBOARD_UNDERTEST, false);
  5027. /*
  5028. halbtc8723d1ant_post_state_to_bt(btcoexist,
  5029. BT_8723D_1ANT_SCOREBOARD_WLBUSY,
  5030. false); */
  5031. }
  5032. #endif
  5033. if (coex_sta->bt_relink_downcount != 0) {
  5034. coex_sta->bt_relink_downcount--;
  5035. if (coex_sta->bt_relink_downcount == 0)
  5036. bt_relink_finish = true;
  5037. }
  5038. /* for 4-way, DHCP, EAPOL packet */
  5039. if (coex_sta->specific_pkt_period_cnt > 0) {
  5040. coex_sta->specific_pkt_period_cnt--;
  5041. if ((coex_sta->specific_pkt_period_cnt == 0) &&
  5042. (coex_sta->wifi_is_high_pri_task))
  5043. coex_sta->wifi_is_high_pri_task = false;
  5044. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5045. "[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
  5046. (coex_sta->wifi_is_high_pri_task ? "Yes" :
  5047. "No"));
  5048. BTC_TRACE(trace_buf);
  5049. }
  5050. if (!coex_sta->bt_disabled) {
  5051. #if BT_8723D_1ANT_ANTDET_ENABLE
  5052. if (board_info->btdm_ant_det_finish) {
  5053. if ((psd_scan->ant_det_result == 12) &&
  5054. (psd_scan->ant_det_psd_scan_peak_val == 0)
  5055. && (!psd_scan->is_AntDet_running)) {
  5056. psd_scan->ant_det_psd_scan_peak_val =
  5057. btcoexist->btc_get_ant_det_val_from_bt(
  5058. btcoexist) * 100;
  5059. board_info->antdetval = psd_scan->ant_det_psd_scan_peak_val/100;
  5060. value = board_info->antdetval;
  5061. #ifdef PLATFORM_WINDOWS
  5062. {
  5063. PWCHAR registryName;
  5064. registryName = L"antdetval";
  5065. PlatformWriteCommonDwordRegistry(registryName, &value);
  5066. }
  5067. #endif
  5068. }
  5069. }
  5070. #endif
  5071. }
  5072. if (halbtc8723d1ant_is_wifibt_status_changed(btcoexist))
  5073. halbtc8723d1ant_run_coexist_mechanism(btcoexist);
  5074. }
  5075. void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
  5076. IN u8 type)
  5077. {
  5078. struct btc_board_info *board_info = &btcoexist->board_info;
  5079. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  5080. return;
  5081. if (type == 2) { /* two antenna */
  5082. board_info->ant_div_cfg = true;
  5083. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
  5084. FORCE_EXEC,
  5085. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  5086. } else { /* one antenna */
  5087. halbtc8723d1ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  5088. FORCE_EXEC,
  5089. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  5090. }
  5091. }
  5092. #ifdef PLATFORM_WINDOWS
  5093. #pragma optimize("", off)
  5094. #endif
  5095. void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
  5096. IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
  5097. {
  5098. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  5099. struct btc_board_info *board_info = &btcoexist->board_info;
  5100. u16 u16tmp;
  5101. u8 AntDetval = 0;
  5102. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5103. "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
  5104. BTC_TRACE(trace_buf);
  5105. #if BT_8723D_1ANT_ANTDET_ENABLE
  5106. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5107. "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
  5108. BTC_TRACE(trace_buf);
  5109. if (seconds == 0) {
  5110. psd_scan->ant_det_try_count = 0;
  5111. psd_scan->ant_det_fail_count = 0;
  5112. ant_det_count = 0;
  5113. ant_det_fail_count = 0;
  5114. board_info->btdm_ant_det_finish = false;
  5115. board_info->btdm_ant_num_by_ant_det = 1;
  5116. return;
  5117. }
  5118. if (!board_info->btdm_ant_det_finish) {
  5119. psd_scan->ant_det_inteval_count =
  5120. psd_scan->ant_det_inteval_count + 2;
  5121. if (psd_scan->ant_det_inteval_count >=
  5122. BT_8723D_2ANT_ANTDET_RETRY_INTERVAL) {
  5123. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5124. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
  5125. BTC_TRACE(trace_buf);
  5126. psd_scan->is_AntDet_running = true;
  5127. halbtc8723d1ant_read_score_board(btcoexist, &u16tmp);
  5128. if (u16tmp & BIT(
  5129. 2)) { /* Antenna detection is already done before last WL power on */
  5130. board_info->btdm_ant_det_finish = true;
  5131. psd_scan->ant_det_try_count = 1;
  5132. psd_scan->ant_det_fail_count = 0;
  5133. board_info->btdm_ant_num_by_ant_det = (u16tmp &
  5134. BIT(3)) ? 1 : 2;
  5135. psd_scan->ant_det_result = 12;
  5136. psd_scan->ant_det_psd_scan_peak_val =
  5137. btcoexist->btc_get_ant_det_val_from_bt(
  5138. btcoexist) * 100;
  5139. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5140. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
  5141. board_info->btdm_ant_num_by_ant_det);
  5142. BTC_TRACE(trace_buf);
  5143. } else
  5144. board_info->btdm_ant_det_finish =
  5145. halbtc8723d1ant_psd_antenna_detection_check(
  5146. btcoexist);
  5147. board_info->ant_det_result = psd_scan->ant_det_result;
  5148. btcoexist->bdontenterLPS = false;
  5149. if (board_info->btdm_ant_det_finish) {
  5150. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5151. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
  5152. BTC_TRACE(trace_buf);
  5153. if (board_info->btdm_ant_num_by_ant_det == 2) {
  5154. board_info->ant_div_cfg = true;
  5155. halbtc8723d1ant_set_ant_path(btcoexist,
  5156. BTC_ANT_PATH_WIFI, FORCE_EXEC,
  5157. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  5158. } else
  5159. halbtc8723d1ant_set_ant_path(btcoexist,
  5160. BTC_ANT_PATH_AUTO, FORCE_EXEC,
  5161. BT_8723D_1ANT_PHASE_2G_RUNTIME);
  5162. /*for 8723d, btc_set_bt_trx_mask is just used to
  5163. notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask */
  5164. if (psd_scan->ant_det_result != 12) {
  5165. AntDetval = (u8)(
  5166. psd_scan->ant_det_psd_scan_peak_val
  5167. / 100) & 0x7f;
  5168. AntDetval =
  5169. (board_info->btdm_ant_num_by_ant_det
  5170. == 1) ? (AntDetval | 0x80) :
  5171. AntDetval;
  5172. board_info->antdetval = AntDetval;
  5173. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5174. "xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
  5175. ((AntDetval &
  5176. 0x80) ? 1
  5177. : 2), AntDetval
  5178. & 0x7f);
  5179. BTC_TRACE(trace_buf);
  5180. if (btcoexist->btc_set_bt_trx_mask(
  5181. btcoexist, AntDetval))
  5182. BTC_SPRINTF(trace_buf,
  5183. BT_TMP_BUF_SIZE,
  5184. "xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
  5185. else
  5186. BTC_SPRINTF(trace_buf,
  5187. BT_TMP_BUF_SIZE,
  5188. "xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
  5189. BTC_TRACE(trace_buf);
  5190. } else
  5191. board_info->antdetval =
  5192. psd_scan->ant_det_psd_scan_peak_val/100;
  5193. board_info->btdm_ant_det_complete_fail = false;
  5194. } else {
  5195. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5196. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
  5197. BTC_TRACE(trace_buf);
  5198. board_info->btdm_ant_det_complete_fail = true;
  5199. }
  5200. psd_scan->ant_det_inteval_count = 0;
  5201. psd_scan->is_AntDet_running = false;
  5202. /* stimulate coex running */
  5203. halbtc8723d1ant_run_coexist_mechanism(
  5204. btcoexist);
  5205. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5206. "xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
  5207. BTC_TRACE(trace_buf);
  5208. } else {
  5209. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5210. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
  5211. psd_scan->ant_det_inteval_count);
  5212. BTC_TRACE(trace_buf);
  5213. if (psd_scan->ant_det_inteval_count == 8)
  5214. btcoexist->bdontenterLPS = true;
  5215. else
  5216. btcoexist->bdontenterLPS = false;
  5217. }
  5218. }
  5219. #endif
  5220. }
  5221. void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist)
  5222. {
  5223. #if BT_8723D_1ANT_ANTDET_ENABLE
  5224. struct btc_board_info *board_info = &btcoexist->board_info;
  5225. if (psd_scan->ant_det_try_count != 0) {
  5226. halbtc8723d1ant_psd_show_antenna_detect_result(btcoexist);
  5227. if (board_info->btdm_ant_det_finish)
  5228. halbtc8723d1ant_psd_showdata(btcoexist);
  5229. }
  5230. #endif
  5231. }
  5232. void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
  5233. IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
  5234. {
  5235. }
  5236. void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
  5237. IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
  5238. {
  5239. }
  5240. #endif
  5241. #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */