hal_intf.c 42 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. *****************************************************************************/
  15. #define _HAL_INTF_C_
  16. #include <drv_types.h>
  17. #include <hal_data.h>
  18. const u32 _chip_type_to_odm_ic_type[] = {
  19. 0,
  20. ODM_RTL8188E,
  21. ODM_RTL8192E,
  22. ODM_RTL8812,
  23. ODM_RTL8821,
  24. ODM_RTL8723B,
  25. ODM_RTL8814A,
  26. ODM_RTL8703B,
  27. ODM_RTL8188F,
  28. ODM_RTL8188F,
  29. ODM_RTL8822B,
  30. ODM_RTL8723D,
  31. ODM_RTL8821C,
  32. ODM_RTL8710B,
  33. ODM_RTL8192F,
  34. 0,
  35. };
  36. void rtw_hal_chip_configure(_adapter *padapter)
  37. {
  38. padapter->hal_func.intf_chip_configure(padapter);
  39. }
  40. /*
  41. * Description:
  42. * Read chip internal ROM data
  43. *
  44. * Return:
  45. * _SUCCESS success
  46. * _FAIL fail
  47. */
  48. u8 rtw_hal_read_chip_info(_adapter *padapter)
  49. {
  50. u8 rtn = _SUCCESS;
  51. u8 hci_type = rtw_get_intf_type(padapter);
  52. systime start = rtw_get_current_time();
  53. /* before access eFuse, make sure card enable has been called */
  54. if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
  55. && !rtw_is_hw_init_completed(padapter))
  56. rtw_hal_power_on(padapter);
  57. rtn = padapter->hal_func.read_adapter_info(padapter);
  58. if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
  59. && !rtw_is_hw_init_completed(padapter))
  60. rtw_hal_power_off(padapter);
  61. RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
  62. return rtn;
  63. }
  64. void rtw_hal_read_chip_version(_adapter *padapter)
  65. {
  66. padapter->hal_func.read_chip_version(padapter);
  67. rtw_odm_init_ic_type(padapter);
  68. }
  69. static void rtw_init_wireless_mode(_adapter *padapter)
  70. {
  71. u8 proto_wireless_mode = 0;
  72. struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
  73. if(hal_spec->proto_cap & PROTO_CAP_11B)
  74. proto_wireless_mode |= WIRELESS_11B;
  75. if(hal_spec->proto_cap & PROTO_CAP_11G)
  76. proto_wireless_mode |= WIRELESS_11G;
  77. #ifdef CONFIG_80211AC_VHT
  78. if(hal_spec->band_cap & BAND_CAP_5G)
  79. proto_wireless_mode |= WIRELESS_11A;
  80. #endif
  81. #ifdef CONFIG_80211N_HT
  82. if(hal_spec->proto_cap & PROTO_CAP_11N) {
  83. if(hal_spec->band_cap & BAND_CAP_2G)
  84. proto_wireless_mode |= WIRELESS_11_24N;
  85. if(hal_spec->band_cap & BAND_CAP_5G)
  86. proto_wireless_mode |= WIRELESS_11_5N;
  87. }
  88. #endif
  89. #ifdef CONFIG_80211AC_VHT
  90. if(hal_spec->proto_cap & PROTO_CAP_11AC)
  91. proto_wireless_mode |= WIRELESS_11AC;
  92. #endif
  93. padapter->registrypriv.wireless_mode &= proto_wireless_mode;
  94. }
  95. void rtw_hal_def_value_init(_adapter *padapter)
  96. {
  97. if (is_primary_adapter(padapter)) {
  98. /*init fw_psmode_iface_id*/
  99. adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff;
  100. /*wireless_mode*/
  101. rtw_init_wireless_mode(padapter);
  102. padapter->hal_func.init_default_value(padapter);
  103. rtw_init_hal_com_default_value(padapter);
  104. #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
  105. adapter_to_dvobj(padapter)->dft.port_id = 0xFF;
  106. adapter_to_dvobj(padapter)->dft.mac_id = 0xFF;
  107. #endif
  108. #ifdef CONFIG_HW_P0_TSF_SYNC
  109. adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT;
  110. adapter_to_dvobj(padapter)->p0_tsf.offset = 0;
  111. #endif
  112. {
  113. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  114. struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
  115. /* hal_spec is ready here */
  116. dvobj->macid_ctl.num = rtw_min(hal_spec->macid_num, MACID_NUM_SW_LIMIT);
  117. dvobj->cam_ctl.sec_cap = hal_spec->sec_cap;
  118. dvobj->cam_ctl.num = rtw_min(hal_spec->sec_cam_ent_num, SEC_CAM_ENT_NUM_SW_LIMIT);
  119. }
  120. GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0;
  121. }
  122. }
  123. u8 rtw_hal_data_init(_adapter *padapter)
  124. {
  125. if (is_primary_adapter(padapter)) {
  126. padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
  127. padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz);
  128. if (padapter->HalData == NULL) {
  129. RTW_INFO("cant not alloc memory for HAL DATA\n");
  130. return _FAIL;
  131. }
  132. rtw_phydm_priv_init(padapter);
  133. }
  134. return _SUCCESS;
  135. }
  136. void rtw_hal_data_deinit(_adapter *padapter)
  137. {
  138. if (is_primary_adapter(padapter)) {
  139. if (padapter->HalData) {
  140. #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
  141. phy_free_filebuf(padapter);
  142. #endif
  143. rtw_vmfree(padapter->HalData, padapter->hal_data_sz);
  144. padapter->HalData = NULL;
  145. padapter->hal_data_sz = 0;
  146. }
  147. }
  148. }
  149. void rtw_hal_free_data(_adapter *padapter)
  150. {
  151. /* free HAL Data */
  152. rtw_hal_data_deinit(padapter);
  153. }
  154. void rtw_hal_dm_init(_adapter *padapter)
  155. {
  156. if (is_primary_adapter(padapter)) {
  157. PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
  158. padapter->hal_func.dm_init(padapter);
  159. _rtw_spinlock_init(&pHalData->IQKSpinLock);
  160. phy_load_tx_power_ext_info(padapter, 1);
  161. }
  162. }
  163. void rtw_hal_dm_deinit(_adapter *padapter)
  164. {
  165. if (is_primary_adapter(padapter)) {
  166. PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
  167. padapter->hal_func.dm_deinit(padapter);
  168. _rtw_spinlock_free(&pHalData->IQKSpinLock);
  169. }
  170. }
  171. #ifdef CONFIG_RTW_SW_LED
  172. void rtw_hal_sw_led_init(_adapter *padapter)
  173. {
  174. struct led_priv *ledpriv = adapter_to_led(padapter);
  175. if (ledpriv->bRegUseLed == _FALSE)
  176. return;
  177. if (!is_primary_adapter(padapter))
  178. return;
  179. if (padapter->hal_func.InitSwLeds) {
  180. padapter->hal_func.InitSwLeds(padapter);
  181. rtw_led_set_ctl_en_mask_primary(padapter);
  182. rtw_led_set_iface_en(padapter, 1);
  183. }
  184. }
  185. void rtw_hal_sw_led_deinit(_adapter *padapter)
  186. {
  187. struct led_priv *ledpriv = adapter_to_led(padapter);
  188. if (ledpriv->bRegUseLed == _FALSE)
  189. return;
  190. if (!is_primary_adapter(padapter))
  191. return;
  192. if (padapter->hal_func.DeInitSwLeds)
  193. padapter->hal_func.DeInitSwLeds(padapter);
  194. }
  195. #endif
  196. u32 rtw_hal_power_on(_adapter *padapter)
  197. {
  198. u32 ret = 0;
  199. PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
  200. ret = padapter->hal_func.hal_power_on(padapter);
  201. #ifdef CONFIG_BT_COEXIST
  202. if ((ret == _SUCCESS) && (pHalData->EEPROMBluetoothCoexist == _TRUE))
  203. rtw_btcoex_PowerOnSetting(padapter);
  204. #endif
  205. return ret;
  206. }
  207. void rtw_hal_power_off(_adapter *padapter)
  208. {
  209. struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl;
  210. _rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT);
  211. #ifdef CONFIG_BT_COEXIST
  212. rtw_btcoex_PowerOffSetting(padapter);
  213. #endif
  214. padapter->hal_func.hal_power_off(padapter);
  215. }
  216. void rtw_hal_init_opmode(_adapter *padapter)
  217. {
  218. NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax;
  219. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  220. sint fw_state;
  221. fw_state = get_fwstate(pmlmepriv);
  222. if (fw_state & WIFI_ADHOC_STATE)
  223. networkType = Ndis802_11IBSS;
  224. else if (fw_state & WIFI_STATION_STATE)
  225. networkType = Ndis802_11Infrastructure;
  226. #ifdef CONFIG_AP_MODE
  227. else if (fw_state & WIFI_AP_STATE)
  228. networkType = Ndis802_11APMode;
  229. #endif
  230. #ifdef CONFIG_RTW_MESH
  231. else if (fw_state & WIFI_MESH_STATE)
  232. networkType = Ndis802_11_mesh;
  233. #endif
  234. else
  235. return;
  236. rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY);
  237. }
  238. #ifdef CONFIG_NEW_NETDEV_HDL
  239. uint rtw_hal_iface_init(_adapter *adapter)
  240. {
  241. uint status = _SUCCESS;
  242. rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
  243. #ifdef RTW_HALMAC
  244. rtw_hal_hw_port_enable(adapter);
  245. #endif
  246. rtw_sec_restore_wep_key(adapter);
  247. rtw_hal_init_opmode(adapter);
  248. rtw_hal_start_thread(adapter);
  249. return status;
  250. }
  251. uint rtw_hal_init(_adapter *padapter)
  252. {
  253. uint status = _SUCCESS;
  254. status = padapter->hal_func.hal_init(padapter);
  255. if (status == _SUCCESS) {
  256. rtw_set_hw_init_completed(padapter, _TRUE);
  257. if (padapter->registrypriv.notch_filter == 1)
  258. rtw_hal_notch_filter(padapter, 1);
  259. rtw_led_control(padapter, LED_CTL_POWER_ON);
  260. init_hw_mlme_ext(padapter);
  261. #ifdef CONFIG_RF_POWER_TRIM
  262. rtw_bb_rf_gain_offset(padapter);
  263. #endif /*CONFIG_RF_POWER_TRIM*/
  264. GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/
  265. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  266. rtw_mi_set_mbid_cam(padapter);
  267. #endif
  268. #ifdef CONFIG_SUPPORT_MULTI_BCN
  269. rtw_ap_multi_bcn_cfg(padapter);
  270. #endif
  271. #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
  272. #ifdef CONFIG_DYNAMIC_SOML
  273. rtw_dyn_soml_config(padapter);
  274. #endif
  275. #endif
  276. #ifdef CONFIG_RTW_TX_2PATH_EN
  277. rtw_phydm_tx_2path_en(padapter);
  278. #endif
  279. } else {
  280. rtw_set_hw_init_completed(padapter, _FALSE);
  281. RTW_ERR("%s: hal_init fail\n", __func__);
  282. }
  283. return status;
  284. }
  285. #else
  286. uint rtw_hal_init(_adapter *padapter)
  287. {
  288. uint status = _SUCCESS;
  289. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  290. int i;
  291. status = padapter->hal_func.hal_init(padapter);
  292. if (status == _SUCCESS) {
  293. rtw_set_hw_init_completed(padapter, _TRUE);
  294. rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/
  295. #ifdef RTW_HALMAC
  296. rtw_restore_hw_port_cfg(padapter);
  297. #endif
  298. if (padapter->registrypriv.notch_filter == 1)
  299. rtw_hal_notch_filter(padapter, 1);
  300. for (i = 0; i < dvobj->iface_nums; i++)
  301. rtw_sec_restore_wep_key(dvobj->padapters[i]);
  302. rtw_led_control(padapter, LED_CTL_POWER_ON);
  303. init_hw_mlme_ext(padapter);
  304. rtw_hal_init_opmode(padapter);
  305. #ifdef CONFIG_RF_POWER_TRIM
  306. rtw_bb_rf_gain_offset(padapter);
  307. #endif /*CONFIG_RF_POWER_TRIM*/
  308. #ifdef CONFIG_SUPPORT_MULTI_BCN
  309. rtw_ap_multi_bcn_cfg(padapter);
  310. #endif
  311. #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
  312. #ifdef CONFIG_DYNAMIC_SOML
  313. rtw_dyn_soml_config(padapter);
  314. #endif
  315. #endif
  316. #ifdef CONFIG_RTW_TX_2PATH_EN
  317. rtw_phydm_tx_2path_en(padapter);
  318. #endif
  319. } else {
  320. rtw_set_hw_init_completed(padapter, _FALSE);
  321. RTW_ERR("%s: fail\n", __func__);
  322. }
  323. return status;
  324. }
  325. #endif
  326. uint rtw_hal_deinit(_adapter *padapter)
  327. {
  328. uint status = _SUCCESS;
  329. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  330. int i;
  331. status = padapter->hal_func.hal_deinit(padapter);
  332. if (status == _SUCCESS) {
  333. rtw_led_control(padapter, LED_CTL_POWER_OFF);
  334. rtw_set_hw_init_completed(padapter, _FALSE);
  335. } else
  336. RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
  337. return status;
  338. }
  339. u8 rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
  340. {
  341. return padapter->hal_func.set_hw_reg_handler(padapter, variable, val);
  342. }
  343. void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
  344. {
  345. padapter->hal_func.GetHwRegHandler(padapter, variable, val);
  346. }
  347. u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
  348. {
  349. return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue);
  350. }
  351. u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, PVOID pValue)
  352. {
  353. return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue);
  354. }
  355. void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, BOOLEAN bSet)
  356. {
  357. padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet);
  358. }
  359. void rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, PVOID pValue1, PVOID pValue2)
  360. {
  361. padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2);
  362. }
  363. /* FOR SDIO & PCIE */
  364. void rtw_hal_enable_interrupt(_adapter *padapter)
  365. {
  366. #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
  367. padapter->hal_func.enable_interrupt(padapter);
  368. #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
  369. }
  370. /* FOR SDIO & PCIE */
  371. void rtw_hal_disable_interrupt(_adapter *padapter)
  372. {
  373. #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
  374. padapter->hal_func.disable_interrupt(padapter);
  375. #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
  376. }
  377. u8 rtw_hal_check_ips_status(_adapter *padapter)
  378. {
  379. u8 val = _FALSE;
  380. if (padapter->hal_func.check_ips_status)
  381. val = padapter->hal_func.check_ips_status(padapter);
  382. else
  383. RTW_INFO("%s: hal_func.check_ips_status is NULL!\n", __FUNCTION__);
  384. return val;
  385. }
  386. s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan)
  387. {
  388. return padapter->hal_func.fw_dl(padapter, wowlan);
  389. }
  390. #ifdef RTW_HALMAC
  391. s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem)
  392. {
  393. systime dlfw_start_time = rtw_get_current_time();
  394. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  395. struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
  396. s32 rst = _FALSE;
  397. rst = padapter->hal_func.fw_mem_dl(padapter, mem);
  398. RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(dlfw_start_time));
  399. if (rst == _FALSE)
  400. pdbgpriv->dbg_fw_mem_dl_error_cnt++;
  401. if (1)
  402. RTW_INFO("%s dbg_fw_mem_dl_error_cnt:%d\n", __func__, pdbgpriv->dbg_fw_mem_dl_error_cnt);
  403. return rst;
  404. }
  405. #endif
  406. #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  407. void rtw_hal_clear_interrupt(_adapter *padapter)
  408. {
  409. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  410. padapter->hal_func.clear_interrupt(padapter);
  411. #endif
  412. }
  413. #endif
  414. #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
  415. u32 rtw_hal_inirp_init(_adapter *padapter)
  416. {
  417. if (is_primary_adapter(padapter))
  418. return padapter->hal_func.inirp_init(padapter);
  419. return _SUCCESS;
  420. }
  421. u32 rtw_hal_inirp_deinit(_adapter *padapter)
  422. {
  423. if (is_primary_adapter(padapter))
  424. return padapter->hal_func.inirp_deinit(padapter);
  425. return _SUCCESS;
  426. }
  427. #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
  428. #if defined(CONFIG_PCI_HCI)
  429. void rtw_hal_irp_reset(_adapter *padapter)
  430. {
  431. padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter));
  432. }
  433. void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data)
  434. {
  435. u16 cmd[2];
  436. cmd[0] = addr;
  437. cmd[1] = data;
  438. padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd);
  439. }
  440. u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr)
  441. {
  442. padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr));
  443. return (u8)addr;
  444. }
  445. void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data)
  446. {
  447. u16 cmd[2];
  448. cmd[0] = (u16)addr;
  449. cmd[1] = data;
  450. padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd);
  451. }
  452. u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr)
  453. {
  454. padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr);
  455. return (u8)addr;
  456. }
  457. u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter)
  458. {
  459. u8 l1off;
  460. padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off);
  461. return l1off;
  462. }
  463. u8 rtw_hal_pci_l1off_capability(_adapter *padapter)
  464. {
  465. u8 l1off;
  466. padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off);
  467. return l1off;
  468. }
  469. #endif /* #if defined(CONFIG_PCI_HCI) */
  470. /* for USB Auto-suspend */
  471. u8 rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
  472. {
  473. if (padapter->hal_func.interface_ps_func)
  474. return padapter->hal_func.interface_ps_func(padapter, efunc_id, val);
  475. return _FAIL;
  476. }
  477. s32 rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
  478. {
  479. return padapter->hal_func.hal_xmitframe_enqueue(padapter, pxmitframe);
  480. }
  481. s32 rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
  482. {
  483. return padapter->hal_func.hal_xmit(padapter, pxmitframe);
  484. }
  485. /*
  486. * [IMPORTANT] This function would be run in interrupt context.
  487. */
  488. s32 rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
  489. {
  490. s32 ret = _FAIL;
  491. update_mgntframe_attrib_addr(padapter, pmgntframe);
  492. #if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH)
  493. if ((!MLME_IS_MESH(padapter) && SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) == _TRUE)
  494. #ifdef CONFIG_RTW_MESH
  495. || (MLME_IS_MESH(padapter) && padapter->mesh_info.mesh_auth_id)
  496. #endif
  497. )
  498. rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
  499. #endif
  500. no_mgmt_coalesce:
  501. ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe);
  502. return ret;
  503. }
  504. s32 rtw_hal_init_xmit_priv(_adapter *padapter)
  505. {
  506. return padapter->hal_func.init_xmit_priv(padapter);
  507. }
  508. void rtw_hal_free_xmit_priv(_adapter *padapter)
  509. {
  510. padapter->hal_func.free_xmit_priv(padapter);
  511. }
  512. s32 rtw_hal_init_recv_priv(_adapter *padapter)
  513. {
  514. return padapter->hal_func.init_recv_priv(padapter);
  515. }
  516. void rtw_hal_free_recv_priv(_adapter *padapter)
  517. {
  518. padapter->hal_func.free_recv_priv(padapter);
  519. }
  520. void rtw_sta_ra_registed(_adapter *padapter, struct sta_info *psta)
  521. {
  522. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  523. HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
  524. if (psta == NULL) {
  525. RTW_ERR(FUNC_ADPT_FMT" sta is NULL\n", FUNC_ADPT_ARG(padapter));
  526. rtw_warn_on(1);
  527. return;
  528. }
  529. #ifdef CONFIG_AP_MODE
  530. if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
  531. if (psta->cmn.aid > padapter->stapriv.max_aid) {
  532. RTW_ERR("station aid %d exceed the max number\n", psta->cmn.aid);
  533. rtw_warn_on(1);
  534. return;
  535. }
  536. rtw_ap_update_sta_ra_info(padapter, psta);
  537. }
  538. #endif
  539. psta->cmn.ra_info.ra_bw_mode = rtw_get_tx_bw_mode(padapter, psta);
  540. /*set correct initial date rate for each mac_id */
  541. hal_data->INIDATA_RATE[psta->cmn.mac_id] = psta->init_rate;
  542. rtw_phydm_ra_registed(padapter, psta);
  543. }
  544. void rtw_hal_update_ra_mask(struct sta_info *psta)
  545. {
  546. _adapter *padapter;
  547. if (!psta)
  548. return;
  549. padapter = psta->padapter;
  550. rtw_sta_ra_registed(padapter, psta);
  551. }
  552. /* Start specifical interface thread */
  553. void rtw_hal_start_thread(_adapter *padapter)
  554. {
  555. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  556. #ifndef CONFIG_SDIO_TX_TASKLET
  557. padapter->hal_func.run_thread(padapter);
  558. #endif
  559. #endif
  560. }
  561. /* Start specifical interface thread */
  562. void rtw_hal_stop_thread(_adapter *padapter)
  563. {
  564. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  565. #ifndef CONFIG_SDIO_TX_TASKLET
  566. padapter->hal_func.cancel_thread(padapter);
  567. #endif
  568. #endif
  569. }
  570. u32 rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
  571. {
  572. u32 data = 0;
  573. if (padapter->hal_func.read_bbreg)
  574. data = padapter->hal_func.read_bbreg(padapter, RegAddr, BitMask);
  575. return data;
  576. }
  577. void rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
  578. {
  579. if (padapter->hal_func.write_bbreg)
  580. padapter->hal_func.write_bbreg(padapter, RegAddr, BitMask, Data);
  581. }
  582. u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask)
  583. {
  584. u32 data = 0;
  585. if (padapter->hal_func.read_rfreg) {
  586. data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
  587. #ifdef DBG_IO
  588. if (match_rf_read_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
  589. RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n"
  590. , eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data);
  591. }
  592. #endif
  593. }
  594. return data;
  595. }
  596. void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
  597. {
  598. if (padapter->hal_func.write_rfreg) {
  599. #ifdef DBG_IO
  600. if (match_rf_write_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
  601. RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n"
  602. , eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data);
  603. }
  604. #endif
  605. padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
  606. #ifdef CONFIG_PCI_HCI
  607. if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/
  608. rtw_udelay_os(2);
  609. #endif
  610. }
  611. }
  612. #ifdef CONFIG_SYSON_INDIRECT_ACCESS
  613. u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask)
  614. {
  615. u32 data = 0;
  616. if (padapter->hal_func.read_syson_reg)
  617. data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask);
  618. return data;
  619. }
  620. void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
  621. {
  622. if (padapter->hal_func.write_syson_reg)
  623. padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data);
  624. }
  625. #endif
  626. #if defined(CONFIG_PCI_HCI)
  627. s32 rtw_hal_interrupt_handler(_adapter *padapter)
  628. {
  629. s32 ret = _FAIL;
  630. ret = padapter->hal_func.interrupt_handler(padapter);
  631. return ret;
  632. }
  633. #endif
  634. #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
  635. void rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
  636. {
  637. padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf);
  638. }
  639. #endif
  640. void rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80)
  641. {
  642. PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
  643. u8 cch_160 = Bandwidth == CHANNEL_WIDTH_160 ? channel : 0;
  644. u8 cch_80 = Bandwidth == CHANNEL_WIDTH_80 ? channel : 0;
  645. u8 cch_40 = Bandwidth == CHANNEL_WIDTH_40 ? channel : 0;
  646. u8 cch_20 = Bandwidth == CHANNEL_WIDTH_20 ? channel : 0;
  647. if (rtw_phydm_is_iqk_in_progress(padapter))
  648. RTW_ERR("%s, %d, IQK may race condition\n", __func__, __LINE__);
  649. #ifdef CONFIG_MP_INCLUDED
  650. /* MP mode channel don't use secondary channel */
  651. if (rtw_mp_mode_check(padapter) == _FALSE)
  652. #endif
  653. {
  654. #if 0
  655. if (cch_160 != 0)
  656. cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80);
  657. #endif
  658. if (cch_80 != 0)
  659. cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80);
  660. if (cch_40 != 0)
  661. cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, Offset40);
  662. }
  663. pHalData->cch_80 = cch_80;
  664. pHalData->cch_40 = cch_40;
  665. pHalData->cch_20 = cch_20;
  666. if (0)
  667. RTW_INFO("%s cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u)\n", __func__
  668. , channel, ch_width_str(Bandwidth), Offset40, Offset80
  669. , pHalData->cch_80, pHalData->cch_40, pHalData->cch_20);
  670. padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80);
  671. }
  672. void rtw_hal_set_tx_power_level(_adapter *padapter, u8 channel)
  673. {
  674. if (padapter->hal_func.set_tx_power_level_handler)
  675. padapter->hal_func.set_tx_power_level_handler(padapter, channel);
  676. }
  677. void rtw_hal_get_tx_power_level(_adapter *padapter, s32 *powerlevel)
  678. {
  679. if (padapter->hal_func.get_tx_power_level_handler)
  680. padapter->hal_func.get_tx_power_level_handler(padapter, powerlevel);
  681. }
  682. void rtw_hal_dm_watchdog(_adapter *padapter)
  683. {
  684. rtw_hal_turbo_edca(padapter);
  685. padapter->hal_func.hal_dm_watchdog(padapter);
  686. #ifdef CONFIG_PCI_DYNAMIC_ASPM
  687. rtw_pci_aspm_config_dynamic_l1_ilde_time(padapter);
  688. #endif
  689. }
  690. #ifdef CONFIG_LPS_LCLK_WD_TIMER
  691. void rtw_hal_dm_watchdog_in_lps(_adapter *padapter)
  692. {
  693. #if defined(CONFIG_CONCURRENT_MODE)
  694. #ifndef CONFIG_FW_MULTI_PORT_SUPPORT
  695. if (padapter->hw_port != HW_PORT0)
  696. return;
  697. #endif
  698. #endif
  699. if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE)
  700. rtw_phydm_watchdog_in_lps_lclk(padapter);/* this function caller is in interrupt context */
  701. }
  702. #endif /*CONFIG_LPS_LCLK_WD_TIMER*/
  703. void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
  704. {
  705. padapter->hal_func.SetBeaconRelatedRegistersHandler(padapter);
  706. }
  707. #ifdef CONFIG_HOSTAPD_MLME
  708. s32 rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
  709. {
  710. if (padapter->hal_func.hostap_mgnt_xmit_entry)
  711. return padapter->hal_func.hostap_mgnt_xmit_entry(padapter, pkt);
  712. return _FAIL;
  713. }
  714. #endif /* CONFIG_HOSTAPD_MLME */
  715. #ifdef DBG_CONFIG_ERROR_DETECT
  716. void rtw_hal_sreset_init(_adapter *padapter)
  717. {
  718. padapter->hal_func.sreset_init_value(padapter);
  719. }
  720. void rtw_hal_sreset_reset(_adapter *padapter)
  721. {
  722. padapter = GET_PRIMARY_ADAPTER(padapter);
  723. padapter->hal_func.silentreset(padapter);
  724. }
  725. void rtw_hal_sreset_reset_value(_adapter *padapter)
  726. {
  727. padapter->hal_func.sreset_reset_value(padapter);
  728. }
  729. void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
  730. {
  731. padapter->hal_func.sreset_xmit_status_check(padapter);
  732. }
  733. void rtw_hal_sreset_linked_status_check(_adapter *padapter)
  734. {
  735. padapter->hal_func.sreset_linked_status_check(padapter);
  736. }
  737. u8 rtw_hal_sreset_get_wifi_status(_adapter *padapter)
  738. {
  739. return padapter->hal_func.sreset_get_wifi_status(padapter);
  740. }
  741. bool rtw_hal_sreset_inprogress(_adapter *padapter)
  742. {
  743. padapter = GET_PRIMARY_ADAPTER(padapter);
  744. return padapter->hal_func.sreset_inprogress(padapter);
  745. }
  746. #endif /* DBG_CONFIG_ERROR_DETECT */
  747. #ifdef CONFIG_IOL
  748. int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_waiting_ms, u32 bndy_cnt)
  749. {
  750. if (adapter->hal_func.IOL_exec_cmds_sync)
  751. return adapter->hal_func.IOL_exec_cmds_sync(adapter, xmit_frame, max_waiting_ms, bndy_cnt);
  752. return _FAIL;
  753. }
  754. #endif
  755. #ifdef CONFIG_XMIT_THREAD_MODE
  756. s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
  757. {
  758. return padapter->hal_func.xmit_thread_handler(padapter);
  759. }
  760. #endif
  761. #ifdef CONFIG_RECV_THREAD_MODE
  762. s32 rtw_hal_recv_hdl(_adapter *adapter)
  763. {
  764. return adapter->hal_func.recv_hdl(adapter);
  765. }
  766. #endif
  767. void rtw_hal_notch_filter(_adapter *adapter, bool enable)
  768. {
  769. if (adapter->hal_func.hal_notch_filter)
  770. adapter->hal_func.hal_notch_filter(adapter, enable);
  771. }
  772. #ifdef CONFIG_FW_C2H_REG
  773. inline bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf)
  774. {
  775. HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
  776. HAL_VERSION *hal_ver = &HalData->version_id;
  777. bool ret = _FAIL;
  778. ret = C2H_ID_88XX(buf) || C2H_PLEN_88XX(buf);
  779. return ret;
  780. }
  781. inline s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf)
  782. {
  783. HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
  784. HAL_VERSION *hal_ver = &HalData->version_id;
  785. s32 ret = _FAIL;
  786. ret = c2h_evt_read_88xx(adapter, buf);
  787. return ret;
  788. }
  789. bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload)
  790. {
  791. HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
  792. HAL_VERSION *hal_ver = &HalData->version_id;
  793. bool ret = _FAIL;
  794. *id = C2H_ID_88XX(buf);
  795. *seq = C2H_SEQ_88XX(buf);
  796. *plen = C2H_PLEN_88XX(buf);
  797. *payload = C2H_PAYLOAD_88XX(buf);
  798. ret = _SUCCESS;
  799. return ret;
  800. }
  801. #endif /* CONFIG_FW_C2H_REG */
  802. #ifdef CONFIG_FW_C2H_PKT
  803. bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload)
  804. {
  805. HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
  806. HAL_VERSION *hal_ver = &HalData->version_id;
  807. bool ret = _FAIL;
  808. if (!buf || len > 256 || len < 3)
  809. goto exit;
  810. *id = C2H_ID_88XX(buf);
  811. *seq = C2H_SEQ_88XX(buf);
  812. *plen = len - 2;
  813. *payload = C2H_PAYLOAD_88XX(buf);
  814. ret = _SUCCESS;
  815. exit:
  816. return ret;
  817. }
  818. #endif /* CONFIG_FW_C2H_PKT */
  819. #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
  820. #include <rtw_bt_mp.h> /* for MPTBT_FwC2hBtMpCtrl */
  821. #endif
  822. s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
  823. {
  824. u8 sub_id = 0;
  825. s32 ret = _SUCCESS;
  826. switch (id) {
  827. case C2H_FW_SCAN_COMPLETE:
  828. RTW_INFO("[C2H], FW Scan Complete\n");
  829. break;
  830. #ifdef CONFIG_BT_COEXIST
  831. case C2H_BT_INFO:
  832. rtw_btcoex_BtInfoNotify(adapter, plen, payload);
  833. break;
  834. case C2H_BT_MP_INFO:
  835. #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
  836. MPTBT_FwC2hBtMpCtrl(adapter, payload, plen);
  837. #endif
  838. rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
  839. break;
  840. case C2H_MAILBOX_STATUS:
  841. RTW_DBG_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
  842. break;
  843. case C2H_WLAN_INFO:
  844. rtw_btcoex_WlFwDbgInfoNotify(adapter, payload, plen);
  845. break;
  846. #endif /* CONFIG_BT_COEXIST */
  847. case C2H_IQK_FINISH:
  848. c2h_iqk_offload(adapter, payload, plen);
  849. break;
  850. #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
  851. case C2H_FW_CHNL_SWITCH_COMPLETE:
  852. rtw_tdls_chsw_oper_done(adapter);
  853. break;
  854. case C2H_BCN_EARLY_RPT:
  855. rtw_tdls_ch_sw_back_to_base_chnl(adapter);
  856. break;
  857. #endif
  858. #ifdef CONFIG_MCC_MODE
  859. case C2H_MCC:
  860. rtw_hal_mcc_c2h_handler(adapter, plen, payload);
  861. break;
  862. #endif
  863. #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
  864. case C2H_MAC_HIDDEN_RPT:
  865. c2h_mac_hidden_rpt_hdl(adapter, payload, plen);
  866. break;
  867. case C2H_MAC_HIDDEN_RPT_2:
  868. c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen);
  869. break;
  870. #endif
  871. case C2H_DEFEATURE_DBG:
  872. c2h_defeature_dbg_hdl(adapter, payload, plen);
  873. break;
  874. #ifdef CONFIG_RTW_CUSTOMER_STR
  875. case C2H_CUSTOMER_STR_RPT:
  876. c2h_customer_str_rpt_hdl(adapter, payload, plen);
  877. break;
  878. case C2H_CUSTOMER_STR_RPT_2:
  879. c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
  880. break;
  881. #endif
  882. #ifdef RTW_PER_CMD_SUPPORT_FW
  883. case C2H_PER_RATE_RPT:
  884. c2h_per_rate_rpt_hdl(adapter, payload, plen);
  885. break;
  886. #endif
  887. case C2H_EXTEND:
  888. sub_id = payload[0];
  889. /* no handle, goto default */
  890. default:
  891. if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE)
  892. ret = _FAIL;
  893. break;
  894. }
  895. exit:
  896. if (ret != _SUCCESS) {
  897. if (id == C2H_EXTEND)
  898. RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id);
  899. else
  900. RTW_WARN("%s: unknown C2H(0x%02x)\n", __func__, id);
  901. }
  902. return ret;
  903. }
  904. #ifndef RTW_HALMAC
  905. s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
  906. {
  907. s32 ret = _FAIL;
  908. ret = adapter->hal_func.c2h_handler(adapter, id, seq, plen, payload);
  909. if (ret != _SUCCESS)
  910. ret = c2h_handler(adapter, id, seq, plen, payload);
  911. return ret;
  912. }
  913. s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
  914. {
  915. switch (id) {
  916. case C2H_CCX_TX_RPT:
  917. case C2H_BT_MP_INFO:
  918. case C2H_FW_CHNL_SWITCH_COMPLETE:
  919. case C2H_IQK_FINISH:
  920. case C2H_MCC:
  921. case C2H_BCN_EARLY_RPT:
  922. case C2H_AP_REQ_TXRPT:
  923. case C2H_SPC_STAT:
  924. return _TRUE;
  925. default:
  926. return _FALSE;
  927. }
  928. }
  929. #endif /* !RTW_HALMAC */
  930. s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)
  931. {
  932. return GET_HAL_DATA(padapter)->bDisableSWChannelPlan;
  933. }
  934. static s32 _rtw_hal_macid_sleep(_adapter *adapter, u8 macid, u8 sleep)
  935. {
  936. struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
  937. u16 reg_sleep;
  938. u8 bit_shift;
  939. u32 val32;
  940. s32 ret = _FAIL;
  941. if (macid >= macid_ctl->num) {
  942. RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n"
  943. , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" , macid);
  944. goto exit;
  945. }
  946. if (macid < 32) {
  947. reg_sleep = macid_ctl->reg_sleep_m0;
  948. bit_shift = macid;
  949. #if (MACID_NUM_SW_LIMIT > 32)
  950. } else if (macid < 64) {
  951. reg_sleep = macid_ctl->reg_sleep_m1;
  952. bit_shift = macid - 32;
  953. #endif
  954. #if (MACID_NUM_SW_LIMIT > 64)
  955. } else if (macid < 96) {
  956. reg_sleep = macid_ctl->reg_sleep_m2;
  957. bit_shift = macid - 64;
  958. #endif
  959. #if (MACID_NUM_SW_LIMIT > 96)
  960. } else if (macid < 128) {
  961. reg_sleep = macid_ctl->reg_sleep_m3;
  962. bit_shift = macid - 96;
  963. #endif
  964. } else {
  965. rtw_warn_on(1);
  966. goto exit;
  967. }
  968. if (!reg_sleep) {
  969. rtw_warn_on(1);
  970. goto exit;
  971. }
  972. val32 = rtw_read32(adapter, reg_sleep);
  973. RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n"
  974. , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
  975. , macid, reg_sleep, val32);
  976. ret = _SUCCESS;
  977. if (sleep) {
  978. if (val32 & BIT(bit_shift))
  979. goto exit;
  980. val32 |= BIT(bit_shift);
  981. } else {
  982. if (!(val32 & BIT(bit_shift)))
  983. goto exit;
  984. val32 &= ~BIT(bit_shift);
  985. }
  986. rtw_write32(adapter, reg_sleep, val32);
  987. exit:
  988. return ret;
  989. }
  990. inline s32 rtw_hal_macid_sleep(_adapter *adapter, u8 macid)
  991. {
  992. return _rtw_hal_macid_sleep(adapter, macid, 1);
  993. }
  994. inline s32 rtw_hal_macid_wakeup(_adapter *adapter, u8 macid)
  995. {
  996. return _rtw_hal_macid_sleep(adapter, macid, 0);
  997. }
  998. static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 sleep)
  999. {
  1000. struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
  1001. u16 reg_sleep;
  1002. u32 m;
  1003. u8 mid = 0;
  1004. u32 val32;
  1005. do {
  1006. if (mid == 0) {
  1007. m = bmp->m0;
  1008. reg_sleep = macid_ctl->reg_sleep_m0;
  1009. #if (MACID_NUM_SW_LIMIT > 32)
  1010. } else if (mid == 1) {
  1011. m = bmp->m1;
  1012. reg_sleep = macid_ctl->reg_sleep_m1;
  1013. #endif
  1014. #if (MACID_NUM_SW_LIMIT > 64)
  1015. } else if (mid == 2) {
  1016. m = bmp->m2;
  1017. reg_sleep = macid_ctl->reg_sleep_m2;
  1018. #endif
  1019. #if (MACID_NUM_SW_LIMIT > 96)
  1020. } else if (mid == 3) {
  1021. m = bmp->m3;
  1022. reg_sleep = macid_ctl->reg_sleep_m3;
  1023. #endif
  1024. } else {
  1025. rtw_warn_on(1);
  1026. break;
  1027. }
  1028. if (m == 0)
  1029. goto move_next;
  1030. if (!reg_sleep) {
  1031. rtw_warn_on(1);
  1032. break;
  1033. }
  1034. val32 = rtw_read32(adapter, reg_sleep);
  1035. RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n"
  1036. , ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
  1037. , mid, m, reg_sleep, val32);
  1038. if (sleep) {
  1039. if ((val32 & m) == m)
  1040. goto move_next;
  1041. val32 |= m;
  1042. } else {
  1043. if ((val32 & m) == 0)
  1044. goto move_next;
  1045. val32 &= ~m;
  1046. }
  1047. rtw_write32(adapter, reg_sleep, val32);
  1048. move_next:
  1049. mid++;
  1050. } while (mid * 32 < MACID_NUM_SW_LIMIT);
  1051. return _SUCCESS;
  1052. }
  1053. inline s32 rtw_hal_macid_sleep_all_used(_adapter *adapter)
  1054. {
  1055. struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
  1056. return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 1);
  1057. }
  1058. inline s32 rtw_hal_macid_wakeup_all_used(_adapter *adapter)
  1059. {
  1060. struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
  1061. return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 0);
  1062. }
  1063. s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
  1064. {
  1065. _adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
  1066. if (GET_HAL_DATA(pri_adapter)->bFWReady == _TRUE)
  1067. return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer);
  1068. else if (padapter->registrypriv.mp_mode == 0)
  1069. RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n"
  1070. , FUNC_ADPT_ARG(padapter), ElementID);
  1071. return _FAIL;
  1072. }
  1073. void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen,
  1074. u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
  1075. {
  1076. padapter->hal_func.fill_fake_txdesc(padapter, pDesc, BufferLen, IsPsPoll, IsBTQosNull, bDataFrame);
  1077. }
  1078. u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan)
  1079. {
  1080. u8 num = 0;
  1081. if (adapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
  1082. num = adapter->hal_func.hal_get_tx_buff_rsvd_page_num(adapter, wowlan);
  1083. } else {
  1084. #ifdef RTW_HALMAC
  1085. num = GET_HAL_DATA(adapter)->drv_rsvd_page_number;
  1086. #endif /* RTW_HALMAC */
  1087. }
  1088. return num;
  1089. }
  1090. #ifdef CONFIG_GPIO_API
  1091. void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag)
  1092. {
  1093. if (padapter->hal_func.update_hisr_hsisr_ind)
  1094. padapter->hal_func.update_hisr_hsisr_ind(padapter, flag);
  1095. }
  1096. int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num)
  1097. {
  1098. int ret = _SUCCESS;
  1099. if (padapter->hal_func.hal_gpio_func_check)
  1100. ret = padapter->hal_func.hal_gpio_func_check(padapter, gpio_num);
  1101. return ret;
  1102. }
  1103. void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
  1104. {
  1105. if (padapter->hal_func.hal_gpio_multi_func_reset)
  1106. padapter->hal_func.hal_gpio_multi_func_reset(padapter, gpio_num);
  1107. }
  1108. #endif
  1109. #ifdef CONFIG_FW_CORRECT_BCN
  1110. void rtw_hal_fw_correct_bcn(_adapter *padapter)
  1111. {
  1112. if (padapter->hal_func.fw_correct_bcn)
  1113. padapter->hal_func.fw_correct_bcn(padapter);
  1114. }
  1115. #endif
  1116. void rtw_hal_set_tx_power_index(PADAPTER padapter, u32 powerindex, enum rf_path rfpath, u8 rate)
  1117. {
  1118. return padapter->hal_func.set_tx_power_index_handler(padapter, powerindex, rfpath, rate);
  1119. }
  1120. u8 rtw_hal_get_tx_power_index(PADAPTER padapter, enum rf_path rfpath, u8 rate, u8 bandwidth, u8 channel, struct txpwr_idx_comp *tic)
  1121. {
  1122. return padapter->hal_func.get_tx_power_index_handler(padapter, rfpath, rate, bandwidth, channel, tic);
  1123. }
  1124. #ifdef RTW_HALMAC
  1125. /*
  1126. * Description:
  1127. * Initialize MAC registers
  1128. *
  1129. * Return:
  1130. * _TRUE success
  1131. * _FALSE fail
  1132. */
  1133. u8 rtw_hal_init_mac_register(PADAPTER adapter)
  1134. {
  1135. return adapter->hal_func.init_mac_register(adapter);
  1136. }
  1137. /*
  1138. * Description:
  1139. * Initialize PHY(BB/RF) related functions
  1140. *
  1141. * Return:
  1142. * _TRUE success
  1143. * _FALSE fail
  1144. */
  1145. u8 rtw_hal_init_phy(PADAPTER adapter)
  1146. {
  1147. return adapter->hal_func.init_phy(adapter);
  1148. }
  1149. #endif /* RTW_HALMAC */
  1150. #ifdef CONFIG_RFKILL_POLL
  1151. bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid)
  1152. {
  1153. bool ret;
  1154. if (adapter->hal_func.hal_radio_onoff_check)
  1155. ret = adapter->hal_func.hal_radio_onoff_check(adapter, valid);
  1156. else {
  1157. *valid = 0;
  1158. ret = _FALSE;
  1159. }
  1160. return ret;
  1161. }
  1162. #endif
  1163. #define rtw_hal_error_msg(ops_fun) \
  1164. RTW_PRINT("### %s - Error : Please hook hal_func.%s ###\n", __FUNCTION__, ops_fun)
  1165. u8 rtw_hal_ops_check(_adapter *padapter)
  1166. {
  1167. u8 ret = _SUCCESS;
  1168. #if 1
  1169. /*** initialize section ***/
  1170. if (NULL == padapter->hal_func.read_chip_version) {
  1171. rtw_hal_error_msg("read_chip_version");
  1172. ret = _FAIL;
  1173. }
  1174. if (NULL == padapter->hal_func.init_default_value) {
  1175. rtw_hal_error_msg("init_default_value");
  1176. ret = _FAIL;
  1177. }
  1178. if (NULL == padapter->hal_func.intf_chip_configure) {
  1179. rtw_hal_error_msg("intf_chip_configure");
  1180. ret = _FAIL;
  1181. }
  1182. if (NULL == padapter->hal_func.read_adapter_info) {
  1183. rtw_hal_error_msg("read_adapter_info");
  1184. ret = _FAIL;
  1185. }
  1186. if (NULL == padapter->hal_func.hal_power_on) {
  1187. rtw_hal_error_msg("hal_power_on");
  1188. ret = _FAIL;
  1189. }
  1190. if (NULL == padapter->hal_func.hal_power_off) {
  1191. rtw_hal_error_msg("hal_power_off");
  1192. ret = _FAIL;
  1193. }
  1194. if (NULL == padapter->hal_func.hal_init) {
  1195. rtw_hal_error_msg("hal_init");
  1196. ret = _FAIL;
  1197. }
  1198. if (NULL == padapter->hal_func.hal_deinit) {
  1199. rtw_hal_error_msg("hal_deinit");
  1200. ret = _FAIL;
  1201. }
  1202. /*** xmit section ***/
  1203. if (NULL == padapter->hal_func.init_xmit_priv) {
  1204. rtw_hal_error_msg("init_xmit_priv");
  1205. ret = _FAIL;
  1206. }
  1207. if (NULL == padapter->hal_func.free_xmit_priv) {
  1208. rtw_hal_error_msg("free_xmit_priv");
  1209. ret = _FAIL;
  1210. }
  1211. if (NULL == padapter->hal_func.hal_xmit) {
  1212. rtw_hal_error_msg("hal_xmit");
  1213. ret = _FAIL;
  1214. }
  1215. if (NULL == padapter->hal_func.mgnt_xmit) {
  1216. rtw_hal_error_msg("mgnt_xmit");
  1217. ret = _FAIL;
  1218. }
  1219. #ifdef CONFIG_XMIT_THREAD_MODE
  1220. if (NULL == padapter->hal_func.xmit_thread_handler) {
  1221. rtw_hal_error_msg("xmit_thread_handler");
  1222. ret = _FAIL;
  1223. }
  1224. #endif
  1225. if (NULL == padapter->hal_func.hal_xmitframe_enqueue) {
  1226. rtw_hal_error_msg("hal_xmitframe_enqueue");
  1227. ret = _FAIL;
  1228. }
  1229. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  1230. #ifndef CONFIG_SDIO_TX_TASKLET
  1231. if (NULL == padapter->hal_func.run_thread) {
  1232. rtw_hal_error_msg("run_thread");
  1233. ret = _FAIL;
  1234. }
  1235. if (NULL == padapter->hal_func.cancel_thread) {
  1236. rtw_hal_error_msg("cancel_thread");
  1237. ret = _FAIL;
  1238. }
  1239. #endif
  1240. #endif
  1241. /*** recv section ***/
  1242. if (NULL == padapter->hal_func.init_recv_priv) {
  1243. rtw_hal_error_msg("init_recv_priv");
  1244. ret = _FAIL;
  1245. }
  1246. if (NULL == padapter->hal_func.free_recv_priv) {
  1247. rtw_hal_error_msg("free_recv_priv");
  1248. ret = _FAIL;
  1249. }
  1250. #ifdef CONFIG_RECV_THREAD_MODE
  1251. if (NULL == padapter->hal_func.recv_hdl) {
  1252. rtw_hal_error_msg("recv_hdl");
  1253. ret = _FAIL;
  1254. }
  1255. #endif
  1256. #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
  1257. if (NULL == padapter->hal_func.inirp_init) {
  1258. rtw_hal_error_msg("inirp_init");
  1259. ret = _FAIL;
  1260. }
  1261. if (NULL == padapter->hal_func.inirp_deinit) {
  1262. rtw_hal_error_msg("inirp_deinit");
  1263. ret = _FAIL;
  1264. }
  1265. #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
  1266. /*** interrupt hdl section ***/
  1267. #if defined(CONFIG_PCI_HCI)
  1268. if (NULL == padapter->hal_func.irp_reset) {
  1269. rtw_hal_error_msg("irp_reset");
  1270. ret = _FAIL;
  1271. }
  1272. #endif/*#if defined(CONFIG_PCI_HCI)*/
  1273. #if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))
  1274. if (NULL == padapter->hal_func.interrupt_handler) {
  1275. rtw_hal_error_msg("interrupt_handler");
  1276. ret = _FAIL;
  1277. }
  1278. #endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/
  1279. #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
  1280. if (NULL == padapter->hal_func.enable_interrupt) {
  1281. rtw_hal_error_msg("enable_interrupt");
  1282. ret = _FAIL;
  1283. }
  1284. if (NULL == padapter->hal_func.disable_interrupt) {
  1285. rtw_hal_error_msg("disable_interrupt");
  1286. ret = _FAIL;
  1287. }
  1288. #endif /* defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
  1289. /*** DM section ***/
  1290. if (NULL == padapter->hal_func.dm_init) {
  1291. rtw_hal_error_msg("dm_init");
  1292. ret = _FAIL;
  1293. }
  1294. if (NULL == padapter->hal_func.dm_deinit) {
  1295. rtw_hal_error_msg("dm_deinit");
  1296. ret = _FAIL;
  1297. }
  1298. if (NULL == padapter->hal_func.hal_dm_watchdog) {
  1299. rtw_hal_error_msg("hal_dm_watchdog");
  1300. ret = _FAIL;
  1301. }
  1302. /*** xxx section ***/
  1303. if (NULL == padapter->hal_func.set_chnl_bw_handler) {
  1304. rtw_hal_error_msg("set_chnl_bw_handler");
  1305. ret = _FAIL;
  1306. }
  1307. if (NULL == padapter->hal_func.set_hw_reg_handler) {
  1308. rtw_hal_error_msg("set_hw_reg_handler");
  1309. ret = _FAIL;
  1310. }
  1311. if (NULL == padapter->hal_func.GetHwRegHandler) {
  1312. rtw_hal_error_msg("GetHwRegHandler");
  1313. ret = _FAIL;
  1314. }
  1315. if (NULL == padapter->hal_func.get_hal_def_var_handler) {
  1316. rtw_hal_error_msg("get_hal_def_var_handler");
  1317. ret = _FAIL;
  1318. }
  1319. if (NULL == padapter->hal_func.SetHalDefVarHandler) {
  1320. rtw_hal_error_msg("SetHalDefVarHandler");
  1321. ret = _FAIL;
  1322. }
  1323. if (NULL == padapter->hal_func.GetHalODMVarHandler) {
  1324. rtw_hal_error_msg("GetHalODMVarHandler");
  1325. ret = _FAIL;
  1326. }
  1327. if (NULL == padapter->hal_func.SetHalODMVarHandler) {
  1328. rtw_hal_error_msg("SetHalODMVarHandler");
  1329. ret = _FAIL;
  1330. }
  1331. if (NULL == padapter->hal_func.SetBeaconRelatedRegistersHandler) {
  1332. rtw_hal_error_msg("SetBeaconRelatedRegistersHandler");
  1333. ret = _FAIL;
  1334. }
  1335. if (NULL == padapter->hal_func.fill_h2c_cmd) {
  1336. rtw_hal_error_msg("fill_h2c_cmd");
  1337. ret = _FAIL;
  1338. }
  1339. #ifdef RTW_HALMAC
  1340. if (NULL == padapter->hal_func.hal_mac_c2h_handler) {
  1341. rtw_hal_error_msg("hal_mac_c2h_handler");
  1342. ret = _FAIL;
  1343. }
  1344. #elif !defined(CONFIG_RTL8188E)
  1345. if (NULL == padapter->hal_func.c2h_handler) {
  1346. rtw_hal_error_msg("c2h_handler");
  1347. ret = _FAIL;
  1348. }
  1349. #endif
  1350. #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  1351. if (NULL == padapter->hal_func.fill_fake_txdesc) {
  1352. rtw_hal_error_msg("fill_fake_txdesc");
  1353. ret = _FAIL;
  1354. }
  1355. #endif
  1356. #ifndef RTW_HALMAC
  1357. if (NULL == padapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
  1358. rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num");
  1359. ret = _FAIL;
  1360. }
  1361. #endif /* !RTW_HALMAC */
  1362. #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  1363. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  1364. if (NULL == padapter->hal_func.clear_interrupt) {
  1365. rtw_hal_error_msg("clear_interrupt");
  1366. ret = _FAIL;
  1367. }
  1368. #endif
  1369. #endif /* CONFIG_WOWLAN */
  1370. if (NULL == padapter->hal_func.fw_dl) {
  1371. rtw_hal_error_msg("fw_dl");
  1372. ret = _FAIL;
  1373. }
  1374. #if defined(RTW_HALMAC) && defined(CONFIG_LPS_PG)
  1375. if (NULL == padapter->hal_func.fw_mem_dl) {
  1376. rtw_hal_error_msg("fw_mem_dl");
  1377. ret = _FAIL;
  1378. }
  1379. #endif
  1380. #ifdef CONFIG_FW_CORRECT_BCN
  1381. if (IS_HARDWARE_TYPE_8814A(padapter)
  1382. && NULL == padapter->hal_func.fw_correct_bcn) {
  1383. rtw_hal_error_msg("fw_correct_bcn");
  1384. ret = _FAIL;
  1385. }
  1386. #endif
  1387. if (!padapter->hal_func.set_tx_power_index_handler) {
  1388. rtw_hal_error_msg("set_tx_power_index_handler");
  1389. ret = _FAIL;
  1390. }
  1391. if (!padapter->hal_func.get_tx_power_index_handler) {
  1392. rtw_hal_error_msg("get_tx_power_index_handler");
  1393. ret = _FAIL;
  1394. }
  1395. /*** SReset section ***/
  1396. #ifdef DBG_CONFIG_ERROR_DETECT
  1397. if (NULL == padapter->hal_func.sreset_init_value) {
  1398. rtw_hal_error_msg("sreset_init_value");
  1399. ret = _FAIL;
  1400. }
  1401. if (NULL == padapter->hal_func.sreset_reset_value) {
  1402. rtw_hal_error_msg("sreset_reset_value");
  1403. ret = _FAIL;
  1404. }
  1405. if (NULL == padapter->hal_func.silentreset) {
  1406. rtw_hal_error_msg("silentreset");
  1407. ret = _FAIL;
  1408. }
  1409. if (NULL == padapter->hal_func.sreset_xmit_status_check) {
  1410. rtw_hal_error_msg("sreset_xmit_status_check");
  1411. ret = _FAIL;
  1412. }
  1413. if (NULL == padapter->hal_func.sreset_linked_status_check) {
  1414. rtw_hal_error_msg("sreset_linked_status_check");
  1415. ret = _FAIL;
  1416. }
  1417. if (NULL == padapter->hal_func.sreset_get_wifi_status) {
  1418. rtw_hal_error_msg("sreset_get_wifi_status");
  1419. ret = _FAIL;
  1420. }
  1421. if (NULL == padapter->hal_func.sreset_inprogress) {
  1422. rtw_hal_error_msg("sreset_inprogress");
  1423. ret = _FAIL;
  1424. }
  1425. #endif /* #ifdef DBG_CONFIG_ERROR_DETECT */
  1426. #ifdef RTW_HALMAC
  1427. if (NULL == padapter->hal_func.init_mac_register) {
  1428. rtw_hal_error_msg("init_mac_register");
  1429. ret = _FAIL;
  1430. }
  1431. if (NULL == padapter->hal_func.init_phy) {
  1432. rtw_hal_error_msg("init_phy");
  1433. ret = _FAIL;
  1434. }
  1435. #endif /* RTW_HALMAC */
  1436. #ifdef CONFIG_RFKILL_POLL
  1437. if (padapter->hal_func.hal_radio_onoff_check == NULL) {
  1438. rtw_hal_error_msg("hal_radio_onoff_check");
  1439. ret = _FAIL;
  1440. }
  1441. #endif
  1442. #endif
  1443. return ret;
  1444. }