halmac_bb_rf_88xx.c 11 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2016 - 2018 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. ******************************************************************************/
  15. #include "halmac_bb_rf_88xx.h"
  16. #include "halmac_88xx_cfg.h"
  17. #include "halmac_common_88xx.h"
  18. #include "halmac_init_88xx.h"
  19. #if HALMAC_88XX_SUPPORT
  20. /**
  21. * start_iqk_88xx() -trigger FW IQK
  22. * @adapter : the adapter of halmac
  23. * @param : IQK parameter
  24. * Author : KaiYuan Chang/Ivan Lin
  25. * Return : enum halmac_ret_status
  26. * More details of status code can be found in prototype document
  27. */
  28. enum halmac_ret_status
  29. start_iqk_88xx(struct halmac_adapter *adapter, struct halmac_iqk_para *param)
  30. {
  31. u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
  32. u16 seq_num = 0;
  33. enum halmac_ret_status status = HALMAC_RET_SUCCESS;
  34. struct halmac_h2c_header_info hdr_info;
  35. enum halmac_cmd_process_status *proc_status;
  36. proc_status = &adapter->halmac_state.iqk_state.proc_status;
  37. if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
  38. return HALMAC_RET_NO_DLFW;
  39. PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
  40. if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
  41. PLTFM_MSG_TRACE("[TRACE]Wait event(iqk)\n");
  42. return HALMAC_RET_BUSY_STATE;
  43. }
  44. *proc_status = HALMAC_CMD_PROCESS_SENDING;
  45. IQK_SET_CLEAR(h2c_buf, param->clear);
  46. IQK_SET_SEGMENT_IQK(h2c_buf, param->segment_iqk);
  47. hdr_info.sub_cmd_id = SUB_CMD_ID_IQK;
  48. hdr_info.content_size = 1;
  49. hdr_info.ack = 1;
  50. set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
  51. adapter->halmac_state.iqk_state.seq_num = seq_num;
  52. status = send_h2c_pkt_88xx(adapter, h2c_buf);
  53. if (status != HALMAC_RET_SUCCESS) {
  54. PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
  55. reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_IQK);
  56. return status;
  57. }
  58. PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
  59. return HALMAC_RET_SUCCESS;
  60. }
  61. /**
  62. * ctrl_pwr_tracking_88xx() -trigger FW power tracking
  63. * @adapter : the adapter of halmac
  64. * @opt : power tracking option
  65. * Author : KaiYuan Chang/Ivan Lin
  66. * Return : enum halmac_ret_status
  67. * More details of status code can be found in prototype document
  68. */
  69. enum halmac_ret_status
  70. ctrl_pwr_tracking_88xx(struct halmac_adapter *adapter,
  71. struct halmac_pwr_tracking_option *opt)
  72. {
  73. u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
  74. u16 seq_num = 0;
  75. enum halmac_ret_status status = HALMAC_RET_SUCCESS;
  76. struct halmac_h2c_header_info hdr_info;
  77. struct halmac_pwr_tracking_para *param;
  78. enum halmac_cmd_process_status *proc_status;
  79. proc_status = &adapter->halmac_state.pwr_trk_state.proc_status;
  80. if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
  81. return HALMAC_RET_NO_DLFW;
  82. PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
  83. if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
  84. PLTFM_MSG_TRACE("[TRACE]Wait event(pwr tracking)...\n");
  85. return HALMAC_RET_BUSY_STATE;
  86. }
  87. *proc_status = HALMAC_CMD_PROCESS_SENDING;
  88. PWR_TRK_SET_TYPE(h2c_buf, opt->type);
  89. PWR_TRK_SET_BBSWING_INDEX(h2c_buf, opt->bbswing_index);
  90. param = &opt->pwr_tracking_para[HALMAC_RF_PATH_A];
  91. PWR_TRK_SET_ENABLE_A(h2c_buf, param->enable);
  92. PWR_TRK_SET_TX_PWR_INDEX_A(h2c_buf, param->tx_pwr_index);
  93. PWR_TRK_SET_TSSI_VALUE_A(h2c_buf, param->tssi_value);
  94. PWR_TRK_SET_OFFSET_VALUE_A(h2c_buf, param->pwr_tracking_offset_value);
  95. param = &opt->pwr_tracking_para[HALMAC_RF_PATH_B];
  96. PWR_TRK_SET_ENABLE_B(h2c_buf, param->enable);
  97. PWR_TRK_SET_TX_PWR_INDEX_B(h2c_buf, param->tx_pwr_index);
  98. PWR_TRK_SET_TSSI_VALUE_B(h2c_buf, param->tssi_value);
  99. PWR_TRK_SET_OFFSET_VALUE_B(h2c_buf, param->pwr_tracking_offset_value);
  100. param = &opt->pwr_tracking_para[HALMAC_RF_PATH_C];
  101. PWR_TRK_SET_ENABLE_C(h2c_buf, param->enable);
  102. PWR_TRK_SET_TX_PWR_INDEX_C(h2c_buf, param->tx_pwr_index);
  103. PWR_TRK_SET_TSSI_VALUE_C(h2c_buf, param->tssi_value);
  104. PWR_TRK_SET_OFFSET_VALUE_C(h2c_buf, param->pwr_tracking_offset_value);
  105. param = &opt->pwr_tracking_para[HALMAC_RF_PATH_D];
  106. PWR_TRK_SET_ENABLE_D(h2c_buf, param->enable);
  107. PWR_TRK_SET_TX_PWR_INDEX_D(h2c_buf, param->tx_pwr_index);
  108. PWR_TRK_SET_TSSI_VALUE_D(h2c_buf, param->tssi_value);
  109. PWR_TRK_SET_OFFSET_VALUE_D(h2c_buf, param->pwr_tracking_offset_value);
  110. hdr_info.sub_cmd_id = SUB_CMD_ID_PWR_TRK;
  111. hdr_info.content_size = 20;
  112. hdr_info.ack = 1;
  113. set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
  114. adapter->halmac_state.pwr_trk_state.seq_num = seq_num;
  115. status = send_h2c_pkt_88xx(adapter, h2c_buf);
  116. if (status != HALMAC_RET_SUCCESS) {
  117. PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
  118. reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_POWER_TRACKING);
  119. return status;
  120. }
  121. PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
  122. return HALMAC_RET_SUCCESS;
  123. }
  124. enum halmac_ret_status
  125. get_iqk_status_88xx(struct halmac_adapter *adapter,
  126. enum halmac_cmd_process_status *proc_status)
  127. {
  128. *proc_status = adapter->halmac_state.iqk_state.proc_status;
  129. return HALMAC_RET_SUCCESS;
  130. }
  131. enum halmac_ret_status
  132. get_pwr_trk_status_88xx(struct halmac_adapter *adapter,
  133. enum halmac_cmd_process_status *proc_status)
  134. {
  135. *proc_status = adapter->halmac_state.pwr_trk_state.proc_status;
  136. return HALMAC_RET_SUCCESS;
  137. }
  138. enum halmac_ret_status
  139. get_psd_status_88xx(struct halmac_adapter *adapter,
  140. enum halmac_cmd_process_status *proc_status, u8 *data,
  141. u32 *size)
  142. {
  143. struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
  144. *proc_status = state->proc_status;
  145. if (!data)
  146. return HALMAC_RET_NULL_POINTER;
  147. if (!size)
  148. return HALMAC_RET_NULL_POINTER;
  149. if (*proc_status == HALMAC_CMD_PROCESS_DONE) {
  150. if (*size < state->data_size) {
  151. *size = state->data_size;
  152. return HALMAC_RET_BUFFER_TOO_SMALL;
  153. }
  154. *size = state->data_size;
  155. PLTFM_MEMCPY(data, state->data, *size);
  156. }
  157. return HALMAC_RET_SUCCESS;
  158. }
  159. /**
  160. * psd_88xx() - trigger fw psd
  161. * @adapter : the adapter of halmac
  162. * @start_psd : start PSD
  163. * @end_psd : end PSD
  164. * Author : KaiYuan Chang/Ivan Lin
  165. * Return : enum halmac_ret_status
  166. * More details of status code can be found in prototype document
  167. */
  168. enum halmac_ret_status
  169. psd_88xx(struct halmac_adapter *adapter, u16 start_psd, u16 end_psd)
  170. {
  171. u8 h2c_buf[H2C_PKT_SIZE_88XX] = { 0 };
  172. u16 seq_num = 0;
  173. enum halmac_ret_status status = HALMAC_RET_SUCCESS;
  174. struct halmac_h2c_header_info hdr_info;
  175. enum halmac_cmd_process_status *proc_status;
  176. proc_status = &adapter->halmac_state.psd_state.proc_status;
  177. if (halmac_fw_validate(adapter) != HALMAC_RET_SUCCESS)
  178. return HALMAC_RET_NO_DLFW;
  179. PLTFM_MSG_TRACE("[TRACE]%s ===>\n", __func__);
  180. if (*proc_status == HALMAC_CMD_PROCESS_SENDING) {
  181. PLTFM_MSG_TRACE("[TRACE]Wait event(psd)\n");
  182. return HALMAC_RET_BUSY_STATE;
  183. }
  184. if (adapter->halmac_state.psd_state.data) {
  185. PLTFM_FREE(adapter->halmac_state.psd_state.data,
  186. adapter->halmac_state.psd_state.data_size);
  187. adapter->halmac_state.psd_state.data = (u8 *)NULL;
  188. }
  189. adapter->halmac_state.psd_state.data_size = 0;
  190. adapter->halmac_state.psd_state.seg_size = 0;
  191. *proc_status = HALMAC_CMD_PROCESS_SENDING;
  192. PSD_SET_START_PSD(h2c_buf, start_psd);
  193. PSD_SET_END_PSD(h2c_buf, end_psd);
  194. hdr_info.sub_cmd_id = SUB_CMD_ID_PSD;
  195. hdr_info.content_size = 4;
  196. hdr_info.ack = 1;
  197. set_h2c_pkt_hdr_88xx(adapter, h2c_buf, &hdr_info, &seq_num);
  198. status = send_h2c_pkt_88xx(adapter, h2c_buf);
  199. if (status != HALMAC_RET_SUCCESS) {
  200. PLTFM_MSG_ERR("[ERR]send h2c pkt fail!!\n");
  201. reset_ofld_feature_88xx(adapter, HALMAC_FEATURE_PSD);
  202. return status;
  203. }
  204. PLTFM_MSG_TRACE("[TRACE]%s <===\n", __func__);
  205. return HALMAC_RET_SUCCESS;
  206. }
  207. enum halmac_ret_status
  208. get_h2c_ack_iqk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
  209. {
  210. u8 seq_num;
  211. u8 fw_rc;
  212. struct halmac_iqk_state *state = &adapter->halmac_state.iqk_state;
  213. enum halmac_cmd_process_status proc_status;
  214. seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
  215. PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
  216. state->seq_num, seq_num);
  217. if (seq_num != state->seq_num) {
  218. PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
  219. state->seq_num, seq_num);
  220. return HALMAC_RET_SUCCESS;
  221. }
  222. if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
  223. PLTFM_MSG_ERR("[ERR]not cmd sending\n");
  224. return HALMAC_RET_SUCCESS;
  225. }
  226. fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
  227. state->fw_rc = fw_rc;
  228. if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
  229. proc_status = HALMAC_CMD_PROCESS_DONE;
  230. state->proc_status = proc_status;
  231. PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, NULL, 0);
  232. } else {
  233. proc_status = HALMAC_CMD_PROCESS_ERROR;
  234. state->proc_status = proc_status;
  235. PLTFM_EVENT_SIG(HALMAC_FEATURE_IQK, proc_status, &fw_rc, 1);
  236. }
  237. return HALMAC_RET_SUCCESS;
  238. }
  239. enum halmac_ret_status
  240. get_h2c_ack_pwr_trk_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
  241. {
  242. u8 seq_num;
  243. u8 fw_rc;
  244. struct halmac_pwr_tracking_state *state;
  245. enum halmac_cmd_process_status proc_status;
  246. state = &adapter->halmac_state.pwr_trk_state;
  247. seq_num = (u8)H2C_ACK_HDR_GET_H2C_SEQ(buf);
  248. PLTFM_MSG_TRACE("[TRACE]Seq num : h2c->%d c2h->%d\n",
  249. state->seq_num, seq_num);
  250. if (seq_num != state->seq_num) {
  251. PLTFM_MSG_ERR("[ERR]Seq num mismatch : h2c->%d c2h->%d\n",
  252. state->seq_num, seq_num);
  253. return HALMAC_RET_SUCCESS;
  254. }
  255. if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
  256. PLTFM_MSG_ERR("[ERR]not cmd sending\n");
  257. return HALMAC_RET_SUCCESS;
  258. }
  259. fw_rc = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(buf);
  260. state->fw_rc = fw_rc;
  261. if ((enum halmac_h2c_return_code)fw_rc == HALMAC_H2C_RETURN_SUCCESS) {
  262. proc_status = HALMAC_CMD_PROCESS_DONE;
  263. state->proc_status = proc_status;
  264. PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
  265. NULL, 0);
  266. } else {
  267. proc_status = HALMAC_CMD_PROCESS_ERROR;
  268. state->proc_status = proc_status;
  269. PLTFM_EVENT_SIG(HALMAC_FEATURE_POWER_TRACKING, proc_status,
  270. &fw_rc, 1);
  271. }
  272. return HALMAC_RET_SUCCESS;
  273. }
  274. enum halmac_ret_status
  275. get_psd_data_88xx(struct halmac_adapter *adapter, u8 *buf, u32 size)
  276. {
  277. u8 seg_id;
  278. u8 seg_size;
  279. u8 seq_num;
  280. u16 total_size;
  281. enum halmac_cmd_process_status proc_status;
  282. struct halmac_psd_state *state = &adapter->halmac_state.psd_state;
  283. seq_num = (u8)PSD_DATA_GET_H2C_SEQ(buf);
  284. PLTFM_MSG_TRACE("[TRACE]seq num : h2c->%d c2h->%d\n",
  285. state->seq_num, seq_num);
  286. if (seq_num != state->seq_num) {
  287. PLTFM_MSG_ERR("[ERR]seq num mismatch : h2c->%d c2h->%d\n",
  288. state->seq_num, seq_num);
  289. return HALMAC_RET_SUCCESS;
  290. }
  291. if (state->proc_status != HALMAC_CMD_PROCESS_SENDING) {
  292. PLTFM_MSG_ERR("[ERR]not cmd sending\n");
  293. return HALMAC_RET_SUCCESS;
  294. }
  295. total_size = (u16)PSD_DATA_GET_TOTAL_SIZE(buf);
  296. seg_id = (u8)PSD_DATA_GET_SEGMENT_ID(buf);
  297. seg_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(buf);
  298. state->data_size = total_size;
  299. if (!state->data)
  300. state->data = (u8 *)PLTFM_MALLOC(state->data_size);
  301. if (seg_id == 0)
  302. state->seg_size = seg_size;
  303. PLTFM_MEMCPY(state->data + seg_id * state->seg_size,
  304. buf + C2H_DATA_OFFSET_88XX, seg_size);
  305. if (PSD_DATA_GET_END_SEGMENT(buf) == 0)
  306. return HALMAC_RET_SUCCESS;
  307. proc_status = HALMAC_CMD_PROCESS_DONE;
  308. state->proc_status = proc_status;
  309. PLTFM_EVENT_SIG(HALMAC_FEATURE_PSD, proc_status, state->data,
  310. state->data_size);
  311. return HALMAC_RET_SUCCESS;
  312. }
  313. #endif /* HALMAC_88XX_SUPPORT */