rtl8821ce_halmac.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2016 - 2018 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. *****************************************************************************/
  15. #define _RTL8821CE_HALMAC_C_
  16. #include <drv_types.h> /* struct dvobj_priv and etc. */
  17. #include "../../hal_halmac.h"
  18. #include "rtl8821ce.h"
  19. static u8 pci_write_port_not_xmitframe(void *d, u32 size, u8 *pBuf, u8 qsel)
  20. {
  21. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  22. struct pci_dev *pdev = pobj->ppcidev;
  23. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  24. u32 page_size = 0;
  25. u8 *txbd;
  26. u64 txbd_dma;
  27. u8 ret = _SUCCESS;
  28. dma_addr_t mapping;
  29. u16 seg_num = 2 << TX_BUFFER_SEG_NUM;
  30. u16 page_size_length = 0;
  31. #ifdef CONFIG_64BIT_DMA
  32. u16 tmp = rtw_read16(padapter, REG_RX_RXBD_NUM_8821C);
  33. /* using 64bit */
  34. rtw_write16(padapter, REG_RX_RXBD_NUM_8821C, tmp | 0x8000);
  35. #endif
  36. rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
  37. /* map TX DESC buf_addr (including TX DESC + tx data) */
  38. mapping = pci_map_single(pdev, pBuf,
  39. size+TX_WIFI_INFO_SIZE, PCI_DMA_TODEVICE);
  40. /* Calculate page size.
  41. * Total buffer length including TX_WIFI_INFO and PacketLen
  42. */
  43. page_size_length =
  44. (size + TX_WIFI_INFO_SIZE) / page_size;
  45. if (((size + TX_WIFI_INFO_SIZE) % page_size) > 0)
  46. page_size_length++;
  47. txbd = pci_alloc_consistent(pdev,
  48. sizeof(struct tx_buf_desc), &txbd_dma);
  49. if (!txbd) {
  50. pci_unmap_single(pdev, mapping,
  51. size + TX_WIFI_INFO_SIZE, PCI_DMA_FROMDEVICE);
  52. return _FALSE;
  53. }
  54. if (qsel == HALMAC_TXDESC_QSEL_H2C_CMD) {
  55. rtw_write32(padapter, REG_H2CQ_TXBD_DESA_8821C,
  56. txbd_dma & DMA_BIT_MASK(32));
  57. #ifdef CONFIG_64BIT_DMA
  58. rtw_write32(padapter, REG_H2CQ_TXBD_DESA_8821C + 4,
  59. txbd_dma >> 32);
  60. #endif
  61. rtw_write32(padapter, REG_H2CQ_TXBD_NUM_8821C,
  62. 2 | ((RTL8821CE_SEG_NUM << 12) & 0x3000));
  63. } else {
  64. /* Set BCN BD Reg */
  65. rtw_write32(padapter, REG_BCNQ_TXBD_DESA_8821C,
  66. txbd_dma & DMA_BIT_MASK(32));
  67. #ifdef CONFIG_64BIT_DMA
  68. rtw_write32(padapter, REG_BCNQ_TXBD_DESA_8821C + 4,
  69. txbd_dma >> 32);
  70. #endif
  71. }
  72. /*
  73. * Reset all tx buffer desciprtor content
  74. * -- Reset first element
  75. */
  76. _rtw_memset(txbd, 0, sizeof(struct tx_buf_desc));
  77. /*
  78. * Fill buffer length of the first buffer,
  79. * For 8821ce, it is required that TX_WIFI_INFO is put in first segment,
  80. * and the size of the first segment cannot be larger than
  81. * TX_WIFI_INFO_SIZE.
  82. */
  83. SET_TX_BD_TX_BUFF_SIZE0(txbd, TX_WIFI_INFO_SIZE);
  84. SET_TX_BD_PSB(txbd, page_size_length);
  85. /* starting addr of TXDESC */
  86. SET_TX_BD_PHYSICAL_ADDR0_LOW(txbd, mapping);
  87. #ifdef CONFIG_64BIT_DMA
  88. SET_TX_BD_PHYSICAL_ADDR0_HIGH(txbd, mapping>>32);
  89. #endif
  90. /*
  91. * It is assumed that in linux implementation, packet is coalesced
  92. * in only one buffer. Extension mode is not supported here
  93. */
  94. SET_TXBUFFER_DESC_LEN_WITH_OFFSET(txbd, 1, size);
  95. SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(txbd, 1,
  96. mapping + TX_WIFI_INFO_SIZE); /* pkt */
  97. #ifdef CONFIG_64BIT_DMA
  98. SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(txbd, 1,
  99. (mapping + TX_WIFI_INFO_SIZE) >> 32); /* pkt */
  100. #endif
  101. /* Need Comment */
  102. wmb();
  103. if (qsel == HALMAC_TXDESC_QSEL_H2C_CMD)
  104. rtw_write16(padapter, REG_H2CQ_TXBD_IDX, 1);
  105. else {
  106. /* fill_txbd_own*/
  107. SET_TX_BD_OWN(txbd, 1);
  108. /* kick start */
  109. rtw_write8(padapter, REG_RX_RXBD_NUM + 1,
  110. rtw_read8(padapter, REG_RX_RXBD_NUM + 1) | BIT(4));
  111. }
  112. udelay(100);
  113. pci_free_consistent(pdev, sizeof(struct tx_buf_desc), txbd, txbd_dma);
  114. pci_unmap_single(pdev, mapping,
  115. size + TX_WIFI_INFO_SIZE, PCI_DMA_FROMDEVICE);
  116. return ret;
  117. }
  118. static u8 pci_write_data_not_xmitframe(void *d, u8 *pBuf, u32 size, u8 qsel)
  119. {
  120. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  121. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  122. struct halmac_adapter *halmac = dvobj_to_halmac((struct dvobj_priv *)d);
  123. struct halmac_api *api = HALMAC_GET_API(halmac);
  124. u32 desclen = 0;
  125. u8 *buf = NULL;
  126. u8 ret = _FALSE;
  127. if ((size + TXDESC_OFFSET) > MAX_CMDBUF_SZ) {
  128. RTW_INFO("%s: total buffer size(%d) > MAX_CMDBUF_SZ(%d)\n"
  129. , __func__, size + TXDESC_OFFSET, MAX_CMDBUF_SZ);
  130. return _FALSE;
  131. }
  132. rtw_halmac_get_tx_desc_size(pobj, &desclen);
  133. buf = rtw_zmalloc(desclen + size);
  134. if (!buf) {
  135. RTW_INFO("%s: rtw_zmalloc for rsvd Fail\n", __func__);
  136. return _FALSE;
  137. }
  138. _rtw_memcpy(buf + desclen, pBuf, size);
  139. SET_TX_DESC_TXPKTSIZE_8821C(buf, size);
  140. /* TX_DESC is not included in the data,
  141. * driver needs to fill in the TX_DESC with qsel=h2c
  142. * Offset in TX_DESC should be set to 0.
  143. */
  144. if (qsel == HALMAC_TXDESC_QSEL_H2C_CMD)
  145. SET_TX_DESC_OFFSET_8821C(buf, 0);
  146. else
  147. SET_TX_DESC_OFFSET_8821C(buf, desclen);
  148. SET_TX_DESC_QSEL_8821C(buf, qsel);
  149. api->halmac_fill_txdesc_checksum(halmac, buf);
  150. ret = pci_write_port_not_xmitframe(d, size, buf, qsel);
  151. if (ret == _SUCCESS)
  152. ret = _TRUE;
  153. else
  154. ret = _FALSE;
  155. rtw_mfree(buf, desclen + size);
  156. return _TRUE;
  157. }
  158. static u8 pci_write_data_rsvd_page_xmitframe(void *d, u8 *pBuf, u32 size)
  159. {
  160. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  161. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  162. struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
  163. struct xmit_frame *pcmdframe = NULL;
  164. struct pkt_attrib *pattrib = NULL;
  165. u32 desclen = 0;
  166. struct rtw_tx_ring *ring = &pxmitpriv->tx_ring[BCN_QUEUE_INX];
  167. struct pci_dev *pdev = pobj->ppcidev;
  168. struct xmit_buf *pxmitbuf = NULL;
  169. u8 DLBcnCount = 0;
  170. u32 poll = 0;
  171. u8 *txbd;
  172. bool bcn_valid = _FALSE;
  173. u8 *txdesc = NULL;
  174. dma_addr_t mapping;
  175. if (size + TXDESC_OFFSET > MAX_CMDBUF_SZ) {
  176. RTW_INFO("%s: total buffer size(%d) > MAX_CMDBUF_SZ(%d)\n"
  177. , __func__, size + TXDESC_OFFSET, MAX_CMDBUF_SZ);
  178. return _FALSE;
  179. }
  180. pcmdframe = rtw_alloc_cmdxmitframe(pxmitpriv);
  181. if (pcmdframe == NULL) {
  182. RTW_INFO("%s: alloc ReservedPagePacket fail!\n", __func__);
  183. return _FALSE;
  184. }
  185. pxmitbuf = pcmdframe->pxmitbuf;
  186. rtw_halmac_get_tx_desc_size(pobj, &desclen);
  187. txdesc = pcmdframe->buf_addr;
  188. _rtw_memcpy((txdesc + desclen), pBuf, size); /* shift desclen */
  189. /* update attribute */
  190. pattrib = &pcmdframe->attrib;
  191. update_mgntframe_attrib(padapter, pattrib);
  192. pattrib->qsel = QSLT_BEACON;
  193. pattrib->pktlen = size;
  194. pattrib->last_txcmdsz = size;
  195. /* Clear beacon valid check bit. */
  196. rtw_hal_set_hwreg(padapter, HW_VAR_BCN_VALID, NULL);
  197. dump_mgntframe(padapter, pcmdframe);
  198. DLBcnCount = 0;
  199. poll = 0;
  200. do {
  201. DLBcnCount++;
  202. do {
  203. rtw_yield_os();
  204. /* does rsvd page download OK. */
  205. rtw_hal_get_hwreg(padapter,
  206. HW_VAR_BCN_VALID,(u8 *)(&bcn_valid));
  207. poll++;
  208. } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(padapter));
  209. } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(padapter));
  210. txbd = (u8 *)(&ring->buf_desc[0]);
  211. mapping = GET_TX_BD_PHYSICAL_ADDR0_LOW(txbd);
  212. #ifdef CONFIG_64BIT_DMA
  213. mapping |= (dma_addr_t)GET_TX_BD_PHYSICAL_ADDR0_HIGH(txbd) << 32;
  214. #endif
  215. /*To patch*/
  216. pci_unmap_single(pdev, mapping, pxmitbuf->len, PCI_DMA_TODEVICE);
  217. return _TRUE;
  218. }
  219. static u8 pci_write_data_h2c_normal(void *d, u8 *pBuf, u32 size)
  220. {
  221. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  222. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  223. struct halmac_adapter *halmac = dvobj_to_halmac((struct dvobj_priv *)d);
  224. struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
  225. struct xmit_frame *pcmdframe = NULL;
  226. struct pkt_attrib *pattrib = NULL;
  227. struct halmac_api *api;
  228. u32 desclen;
  229. u8 *buf;
  230. if (size + TXDESC_OFFSET > MAX_XMIT_EXTBUF_SZ) {
  231. RTW_INFO("%s: total buffer size(%d) > MAX_XMIT_EXTBUF_SZ(%d)\n"
  232. , __func__, size + TXDESC_OFFSET, MAX_XMIT_EXTBUF_SZ);
  233. return _FALSE;
  234. }
  235. pcmdframe = alloc_mgtxmitframe(pxmitpriv);
  236. if (pcmdframe == NULL) {
  237. RTW_INFO("%s: alloc ReservedPagePacket fail!\n", __func__);
  238. return _FALSE;
  239. }
  240. api = HALMAC_GET_API(halmac);
  241. rtw_halmac_get_tx_desc_size(pobj, &desclen);
  242. buf = pcmdframe->buf_addr;
  243. _rtw_memcpy(buf + desclen, pBuf, size); /* shift desclen */
  244. SET_TX_DESC_TXPKTSIZE_8821C(buf, size);
  245. SET_TX_DESC_OFFSET_8821C(buf, 0);
  246. SET_TX_DESC_QSEL_8821C(buf, HALMAC_TXDESC_QSEL_H2C_CMD);
  247. SET_TX_DESC_TXDESC_CHECKSUM_8821C(buf, 0);
  248. api->halmac_fill_txdesc_checksum(halmac, buf);
  249. /* update attribute */
  250. pattrib = &pcmdframe->attrib;
  251. update_mgntframe_attrib(padapter, pattrib);
  252. pattrib->qsel = QSLT_CMD;
  253. pattrib->pktlen = size;
  254. pattrib->last_txcmdsz = size;
  255. /* fill tx desc in dump_mgntframe */
  256. dump_mgntframe(padapter, pcmdframe);
  257. return _TRUE;
  258. }
  259. static u8 pci_write_data_rsvd_page(void *d, u8 *pBuf, u32 size)
  260. {
  261. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  262. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  263. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
  264. u8 ret;
  265. if (pHalData->not_xmitframe_fw_dl)
  266. ret = pci_write_data_not_xmitframe(d, pBuf, size, HALMAC_TXDESC_QSEL_BEACON);
  267. else
  268. ret = pci_write_data_rsvd_page_xmitframe(d, pBuf, size);
  269. if (ret == _TRUE)
  270. return 1;
  271. return 0;
  272. }
  273. static u8 pci_write_data_h2c(void *d, u8 *pBuf, u32 size)
  274. {
  275. struct dvobj_priv *pobj = (struct dvobj_priv *)d;
  276. PADAPTER padapter = dvobj_get_primary_adapter(pobj);
  277. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
  278. u8 ret;
  279. if (pHalData->not_xmitframe_fw_dl)
  280. ret = pci_write_data_not_xmitframe(d, pBuf, size, HALMAC_TXDESC_QSEL_H2C_CMD);
  281. else
  282. ret = pci_write_data_h2c_normal(d, pBuf, size);
  283. if (ret == _TRUE)
  284. return 1;
  285. return 0;
  286. }
  287. int rtl8821ce_halmac_init_adapter(PADAPTER padapter)
  288. {
  289. struct dvobj_priv *d;
  290. struct halmac_platform_api *api;
  291. int err;
  292. #ifdef CONFIG_64BIT_DMA
  293. if (adapter_to_dvobj(padapter)->bdma64)
  294. PlatformEnableDMA64(padapter);
  295. #endif
  296. d = adapter_to_dvobj(padapter);
  297. api = &rtw_halmac_platform_api;
  298. api->SEND_RSVD_PAGE = pci_write_data_rsvd_page;
  299. api->SEND_H2C_PKT = pci_write_data_h2c;
  300. err = rtw_halmac_init_adapter(d, api);
  301. return err;
  302. }