hal_com_phycfg.h 7.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. *****************************************************************************/
  15. #ifndef __HAL_COM_PHYCFG_H__
  16. #define __HAL_COM_PHYCFG_H__
  17. #define PathA 0x0 /* Useless */
  18. #define PathB 0x1
  19. #define PathC 0x2
  20. #define PathD 0x3
  21. typedef enum _RF_TX_NUM {
  22. RF_1TX = 0,
  23. RF_2TX,
  24. RF_3TX,
  25. RF_4TX,
  26. RF_MAX_TX_NUM,
  27. RF_TX_NUM_NONIMPLEMENT,
  28. } RF_TX_NUM;
  29. /*------------------------------Define structure----------------------------*/
  30. typedef struct _BB_REGISTER_DEFINITION {
  31. u32 rfintfs; /* set software control: */
  32. /* 0x870~0x877[8 bytes] */
  33. u32 rfintfo; /* output data: */
  34. /* 0x860~0x86f [16 bytes] */
  35. u32 rfintfe; /* output enable: */
  36. /* 0x860~0x86f [16 bytes] */
  37. u32 rf3wireOffset; /* LSSI data: */
  38. /* 0x840~0x84f [16 bytes] */
  39. u32 rfHSSIPara2; /* wire parameter control2 : */
  40. /* 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] */
  41. u32 rfLSSIReadBack; /* LSSI RF readback data SI mode */
  42. /* 0x8a0~0x8af [16 bytes] */
  43. u32 rfLSSIReadBackPi; /* LSSI RF readback data PI mode 0x8b8-8bc for Path A and B */
  44. } BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;
  45. /* ---------------------------------------------------------------------- */
  46. u8
  47. PHY_GetTxPowerByRateBase(
  48. IN PADAPTER Adapter,
  49. IN u8 Band,
  50. IN u8 RfPath,
  51. IN RATE_SECTION RateSection
  52. );
  53. VOID
  54. PHY_GetRateValuesOfTxPowerByRate(
  55. IN PADAPTER pAdapter,
  56. IN u32 RegAddr,
  57. IN u32 BitMask,
  58. IN u32 Value,
  59. OUT u8 *Rate,
  60. OUT s8 *PwrByRateVal,
  61. OUT u8 *RateNum
  62. );
  63. u8
  64. PHY_GetRateIndexOfTxPowerByRate(
  65. IN u8 Rate
  66. );
  67. VOID
  68. phy_set_tx_power_index_by_rate_section(
  69. IN PADAPTER pAdapter,
  70. IN enum rf_path RFPath,
  71. IN u8 Channel,
  72. IN u8 RateSection
  73. );
  74. s8
  75. _PHY_GetTxPowerByRate(
  76. IN PADAPTER pAdapter,
  77. IN u8 Band,
  78. IN enum rf_path RFPath,
  79. IN u8 RateIndex
  80. );
  81. s8
  82. PHY_GetTxPowerByRate(
  83. IN PADAPTER pAdapter,
  84. IN u8 Band,
  85. IN enum rf_path RFPath,
  86. IN u8 RateIndex
  87. );
  88. VOID
  89. PHY_SetTxPowerByRate(
  90. IN PADAPTER pAdapter,
  91. IN u8 Band,
  92. IN enum rf_path RFPath,
  93. IN u8 Rate,
  94. IN s8 Value
  95. );
  96. VOID
  97. phy_set_tx_power_level_by_path(
  98. IN PADAPTER Adapter,
  99. IN u8 channel,
  100. IN u8 path
  101. );
  102. VOID
  103. PHY_SetTxPowerIndexByRateArray(
  104. IN PADAPTER pAdapter,
  105. IN enum rf_path RFPath,
  106. IN enum channel_width BandWidth,
  107. IN u8 Channel,
  108. IN u8 *Rates,
  109. IN u8 RateArraySize
  110. );
  111. VOID
  112. PHY_InitTxPowerByRate(
  113. IN PADAPTER pAdapter
  114. );
  115. VOID
  116. phy_store_tx_power_by_rate(
  117. IN PADAPTER pAdapter,
  118. IN u32 Band,
  119. IN u32 RfPath,
  120. IN u32 TxNum,
  121. IN u32 RegAddr,
  122. IN u32 BitMask,
  123. IN u32 Data
  124. );
  125. VOID
  126. PHY_TxPowerByRateConfiguration(
  127. IN PADAPTER pAdapter
  128. );
  129. u8
  130. PHY_GetTxPowerIndexBase(
  131. IN PADAPTER pAdapter,
  132. IN enum rf_path RFPath,
  133. IN u8 Rate,
  134. u8 ntx_idx,
  135. IN enum channel_width BandWidth,
  136. IN u8 Channel,
  137. OUT PBOOLEAN bIn24G
  138. );
  139. #ifdef CONFIG_TXPWR_LIMIT
  140. s8 phy_get_txpwr_lmt_abs(_adapter *adapter
  141. , const char *regd_name
  142. , BAND_TYPE band, enum channel_width bw
  143. , u8 tlrs, u8 ntx_idx, u8 cch, u8 lock
  144. );
  145. s8 phy_get_txpwr_lmt(_adapter *adapter
  146. , const char *regd_name
  147. , BAND_TYPE band, enum channel_width bw
  148. , u8 rfpath, u8 rs, u8 ntx_idx, u8 cch, u8 lock
  149. );
  150. s8 PHY_GetTxPowerLimit(_adapter *adapter
  151. , const char *regd_name
  152. , BAND_TYPE band, enum channel_width bw
  153. , u8 rfpath, u8 rate, u8 ntx_idx, u8 cch
  154. );
  155. #else
  156. #define phy_get_txpwr_lmt_abs(adapter, regd_name, band, bw, tlrs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
  157. #define phy_get_txpwr_lmt(adapter, regd_name, band, bw, rfpath, rs, ntx_idx, cch, lock) (GET_HAL_SPEC(adapter)->txgi_max)
  158. #define PHY_GetTxPowerLimit(adapter, regd_name, band, bw, rfpath, rate, ntx_idx, cch) (GET_HAL_SPEC(adapter)->txgi_max)
  159. #endif /* CONFIG_TXPWR_LIMIT */
  160. s8
  161. PHY_GetTxPowerTrackingOffset(
  162. PADAPTER pAdapter,
  163. enum rf_path RFPath,
  164. u8 Rate
  165. );
  166. struct txpwr_idx_comp {
  167. u8 ntx_idx;
  168. u8 base;
  169. s8 by_rate;
  170. s8 limit;
  171. s8 tpt;
  172. s8 ebias;
  173. };
  174. u8
  175. phy_get_tx_power_index(
  176. IN PADAPTER pAdapter,
  177. IN enum rf_path RFPath,
  178. IN u8 Rate,
  179. IN enum channel_width BandWidth,
  180. IN u8 Channel
  181. );
  182. VOID
  183. PHY_SetTxPowerIndex(
  184. IN PADAPTER pAdapter,
  185. IN u32 PowerIndex,
  186. IN enum rf_path RFPath,
  187. IN u8 Rate
  188. );
  189. void dump_tx_power_idx_title(void *sel, _adapter *adapter);
  190. void dump_tx_power_idx_by_path_rs(void *sel, _adapter *adapter, u8 rfpath, u8 rs);
  191. void dump_tx_power_idx(void *sel, _adapter *adapter);
  192. bool phy_is_tx_power_limit_needed(_adapter *adapter);
  193. bool phy_is_tx_power_by_rate_needed(_adapter *adapter);
  194. int phy_load_tx_power_by_rate(_adapter *adapter, u8 chk_file);
  195. #ifdef CONFIG_TXPWR_LIMIT
  196. int phy_load_tx_power_limit(_adapter *adapter, u8 chk_file);
  197. #endif
  198. void phy_load_tx_power_ext_info(_adapter *adapter, u8 chk_file);
  199. void phy_reload_tx_power_ext_info(_adapter *adapter);
  200. void phy_reload_default_tx_power_ext_info(_adapter *adapter);
  201. const struct map_t *hal_pg_txpwr_def_info(_adapter *adapter);
  202. #ifdef CONFIG_EFUSE_CONFIG_FILE
  203. int check_phy_efuse_tx_power_info_valid(_adapter *adapter);
  204. #endif
  205. void dump_hal_txpwr_info_2g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
  206. void dump_hal_txpwr_info_5g(void *sel, _adapter *adapter, u8 rfpath_num, u8 max_tx_cnt);
  207. void hal_load_txpwr_info(
  208. _adapter *adapter,
  209. TxPowerInfo24G *pwr_info_2g,
  210. TxPowerInfo5G *pwr_info_5g,
  211. u8 *pg_data
  212. );
  213. void dump_tx_power_ext_info(void *sel, _adapter *adapter);
  214. void dump_target_tx_power(void *sel, _adapter *adapter);
  215. void dump_tx_power_by_rate(void *sel, _adapter *adapter);
  216. int rtw_get_phy_file_path(_adapter *adapter, const char *file_name);
  217. #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
  218. #define MAC_FILE_FW_NIC "FW_NIC.bin"
  219. #define MAC_FILE_FW_WW_IMG "FW_WoWLAN.bin"
  220. #define PHY_FILE_MAC_REG "MAC_REG.txt"
  221. #define PHY_FILE_AGC_TAB "AGC_TAB.txt"
  222. #define PHY_FILE_PHY_REG "PHY_REG.txt"
  223. #define PHY_FILE_PHY_REG_MP "PHY_REG_MP.txt"
  224. #define PHY_FILE_PHY_REG_PG "PHY_REG_PG.txt"
  225. #define PHY_FILE_RADIO_A "RadioA.txt"
  226. #define PHY_FILE_RADIO_B "RadioB.txt"
  227. #define PHY_FILE_RADIO_C "RadioC.txt"
  228. #define PHY_FILE_RADIO_D "RadioD.txt"
  229. #define PHY_FILE_TXPWR_TRACK "TxPowerTrack.txt"
  230. #define PHY_FILE_TXPWR_LMT "TXPWR_LMT.txt"
  231. #define PHY_FILE_WIFI_ANT_ISOLATION "wifi_ant_isolation.txt"
  232. #define MAX_PARA_FILE_BUF_LEN 25600
  233. #define LOAD_MAC_PARA_FILE BIT0
  234. #define LOAD_BB_PARA_FILE BIT1
  235. #define LOAD_BB_PG_PARA_FILE BIT2
  236. #define LOAD_BB_MP_PARA_FILE BIT3
  237. #define LOAD_RF_PARA_FILE BIT4
  238. #define LOAD_RF_TXPWR_TRACK_PARA_FILE BIT5
  239. #define LOAD_RF_TXPWR_LMT_PARA_FILE BIT6
  240. int phy_ConfigMACWithParaFile(IN PADAPTER Adapter, IN char *pFileName);
  241. int phy_ConfigBBWithParaFile(IN PADAPTER Adapter, IN char *pFileName, IN u32 ConfigType);
  242. int phy_ConfigBBWithPgParaFile(IN PADAPTER Adapter, IN const char *pFileName);
  243. int phy_ConfigBBWithMpParaFile(IN PADAPTER Adapter, IN char *pFileName);
  244. int PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN char *pFileName, IN enum rf_path eRFPath);
  245. int PHY_ConfigRFWithTxPwrTrackParaFile(IN PADAPTER Adapter, IN char *pFileName);
  246. #ifdef CONFIG_TXPWR_LIMIT
  247. int PHY_ConfigRFWithPowerLimitTableParaFile(IN PADAPTER Adapter, IN const char *pFileName);
  248. #endif
  249. void phy_free_filebuf_mask(_adapter *padapter, u8 mask);
  250. void phy_free_filebuf(_adapter *padapter);
  251. #endif /* CONFIG_LOAD_PHY_PARA_FROM_FILE */
  252. u8 phy_check_under_survey_ch(_adapter *adapter);
  253. #endif /* __HAL_COMMON_H__ */