halphyrf_8821c.c 17 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #include "mp_precomp.h"
  21. #include "../phydm_precomp.h"
  22. #if (RTL8821C_SUPPORT == 1)
  23. boolean
  24. get_mix_mode_tx_agc_bbs_wing_offset_8821c(
  25. void *p_dm_void,
  26. enum pwrtrack_method method,
  27. u8 rf_path,
  28. u8 tx_power_index_offest_upper_bound,
  29. s8 tx_power_index_offest_lower_bound
  30. )
  31. {
  32. struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
  33. struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
  34. u8 bb_swing_upper_bound = p_rf_calibrate_info->default_ofdm_index + 10;
  35. u8 bb_swing_lower_bound = 0;
  36. s8 tx_agc_index = 0;
  37. u8 tx_bb_swing_index = p_rf_calibrate_info->default_ofdm_index;
  38. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  39. ("Path_%d pRF->absolute_ofdm_swing_idx[rf_path]=%d, tx_power_index_offest_upper_bound=%d, tx_power_index_offest_lower_bound=%d\n",
  40. rf_path, p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], tx_power_index_offest_upper_bound, tx_power_index_offest_lower_bound));
  41. if (tx_power_index_offest_upper_bound > 0XF)
  42. tx_power_index_offest_upper_bound = 0XF;
  43. if (tx_power_index_offest_lower_bound < -15)
  44. tx_power_index_offest_lower_bound = -15;
  45. if (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] >= 0 && p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] <= tx_power_index_offest_upper_bound) {
  46. tx_agc_index = p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];
  47. tx_bb_swing_index = p_rf_calibrate_info->default_ofdm_index;
  48. } else if (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] >= 0 && (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] > tx_power_index_offest_upper_bound)) {
  49. tx_agc_index = tx_power_index_offest_upper_bound;
  50. p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] - tx_power_index_offest_upper_bound;
  51. tx_bb_swing_index = p_rf_calibrate_info->default_ofdm_index + p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path];
  52. if (tx_bb_swing_index > bb_swing_upper_bound)
  53. tx_bb_swing_index = bb_swing_upper_bound;
  54. } else if (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] < 0 && (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] >= tx_power_index_offest_lower_bound)) {
  55. tx_agc_index = p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path];
  56. tx_bb_swing_index = p_rf_calibrate_info->default_ofdm_index;
  57. } else if (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] < 0 && (p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] < tx_power_index_offest_lower_bound)) {
  58. tx_agc_index = tx_power_index_offest_lower_bound;
  59. p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] = p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] - tx_power_index_offest_lower_bound;
  60. if (p_rf_calibrate_info->default_ofdm_index > (p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path] * (-1)))
  61. tx_bb_swing_index = p_rf_calibrate_info->default_ofdm_index + p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path];
  62. else
  63. tx_bb_swing_index = bb_swing_lower_bound;
  64. }
  65. p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path] = tx_agc_index;
  66. p_rf_calibrate_info->bb_swing_idx_ofdm[rf_path] = tx_bb_swing_index;
  67. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  68. ("MixMode Offset Path_%d pRF->absolute_ofdm_swing_idx[rf_path]=%d pRF->bb_swing_idx_ofdm[rf_path]=%d TxPwrIdxOffestUpper=%d TxPwrIdxOffestLower=%d\n",
  69. rf_path, p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], p_rf_calibrate_info->bb_swing_idx_ofdm[rf_path], tx_power_index_offest_upper_bound, tx_power_index_offest_lower_bound));
  70. return true;
  71. }
  72. void
  73. odm_tx_pwr_track_set_pwr8821c(
  74. void *p_dm_void,
  75. enum pwrtrack_method method,
  76. u8 rf_path,
  77. u8 channel_mapped_index
  78. )
  79. {
  80. struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
  81. struct _ADAPTER *adapter = p_dm_odm->adapter;
  82. HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
  83. struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
  84. u8 channel = *p_dm_odm->p_channel;
  85. u8 band_width = *p_dm_odm->p_band_width;
  86. u8 tx_power_index_offest_upper_bound = 0;
  87. s8 tx_power_index_offest_lower_bound = 0;
  88. u8 tx_power_index = 0;
  89. u8 tx_rate = 0xFF;
  90. if (p_dm_odm->mp_mode == true) {
  91. #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
  92. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  93. #if (MP_DRIVER == 1)
  94. PMPT_CONTEXT p_mpt_ctx = &(adapter->MptCtx);
  95. tx_rate = MptToMgntRate(p_mpt_ctx->MptRateIndex);
  96. #endif
  97. #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  98. PMPT_CONTEXT p_mpt_ctx = &(adapter->mppriv.mpt_ctx);
  99. tx_rate = mpt_to_mgnt_rate(p_mpt_ctx->mpt_rate_index);
  100. #endif
  101. #endif
  102. } else {
  103. u16 rate = *(p_dm_odm->p_forced_data_rate);
  104. if (!rate) { /*auto rate*/
  105. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  106. tx_rate = adapter->HalFunc.GetHwRateFromMRateHandler(p_dm_odm->tx_rate);
  107. #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  108. if (p_dm_odm->number_linked_client != 0)
  109. tx_rate = hw_rate_to_m_rate(p_dm_odm->tx_rate);
  110. #endif
  111. } else /*force rate*/
  112. tx_rate = (u8) rate;
  113. }
  114. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Call:%s tx_rate=0x%X\n", __func__, tx_rate));
  115. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  116. ("pRF->default_ofdm_index=%d pRF->default_cck_index=%d\n", p_rf_calibrate_info->default_ofdm_index, p_rf_calibrate_info->default_cck_index));
  117. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  118. ("pRF->absolute_ofdm_swing_idx=%d pRF->remnant_ofdm_swing_idx=%d pRF->absolute_cck_swing_idx=%d pRF->remnant_cck_swing_idx=%d rf_path=%d\n",
  119. p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path], p_rf_calibrate_info->remnant_ofdm_swing_idx[rf_path], p_rf_calibrate_info->absolute_cck_swing_idx[rf_path], p_rf_calibrate_info->remnant_cck_swing_idx, rf_path));
  120. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  121. tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, band_width, channel);
  122. #elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
  123. if (p_dm_odm->mp_mode == true)
  124. tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, band_width, channel);
  125. else {
  126. if (p_dm_odm->number_linked_client != 0)
  127. tx_power_index = odm_get_tx_power_index(p_dm_odm, (enum odm_rf_radio_path_e) rf_path, tx_rate, band_width, channel);
  128. }
  129. #endif
  130. if (tx_power_index >= 63)
  131. tx_power_index = 63;
  132. tx_power_index_offest_upper_bound = 63 - tx_power_index;
  133. tx_power_index_offest_lower_bound = 0 - tx_power_index;
  134. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  135. ("tx_power_index=%d tx_power_index_offest_upper_bound=%d tx_power_index_offest_lower_bound=%d rf_path=%d\n", tx_power_index, tx_power_index_offest_upper_bound, tx_power_index_offest_lower_bound, rf_path));
  136. if (method == BBSWING) { /*use for mp driver clean power tracking status*/
  137. switch (rf_path) {
  138. case ODM_RF_PATH_A:
  139. odm_set_bb_reg(p_dm_odm, 0xC94, (BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)), ((p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path]) & 0x3f));
  140. odm_set_bb_reg(p_dm_odm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[p_rf_calibrate_info->bb_swing_idx_ofdm[rf_path]]);
  141. break;
  142. default:
  143. break;
  144. }
  145. } else if (method == MIX_MODE) {
  146. switch (rf_path) {
  147. case ODM_RF_PATH_A:
  148. get_mix_mode_tx_agc_bbs_wing_offset_8821c(p_dm_odm, method, rf_path, tx_power_index_offest_upper_bound, tx_power_index_offest_lower_bound);
  149. odm_set_bb_reg(p_dm_odm, 0xC94, (BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1)), ((p_rf_calibrate_info->absolute_ofdm_swing_idx[rf_path]) & 0x3f));
  150. odm_set_bb_reg(p_dm_odm, REG_A_TX_SCALE_JAGUAR, 0xFFE00000, tx_scaling_table_jaguar[p_rf_calibrate_info->bb_swing_idx_ofdm[rf_path]]);
  151. ODM_RT_TRACE(p_dm_odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
  152. ("TXAGC(0xC94)=0x%x BBSwing(0xc1c)=0x%x BBSwingIndex=%d rf_path=%d\n",
  153. odm_get_bb_reg(p_dm_odm, 0xC94, (BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2) | BIT(1))),
  154. odm_get_bb_reg(p_dm_odm, 0xc1c, 0xFFE00000),
  155. p_rf_calibrate_info->bb_swing_idx_ofdm[rf_path], rf_path));
  156. break;
  157. default:
  158. break;
  159. }
  160. }
  161. }
  162. void
  163. get_delta_swing_table_8821c(
  164. void *p_dm_void,
  165. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  166. u8 **temperature_up_a,
  167. u8 **temperature_down_a,
  168. u8 **temperature_up_b,
  169. u8 **temperature_down_b,
  170. u8 **temperature_up_cck_a,
  171. u8 **temperature_down_cck_a,
  172. u8 **temperature_up_cck_b,
  173. u8 **temperature_down_cck_b
  174. #else
  175. u8 **temperature_up_a,
  176. u8 **temperature_down_a,
  177. u8 **temperature_up_b,
  178. u8 **temperature_down_b
  179. #endif
  180. )
  181. {
  182. struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
  183. struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm_odm->rf_calibrate_info);
  184. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  185. u8 channel = *(p_dm_odm->p_channel);
  186. #else
  187. struct _ADAPTER *adapter = p_dm_odm->adapter;
  188. HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(adapter);
  189. u8 channel = *p_dm_odm->p_channel;
  190. #endif
  191. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  192. *temperature_up_cck_a = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_p;
  193. *temperature_down_cck_a = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_a_n;
  194. *temperature_up_cck_b = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_p;
  195. *temperature_down_cck_b = p_rf_calibrate_info->delta_swing_table_idx_2g_cck_b_n;
  196. #endif
  197. *temperature_up_a = p_rf_calibrate_info->delta_swing_table_idx_2ga_p;
  198. *temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_2ga_n;
  199. *temperature_up_b = p_rf_calibrate_info->delta_swing_table_idx_2gb_p;
  200. *temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_2gb_n;
  201. if (36 <= channel && channel <= 64) {
  202. *temperature_up_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_p[0];
  203. *temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_n[0];
  204. *temperature_up_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_p[0];
  205. *temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_n[0];
  206. } else if (100 <= channel && channel <= 144) {
  207. *temperature_up_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_p[1];
  208. *temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_n[1];
  209. *temperature_up_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_p[1];
  210. *temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_n[1];
  211. } else if (149 <= channel && channel <= 177) {
  212. *temperature_up_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_p[2];
  213. *temperature_down_a = p_rf_calibrate_info->delta_swing_table_idx_5ga_n[2];
  214. *temperature_up_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_p[2];
  215. *temperature_down_b = p_rf_calibrate_info->delta_swing_table_idx_5gb_n[2];
  216. }
  217. }
  218. void
  219. _phy_aac_calibrate_8821c(
  220. struct PHY_DM_STRUCT *p_dm_odm
  221. )
  222. {
  223. u32 cnt = 0;
  224. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[AACK]AACK start!!!!!!!\n"));
  225. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xb8, bRFRegOffsetMask, 0x80a00);
  226. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xff0fa);
  227. ODM_delay_ms(10);
  228. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xca, bRFRegOffsetMask, 0x80000);
  229. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xc9, bRFRegOffsetMask, 0x1c141);
  230. for (cnt = 0; cnt < 100; cnt++) {
  231. ODM_delay_ms(1);
  232. if (odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xca, 0x1000) != 0x1)
  233. break;
  234. }
  235. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0xb0, bRFRegOffsetMask, 0xff0f8);
  236. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[AACK]AACK end!!!!!!!\n"));
  237. }
  238. void
  239. _phy_lc_calibrate_8821c(
  240. struct PHY_DM_STRUCT *p_dm_odm
  241. )
  242. {
  243. u32 lc_cal = 0, cnt = 0, tmp0xc00;
  244. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK start!!!!!!!\n"));
  245. /*RF to standby mode*/
  246. tmp0xc00 = odm_read_4byte(p_dm_odm, 0xc00);
  247. odm_write_4byte(p_dm_odm, 0xc00, 0x4);
  248. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, bRFRegOffsetMask, 0x10000);
  249. _phy_aac_calibrate_8821c(p_dm_odm);
  250. /*backup RF0x18*/
  251. lc_cal = odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK);
  252. /*Start LCK*/
  253. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal | 0x08000);
  254. ODM_delay_ms(50);
  255. for (cnt = 0; cnt < 100; cnt++) {
  256. if (odm_get_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, 0x8000) != 0x1)
  257. break;
  258. ODM_delay_ms(10);
  259. }
  260. /*Recover channel number*/
  261. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, RF_CHNLBW, RFREGOFFSETMASK, lc_cal);
  262. /**restore*/
  263. odm_write_4byte(p_dm_odm, 0xc00, tmp0xc00);
  264. odm_set_rf_reg(p_dm_odm, ODM_RF_PATH_A, 0x0, bRFRegOffsetMask, 0x3ffff);
  265. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK end!!!!!!!\n"));
  266. }
  267. void
  268. phy_lc_calibrate_8821c(
  269. void *p_dm_void
  270. )
  271. {
  272. #if 1
  273. struct PHY_DM_STRUCT *p_dm_odm = (struct PHY_DM_STRUCT *)p_dm_void;
  274. boolean is_start_cont_tx = false, is_single_tone = false, is_carrier_suppression = false;
  275. u64 start_time;
  276. u64 progressing_time;
  277. #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
  278. struct _ADAPTER *p_adapter = p_dm_odm->adapter;
  279. #if (MP_DRIVER == 1)
  280. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  281. PMPT_CONTEXT p_mpt_ctx = &(p_adapter->MptCtx);
  282. #else
  283. PMPT_CONTEXT p_mpt_ctx = &(p_adapter->mppriv.mpt_ctx);
  284. #endif
  285. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  286. is_start_cont_tx = p_mpt_ctx->bStartContTx;
  287. is_single_tone = p_mpt_ctx->bSingleTone;
  288. is_carrier_suppression = p_mpt_ctx->bCarrierSuppression;
  289. #else
  290. is_start_cont_tx = p_mpt_ctx->is_start_cont_tx;
  291. is_single_tone = p_mpt_ctx->is_single_tone;
  292. is_carrier_suppression = p_mpt_ctx->is_carrier_suppression;
  293. #endif
  294. #endif
  295. #endif
  296. if (is_start_cont_tx || is_single_tone || is_carrier_suppression) {
  297. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]continues TX ing !!! LCK return\n"));
  298. return;
  299. }
  300. if (*(p_dm_odm->p_is_scan_in_process)) {
  301. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]scan is in process, bypass LCK\n"));
  302. return;
  303. }
  304. start_time = odm_get_current_time(p_dm_odm);
  305. p_dm_odm->rf_calibrate_info.is_lck_in_progress = true;
  306. _phy_lc_calibrate_8821c(p_dm_odm);
  307. p_dm_odm->rf_calibrate_info.is_lck_in_progress = false;
  308. progressing_time = odm_get_progressing_time(p_dm_odm, start_time);
  309. ODM_RT_TRACE(p_dm_odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[LCK]LCK progressing_time = %lld\n", progressing_time));
  310. #endif
  311. }
  312. void configure_txpower_track_8821c(
  313. struct _TXPWRTRACK_CFG *p_config
  314. )
  315. {
  316. p_config->swing_table_size_cck = TXSCALE_TABLE_SIZE;
  317. p_config->swing_table_size_ofdm = TXSCALE_TABLE_SIZE;
  318. p_config->threshold_iqk = IQK_THRESHOLD;
  319. p_config->threshold_dpk = DPK_THRESHOLD;
  320. p_config->average_thermal_num = AVG_THERMAL_NUM_8821C;
  321. p_config->rf_path_count = MAX_PATH_NUM_8821C;
  322. p_config->thermal_reg_addr = RF_T_METER_8821C;
  323. p_config->odm_tx_pwr_track_set_pwr = odm_tx_pwr_track_set_pwr8821c;
  324. p_config->do_iqk = do_iqk_8821c;
  325. p_config->phy_lc_calibrate = phy_lc_calibrate_8821c;
  326. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  327. p_config->get_delta_all_swing_table = get_delta_swing_table_8821c;
  328. #else
  329. p_config->get_delta_swing_table = get_delta_swing_table_8821c;
  330. #endif
  331. }
  332. void phy_set_rf_path_switch_8821c(
  333. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  334. struct PHY_DM_STRUCT *p_dm_odm,
  335. #else
  336. struct _ADAPTER *p_adapter,
  337. #endif
  338. boolean is_main
  339. )
  340. {
  341. #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
  342. HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(p_adapter);
  343. #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
  344. struct PHY_DM_STRUCT *p_dm_odm = &p_hal_data->odmpriv;
  345. #endif
  346. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  347. struct PHY_DM_STRUCT *p_dm_odm = &p_hal_data->DM_OutSrc;
  348. #endif
  349. #endif
  350. u8 ant_num = 0; /*0: ANT_1, 1: ANT_2*/
  351. if (is_main)
  352. ant_num = SWITCH_TO_ANT1; /*Main = ANT_1*/
  353. else
  354. ant_num = SWITCH_TO_ANT2; /*Aux = ANT_2*/
  355. config_phydm_set_ant_path(p_dm_odm, p_dm_odm->current_rf_set_8821c, ant_num);
  356. }
  357. boolean
  358. _phy_query_rf_path_switch_8821c(
  359. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  360. struct PHY_DM_STRUCT *p_dm_odm
  361. #else
  362. struct _ADAPTER *p_adapter
  363. #endif
  364. )
  365. {
  366. #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
  367. HAL_DATA_TYPE *p_hal_data = GET_HAL_DATA(p_adapter);
  368. #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
  369. struct PHY_DM_STRUCT *p_dm_odm = &p_hal_data->odmpriv;
  370. #endif
  371. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  372. struct PHY_DM_STRUCT *p_dm_odm = &p_hal_data->DM_OutSrc;
  373. #endif
  374. #endif
  375. u8 ant_num = 0; /*0: ANT_1, 1: ANT_2*/
  376. ODM_delay_ms(300);
  377. ant_num = query_phydm_current_ant_num_8821c(p_dm_odm);
  378. if (ant_num == SWITCH_TO_ANT1)
  379. return true; /*Main = ANT_1*/
  380. else
  381. return false; /*Aux = ANT_2*/
  382. }
  383. boolean phy_query_rf_path_switch_8821c(
  384. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  385. struct PHY_DM_STRUCT *p_dm_odm
  386. #else
  387. struct _ADAPTER *p_adapter
  388. #endif
  389. )
  390. {
  391. #if DISABLE_BB_RF
  392. return true;
  393. #endif
  394. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  395. return _phy_query_rf_path_switch_8821c(p_dm_odm);
  396. #else
  397. return _phy_query_rf_path_switch_8821c(p_adapter);
  398. #endif
  399. }
  400. #endif /* (RTL8821C_SUPPORT == 0)*/