rtw_rf.c 35 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. *****************************************************************************/
  15. #define _RTW_RF_C_
  16. #include <drv_types.h>
  17. #include <hal_data.h>
  18. u8 center_ch_2g[CENTER_CH_2G_NUM] = {
  19. /* G00 */1, 2,
  20. /* G01 */3, 4, 5,
  21. /* G02 */6, 7, 8,
  22. /* G03 */9, 10, 11,
  23. /* G04 */12, 13,
  24. /* G05 */14
  25. };
  26. u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM] = {
  27. 3,
  28. 4,
  29. 5,
  30. 6,
  31. 7,
  32. 8,
  33. 9,
  34. 10,
  35. 11,
  36. };
  37. u8 op_chs_of_cch_2g_40m[CENTER_CH_2G_40M_NUM][2] = {
  38. {1, 5}, /* 3 */
  39. {2, 6}, /* 4 */
  40. {3, 7}, /* 5 */
  41. {4, 8}, /* 6 */
  42. {5, 9}, /* 7 */
  43. {6, 10}, /* 8 */
  44. {7, 11}, /* 9 */
  45. {8, 12}, /* 10 */
  46. {9, 13}, /* 11 */
  47. };
  48. u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = {
  49. /* G00 */36, 38, 40,
  50. 42,
  51. /* G01 */44, 46, 48,
  52. /* 50, */
  53. /* G02 */52, 54, 56,
  54. 58,
  55. /* G03 */60, 62, 64,
  56. /* G04 */100, 102, 104,
  57. 106,
  58. /* G05 */108, 110, 112,
  59. /* 114, */
  60. /* G06 */116, 118, 120,
  61. 122,
  62. /* G07 */124, 126, 128,
  63. /* G08 */132, 134, 136,
  64. 138,
  65. /* G09 */140, 142, 144,
  66. /* G10 */149, 151, 153,
  67. 155,
  68. /* G11 */157, 159, 161,
  69. /* 163, */
  70. /* G12 */165, 167, 169,
  71. 171,
  72. /* G13 */173, 175, 177
  73. };
  74. u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = {
  75. /* G00 */36, 40,
  76. /* G01 */44, 48,
  77. /* G02 */52, 56,
  78. /* G03 */60, 64,
  79. /* G04 */100, 104,
  80. /* G05 */108, 112,
  81. /* G06 */116, 120,
  82. /* G07 */124, 128,
  83. /* G08 */132, 136,
  84. /* G09 */140, 144,
  85. /* G10 */149, 153,
  86. /* G11 */157, 161,
  87. /* G12 */165, 169,
  88. /* G13 */173, 177
  89. };
  90. u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = {
  91. /* G00 */38,
  92. /* G01 */46,
  93. /* G02 */54,
  94. /* G03 */62,
  95. /* G04 */102,
  96. /* G05 */110,
  97. /* G06 */118,
  98. /* G07 */126,
  99. /* G08 */134,
  100. /* G09 */142,
  101. /* G10 */151,
  102. /* G11 */159,
  103. /* G12 */167,
  104. /* G13 */175
  105. };
  106. u8 center_ch_5g_20m_40m[CENTER_CH_5G_20M_NUM + CENTER_CH_5G_40M_NUM] = {
  107. /* G00 */36, 38, 40,
  108. /* G01 */44, 46, 48,
  109. /* G02 */52, 54, 56,
  110. /* G03 */60, 62, 64,
  111. /* G04 */100, 102, 104,
  112. /* G05 */108, 110, 112,
  113. /* G06 */116, 118, 120,
  114. /* G07 */124, 126, 128,
  115. /* G08 */132, 134, 136,
  116. /* G09 */140, 142, 144,
  117. /* G10 */149, 151, 153,
  118. /* G11 */157, 159, 161,
  119. /* G12 */165, 167, 169,
  120. /* G13 */173, 175, 177
  121. };
  122. u8 op_chs_of_cch_5g_40m[CENTER_CH_5G_40M_NUM][2] = {
  123. {36, 40}, /* 38 */
  124. {44, 48}, /* 46 */
  125. {52, 56}, /* 54 */
  126. {60, 64}, /* 62 */
  127. {100, 104}, /* 102 */
  128. {108, 112}, /* 110 */
  129. {116, 120}, /* 118 */
  130. {124, 128}, /* 126 */
  131. {132, 136}, /* 134 */
  132. {140, 144}, /* 142 */
  133. {149, 153}, /* 151 */
  134. {157, 161}, /* 159 */
  135. {165, 169}, /* 167 */
  136. {173, 177}, /* 175 */
  137. };
  138. u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = {
  139. /* G00 ~ G01*/42,
  140. /* G02 ~ G03*/58,
  141. /* G04 ~ G05*/106,
  142. /* G06 ~ G07*/122,
  143. /* G08 ~ G09*/138,
  144. /* G10 ~ G11*/155,
  145. /* G12 ~ G13*/171
  146. };
  147. u8 op_chs_of_cch_5g_80m[CENTER_CH_5G_80M_NUM][4] = {
  148. {36, 40, 44, 48}, /* 42 */
  149. {52, 56, 60, 64}, /* 58 */
  150. {100, 104, 108, 112}, /* 106 */
  151. {116, 120, 124, 128}, /* 122 */
  152. {132, 136, 140, 144}, /* 138 */
  153. {149, 153, 157, 161}, /* 155 */
  154. {165, 169, 173, 177}, /* 171 */
  155. };
  156. u8 center_ch_5g_160m[CENTER_CH_5G_160M_NUM] = {
  157. /* G00 ~ G03*/50,
  158. /* G04 ~ G07*/114,
  159. /* G10 ~ G13*/163
  160. };
  161. u8 op_chs_of_cch_5g_160m[CENTER_CH_5G_160M_NUM][8] = {
  162. {36, 40, 44, 48, 52, 56, 60, 64}, /* 50 */
  163. {100, 104, 108, 112, 116, 120, 124, 128}, /* 114 */
  164. {149, 153, 157, 161, 165, 169, 173, 177}, /* 163 */
  165. };
  166. struct center_chs_ent_t {
  167. u8 ch_num;
  168. u8 *chs;
  169. };
  170. struct center_chs_ent_t center_chs_2g_by_bw[] = {
  171. {CENTER_CH_2G_NUM, center_ch_2g},
  172. {CENTER_CH_2G_40M_NUM, center_ch_2g_40m},
  173. };
  174. struct center_chs_ent_t center_chs_5g_by_bw[] = {
  175. {CENTER_CH_5G_20M_NUM, center_ch_5g_20m},
  176. {CENTER_CH_5G_40M_NUM, center_ch_5g_40m},
  177. {CENTER_CH_5G_80M_NUM, center_ch_5g_80m},
  178. {CENTER_CH_5G_160M_NUM, center_ch_5g_160m},
  179. };
  180. /*
  181. * Get center channel of smaller bandwidth by @param cch, @param bw, @param offset
  182. * @cch: the given center channel
  183. * @bw: the given bandwidth
  184. * @offset: the given primary SC offset of the given bandwidth
  185. *
  186. * return center channel of smaller bandiwdth if valid, or 0
  187. */
  188. u8 rtw_get_scch_by_cch_offset(u8 cch, u8 bw, u8 offset)
  189. {
  190. u8 t_cch = 0;
  191. if (bw == CHANNEL_WIDTH_20) {
  192. t_cch = cch;
  193. goto exit;
  194. }
  195. if (offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) {
  196. rtw_warn_on(1);
  197. goto exit;
  198. }
  199. /* 2.4G, 40MHz */
  200. if (cch >= 3 && cch <= 11 && bw == CHANNEL_WIDTH_40) {
  201. t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
  202. goto exit;
  203. }
  204. /* 5G, 160MHz */
  205. if (cch >= 50 && cch <= 163 && bw == CHANNEL_WIDTH_160) {
  206. t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 8 : cch - 8;
  207. goto exit;
  208. /* 5G, 80MHz */
  209. } else if (cch >= 42 && cch <= 171 && bw == CHANNEL_WIDTH_80) {
  210. t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 4 : cch - 4;
  211. goto exit;
  212. /* 5G, 40MHz */
  213. } else if (cch >= 38 && cch <= 175 && bw == CHANNEL_WIDTH_40) {
  214. t_cch = (offset == HAL_PRIME_CHNL_OFFSET_UPPER) ? cch + 2 : cch - 2;
  215. goto exit;
  216. } else {
  217. rtw_warn_on(1);
  218. goto exit;
  219. }
  220. exit:
  221. return t_cch;
  222. }
  223. struct op_chs_ent_t {
  224. u8 ch_num;
  225. u8 *chs;
  226. };
  227. struct op_chs_ent_t op_chs_of_cch_2g_by_bw[] = {
  228. {1, center_ch_2g},
  229. {2, (u8 *)op_chs_of_cch_2g_40m},
  230. };
  231. struct op_chs_ent_t op_chs_of_cch_5g_by_bw[] = {
  232. {1, center_ch_5g_20m},
  233. {2, (u8 *)op_chs_of_cch_5g_40m},
  234. {4, (u8 *)op_chs_of_cch_5g_80m},
  235. {8, (u8 *)op_chs_of_cch_5g_160m},
  236. };
  237. inline u8 center_chs_2g_num(u8 bw)
  238. {
  239. if (bw > CHANNEL_WIDTH_40)
  240. return 0;
  241. return center_chs_2g_by_bw[bw].ch_num;
  242. }
  243. inline u8 center_chs_2g(u8 bw, u8 id)
  244. {
  245. if (bw > CHANNEL_WIDTH_40)
  246. return 0;
  247. if (id >= center_chs_2g_num(bw))
  248. return 0;
  249. return center_chs_2g_by_bw[bw].chs[id];
  250. }
  251. inline u8 center_chs_5g_num(u8 bw)
  252. {
  253. if (bw > CHANNEL_WIDTH_80)
  254. return 0;
  255. return center_chs_5g_by_bw[bw].ch_num;
  256. }
  257. inline u8 center_chs_5g(u8 bw, u8 id)
  258. {
  259. if (bw > CHANNEL_WIDTH_80)
  260. return 0;
  261. if (id >= center_chs_5g_num(bw))
  262. return 0;
  263. return center_chs_5g_by_bw[bw].chs[id];
  264. }
  265. /*
  266. * Get available op channels by @param cch, @param bw
  267. * @cch: the given center channel
  268. * @bw: the given bandwidth
  269. * @op_chs: the pointer to return pointer of op channel array
  270. * @op_ch_num: the pointer to return pointer of op channel number
  271. *
  272. * return valid (1) or not (0)
  273. */
  274. u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num)
  275. {
  276. int i;
  277. struct center_chs_ent_t *c_chs_ent = NULL;
  278. struct op_chs_ent_t *op_chs_ent = NULL;
  279. u8 valid = 1;
  280. if (cch <= 14
  281. && bw >= CHANNEL_WIDTH_20 && bw <= CHANNEL_WIDTH_40
  282. ) {
  283. c_chs_ent = &center_chs_2g_by_bw[bw];
  284. op_chs_ent = &op_chs_of_cch_2g_by_bw[bw];
  285. } else if (cch >= 36 && cch <= 177
  286. && bw >= CHANNEL_WIDTH_20 && bw <= CHANNEL_WIDTH_160
  287. ) {
  288. c_chs_ent = &center_chs_5g_by_bw[bw];
  289. op_chs_ent = &op_chs_of_cch_5g_by_bw[bw];
  290. } else {
  291. valid = 0;
  292. goto exit;
  293. }
  294. for (i = 0; i < c_chs_ent->ch_num; i++)
  295. if (cch == *(c_chs_ent->chs + i))
  296. break;
  297. if (i == c_chs_ent->ch_num) {
  298. valid = 0;
  299. goto exit;
  300. }
  301. *op_chs = op_chs_ent->chs + op_chs_ent->ch_num * i;
  302. *op_ch_num = op_chs_ent->ch_num;
  303. exit:
  304. return valid;
  305. }
  306. u8 rtw_get_ch_group(u8 ch, u8 *group, u8 *cck_group)
  307. {
  308. BAND_TYPE band = BAND_MAX;
  309. s8 gp = -1, cck_gp = -1;
  310. if (ch <= 14) {
  311. band = BAND_ON_2_4G;
  312. if (1 <= ch && ch <= 2)
  313. gp = 0;
  314. else if (3 <= ch && ch <= 5)
  315. gp = 1;
  316. else if (6 <= ch && ch <= 8)
  317. gp = 2;
  318. else if (9 <= ch && ch <= 11)
  319. gp = 3;
  320. else if (12 <= ch && ch <= 14)
  321. gp = 4;
  322. else
  323. band = BAND_MAX;
  324. if (ch == 14)
  325. cck_gp = 5;
  326. else
  327. cck_gp = gp;
  328. } else {
  329. band = BAND_ON_5G;
  330. if (36 <= ch && ch <= 42)
  331. gp = 0;
  332. else if (44 <= ch && ch <= 48)
  333. gp = 1;
  334. else if (50 <= ch && ch <= 58)
  335. gp = 2;
  336. else if (60 <= ch && ch <= 64)
  337. gp = 3;
  338. else if (100 <= ch && ch <= 106)
  339. gp = 4;
  340. else if (108 <= ch && ch <= 114)
  341. gp = 5;
  342. else if (116 <= ch && ch <= 122)
  343. gp = 6;
  344. else if (124 <= ch && ch <= 130)
  345. gp = 7;
  346. else if (132 <= ch && ch <= 138)
  347. gp = 8;
  348. else if (140 <= ch && ch <= 144)
  349. gp = 9;
  350. else if (149 <= ch && ch <= 155)
  351. gp = 10;
  352. else if (157 <= ch && ch <= 161)
  353. gp = 11;
  354. else if (165 <= ch && ch <= 171)
  355. gp = 12;
  356. else if (173 <= ch && ch <= 177)
  357. gp = 13;
  358. else
  359. band = BAND_MAX;
  360. }
  361. if (band == BAND_MAX
  362. || (band == BAND_ON_2_4G && cck_gp == -1)
  363. || gp == -1
  364. ) {
  365. RTW_WARN("%s invalid channel:%u", __func__, ch);
  366. rtw_warn_on(1);
  367. goto exit;
  368. }
  369. if (group)
  370. *group = gp;
  371. if (cck_group && band == BAND_ON_2_4G)
  372. *cck_group = cck_gp;
  373. exit:
  374. return band;
  375. }
  376. int rtw_ch2freq(int chan)
  377. {
  378. /* see 802.11 17.3.8.3.2 and Annex J
  379. * there are overlapping channel numbers in 5GHz and 2GHz bands */
  380. /*
  381. * RTK: don't consider the overlapping channel numbers: 5G channel <= 14,
  382. * because we don't support it. simply judge from channel number
  383. */
  384. if (chan >= 1 && chan <= 14) {
  385. if (chan == 14)
  386. return 2484;
  387. else if (chan < 14)
  388. return 2407 + chan * 5;
  389. } else if (chan >= 36 && chan <= 177)
  390. return 5000 + chan * 5;
  391. return 0; /* not supported */
  392. }
  393. int rtw_freq2ch(int freq)
  394. {
  395. /* see 802.11 17.3.8.3.2 and Annex J */
  396. if (freq == 2484)
  397. return 14;
  398. else if (freq < 2484)
  399. return (freq - 2407) / 5;
  400. else if (freq >= 4910 && freq <= 4980)
  401. return (freq - 4000) / 5;
  402. else if (freq <= 45000) /* DMG band lower limit */
  403. return (freq - 5000) / 5;
  404. else if (freq >= 58320 && freq <= 64800)
  405. return (freq - 56160) / 2160;
  406. else
  407. return 0;
  408. }
  409. bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo)
  410. {
  411. u8 c_ch;
  412. u32 freq;
  413. u32 hi_ret = 0, lo_ret = 0;
  414. bool valid = _FALSE;
  415. if (hi)
  416. *hi = 0;
  417. if (lo)
  418. *lo = 0;
  419. c_ch = rtw_get_center_ch(ch, bw, offset);
  420. freq = rtw_ch2freq(c_ch);
  421. if (!freq) {
  422. rtw_warn_on(1);
  423. goto exit;
  424. }
  425. if (bw == CHANNEL_WIDTH_80) {
  426. hi_ret = freq + 40;
  427. lo_ret = freq - 40;
  428. } else if (bw == CHANNEL_WIDTH_40) {
  429. hi_ret = freq + 20;
  430. lo_ret = freq - 20;
  431. } else if (bw == CHANNEL_WIDTH_20) {
  432. hi_ret = freq + 10;
  433. lo_ret = freq - 10;
  434. } else
  435. rtw_warn_on(1);
  436. if (hi)
  437. *hi = hi_ret;
  438. if (lo)
  439. *lo = lo_ret;
  440. valid = _TRUE;
  441. exit:
  442. return valid;
  443. }
  444. const char *const _ch_width_str[CHANNEL_WIDTH_MAX] = {
  445. "20MHz",
  446. "40MHz",
  447. "80MHz",
  448. "160MHz",
  449. "80_80MHz",
  450. "5MHz",
  451. "10MHz",
  452. };
  453. const u8 _ch_width_to_bw_cap[CHANNEL_WIDTH_MAX] = {
  454. BW_CAP_20M,
  455. BW_CAP_40M,
  456. BW_CAP_80M,
  457. BW_CAP_160M,
  458. BW_CAP_80_80M,
  459. BW_CAP_5M,
  460. BW_CAP_10M,
  461. };
  462. const char *const _band_str[] = {
  463. "2.4G",
  464. "5G",
  465. "BOTH",
  466. "BAND_MAX",
  467. };
  468. const u8 _band_to_band_cap[] = {
  469. BAND_CAP_2G,
  470. BAND_CAP_5G,
  471. 0,
  472. 0,
  473. };
  474. const u8 _rf_type_to_rf_tx_cnt[] = {
  475. 1, /*RF_1T1R*/
  476. 1, /*RF_1T2R*/
  477. 2, /*RF_2T2R*/
  478. 2, /*RF_2T3R*/
  479. 2, /*RF_2T4R*/
  480. 3, /*RF_3T3R*/
  481. 3, /*RF_3T4R*/
  482. 4, /*RF_4T4R*/
  483. 1, /*RF_TYPE_MAX*/
  484. };
  485. const u8 _rf_type_to_rf_rx_cnt[] = {
  486. 1, /*RF_1T1R*/
  487. 2, /*RF_1T2R*/
  488. 2, /*RF_2T2R*/
  489. 3, /*RF_2T3R*/
  490. 4, /*RF_2T4R*/
  491. 3, /*RF_3T3R*/
  492. 4, /*RF_3T4R*/
  493. 4, /*RF_4T4R*/
  494. 1, /*RF_TYPE_MAX*/
  495. };
  496. const char *const _regd_str[] = {
  497. "NONE",
  498. "FCC",
  499. "MKK",
  500. "ETSI",
  501. "IC",
  502. "KCC",
  503. "ACMA",
  504. "CHILE",
  505. "WW",
  506. };
  507. #ifdef CONFIG_TXPWR_LIMIT
  508. void _dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
  509. {
  510. struct regd_exc_ent *ent;
  511. _list *cur, *head;
  512. RTW_PRINT_SEL(sel, "regd_exc_num:%u\n", rfctl->regd_exc_num);
  513. if (!rfctl->regd_exc_num)
  514. goto exit;
  515. RTW_PRINT_SEL(sel, "%-7s %-6s %-9s\n", "country", "domain", "regd_name");
  516. head = &rfctl->reg_exc_list;
  517. cur = get_next(head);
  518. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  519. u8 has_country;
  520. ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
  521. cur = get_next(cur);
  522. has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
  523. RTW_PRINT_SEL(sel, " %c%c 0x%02x %s\n"
  524. , has_country ? ent->country[0] : '0'
  525. , has_country ? ent->country[1] : '0'
  526. , ent->domain
  527. , ent->regd_name
  528. );
  529. }
  530. exit:
  531. return;
  532. }
  533. inline void dump_regd_exc_list(void *sel, struct rf_ctl_t *rfctl)
  534. {
  535. _irqL irqL;
  536. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  537. _dump_regd_exc_list(sel, rfctl);
  538. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  539. }
  540. void rtw_regd_exc_add_with_nlen(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name, u32 nlen)
  541. {
  542. struct regd_exc_ent *ent;
  543. _irqL irqL;
  544. if (!regd_name || !nlen) {
  545. rtw_warn_on(1);
  546. goto exit;
  547. }
  548. ent = (struct regd_exc_ent *)rtw_zmalloc(sizeof(struct regd_exc_ent) + nlen + 1);
  549. if (!ent)
  550. goto exit;
  551. _rtw_init_listhead(&ent->list);
  552. if (country)
  553. _rtw_memcpy(ent->country, country, 2);
  554. ent->domain = domain;
  555. _rtw_memcpy(ent->regd_name, regd_name, nlen);
  556. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  557. rtw_list_insert_tail(&ent->list, &rfctl->reg_exc_list);
  558. rfctl->regd_exc_num++;
  559. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  560. exit:
  561. return;
  562. }
  563. inline void rtw_regd_exc_add(struct rf_ctl_t *rfctl, const char *country, u8 domain, const char *regd_name)
  564. {
  565. rtw_regd_exc_add_with_nlen(rfctl, country, domain, regd_name, strlen(regd_name));
  566. }
  567. struct regd_exc_ent *_rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
  568. {
  569. struct regd_exc_ent *ent;
  570. _list *cur, *head;
  571. u8 match = 0;
  572. head = &rfctl->reg_exc_list;
  573. cur = get_next(head);
  574. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  575. u8 has_country;
  576. ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
  577. cur = get_next(cur);
  578. has_country = (ent->country[0] == '\0' && ent->country[1] == '\0') ? 0 : 1;
  579. /* entry has country condition to match */
  580. if (has_country) {
  581. if (!country)
  582. continue;
  583. if (ent->country[0] != country[0]
  584. || ent->country[1] != country[1])
  585. continue;
  586. }
  587. /* entry has domain condition to match */
  588. if (ent->domain != 0xFF) {
  589. if (domain == 0xFF)
  590. continue;
  591. if (ent->domain != domain)
  592. continue;
  593. }
  594. match = 1;
  595. break;
  596. }
  597. if (match)
  598. return ent;
  599. else
  600. return NULL;
  601. }
  602. inline struct regd_exc_ent *rtw_regd_exc_search(struct rf_ctl_t *rfctl, const char *country, u8 domain)
  603. {
  604. struct regd_exc_ent *ent;
  605. _irqL irqL;
  606. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  607. ent = _rtw_regd_exc_search(rfctl, country, domain);
  608. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  609. return ent;
  610. }
  611. void rtw_regd_exc_list_free(struct rf_ctl_t *rfctl)
  612. {
  613. struct regd_exc_ent *ent;
  614. _irqL irqL;
  615. _list *cur, *head;
  616. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  617. head = &rfctl->reg_exc_list;
  618. cur = get_next(head);
  619. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  620. ent = LIST_CONTAINOR(cur, struct regd_exc_ent, list);
  621. cur = get_next(cur);
  622. rtw_list_delete(&ent->list);
  623. rtw_mfree((u8 *)ent, sizeof(struct regd_exc_ent) + strlen(ent->regd_name) + 1);
  624. }
  625. rfctl->regd_exc_num = 0;
  626. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  627. }
  628. void dump_txpwr_lmt(void *sel, _adapter *adapter)
  629. {
  630. #define TMP_STR_LEN 16
  631. struct rf_ctl_t *rfctl = adapter_to_rfctl(adapter);
  632. struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
  633. _irqL irqL;
  634. char fmt[16];
  635. char tmp_str[TMP_STR_LEN];
  636. s8 *lmt_idx = NULL;
  637. int bw, band, ch_num, tlrs, ntx_idx, rs, i, path;
  638. u8 ch, n, rfpath_num;
  639. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  640. _dump_regd_exc_list(sel, rfctl);
  641. RTW_PRINT_SEL(sel, "\n");
  642. if (!rfctl->txpwr_regd_num)
  643. goto release_lock;
  644. lmt_idx = rtw_malloc(sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num);
  645. if (!lmt_idx) {
  646. RTW_ERR("%s alloc fail\n", __func__);
  647. goto release_lock;
  648. }
  649. RTW_PRINT_SEL(sel, "txpwr_lmt_2g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_2g_cck_ofdm_state);
  650. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  651. if (IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
  652. RTW_PRINT_SEL(sel, "txpwr_lmt_5g_cck_ofdm_state:0x%02x\n", rfctl->txpwr_lmt_5g_cck_ofdm_state);
  653. RTW_PRINT_SEL(sel, "txpwr_lmt_5g_20_40_ref:0x%02x\n", rfctl->txpwr_lmt_5g_20_40_ref);
  654. #endif
  655. RTW_PRINT_SEL(sel, "\n");
  656. for (band = BAND_ON_2_4G; band <= BAND_ON_5G; band++) {
  657. if (!hal_is_band_support(adapter, band))
  658. continue;
  659. rfpath_num = (band == BAND_ON_2_4G ? hal_spec->rfpath_num_2g : hal_spec->rfpath_num_5g);
  660. for (bw = 0; bw < MAX_5G_BANDWIDTH_NUM; bw++) {
  661. if (bw >= CHANNEL_WIDTH_160)
  662. break;
  663. if (band == BAND_ON_2_4G && bw >= CHANNEL_WIDTH_80)
  664. break;
  665. if (band == BAND_ON_2_4G)
  666. ch_num = CENTER_CH_2G_NUM;
  667. else
  668. ch_num = center_chs_5g_num(bw);
  669. if (ch_num == 0) {
  670. rtw_warn_on(1);
  671. break;
  672. }
  673. for (tlrs = TXPWR_LMT_RS_CCK; tlrs < TXPWR_LMT_RS_NUM; tlrs++) {
  674. if (band == BAND_ON_2_4G && tlrs == TXPWR_LMT_RS_VHT)
  675. continue;
  676. if (band == BAND_ON_5G && tlrs == TXPWR_LMT_RS_CCK)
  677. continue;
  678. if (bw > CHANNEL_WIDTH_20 && (tlrs == TXPWR_LMT_RS_CCK || tlrs == TXPWR_LMT_RS_OFDM))
  679. continue;
  680. if (bw > CHANNEL_WIDTH_40 && tlrs == TXPWR_LMT_RS_HT)
  681. continue;
  682. if (tlrs == TXPWR_LMT_RS_VHT && !IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(adapter))
  683. continue;
  684. for (ntx_idx = RF_1TX; ntx_idx < MAX_TX_COUNT; ntx_idx++) {
  685. struct txpwr_lmt_ent *ent;
  686. _list *cur, *head;
  687. if (ntx_idx >= hal_spec->tx_nss_num)
  688. continue;
  689. /* bypass CCK multi-TX is not defined */
  690. if (tlrs == TXPWR_LMT_RS_CCK && ntx_idx > RF_1TX) {
  691. if (band == BAND_ON_2_4G
  692. && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_CCK_1T << ntx_idx)))
  693. continue;
  694. }
  695. /* bypass OFDM multi-TX is not defined */
  696. if (tlrs == TXPWR_LMT_RS_OFDM && ntx_idx > RF_1TX) {
  697. if (band == BAND_ON_2_4G
  698. && !(rfctl->txpwr_lmt_2g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
  699. continue;
  700. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  701. if (band == BAND_ON_5G
  702. && !(rfctl->txpwr_lmt_5g_cck_ofdm_state & (TXPWR_LMT_HAS_OFDM_1T << ntx_idx)))
  703. continue;
  704. #endif
  705. }
  706. /* bypass 5G 20M, 40M pure reference */
  707. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  708. if (band == BAND_ON_5G && (bw == CHANNEL_WIDTH_20 || bw == CHANNEL_WIDTH_40)) {
  709. if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_HT_FROM_VHT) {
  710. if (tlrs == TXPWR_LMT_RS_HT)
  711. continue;
  712. } else if (rfctl->txpwr_lmt_5g_20_40_ref == TXPWR_LMT_REF_VHT_FROM_HT) {
  713. if (tlrs == TXPWR_LMT_RS_VHT && bw <= CHANNEL_WIDTH_40)
  714. continue;
  715. }
  716. }
  717. #endif
  718. /* choose n-SS mapping rate section to get lmt diff value */
  719. if (tlrs == TXPWR_LMT_RS_CCK)
  720. rs = CCK;
  721. else if (tlrs == TXPWR_LMT_RS_OFDM)
  722. rs = OFDM;
  723. else if (tlrs == TXPWR_LMT_RS_HT)
  724. rs = HT_1SS + ntx_idx;
  725. else if (tlrs == TXPWR_LMT_RS_VHT)
  726. rs = VHT_1SS + ntx_idx;
  727. else {
  728. RTW_ERR("%s invalid tlrs %u\n", __func__, tlrs);
  729. continue;
  730. }
  731. RTW_PRINT_SEL(sel, "[%s][%s][%s][%uT]\n"
  732. , band_str(band)
  733. , ch_width_str(bw)
  734. , txpwr_lmt_rs_str(tlrs)
  735. , ntx_idx + 1
  736. );
  737. /* header for limit in db */
  738. RTW_PRINT_SEL(sel, "%3s ", "ch");
  739. head = &rfctl->txpwr_lmt_list;
  740. cur = get_next(head);
  741. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  742. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  743. cur = get_next(cur);
  744. sprintf(fmt, "%%%zus%%s ", strlen(ent->regd_name) >= 6 ? 1 : 6 - strlen(ent->regd_name));
  745. snprintf(tmp_str, TMP_STR_LEN, fmt
  746. , strcmp(ent->regd_name, rfctl->regd_name) == 0 ? "*" : ""
  747. , ent->regd_name);
  748. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  749. }
  750. sprintf(fmt, "%%%zus%%s ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? 1 : 6 - strlen(regd_str(TXPWR_LMT_WW)));
  751. snprintf(tmp_str, TMP_STR_LEN, fmt
  752. , strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? "*" : ""
  753. , regd_str(TXPWR_LMT_WW));
  754. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  755. /* header for limit offset */
  756. for (path = 0; path < RF_PATH_MAX; path++) {
  757. if (path >= rfpath_num)
  758. break;
  759. _RTW_PRINT_SEL(sel, "|");
  760. head = &rfctl->txpwr_lmt_list;
  761. cur = get_next(head);
  762. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  763. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  764. cur = get_next(cur);
  765. _RTW_PRINT_SEL(sel, "%3c "
  766. , strcmp(ent->regd_name, rfctl->regd_name) == 0 ? rf_path_char(path) : ' ');
  767. }
  768. _RTW_PRINT_SEL(sel, "%3c "
  769. , strcmp(rfctl->regd_name, regd_str(TXPWR_LMT_WW)) == 0 ? rf_path_char(path) : ' ');
  770. }
  771. _RTW_PRINT_SEL(sel, "\n");
  772. for (n = 0; n < ch_num; n++) {
  773. s8 lmt;
  774. s8 lmt_offset;
  775. u8 base;
  776. if (band == BAND_ON_2_4G)
  777. ch = n + 1;
  778. else
  779. ch = center_chs_5g(bw, n);
  780. if (ch == 0) {
  781. rtw_warn_on(1);
  782. break;
  783. }
  784. /* dump limit in db */
  785. RTW_PRINT_SEL(sel, "%3u ", ch);
  786. head = &rfctl->txpwr_lmt_list;
  787. cur = get_next(head);
  788. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  789. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  790. cur = get_next(cur);
  791. lmt = phy_get_txpwr_lmt_abs(adapter, ent->regd_name, band, bw, tlrs, ntx_idx, ch, 0);
  792. if (lmt == hal_spec->txgi_max) {
  793. sprintf(fmt, "%%%zus ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
  794. snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
  795. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  796. } else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
  797. sprintf(fmt, "%%%zus-0.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 4 : 1);
  798. snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
  799. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  800. } else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
  801. sprintf(fmt, "%%%zud.%%d ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) - 2 : 3);
  802. snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
  803. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  804. } else { /* d */
  805. sprintf(fmt, "%%%zud ", strlen(ent->regd_name) >= 6 ? strlen(ent->regd_name) + 1 : 6);
  806. snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
  807. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  808. }
  809. }
  810. lmt = phy_get_txpwr_lmt_abs(adapter, regd_str(TXPWR_LMT_WW), band, bw, tlrs, ntx_idx, ch, 0);
  811. if (lmt == hal_spec->txgi_max) {
  812. sprintf(fmt, "%%%zus ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
  813. snprintf(tmp_str, TMP_STR_LEN, fmt, "NA");
  814. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  815. } else if (lmt > -hal_spec->txgi_pdbm && lmt < 0) { /* -0.xx */
  816. sprintf(fmt, "%%%zus-0.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 4 : 1);
  817. snprintf(tmp_str, TMP_STR_LEN, fmt, "", (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
  818. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  819. } else if (lmt % hal_spec->txgi_pdbm) { /* d.xx */
  820. sprintf(fmt, "%%%zud.%%d ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) - 2 : 3);
  821. snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm, (rtw_abs(lmt) % hal_spec->txgi_pdbm) * 100 / hal_spec->txgi_pdbm);
  822. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  823. } else { /* d */
  824. sprintf(fmt, "%%%zud ", strlen(regd_str(TXPWR_LMT_WW)) >= 6 ? strlen(regd_str(TXPWR_LMT_WW)) + 1 : 6);
  825. snprintf(tmp_str, TMP_STR_LEN, fmt, lmt / hal_spec->txgi_pdbm);
  826. _RTW_PRINT_SEL(sel, "%s", tmp_str);
  827. }
  828. /* dump limit offset of each path */
  829. for (path = RF_PATH_A; path < RF_PATH_MAX; path++) {
  830. if (path >= rfpath_num)
  831. break;
  832. base = PHY_GetTxPowerByRateBase(adapter, band, path, rs);
  833. _RTW_PRINT_SEL(sel, "|");
  834. head = &rfctl->txpwr_lmt_list;
  835. cur = get_next(head);
  836. i = 0;
  837. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  838. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  839. cur = get_next(cur);
  840. lmt_offset = phy_get_txpwr_lmt(adapter, ent->regd_name, band, bw, path, rs, ntx_idx, ch, 0);
  841. if (lmt_offset == hal_spec->txgi_max) {
  842. *(lmt_idx + i * RF_PATH_MAX + path) = hal_spec->txgi_max;
  843. _RTW_PRINT_SEL(sel, "%3s ", "NA");
  844. } else {
  845. *(lmt_idx + i * RF_PATH_MAX + path) = lmt_offset + base;
  846. _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
  847. }
  848. i++;
  849. }
  850. lmt_offset = phy_get_txpwr_lmt(adapter, regd_str(TXPWR_LMT_WW), band, bw, path, rs, ntx_idx, ch, 0);
  851. if (lmt_offset == hal_spec->txgi_max)
  852. _RTW_PRINT_SEL(sel, "%3s ", "NA");
  853. else
  854. _RTW_PRINT_SEL(sel, "%3d ", lmt_offset);
  855. }
  856. /* compare limit_idx of each path, print 'x' when mismatch */
  857. if (rfpath_num > 1) {
  858. for (i = 0; i < rfctl->txpwr_regd_num; i++) {
  859. for (path = 0; path < RF_PATH_MAX; path++) {
  860. if (path >= rfpath_num)
  861. break;
  862. if (*(lmt_idx + i * RF_PATH_MAX + path) != *(lmt_idx + i * RF_PATH_MAX + ((path + 1) % rfpath_num)))
  863. break;
  864. }
  865. if (path >= rfpath_num)
  866. _RTW_PRINT_SEL(sel, " ");
  867. else
  868. _RTW_PRINT_SEL(sel, "x");
  869. }
  870. }
  871. _RTW_PRINT_SEL(sel, "\n");
  872. }
  873. RTW_PRINT_SEL(sel, "\n");
  874. }
  875. } /* loop for rate sections */
  876. } /* loop for bandwidths */
  877. } /* loop for bands */
  878. if (lmt_idx)
  879. rtw_mfree(lmt_idx, sizeof(s8) * RF_PATH_MAX * rfctl->txpwr_regd_num);
  880. release_lock:
  881. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  882. }
  883. /* search matcing first, if not found, alloc one */
  884. void rtw_txpwr_lmt_add_with_nlen(struct rf_ctl_t *rfctl, const char *regd_name, u32 nlen
  885. , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
  886. {
  887. struct hal_spec_t *hal_spec = GET_HAL_SPEC(dvobj_get_primary_adapter(rfctl_to_dvobj(rfctl)));
  888. struct txpwr_lmt_ent *ent;
  889. _irqL irqL;
  890. _list *cur, *head;
  891. s8 pre_lmt;
  892. if (!regd_name || !nlen) {
  893. rtw_warn_on(1);
  894. goto exit;
  895. }
  896. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  897. /* search for existed entry */
  898. head = &rfctl->txpwr_lmt_list;
  899. cur = get_next(head);
  900. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  901. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  902. cur = get_next(cur);
  903. if (strlen(ent->regd_name) == nlen
  904. && _rtw_memcmp(ent->regd_name, regd_name, nlen) == _TRUE)
  905. goto chk_lmt_val;
  906. }
  907. /* alloc new one */
  908. ent = (struct txpwr_lmt_ent *)rtw_zvmalloc(sizeof(struct txpwr_lmt_ent) + nlen + 1);
  909. if (!ent)
  910. goto release_lock;
  911. _rtw_init_listhead(&ent->list);
  912. _rtw_memcpy(ent->regd_name, regd_name, nlen);
  913. {
  914. u8 j, k, l, m;
  915. for (j = 0; j < MAX_2_4G_BANDWIDTH_NUM; ++j)
  916. for (k = 0; k < TXPWR_LMT_RS_NUM_2G; ++k)
  917. for (m = 0; m < CENTER_CH_2G_NUM; ++m)
  918. for (l = 0; l < MAX_TX_COUNT; ++l)
  919. ent->lmt_2g[j][k][m][l] = hal_spec->txgi_max;
  920. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  921. for (j = 0; j < MAX_5G_BANDWIDTH_NUM; ++j)
  922. for (k = 0; k < TXPWR_LMT_RS_NUM_5G; ++k)
  923. for (m = 0; m < CENTER_CH_5G_ALL_NUM; ++m)
  924. for (l = 0; l < MAX_TX_COUNT; ++l)
  925. ent->lmt_5g[j][k][m][l] = hal_spec->txgi_max;
  926. #endif
  927. }
  928. rtw_list_insert_tail(&ent->list, &rfctl->txpwr_lmt_list);
  929. rfctl->txpwr_regd_num++;
  930. chk_lmt_val:
  931. if (band == BAND_ON_2_4G)
  932. pre_lmt = ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx];
  933. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  934. else if (band == BAND_ON_5G)
  935. pre_lmt = ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx];
  936. #endif
  937. else
  938. goto release_lock;
  939. if (pre_lmt != hal_spec->txgi_max)
  940. RTW_PRINT("duplicate txpwr_lmt for [%s][%s][%s][%s][%uT][%d]\n"
  941. , regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
  942. , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]);
  943. lmt = rtw_min(pre_lmt, lmt);
  944. if (band == BAND_ON_2_4G)
  945. ent->lmt_2g[bw][tlrs][ch_idx][ntx_idx] = lmt;
  946. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  947. else if (band == BAND_ON_5G)
  948. ent->lmt_5g[bw][tlrs - 1][ch_idx][ntx_idx] = lmt;
  949. #endif
  950. if (0)
  951. RTW_PRINT("%s, %4s, %6s, %7s, %uT, ch%3d = %d\n"
  952. , regd_name, band_str(band), ch_width_str(bw), txpwr_lmt_rs_str(tlrs), ntx_idx + 1
  953. , band == BAND_ON_2_4G ? ch_idx + 1 : center_ch_5g_all[ch_idx]
  954. , lmt);
  955. release_lock:
  956. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  957. exit:
  958. return;
  959. }
  960. inline void rtw_txpwr_lmt_add(struct rf_ctl_t *rfctl, const char *regd_name
  961. , u8 band, u8 bw, u8 tlrs, u8 ntx_idx, u8 ch_idx, s8 lmt)
  962. {
  963. rtw_txpwr_lmt_add_with_nlen(rfctl, regd_name, strlen(regd_name)
  964. , band, bw, tlrs, ntx_idx, ch_idx, lmt);
  965. }
  966. struct txpwr_lmt_ent *_rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name)
  967. {
  968. struct txpwr_lmt_ent *ent;
  969. _list *cur, *head;
  970. u8 found = 0;
  971. head = &rfctl->txpwr_lmt_list;
  972. cur = get_next(head);
  973. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  974. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  975. cur = get_next(cur);
  976. if (strcmp(ent->regd_name, regd_name) == 0) {
  977. found = 1;
  978. break;
  979. }
  980. }
  981. if (found)
  982. return ent;
  983. return NULL;
  984. }
  985. inline struct txpwr_lmt_ent *rtw_txpwr_lmt_get_by_name(struct rf_ctl_t *rfctl, const char *regd_name)
  986. {
  987. struct txpwr_lmt_ent *ent;
  988. _irqL irqL;
  989. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  990. ent = _rtw_txpwr_lmt_get_by_name(rfctl, regd_name);
  991. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  992. return ent;
  993. }
  994. void rtw_txpwr_lmt_list_free(struct rf_ctl_t *rfctl)
  995. {
  996. struct txpwr_lmt_ent *ent;
  997. _irqL irqL;
  998. _list *cur, *head;
  999. _enter_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  1000. head = &rfctl->txpwr_lmt_list;
  1001. cur = get_next(head);
  1002. while ((rtw_end_of_queue_search(head, cur)) == _FALSE) {
  1003. ent = LIST_CONTAINOR(cur, struct txpwr_lmt_ent, list);
  1004. cur = get_next(cur);
  1005. if (ent->regd_name == rfctl->regd_name)
  1006. rfctl->regd_name = regd_str(TXPWR_LMT_NONE);
  1007. rtw_list_delete(&ent->list);
  1008. rtw_vmfree((u8 *)ent, sizeof(struct txpwr_lmt_ent) + strlen(ent->regd_name) + 1);
  1009. }
  1010. rfctl->txpwr_regd_num = 0;
  1011. _exit_critical_mutex(&rfctl->txpwr_lmt_mutex, &irqL);
  1012. }
  1013. #endif /* CONFIG_TXPWR_LIMIT */
  1014. int rtw_ch_to_bb_gain_sel(int ch)
  1015. {
  1016. int sel = -1;
  1017. if (ch >= 1 && ch <= 14)
  1018. sel = BB_GAIN_2G;
  1019. #ifdef CONFIG_IEEE80211_BAND_5GHZ
  1020. else if (ch >= 36 && ch < 48)
  1021. sel = BB_GAIN_5GLB1;
  1022. else if (ch >= 52 && ch <= 64)
  1023. sel = BB_GAIN_5GLB2;
  1024. else if (ch >= 100 && ch <= 120)
  1025. sel = BB_GAIN_5GMB1;
  1026. else if (ch >= 124 && ch <= 144)
  1027. sel = BB_GAIN_5GMB2;
  1028. else if (ch >= 149 && ch <= 177)
  1029. sel = BB_GAIN_5GHB;
  1030. #endif
  1031. return sel;
  1032. }
  1033. s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch)
  1034. {
  1035. s8 kfree_offset = 0;
  1036. #ifdef CONFIG_RF_POWER_TRIM
  1037. struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
  1038. s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
  1039. if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) {
  1040. rtw_warn_on(1);
  1041. goto exit;
  1042. }
  1043. if (kfree_data->flag & KFREE_FLAG_ON) {
  1044. kfree_offset = kfree_data->bb_gain[bb_gain_sel][path];
  1045. if (IS_HARDWARE_TYPE_8723D(padapter))
  1046. RTW_INFO("%s path:%s, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
  1047. , __func__, (path == 0)?"S1":"S0",
  1048. ch, bb_gain_sel, kfree_offset);
  1049. else
  1050. RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
  1051. , __func__, path, ch, bb_gain_sel, kfree_offset);
  1052. }
  1053. exit:
  1054. #endif /* CONFIG_RF_POWER_TRIM */
  1055. return kfree_offset;
  1056. }
  1057. void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset)
  1058. {
  1059. #if !defined(CONFIG_RTL8814A) && !defined(CONFIG_RTL8822B) && !defined(CONFIG_RTL8821C)
  1060. u8 write_value;
  1061. #endif
  1062. u8 target_path = 0;
  1063. u32 val32 = 0;
  1064. if (IS_HARDWARE_TYPE_8723D(adapter)) {
  1065. target_path = RF_PATH_A; /*in 8723D case path means S0/S1*/
  1066. if (path == PPG_8723D_S1)
  1067. RTW_INFO("kfree gain_offset 0x55:0x%x ",
  1068. rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
  1069. else if (path == PPG_8723D_S0)
  1070. RTW_INFO("kfree gain_offset 0x65:0x%x ",
  1071. rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff));
  1072. } else {
  1073. target_path = path;
  1074. RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff));
  1075. }
  1076. switch (rtw_get_chip_type(adapter)) {
  1077. #ifdef CONFIG_RTL8723D
  1078. case RTL8723D:
  1079. write_value = RF_TX_GAIN_OFFSET_8723D(offset);
  1080. if (path == PPG_8723D_S1)
  1081. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
  1082. else if (path == PPG_8723D_S0)
  1083. rtw_hal_write_rfreg(adapter, target_path, 0x65, 0x0f8000, write_value);
  1084. break;
  1085. #endif /* CONFIG_RTL8723D */
  1086. #ifdef CONFIG_RTL8703B
  1087. case RTL8703B:
  1088. write_value = RF_TX_GAIN_OFFSET_8703B(offset);
  1089. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
  1090. break;
  1091. #endif /* CONFIG_RTL8703B */
  1092. #ifdef CONFIG_RTL8188F
  1093. case RTL8188F:
  1094. write_value = RF_TX_GAIN_OFFSET_8188F(offset);
  1095. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
  1096. break;
  1097. #endif /* CONFIG_RTL8188F */
  1098. #ifdef CONFIG_RTL8188GTV
  1099. case RTL8188GTV:
  1100. write_value = RF_TX_GAIN_OFFSET_8188GTV(offset);
  1101. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0fc000, write_value);
  1102. break;
  1103. #endif /* CONFIG_RTL8188GTV */
  1104. #ifdef CONFIG_RTL8192E
  1105. case RTL8192E:
  1106. write_value = RF_TX_GAIN_OFFSET_8192E(offset);
  1107. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
  1108. break;
  1109. #endif /* CONFIG_RTL8188F */
  1110. #ifdef CONFIG_RTL8821A
  1111. case RTL8821:
  1112. write_value = RF_TX_GAIN_OFFSET_8821A(offset);
  1113. rtw_hal_write_rfreg(adapter, target_path, 0x55, 0x0f8000, write_value);
  1114. break;
  1115. #endif /* CONFIG_RTL8821A */
  1116. #if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C) || defined(CONFIG_RTL8192F)
  1117. case RTL8814A:
  1118. case RTL8822B:
  1119. case RTL8821C:
  1120. case RTL8192F:
  1121. RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
  1122. break;
  1123. #endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
  1124. default:
  1125. rtw_warn_on(1);
  1126. break;
  1127. }
  1128. if (IS_HARDWARE_TYPE_8723D(adapter)) {
  1129. if (path == PPG_8723D_S1)
  1130. val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
  1131. else if (path == PPG_8723D_S0)
  1132. val32 = rtw_hal_read_rfreg(adapter, target_path, 0x65, 0xffffffff);
  1133. } else {
  1134. val32 = rtw_hal_read_rfreg(adapter, target_path, 0x55, 0xffffffff);
  1135. }
  1136. RTW_INFO(" after :0x%x\n", val32);
  1137. }
  1138. void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch)
  1139. {
  1140. HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
  1141. s8 kfree_offset = 0;
  1142. s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */
  1143. s8 total_offset;
  1144. int i, total = 0;
  1145. if (IS_HARDWARE_TYPE_8723D(adapter))
  1146. total = 2; /* S1 and S0 */
  1147. else
  1148. total = hal_data->NumTotalRFPath;
  1149. for (i = 0; i < total; i++) {
  1150. kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch);
  1151. total_offset = kfree_offset + tx_pwr_track_offset;
  1152. rtw_rf_set_tx_gain_offset(adapter, i, total_offset);
  1153. }
  1154. }
  1155. inline u8 rtw_is_dfs_range(u32 hi, u32 lo)
  1156. {
  1157. return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10);
  1158. }
  1159. u8 rtw_is_dfs_ch(u8 ch)
  1160. {
  1161. u32 hi, lo;
  1162. if (!rtw_chbw_to_freq_range(ch, CHANNEL_WIDTH_20, HAL_PRIME_CHNL_OFFSET_DONT_CARE, &hi, &lo))
  1163. return 0;
  1164. return rtw_is_dfs_range(hi, lo);
  1165. }
  1166. u8 rtw_is_dfs_chbw(u8 ch, u8 bw, u8 offset)
  1167. {
  1168. u32 hi, lo;
  1169. if (!rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo))
  1170. return 0;
  1171. return rtw_is_dfs_range(hi, lo);
  1172. }
  1173. bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region)
  1174. {
  1175. return (dfs_region == PHYDM_DFS_DOMAIN_ETSI && rtw_is_range_overlap(hi, lo, 5650, 5600)) ? _TRUE : _FALSE;
  1176. }
  1177. bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region)
  1178. {
  1179. u32 hi, lo;
  1180. if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
  1181. return _FALSE;
  1182. return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE;
  1183. }