hal_com.h 23 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #ifndef __HAL_COMMON_H__
  21. #define __HAL_COMMON_H__
  22. #include "HalVerDef.h"
  23. #include "hal_pg.h"
  24. #include "hal_phy.h"
  25. #include "hal_phy_reg.h"
  26. #include "hal_com_reg.h"
  27. #include "hal_com_phycfg.h"
  28. #include "../hal/hal_com_c2h.h"
  29. /*------------------------------ Tx Desc definition Macro ------------------------*/
  30. /* #pragma mark -- Tx Desc related definition. -- */
  31. /* ----------------------------------------------------------------------------
  32. * -----------------------------------------------------------
  33. * Rate
  34. * -----------------------------------------------------------
  35. * CCK Rates, TxHT = 0 */
  36. #define DESC_RATE1M 0x00
  37. #define DESC_RATE2M 0x01
  38. #define DESC_RATE5_5M 0x02
  39. #define DESC_RATE11M 0x03
  40. /* OFDM Rates, TxHT = 0 */
  41. #define DESC_RATE6M 0x04
  42. #define DESC_RATE9M 0x05
  43. #define DESC_RATE12M 0x06
  44. #define DESC_RATE18M 0x07
  45. #define DESC_RATE24M 0x08
  46. #define DESC_RATE36M 0x09
  47. #define DESC_RATE48M 0x0a
  48. #define DESC_RATE54M 0x0b
  49. /* MCS Rates, TxHT = 1 */
  50. #define DESC_RATEMCS0 0x0c
  51. #define DESC_RATEMCS1 0x0d
  52. #define DESC_RATEMCS2 0x0e
  53. #define DESC_RATEMCS3 0x0f
  54. #define DESC_RATEMCS4 0x10
  55. #define DESC_RATEMCS5 0x11
  56. #define DESC_RATEMCS6 0x12
  57. #define DESC_RATEMCS7 0x13
  58. #define DESC_RATEMCS8 0x14
  59. #define DESC_RATEMCS9 0x15
  60. #define DESC_RATEMCS10 0x16
  61. #define DESC_RATEMCS11 0x17
  62. #define DESC_RATEMCS12 0x18
  63. #define DESC_RATEMCS13 0x19
  64. #define DESC_RATEMCS14 0x1a
  65. #define DESC_RATEMCS15 0x1b
  66. #define DESC_RATEMCS16 0x1C
  67. #define DESC_RATEMCS17 0x1D
  68. #define DESC_RATEMCS18 0x1E
  69. #define DESC_RATEMCS19 0x1F
  70. #define DESC_RATEMCS20 0x20
  71. #define DESC_RATEMCS21 0x21
  72. #define DESC_RATEMCS22 0x22
  73. #define DESC_RATEMCS23 0x23
  74. #define DESC_RATEMCS24 0x24
  75. #define DESC_RATEMCS25 0x25
  76. #define DESC_RATEMCS26 0x26
  77. #define DESC_RATEMCS27 0x27
  78. #define DESC_RATEMCS28 0x28
  79. #define DESC_RATEMCS29 0x29
  80. #define DESC_RATEMCS30 0x2A
  81. #define DESC_RATEMCS31 0x2B
  82. #define DESC_RATEVHTSS1MCS0 0x2C
  83. #define DESC_RATEVHTSS1MCS1 0x2D
  84. #define DESC_RATEVHTSS1MCS2 0x2E
  85. #define DESC_RATEVHTSS1MCS3 0x2F
  86. #define DESC_RATEVHTSS1MCS4 0x30
  87. #define DESC_RATEVHTSS1MCS5 0x31
  88. #define DESC_RATEVHTSS1MCS6 0x32
  89. #define DESC_RATEVHTSS1MCS7 0x33
  90. #define DESC_RATEVHTSS1MCS8 0x34
  91. #define DESC_RATEVHTSS1MCS9 0x35
  92. #define DESC_RATEVHTSS2MCS0 0x36
  93. #define DESC_RATEVHTSS2MCS1 0x37
  94. #define DESC_RATEVHTSS2MCS2 0x38
  95. #define DESC_RATEVHTSS2MCS3 0x39
  96. #define DESC_RATEVHTSS2MCS4 0x3A
  97. #define DESC_RATEVHTSS2MCS5 0x3B
  98. #define DESC_RATEVHTSS2MCS6 0x3C
  99. #define DESC_RATEVHTSS2MCS7 0x3D
  100. #define DESC_RATEVHTSS2MCS8 0x3E
  101. #define DESC_RATEVHTSS2MCS9 0x3F
  102. #define DESC_RATEVHTSS3MCS0 0x40
  103. #define DESC_RATEVHTSS3MCS1 0x41
  104. #define DESC_RATEVHTSS3MCS2 0x42
  105. #define DESC_RATEVHTSS3MCS3 0x43
  106. #define DESC_RATEVHTSS3MCS4 0x44
  107. #define DESC_RATEVHTSS3MCS5 0x45
  108. #define DESC_RATEVHTSS3MCS6 0x46
  109. #define DESC_RATEVHTSS3MCS7 0x47
  110. #define DESC_RATEVHTSS3MCS8 0x48
  111. #define DESC_RATEVHTSS3MCS9 0x49
  112. #define DESC_RATEVHTSS4MCS0 0x4A
  113. #define DESC_RATEVHTSS4MCS1 0x4B
  114. #define DESC_RATEVHTSS4MCS2 0x4C
  115. #define DESC_RATEVHTSS4MCS3 0x4D
  116. #define DESC_RATEVHTSS4MCS4 0x4E
  117. #define DESC_RATEVHTSS4MCS5 0x4F
  118. #define DESC_RATEVHTSS4MCS6 0x50
  119. #define DESC_RATEVHTSS4MCS7 0x51
  120. #define DESC_RATEVHTSS4MCS8 0x52
  121. #define DESC_RATEVHTSS4MCS9 0x53
  122. #define HDATA_RATE(rate)\
  123. (rate == DESC_RATE1M) ? "CCK_1M" :\
  124. (rate == DESC_RATE2M) ? "CCK_2M" :\
  125. (rate == DESC_RATE5_5M) ? "CCK5_5M" :\
  126. (rate == DESC_RATE11M) ? "CCK_11M" :\
  127. (rate == DESC_RATE6M) ? "OFDM_6M" :\
  128. (rate == DESC_RATE9M) ? "OFDM_9M" :\
  129. (rate == DESC_RATE12M) ? "OFDM_12M" :\
  130. (rate == DESC_RATE18M) ? "OFDM_18M" :\
  131. (rate == DESC_RATE24M) ? "OFDM_24M" :\
  132. (rate == DESC_RATE36M) ? "OFDM_36M" :\
  133. (rate == DESC_RATE48M) ? "OFDM_48M" :\
  134. (rate == DESC_RATE54M) ? "OFDM_54M" :\
  135. (rate == DESC_RATEMCS0) ? "MCS0" :\
  136. (rate == DESC_RATEMCS1) ? "MCS1" :\
  137. (rate == DESC_RATEMCS2) ? "MCS2" :\
  138. (rate == DESC_RATEMCS3) ? "MCS3" :\
  139. (rate == DESC_RATEMCS4) ? "MCS4" :\
  140. (rate == DESC_RATEMCS5) ? "MCS5" :\
  141. (rate == DESC_RATEMCS6) ? "MCS6" :\
  142. (rate == DESC_RATEMCS7) ? "MCS7" :\
  143. (rate == DESC_RATEMCS8) ? "MCS8" :\
  144. (rate == DESC_RATEMCS9) ? "MCS9" :\
  145. (rate == DESC_RATEMCS10) ? "MCS10" :\
  146. (rate == DESC_RATEMCS11) ? "MCS11" :\
  147. (rate == DESC_RATEMCS12) ? "MCS12" :\
  148. (rate == DESC_RATEMCS13) ? "MCS13" :\
  149. (rate == DESC_RATEMCS14) ? "MCS14" :\
  150. (rate == DESC_RATEMCS15) ? "MCS15" :\
  151. (rate == DESC_RATEMCS16) ? "MCS16" :\
  152. (rate == DESC_RATEMCS17) ? "MCS17" :\
  153. (rate == DESC_RATEMCS18) ? "MCS18" :\
  154. (rate == DESC_RATEMCS19) ? "MCS19" :\
  155. (rate == DESC_RATEMCS20) ? "MCS20" :\
  156. (rate == DESC_RATEMCS21) ? "MCS21" :\
  157. (rate == DESC_RATEMCS22) ? "MCS22" :\
  158. (rate == DESC_RATEMCS23) ? "MCS23" :\
  159. (rate == DESC_RATEVHTSS1MCS0) ? "VHTSS1MCS0" :\
  160. (rate == DESC_RATEVHTSS1MCS1) ? "VHTSS1MCS1" :\
  161. (rate == DESC_RATEVHTSS1MCS2) ? "VHTSS1MCS2" :\
  162. (rate == DESC_RATEVHTSS1MCS3) ? "VHTSS1MCS3" :\
  163. (rate == DESC_RATEVHTSS1MCS4) ? "VHTSS1MCS4" :\
  164. (rate == DESC_RATEVHTSS1MCS5) ? "VHTSS1MCS5" :\
  165. (rate == DESC_RATEVHTSS1MCS6) ? "VHTSS1MCS6" :\
  166. (rate == DESC_RATEVHTSS1MCS7) ? "VHTSS1MCS7" :\
  167. (rate == DESC_RATEVHTSS1MCS8) ? "VHTSS1MCS8" :\
  168. (rate == DESC_RATEVHTSS1MCS9) ? "VHTSS1MCS9" :\
  169. (rate == DESC_RATEVHTSS2MCS0) ? "VHTSS2MCS0" :\
  170. (rate == DESC_RATEVHTSS2MCS1) ? "VHTSS2MCS1" :\
  171. (rate == DESC_RATEVHTSS2MCS2) ? "VHTSS2MCS2" :\
  172. (rate == DESC_RATEVHTSS2MCS3) ? "VHTSS2MCS3" :\
  173. (rate == DESC_RATEVHTSS2MCS4) ? "VHTSS2MCS4" :\
  174. (rate == DESC_RATEVHTSS2MCS5) ? "VHTSS2MCS5" :\
  175. (rate == DESC_RATEVHTSS2MCS6) ? "VHTSS2MCS6" :\
  176. (rate == DESC_RATEVHTSS2MCS7) ? "VHTSS2MCS7" :\
  177. (rate == DESC_RATEVHTSS2MCS8) ? "VHTSS2MCS8" :\
  178. (rate == DESC_RATEVHTSS2MCS9) ? "VHTSS2MCS9" :\
  179. (rate == DESC_RATEVHTSS3MCS0) ? "VHTSS3MCS0" :\
  180. (rate == DESC_RATEVHTSS3MCS1) ? "VHTSS3MCS1" :\
  181. (rate == DESC_RATEVHTSS3MCS2) ? "VHTSS3MCS2" :\
  182. (rate == DESC_RATEVHTSS3MCS3) ? "VHTSS3MCS3" :\
  183. (rate == DESC_RATEVHTSS3MCS4) ? "VHTSS3MCS4" :\
  184. (rate == DESC_RATEVHTSS3MCS5) ? "VHTSS3MCS5" :\
  185. (rate == DESC_RATEVHTSS3MCS6) ? "VHTSS3MCS6" :\
  186. (rate == DESC_RATEVHTSS3MCS7) ? "VHTSS3MCS7" :\
  187. (rate == DESC_RATEVHTSS3MCS8) ? "VHTSS3MCS8" :\
  188. (rate == DESC_RATEVHTSS3MCS9) ? "VHTSS3MCS9" : "UNKNOWN"
  189. enum {
  190. UP_LINK,
  191. DOWN_LINK,
  192. };
  193. typedef enum _RT_MEDIA_STATUS {
  194. RT_MEDIA_DISCONNECT = 0,
  195. RT_MEDIA_CONNECT = 1
  196. } RT_MEDIA_STATUS;
  197. #define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */
  198. typedef enum _FIRMWARE_SOURCE {
  199. FW_SOURCE_IMG_FILE = 0,
  200. FW_SOURCE_HEADER_FILE = 1, /* from header file */
  201. } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
  202. typedef enum _CH_SW_USE_CASE {
  203. CH_SW_USE_CASE_TDLS = 0,
  204. CH_SW_USE_CASE_MCC = 1
  205. } CH_SW_USE_CASE;
  206. typedef enum _WAKEUP_REASON{
  207. RX_PAIRWISEKEY = 0x01,
  208. RX_GTK = 0x02,
  209. RX_FOURWAY_HANDSHAKE = 0x03,
  210. RX_DISASSOC = 0x04,
  211. RX_DEAUTH = 0x08,
  212. RX_ARP_REQUEST = 0x09,
  213. FW_DECISION_DISCONNECT = 0x10,
  214. RX_MAGIC_PKT = 0x21,
  215. RX_UNICAST_PKT = 0x22,
  216. RX_PATTERN_PKT = 0x23,
  217. RTD3_SSID_MATCH = 0x24,
  218. RX_REALWOW_V2_WAKEUP_PKT = 0x30,
  219. RX_REALWOW_V2_ACK_LOST = 0x31,
  220. ENABLE_FAIL_DMA_IDLE = 0x40,
  221. ENABLE_FAIL_DMA_PAUSE = 0x41,
  222. RTIME_FAIL_DMA_IDLE = 0x42,
  223. RTIME_FAIL_DMA_PAUSE = 0x43,
  224. RX_PNO = 0x55,
  225. AP_OFFLOAD_WAKEUP = 0x66,
  226. CLK_32K_UNLOCK = 0xFD,
  227. CLK_32K_LOCK = 0xFE
  228. }WAKEUP_REASON;
  229. /*
  230. * Queue Select Value in TxDesc
  231. * */
  232. #define QSLT_BK 0x2/* 0x01 */
  233. #define QSLT_BE 0x0
  234. #define QSLT_VI 0x5/* 0x4 */
  235. #define QSLT_VO 0x7/* 0x6 */
  236. #define QSLT_BEACON 0x10
  237. #define QSLT_HIGH 0x11
  238. #define QSLT_MGNT 0x12
  239. #define QSLT_CMD 0x13
  240. /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
  241. * #define MAX_TX_QUEUE 9 */
  242. #define TX_SELE_HQ BIT(0) /* High Queue */
  243. #define TX_SELE_LQ BIT(1) /* Low Queue */
  244. #define TX_SELE_NQ BIT(2) /* Normal Queue */
  245. #define TX_SELE_EQ BIT(3) /* Extern Queue */
  246. #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
  247. #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0))
  248. #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0))
  249. #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0))
  250. struct dbg_rx_counter {
  251. u32 rx_pkt_ok;
  252. u32 rx_pkt_crc_error;
  253. u32 rx_pkt_drop;
  254. u32 rx_ofdm_fa;
  255. u32 rx_cck_fa;
  256. u32 rx_ht_fa;
  257. };
  258. #ifdef CONFIG_MBSSID_CAM
  259. #define DBG_MBID_CAM_DUMP
  260. void rtw_mbid_cam_init(struct dvobj_priv *dvobj);
  261. void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj);
  262. void rtw_mbid_cam_reset(_adapter *adapter);
  263. u8 rtw_get_max_mbid_cam_id(_adapter *adapter);
  264. u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
  265. int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
  266. int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
  267. void rtw_mbid_cam_restore(_adapter *adapter);
  268. #endif
  269. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  270. void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
  271. void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
  272. #endif
  273. void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
  274. void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
  275. void rtw_reset_mac_rx_counters(_adapter *padapter);
  276. void rtw_reset_phy_rx_counters(_adapter *padapter);
  277. void rtw_reset_phy_trx_ok_counters(_adapter *padapter);
  278. #ifdef DBG_RX_COUNTER_DUMP
  279. #define DUMP_DRV_RX_COUNTER BIT0
  280. #define DUMP_MAC_RX_COUNTER BIT1
  281. #define DUMP_PHY_RX_COUNTER BIT2
  282. #define DUMP_DRV_TRX_COUNTER_DATA BIT3
  283. void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode);
  284. void rtw_dump_rx_counters(_adapter *padapter);
  285. #endif
  286. void dump_chip_info(HAL_VERSION ChipVersion);
  287. void rtw_hal_config_rftype(PADAPTER padapter);
  288. #define BAND_CAP_2G BIT0
  289. #define BAND_CAP_5G BIT1
  290. #define BAND_CAP_BIT_NUM 2
  291. #define BW_CAP_5M BIT0
  292. #define BW_CAP_10M BIT1
  293. #define BW_CAP_20M BIT2
  294. #define BW_CAP_40M BIT3
  295. #define BW_CAP_80M BIT4
  296. #define BW_CAP_160M BIT5
  297. #define BW_CAP_80_80M BIT6
  298. #define BW_CAP_BIT_NUM 7
  299. #define PROTO_CAP_11B BIT0
  300. #define PROTO_CAP_11G BIT1
  301. #define PROTO_CAP_11N BIT2
  302. #define PROTO_CAP_11AC BIT3
  303. #define PROTO_CAP_BIT_NUM 4
  304. #define WL_FUNC_P2P BIT0
  305. #define WL_FUNC_MIRACAST BIT1
  306. #define WL_FUNC_TDLS BIT2
  307. #define WL_FUNC_FTM BIT3
  308. #define WL_FUNC_BIT_NUM 4
  309. int hal_spec_init(_adapter *adapter);
  310. void dump_hal_spec(void *sel, _adapter *adapter);
  311. bool hal_chk_band_cap(_adapter *adapter, u8 cap);
  312. bool hal_chk_bw_cap(_adapter *adapter, u8 cap);
  313. bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
  314. bool hal_is_band_support(_adapter *adapter, u8 band);
  315. bool hal_is_bw_support(_adapter *adapter, u8 bw);
  316. bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
  317. u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
  318. bool hal_chk_wl_func(_adapter *adapter, u8 func);
  319. u8 hal_com_config_channel_plan(
  320. IN PADAPTER padapter,
  321. IN char *hw_alpha2,
  322. IN u8 hw_chplan,
  323. IN char *sw_alpha2,
  324. IN u8 sw_chplan,
  325. IN u8 def_chplan,
  326. IN BOOLEAN AutoLoadFail
  327. );
  328. int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
  329. BOOLEAN
  330. HAL_IsLegalChannel(
  331. IN PADAPTER Adapter,
  332. IN u32 Channel
  333. );
  334. u8 MRateToHwRate(u8 rate);
  335. u8 hw_rate_to_m_rate(u8 rate);
  336. void HalSetBrateCfg(
  337. IN PADAPTER Adapter,
  338. IN u8 *mBratesOS,
  339. OUT u16 *pBrateCfg);
  340. BOOLEAN
  341. Hal_MappingOutPipe(
  342. IN PADAPTER pAdapter,
  343. IN u8 NumOutPipe
  344. );
  345. void rtw_dump_fw_info(void *sel, _adapter *adapter);
  346. void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
  347. void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
  348. void rtw_init_hal_com_default_value(PADAPTER Adapter);
  349. #ifdef CONFIG_FW_C2H_REG
  350. void c2h_evt_clear(_adapter *adapter);
  351. s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
  352. #endif
  353. #ifdef CONFIG_FW_C2H_PKT
  354. void rtw_hal_c2h_pkt_pre_hdl(_adapter *adapter, u8 *buf, u16 len);
  355. void rtw_hal_c2h_pkt_hdl(_adapter *adapter, u8 *buf, u16 len);
  356. #endif
  357. u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta);
  358. u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type);
  359. void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta);
  360. /* access HW only */
  361. u32 rtw_sec_read_cam(_adapter *adapter, u8 addr);
  362. void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata);
  363. void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key);
  364. void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key);
  365. void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id);
  366. bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id);
  367. void rtw_hal_set_msr(_adapter *adapter, u8 net_type);
  368. void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val);
  369. void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr);
  370. void rtw_hal_set_bssid(_adapter *adapter, u8 *val);
  371. void hw_var_port_switch(_adapter *adapter);
  372. void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
  373. void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
  374. void rtw_hal_check_rxfifo_full(_adapter *adapter);
  375. void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
  376. u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
  377. u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
  378. BOOLEAN
  379. eqNByte(
  380. u8 *str1,
  381. u8 *str2,
  382. u32 num
  383. );
  384. u32
  385. MapCharToHexDigit(
  386. IN char chTmp
  387. );
  388. BOOLEAN
  389. GetHexValueFromString(
  390. IN char *szStr,
  391. IN OUT u32 *pu4bVal,
  392. IN OUT u32 *pu4bMove
  393. );
  394. BOOLEAN
  395. GetFractionValueFromString(
  396. IN char *szStr,
  397. IN OUT u8 *pInteger,
  398. IN OUT u8 *pFraction,
  399. IN OUT u32 *pu4bMove
  400. );
  401. BOOLEAN
  402. IsCommentString(
  403. IN char *szStr
  404. );
  405. BOOLEAN
  406. ParseQualifiedString(
  407. IN char *In,
  408. IN OUT u32 *Start,
  409. OUT char *Out,
  410. IN char LeftQualifier,
  411. IN char RightQualifier
  412. );
  413. BOOLEAN
  414. GetU1ByteIntegerFromStringInDecimal(
  415. IN char *Str,
  416. IN OUT u8 *pInt
  417. );
  418. BOOLEAN
  419. isAllSpaceOrTab(
  420. u8 *data,
  421. u8 size
  422. );
  423. void linked_info_dump(_adapter *padapter, u8 benable);
  424. #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
  425. void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
  426. void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel);
  427. #endif
  428. #ifdef DBG_RX_DFRAME_RAW_DATA
  429. void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel);
  430. #endif
  431. void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
  432. #define HWSET_MAX_SIZE 1024
  433. #ifdef CONFIG_EFUSE_CONFIG_FILE
  434. #define EFUSE_FILE_COLUMN_NUM 16
  435. u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
  436. u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
  437. #endif /* CONFIG_EFUSE_CONFIG_FILE */
  438. int check_phy_efuse_tx_power_info_valid(PADAPTER padapter);
  439. int hal_efuse_macaddr_offset(_adapter *adapter);
  440. int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
  441. void rtw_dump_cur_efuse(PADAPTER padapter);
  442. #ifdef CONFIG_RF_POWER_TRIM
  443. void rtw_bb_rf_gain_offset(_adapter *padapter);
  444. #endif /*CONFIG_RF_POWER_TRIM*/
  445. void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer);
  446. u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
  447. void GetHalODMVar(
  448. PADAPTER Adapter,
  449. HAL_ODM_VARIABLE eVariable,
  450. PVOID pValue1,
  451. PVOID pValue2);
  452. void SetHalODMVar(
  453. PADAPTER Adapter,
  454. HAL_ODM_VARIABLE eVariable,
  455. PVOID pValue1,
  456. BOOLEAN bSet);
  457. #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
  458. struct noise_info {
  459. u8 bPauseDIG;
  460. u8 IGIValue;
  461. u32 max_time;/* ms */
  462. u8 chan;
  463. };
  464. #endif
  465. void rtw_get_noise(_adapter *padapter);
  466. u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid);
  467. u8 rtw_get_current_tx_sgi(_adapter *padapter, u8 macid);
  468. void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength, u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
  469. void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
  470. #ifdef CONFIG_TDLS
  471. #ifdef CONFIG_TDLS_CH_SW
  472. s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
  473. #endif
  474. #endif
  475. #if defined(CONFIG_BT_COEXIST) && defined(CONFIG_FW_MULTI_PORT_SUPPORT)
  476. s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter);
  477. #endif
  478. #ifdef CONFIG_GPIO_API
  479. u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
  480. int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh);
  481. int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput);
  482. int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level));
  483. int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num);
  484. #endif
  485. s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode);
  486. void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter);
  487. void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
  488. #ifdef CONFIG_GPIO_WAKEUP
  489. void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable);
  490. void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
  491. void rtw_hal_set_input_gpio(_adapter *padapter, u8 index);
  492. #endif
  493. typedef enum _HAL_PHYDM_OPS {
  494. HAL_PHYDM_DIS_ALL_FUNC,
  495. HAL_PHYDM_FUNC_SET,
  496. HAL_PHYDM_FUNC_CLR,
  497. HAL_PHYDM_ABILITY_BK,
  498. HAL_PHYDM_ABILITY_RESTORE,
  499. HAL_PHYDM_ABILITY_SET,
  500. HAL_PHYDM_ABILITY_GET,
  501. } HAL_PHYDM_OPS;
  502. #define DYNAMIC_FUNC_DISABLE (0x0)
  503. u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
  504. #define rtw_phydm_func_disable_all(adapter) \
  505. rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
  506. #define rtw_phydm_func_for_offchannel(adapter) \
  507. do { \
  508. rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
  509. if (rtw_odm_adaptivity_needed(adapter)) \
  510. rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
  511. } while (0)
  512. #define rtw_phydm_func_set(adapter, ability) \
  513. rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ability)
  514. #define rtw_phydm_func_clr(adapter, ability) \
  515. rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
  516. #define rtw_phydm_ability_backup(adapter) \
  517. rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
  518. #define rtw_phydm_ability_restore(adapter) \
  519. rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
  520. #define rtw_phydm_ability_set(adapter, ability) \
  521. rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_SET, ability)
  522. static inline u32 rtw_phydm_ability_get(_adapter *adapter)
  523. {
  524. return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
  525. }
  526. #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
  527. extern char *rtw_phy_file_path;
  528. extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
  529. #define GetLineFromBuffer(buffer) strsep(&buffer, "\r\n")
  530. #endif
  531. void update_IOT_info(_adapter *padapter);
  532. #ifdef CONFIG_AUTO_CHNL_SEL_NHM
  533. void rtw_acs_start(_adapter *padapter, bool bStart);
  534. #endif
  535. void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
  536. void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf);
  537. void ResumeTxBeacon(_adapter *padapter);
  538. void StopTxBeacon(_adapter *padapter);
  539. #ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/
  540. void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
  541. u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
  542. #endif
  543. #ifdef CONFIG_ANTENNA_DIVERSITY
  544. u8 rtw_hal_antdiv_before_linked(_adapter *padapter);
  545. void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
  546. #endif
  547. #ifdef DBG_SEC_CAM_MOVE
  548. void rtw_hal_move_sta_gk_to_dk(_adapter *adapter);
  549. void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id);
  550. #endif
  551. #ifdef CONFIG_LPS_PG
  552. #define LPSPG_RSVD_PAGE_SET_MACID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 0, 8, _value)/*used macid*/
  553. #define LPSPG_RSVD_PAGE_SET_MBSSCAMID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 8, 8, _value)/*used BSSID CAM entry*/
  554. #define LPSPG_RSVD_PAGE_SET_PMC_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 16, 8, _value)/*Max used Pattern Match CAM entry*/
  555. #define LPSPG_RSVD_PAGE_SET_MU_RAID_GID(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x00, 24, 8, _value)/*Max MU rate table Group ID*/
  556. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 0, 8, _value)/*used Security CAM entry number*/
  557. #define LPSPG_RSVD_PAGE_SET_DRV_RSVDPAGE_NUM(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x04, 8, 8, _value)/*Txbuf used page number for fw offload*/
  558. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID1(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 0, 8, _value)/*used Security CAM entry -1*/
  559. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID2(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 8, 8, _value)/*used Security CAM entry -2*/
  560. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID3(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 16, 8, _value)/*used Security CAM entry -3*/
  561. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID4(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x08, 24, 8, _value)/*used Security CAM entry -4*/
  562. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID5(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 0, 8, _value)/*used Security CAM entry -5*/
  563. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID6(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 8, 8, _value)/*used Security CAM entry -6*/
  564. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID7(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 16, 8, _value)/*used Security CAM entry -7*/
  565. #define LPSPG_RSVD_PAGE_SET_SEC_CAM_ID8(_rsvd_pag, _value) SET_BITS_TO_LE_4BYTE(_rsvd_pag+0x0C, 24, 8, _value)/*used Security CAM entry -8*/
  566. enum lps_pg_hdl_id {
  567. LPS_PG_INFO_CFG = 0,
  568. LPS_PG_REDLEMEM,
  569. LPS_PG_RESEND_H2C,
  570. };
  571. u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
  572. #endif
  573. int rtw_hal_get_rsvd_page(_adapter *adapter, u32 page_offset, u32 page_num, u8 *buffer, u32 buffer_size);
  574. #ifdef CONFIG_WOWLAN
  575. struct rtl_wow_pattern {
  576. u16 crc;
  577. u8 type;
  578. u32 mask[4];
  579. };
  580. void rtw_wow_pattern_cam_dump(_adapter *adapter);
  581. #ifdef CONFIG_WOW_PATTERN_HW_CAM
  582. void rtw_wow_pattern_read_cam_ent(_adapter *adapter, u8 id, struct rtl_wow_pattern *context);
  583. void rtw_dump_wow_pattern(void *sel, struct rtl_wow_pattern *pwow_pattern, u8 idx);
  584. #endif
  585. #endif
  586. void rtw_dump_phy_cap(void *sel, _adapter *adapter);
  587. void rtw_dump_rsvd_page(void *sel, _adapter *adapter, u8 page_offset, u8 page_num);
  588. #ifdef CONFIG_FW_MULTI_PORT_SUPPORT
  589. s32 rtw_hal_set_default_port_id_cmd(_adapter *adapter, u8 mac_id);
  590. s32 rtw_set_default_port_id(_adapter *adapter);
  591. s32 rtw_set_ps_rsvd_page(_adapter *adapter);
  592. #endif
  593. #ifdef CONFIG_P2P_PS
  594. #ifdef RTW_HALMAC
  595. void rtw_set_p2p_ps_offload_cmd(_adapter *adapter, u8 p2p_ps_state);
  596. #endif
  597. #endif
  598. #endif /* __HAL_COMMON_H__ */