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rtl8192f_xmit.h

rtl8192f_xmit.h 24 KB
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  1. /******************************************************************************
    2. 

  2.  *
    3. 

  3.  * Copyright(c) 2007 - 2017 Realtek Corporation.
    4. 

  4.  *
    5. 

  5.  * This program is free software; you can redistribute it and/or modify it
    6. 

  6.  * under the terms of version 2 of the GNU General Public License as
    7. 

  7.  * published by the Free Software Foundation.
    8. 

  8.  *
    9. 

  9.  * This program is distributed in the hope that it will be useful, but WITHOUT
    10. 

  10.  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    11. 

  11.  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
    12. 

  12.  * more details.
    13. 

  13.  *
    14. 

  14.  *****************************************************************************/
    15. 

  15. #ifndef __RTL8192F_XMIT_H__
    16. 

  16. #define __RTL8192F_XMIT_H__
    17. 

  17. 

  18. 

  19. #define MAX_TID (15)
    20. 

  20. 

  21. 

  22. #ifndef __INC_HAL8192FDESC_H
    23. 

  23. #define __INC_HAL8192FDESC_H
    24. 

  24. 

  25. #define RX_STATUS_DESC_SIZE_8192F		24
    26. 

  26. #define RX_DRV_INFO_SIZE_UNIT_8192F 	8
    27. 

  27. 

  28. 

  29. /* DWORD 0 */
    30. 

  30. #define SET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc, __Value) \
    31. 

  31. 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 0, 14, __Value)
    32. 

  32. #define SET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc, __Value) \
    33. 

  33. 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 30, 1, __Value)
    34. 

  34. #define SET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc, __Value) \
    35. 

  35. 	SET_BITS_TO_LE_4BYTE(__pRxStatusDesc, 31, 1, __Value)
    36. 

  36. 

  37. #define GET_RX_STATUS_DESC_PKT_LEN_8192F(__pRxStatusDesc) \
    38. 

  38. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 14)
    39. 

  39. #define GET_RX_STATUS_DESC_CRC32_8192F(__pRxStatusDesc) \
    40. 

  40. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 14, 1)
    41. 

  41. #define GET_RX_STATUS_DESC_ICV_8192F(__pRxStatusDesc) \
    42. 

  42. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 15, 1)
    43. 

  43. #define GET_RX_STATUS_DESC_DRVINFO_SIZE_8192F(__pRxStatusDesc) \
    44. 

  44. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 16, 4)
    45. 

  45. #define GET_RX_STATUS_DESC_SECURITY_8192F(__pRxStatusDesc) \
    46. 

  46. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 20, 3)
    47. 

  47. #define GET_RX_STATUS_DESC_QOS_8192F(__pRxStatusDesc) \
    48. 

  48. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 23, 1)
    49. 

  49. #define GET_RX_STATUS_DESC_SHIFT_8192F(__pRxStatusDesc) \
    50. 

  50. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 24, 2)
    51. 

  51. #define GET_RX_STATUS_DESC_PHY_STATUS_8192F(__pRxStatusDesc) \
    52. 

  52. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 26, 1)
    53. 

  53. #define GET_RX_STATUS_DESC_SWDEC_8192F(__pRxStatusDesc) \
    54. 

  54. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 27, 1)
    55. 

  55. #define GET_RX_STATUS_DESC_EOR_8192F(__pRxStatusDesc) \
    56. 

  56. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 30, 1)
    57. 

  57. #define GET_RX_STATUS_DESC_OWN_8192F(__pRxStatusDesc) \
    58. 

  58. 	LE_BITS_TO_4BYTE(__pRxStatusDesc, 31, 1)
    59. 

  59. 

  60. /* DWORD 1 */
    61. 

  61. #define GET_RX_STATUS_DESC_MACID_8192F(__pRxDesc) \
    62. 

  62. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 0, 7)
    63. 

  63. #define GET_RX_STATUS_DESC_TID_8192F(__pRxDesc) \
    64. 

  64. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 8, 4)
    65. 

  65. #define GET_RX_STATUS_DESC_AMSDU_8192F(__pRxDesc) \
    66. 

  66. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 13, 1)
    67. 

  67. #define GET_RX_STATUS_DESC_RXID_MATCH_8192F(__pRxDesc) \
    68. 

  68. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 14, 1)
    69. 

  69. #define GET_RX_STATUS_DESC_PAGGR_8192F(__pRxDesc) \
    70. 

  70. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 15, 1)
    71. 

  71. #define GET_RX_STATUS_DESC_A1_FIT_8192F(__pRxDesc) \
    72. 

  72. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 16, 4)
    73. 

  73. #define GET_RX_STATUS_DESC_CHKERR_8192F(__pRxDesc) \
    74. 

  74. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 20, 1)
    75. 

  75. #define GET_RX_STATUS_DESC_IPVER_8192F(__pRxDesc) \
    76. 

  76. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 21, 1)
    77. 

  77. #define GET_RX_STATUS_DESC_IS_TCPUDP__8192F(__pRxDesc) \
    78. 

  78. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 22, 1)
    79. 

  79. #define GET_RX_STATUS_DESC_CHK_VLD_8192F(__pRxDesc) \
    80. 

  80. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 23, 1)
    81. 

  81. #define GET_RX_STATUS_DESC_PAM_8192F(__pRxDesc) \
    82. 

  82. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 24, 1)
    83. 

  83. #define GET_RX_STATUS_DESC_PWR_8192F(__pRxDesc) \
    84. 

  84. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 25, 1)
    85. 

  85. #define GET_RX_STATUS_DESC_MORE_DATA_8192F(__pRxDesc) \
    86. 

  86. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 26, 1)
    87. 

  87. #define GET_RX_STATUS_DESC_MORE_FRAG_8192F(__pRxDesc) \
    88. 

  88. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 27, 1)
    89. 

  89. #define GET_RX_STATUS_DESC_TYPE_8192F(__pRxDesc) \
    90. 

  90. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 28, 2)
    91. 

  91. #define GET_RX_STATUS_DESC_MC_8192F(__pRxDesc) \
    92. 

  92. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 30, 1)
    93. 

  93. #define GET_RX_STATUS_DESC_BC_8192F(__pRxDesc) \
    94. 

  94. 	LE_BITS_TO_4BYTE(__pRxDesc+4, 31, 1)
    95. 

  95. 

  96. /* DWORD 2 */
    97. 

  97. #define GET_RX_STATUS_DESC_SEQ_8192F(__pRxStatusDesc) \
    98. 

  98. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 0, 12)
    99. 

  99. #define GET_RX_STATUS_DESC_FRAG_8192F(__pRxStatusDesc) \
    100. 

  100. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 12, 4)
    101. 

  101. #define GET_RX_STATUS_DESC_RX_IS_QOS_8192F(__pRxStatusDesc) \
    102. 

  102. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 16, 1)
    103. 

  103. #define GET_RX_STATUS_DESC_WLANHD_IV_LEN_8192F(__pRxStatusDesc) \
    104. 

  104. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 18, 6)
    105. 

  105. #define GET_RX_STATUS_DESC_RPT_SEL_8192F(__pRxStatusDesc) \
    106. 

  106. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 28, 1)
    107. 

  107. #define GET_RX_STATUS_DESC_FCS_OK_8192F(__pRxStatusDesc) \
    108. 

  108. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+8, 31, 1)
    109. 

  109. 

  110. /* DWORD 3 */
    111. 

  111. #define GET_RX_STATUS_DESC_RX_RATE_8192F(__pRxStatusDesc) \
    112. 

  112. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 0, 7)
    113. 

  113. #define GET_RX_STATUS_DESC_HTC_8192F(__pRxStatusDesc) \
    114. 

  114. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 10, 1)
    115. 

  115. #define GET_RX_STATUS_DESC_EOSP_8192F(__pRxStatusDesc) \
    116. 

  116. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 11, 1)
    117. 

  117. #define GET_RX_STATUS_DESC_BSSID_FIT_8192F(__pRxStatusDesc) \
    118. 

  118. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 12, 2)
    119. 

  119. #ifdef CONFIG_USB_RX_AGGREGATION
    120. 

  120. #define GET_RX_STATUS_DESC_USB_AGG_PKTNUM_8192F(__pRxStatusDesc) \
    121. 

  121. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+12, 16, 8)
    122. 

  122. #endif
    123. 

  123. #define GET_RX_STATUS_DESC_PATTERN_MATCH_8192F(__pRxDesc) \
    124. 

  124. 	LE_BITS_TO_4BYTE(__pRxDesc+12, 29, 1)
    125. 

  125. #define GET_RX_STATUS_DESC_UNICAST_MATCH_8192F(__pRxDesc) \
    126. 

  126. 	LE_BITS_TO_4BYTE(__pRxDesc+12, 30, 1)
    127. 

  127. #define GET_RX_STATUS_DESC_MAGIC_MATCH_8192F(__pRxDesc) \
    128. 

  128. 	LE_BITS_TO_4BYTE(__pRxDesc+12, 31, 1)
    129. 

  129. 

  130. /* DWORD 6 */
    131. 

  131. #define GET_RX_STATUS_DESC_MATCH_ID_8192F(__pRxDesc) \
    132. 

  132. 	LE_BITS_TO_4BYTE(__pRxDesc+16, 0, 7)
    133. 

  133. 

  134. /* DWORD 5 */
    135. 

  135. #define GET_RX_STATUS_DESC_TSFL_8192F(__pRxStatusDesc) \
    136. 

  136. 	LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
    137. 

  137. 

  138. #define GET_RX_STATUS_DESC_BUFF_ADDR64_8192F(__pRxDesc) \
    139. 

  139. 	LE_BITS_TO_4BYTE(__pRxDesc+28, 0, 32)
    140. 

  140. 

  141. 

  142. 

  143. /* Dword 0, rsvd: bit26, bit28 */
    144. 

  144. #define GET_TX_DESC_OWN_8192F(__pTxDesc)\
    145. 

  145. 	LE_BITS_TO_4BYTE(__pTxDesc, 31, 1)
    146. 

  146. 

  147. #define SET_TX_DESC_PKT_SIZE_8192F(__pTxDesc, __Value) \
    148. 

  148. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 16, __Value)
    149. 

  149. #define SET_TX_DESC_OFFSET_8192F(__pTxDesc, __Value) \
    150. 

  150. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 8, __Value)
    151. 

  151. #define SET_TX_DESC_BMC_8192F(__pTxDesc, __Value) \
    152. 

  152. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 24, 1, __Value)
    153. 

  153. #define SET_TX_DESC_HTC_8192F(__pTxDesc, __Value) \
    154. 

  154. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 25, 1, __Value)
    155. 

  155. #define SET_TX_DESC_AMSDU_PAD_EN_8192F(__pTxDesc, __Value) \
    156. 

  156. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 27, 1, __Value)
    157. 

  157. #define SET_TX_DESC_NO_ACM_8192F(__pTxDesc, __Value) \
    158. 

  158. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 29, 1, __Value)
    159. 

  159. #define SET_TX_DESC_GF_8192F(__pTxDesc, __Value) \
    160. 

  160. 	SET_BITS_TO_LE_4BYTE(__pTxDesc, 30, 1, __Value)
    161. 

  161. 

  162. /* Dword 1 */
    163. 

  163. #define SET_TX_DESC_MACID_8192F(__pTxDesc, __Value) \
    164. 

  164. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 7, __Value)
    165. 

  165. #define SET_TX_DESC_QUEUE_SEL_8192F(__pTxDesc, __Value) \
    166. 

  166. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 8, 5, __Value)
    167. 

  167. #define SET_TX_DESC_RDG_NAV_EXT_8192F(__pTxDesc, __Value) \
    168. 

  168. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 13, 1, __Value)
    169. 

  169. #define SET_TX_DESC_LSIG_TXOP_EN_8192F(__pTxDesc, __Value) \
    170. 

  170. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 14, 1, __Value)
    171. 

  171. #define SET_TX_DESC_PIFS_8192F(__pTxDesc, __Value) \
    172. 

  172. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 15, 1, __Value)
    173. 

  173. #define SET_TX_DESC_RATE_ID_8192F(__pTxDesc, __Value) \
    174. 

  174. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 16, 5, __Value)
    175. 

  175. #define SET_TX_DESC_EN_DESC_ID_8192F(__pTxDesc, __Value) \
    176. 

  176. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 21, 1, __Value)
    177. 

  177. #define SET_TX_DESC_SEC_TYPE_8192F(__pTxDesc, __Value) \
    178. 

  178. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 22, 2, __Value)
    179. 

  179. #define SET_TX_DESC_PKT_OFFSET_8192F(__pTxDesc, __Value) \
    180. 

  180. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 24, 5, __Value)
    181. 

  181. #define SET_TX_DESC_MORE_DATA_8192F(__pTxDesc, __Value) \
    182. 

  182. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 29, 1, __Value)
    183. 

  183. 

  184. /* Dword 2 ADD HW_DIG*/
    185. 

  185. #define SET_TX_DESC_PAID_92F(__pTxDesc, __Value) \
    186. 

  186. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 0, 9, __Value)
    187. 

  187. #define SET_TX_DESC_CCA_RTS_8192F(__pTxDesc, __Value) \
    188. 

  188. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 10, 2, __Value)
    189. 

  189. #define SET_TX_DESC_AGG_ENABLE_8192F(__pTxDesc, __Value) \
    190. 

  190. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 12, 1, __Value)
    191. 

  191. #define SET_TX_DESC_RDG_ENABLE_8192F(__pTxDesc, __Value) \
    192. 

  192. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 13, 1, __Value)
    193. 

  193. #define SET_TX_DESC_NULL0_8192F(__pTxDesc, __Value) \
    194. 

  194. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 14, 1, __Value)
    195. 

  195. #define SET_TX_DESC_NULL1_8192F(__pTxDesc, __Value) \
    196. 

  196. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 15, 1, __Value)
    197. 

  197. #define SET_TX_DESC_BK_8192F(__pTxDesc, __Value) \
    198. 

  198. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 16, 1, __Value)
    199. 

  199. #define SET_TX_DESC_MORE_FRAG_8192F(__pTxDesc, __Value) \
    200. 

  200. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 17, 1, __Value)
    201. 

  201. #define SET_TX_DESC_RAW_8192F(__pTxDesc, __Value) \
    202. 

  202. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 18, 1, __Value)
    203. 

  203. #define SET_TX_DESC_CCX_8192F(__pTxDesc, __Value) \
    204. 

  204. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 19, 1, __Value)
    205. 

  205. #define SET_TX_DESC_AMPDU_DENSITY_8192F(__pTxDesc, __Value) \
    206. 

  206. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 20, 3, __Value)
    207. 

  207. #define SET_TX_DESC_BT_INT_8192F(__pTxDesc, __Value) \
    208. 

  208. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 23, 1, __Value)
    209. 

  209. #define SET_TX_DESC_HW_DIG_8192F(__pTxDesc, __Value) \
    210. 

  210. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 7, __Value)
    211. 

  211. 

  212. /* Dword 3 */
    213. 

  213. #define SET_TX_DESC_HWSEQ_SEL_8192F(__pTxDesc, __Value) \
    214. 

  214. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 6, 2, __Value)
    215. 

  215. #define SET_TX_DESC_USE_RATE_8192F(__pTxDesc, __Value) \
    216. 

  216. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 8, 1, __Value)
    217. 

  217. #define SET_TX_DESC_DISABLE_RTS_FB_8192F(__pTxDesc, __Value) \
    218. 

  218. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 9, 1, __Value)
    219. 

  219. #define SET_TX_DESC_DISABLE_FB_8192F(__pTxDesc, __Value) \
    220. 

  220. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 10, 1, __Value)
    221. 

  221. #define SET_TX_DESC_CTS2SELF_8192F(__pTxDesc, __Value) \
    222. 

  222. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 11, 1, __Value)
    223. 

  223. #define SET_TX_DESC_RTS_ENABLE_8192F(__pTxDesc, __Value) \
    224. 

  224. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 12, 1, __Value)
    225. 

  225. #define SET_TX_DESC_HW_RTS_ENABLE_8192F(__pTxDesc, __Value) \
    226. 

  226. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 13, 1, __Value)
    227. 

  227. #define SET_TX_DESC_CHK_EN_92F(__pTxDesc, __Value) \
    228. 

  228. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 14, 1, __Value)
    229. 

  229. #define SET_TX_DESC_NAV_USE_HDR_8192F(__pTxDesc, __Value) \
    230. 

  230. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 15, 1, __Value)
    231. 

  231. #define SET_TX_DESC_USE_MAX_LEN_8192F(__pTxDesc, __Value) \
    232. 

  232. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 16, 1, __Value)
    233. 

  233. #define SET_TX_DESC_MAX_AGG_NUM_8192F(__pTxDesc, __Value) \
    234. 

  234. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 17, 5, __Value)
    235. 

  235. #define SET_TX_DESC_NDPA_8192F(__pTxDesc, __Value) \
    236. 

  236. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 22, 2, __Value)
    237. 

  237. #define SET_TX_DESC_AMPDU_MAX_TIME_8192F(__pTxDesc, __Value) \
    238. 

  238. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+12, 24, 8, __Value)
    239. 

  239. 

  240. /* Dword 4 */
    241. 

  241. #define SET_TX_DESC_TX_RATE_8192F(__pTxDesc, __Value) \
    242. 

  242. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 0, 7, __Value)
    243. 

  243. #define SET_TX_DESC_TX_TRY_RATE_8192F(__pTxDesc, __Value) \
    244. 

  244. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 7, 1, __Value)
    245. 

  245. #define SET_TX_DESC_DATA_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \
    246. 

  246. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 8, 5, __Value)
    247. 

  247. #define SET_TX_DESC_RTS_RATE_FB_LIMIT_8192F(__pTxDesc, __Value) \
    248. 

  248. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 13, 4, __Value)
    249. 

  249. #define SET_TX_DESC_RETRY_LIMIT_ENABLE_8192F(__pTxDesc, __Value) \
    250. 

  250. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 17, 1, __Value)
    251. 

  251. #define SET_TX_DESC_DATA_RETRY_LIMIT_8192F(__pTxDesc, __Value) \
    252. 

  252. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 18, 6, __Value)
    253. 

  253. #define SET_TX_DESC_RTS_RATE_8192F(__pTxDesc, __Value) \
    254. 

  254. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 24, 5, __Value)
    255. 

  255. #define SET_TX_DESC_PCTS_EN_8192F(__pTxDesc, __Value) \
    256. 

  256. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 29, 1, __Value)
    257. 

  257. #define SET_TX_DESC_PCTS_MASK_IDX_8192F(__pTxDesc, __Value) \
    258. 

  258. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+16, 30, 2, __Value)
    259. 

  259. 

  260. /* Dword 5 */
    261. 

  261. #define SET_TX_DESC_DATA_SC_8192F(__pTxDesc, __Value) \
    262. 

  262. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 0, 4, __Value)
    263. 

  263. #define SET_TX_DESC_DATA_SHORT_8192F(__pTxDesc, __Value) \
    264. 

  264. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 4, 1, __Value)
    265. 

  265. #define SET_TX_DESC_DATA_BW_8192F(__pTxDesc, __Value) \
    266. 

  266. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 5, 2, __Value)
    267. 

  267. #define SET_TX_DESC_DATA_LDPC_8192F(__pTxDesc, __Value) \
    268. 

  268. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 7, 1, __Value)
    269. 

  269. #define SET_TX_DESC_DATA_STBC_8192F(__pTxDesc, __Value) \
    270. 

  270. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 8, 2, __Value)
    271. 

  271. #define SET_TX_DESC_RTS_STBC_8192F(__pTxDesc, __Value) \
    272. 

  272. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 10, 2, __Value)
    273. 

  273. #define SET_TX_DESC_RTS_SHORT_8192F(__pTxDesc, __Value) \
    274. 

  274. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 12, 1, __Value)
    275. 

  275. #define SET_TX_DESC_RTS_SC_8192F(__pTxDesc, __Value) \
    276. 

  276. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 13, 4, __Value)
    277. 

  277. #define SET_TX_DESC_PORT_ID_8192F(__pTxDesc, __Value) \
    278. 

  278. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 21, 1, __Value)
    279. 

  279. #define SET_TX_DESC_DROP_ID_8192F(__pTxDesc, __Value) \
    280. 

  280. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 22, 2, __Value)
    281. 

  281. #define SET_TX_DESC_PATH_A_EN_8192F(__pTxDesc, __Value) \
    282. 

  282. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 24, 1, __Value)
    283. 

  283. #define SET_TX_DESC_PATH_B_EN_8192F(__pTxDesc, __Value) \
    284. 

  284. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 25, 1, __Value)
    285. 

  285. #define SET_TX_DESC_TXPWR_OF_SET_8192F(__pTxDesc, __Value) \
    286. 

  286. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+20, 28, 3, __Value)
    287. 

  287. 

  288. /* Dword 6 */
    289. 

  289. #define SET_TX_DESC_SW_DEFINE_8192F(__pTxDesc, __Value) \
    290. 

  290. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 0, 12, __Value)
    291. 

  291. #define SET_TX_DESC_MBSSID_8192F(__pTxDesc, __Value) \
    292. 

  292. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 12, 4, __Value)
    293. 

  293. #define SET_TX_DESC_RF_SEL_8192F(__pTxDesc, __Value) \
    294. 

  294. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+24, 16, 3, __Value)
    295. 

  295. 

  296. /* Dword 7 */
    297. 

  297. #ifdef CONFIG_PCI_HCI
    298. 

  298. #define SET_TX_DESC_TX_BUFFER_SIZE_8192F(__pTxDesc, __Value) \
    299. 

  299. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
    300. 

  300. #endif
    301. 

  301. 

  302. #ifdef CONFIG_USB_HCI
    303. 

  303. #define SET_TX_DESC_TX_DESC_CHECKSUM_8192F(__pTxDesc, __Value) \
    304. 

  304. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 0, 16, __Value)
    305. 

  305. #endif
    306. 

  306. 

  307. #ifdef CONFIG_SDIO_HCI
    308. 

  308. #define SET_TX_DESC_TX_TIMESTAMP_8192F(__pTxDesc, __Value) \
    309. 

  309. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 6, 18, __Value)
    310. 

  310. #endif
    311. 

  311. 

  312. #define SET_TX_DESC_USB_TXAGG_NUM_8192F(__pTxDesc, __Value) \
    313. 

  313. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 24, 8, __Value)
    314. 

  314. 

  315. /* Dword 8 */
    316. 

  316. #define SET_TX_DESC_RTS_RC_8192F(__pTxDesc, __Value) \
    317. 

  317. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 0, 6, __Value)
    318. 

  318. #define SET_TX_DESC_BAR_RC_8192F(__pTxDesc, __Value) \
    319. 

  319. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 6, 2, __Value)
    320. 

  320. #define SET_TX_DESC_DATA_RC_8192F(__pTxDesc, __Value) \
    321. 

  321. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 8, 6, __Value)
    322. 

  322. #define SET_TX_DESC_HWSEQ_EN_8192F(__pTxDesc, __Value) \
    323. 

  323. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 15, 1, __Value)
    324. 

  324. #define SET_TX_DESC_NEXTHEADPAGE_8192F(__pTxDesc, __Value) \
    325. 

  325. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 16, 8, __Value)
    326. 

  326. #define SET_TX_DESC_TAILPAGE_8192F(__pTxDesc, __Value) \
    327. 

  327. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+32, 24, 8, __Value)
    328. 

  328. 

  329. /* Dword 9 */
    330. 

  330. #define SET_TX_DESC_PADDING_LEN_8192F(__pTxDesc, __Value) \
    331. 

  331. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 0, 11, __Value)
    332. 

  332. #define SET_TX_DESC_SEQ_8192F(__pTxDesc, __Value) \
    333. 

  333. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 12, 12, __Value)
    334. 

  334. #define SET_TX_DESC_FINAL_DATA_RATE_8192F(__pTxDesc, __Value) \
    335. 

  335. 	SET_BITS_TO_LE_4BYTE(__pTxDesc+36, 24, 8, __Value)
    336. 

  336. 

  337. 

  338. #define SET_EARLYMODE_PKTNUM_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 0, 4, __Value)
    339. 

  339. #define SET_EARLYMODE_LEN0_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 4, 15, __Value)
    340. 

  340. #define SET_EARLYMODE_LEN1_1_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr, 19, 13, __Value)
    341. 

  341. #define SET_EARLYMODE_LEN1_2_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 2, __Value)
    342. 

  342. #define SET_EARLYMODE_LEN2_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 2, 15,	__Value)
    343. 

  343. #define SET_EARLYMODE_LEN3_8192F(__pAddr, __Value)					SET_BITS_TO_LE_4BYTE(__pAddr+4, 17, 15, __Value)
    344. 

  344. 

  345. 

  346. /*-----------------------------------------------------------------*/
    347. 

  347. /*	RTL8192F TX BUFFER DESC                                      */
    348. 

  348. /*-----------------------------------------------------------------*/
    349. 

  349. #ifdef CONFIG_64BIT_DMA
    350. 

  350. 	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 0, 16, __Valeu)
    351. 

  351. 	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16), 31, 1, __Valeu)
    352. 

  352. 	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+4, 0, 32, __Valeu)
    353. 

  353. 	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+((__Offset)*16)+8, 0, 32, __Valeu)
    354. 

  354. #else
    355. 

  355. 	#define SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 0, 16, __Valeu)
    356. 

  356. 	#define SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8), 31, 1, __Valeu)
    357. 

  357. 	#define SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, __Offset, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc+(__Offset*8)+4, 0, 32, __Valeu)
    358. 

  358. 	#define SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, __Offset, __Valeu)	/* 64 BIT mode only */
    359. 

  359. #endif
    360. 

  360. /* ********************************************************* */
    361. 

  361. 

  362. /* 64 bits  -- 32 bits */
    363. 

  363. /* =======     ======= */
    364. 

  364. /* Dword 0     0 */
    365. 

  365. #define SET_TX_BUFF_DESC_LEN_0_8192F(__pTxDesc, __Valeu) SET_BITS_TO_LE_4BYTE(__pTxDesc, 0, 14, __Valeu)
    366. 

  366. #define SET_TX_BUFF_DESC_PSB_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 16, 15, __Value)
    367. 

  367. #define SET_TX_BUFF_DESC_OWN_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc, 31, 1, __Value)
    368. 

  368. 

  369. /* Dword 1     1 */
    370. 

  370. #define SET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+4, 0, 32, __Value)
    371. 

  371. #define GET_TX_BUFF_DESC_ADDR_LOW_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+4, 0, 32)
    372. 

  372. /* Dword 2     NA */
    373. 

  373. #define SET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 0, __Value)
    374. 

  374. #ifdef CONFIG_64BIT_DMA
    375. 

  375. 	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) LE_BITS_TO_4BYTE(__pTxDesc+8, 0, 32)
    376. 

  376. #else
    377. 

  377. 	#define GET_TX_BUFF_DESC_ADDR_HIGH_0_8192F(__pTxDesc) 0
    378. 

  378. #endif
    379. 

  379. /* Dword 3     NA */
    380. 

  380. /* RESERVED 0 */
    381. 

  381. /* Dword 4     2 */
    382. 

  382. #define SET_TX_BUFF_DESC_LEN_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 1, __Value)
    383. 

  383. #define SET_TX_BUFF_DESC_AMSDU_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 1, __Value)
    384. 

  384. /* Dword 5     3 */
    385. 

  385. #define SET_TX_BUFF_DESC_ADDR_LOW_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 1, __Value)
    386. 

  386. /* Dword 6     NA */
    387. 

  387. #define SET_TX_BUFF_DESC_ADDR_HIGH_1_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 1, __Value)
    388. 

  388. /* Dword 7     NA */
    389. 

  389. /*RESERVED 0 */
    390. 

  390. /* Dword 8     4 */
    391. 

  391. #define SET_TX_BUFF_DESC_LEN_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 2, __Value)
    392. 

  392. #define SET_TX_BUFF_DESC_AMSDU_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 2, __Value)
    393. 

  393. /* Dword 9     5 */
    394. 

  394. #define SET_TX_BUFF_DESC_ADDR_LOW_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 2, __Value)
    395. 

  395. /* Dword 10    NA */
    396. 

  396. #define SET_TX_BUFF_DESC_ADDR_HIGH_2_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 2, __Value)
    397. 

  397. /* Dword 11    NA */
    398. 

  398. /*RESERVED 0 */
    399. 

  399. /* Dword 12    6 */
    400. 

  400. #define SET_TX_BUFF_DESC_LEN_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_LEN_WITH_OFFSET(__pTxDesc, 3, __Value)
    401. 

  401. #define SET_TX_BUFF_DESC_AMSDU_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(__pTxDesc, 3, __Value)
    402. 

  402. /* Dword 13    7 */
    403. 

  403. #define SET_TX_BUFF_DESC_ADDR_LOW_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(__pTxDesc, 3, __Value)
    404. 

  404. /* Dword 14    NA */
    405. 

  405. #define SET_TX_BUFF_DESC_ADDR_HIGH_3_8192F(__pTxDesc, __Value) SET_TXBUFFER_DESC_ADD_HIGT_WITH_OFFSET(__pTxDesc, 3, __Value)
    406. 

  406. /* Dword 15    NA */
    407. 

  407. /*RESERVED 0 */
    408. 

  408. 

  409. 

  410. #endif
    411. 

  411. /* -----------------------------------------------------------
    412. 

  412.  *
    413. 

  413.  *	Rate
    414. 

  414.  *
    415. 

  415.  * -----------------------------------------------------------
    416. 

  416.  * CCK Rates, TxHT = 0 */
    417. 

  417. #define DESC8192F_RATE1M				0x00
    418. 

  418. #define DESC8192F_RATE2M				0x01
    419. 

  419. #define DESC8192F_RATE5_5M				0x02
    420. 

  420. #define DESC8192F_RATE11M				0x03
    421. 

  421. 

  422. /* OFDM Rates, TxHT = 0 */
    423. 

  423. #define DESC8192F_RATE6M				0x04
    424. 

  424. #define DESC8192F_RATE9M				0x05
    425. 

  425. #define DESC8192F_RATE12M				0x06
    426. 

  426. #define DESC8192F_RATE18M				0x07
    427. 

  427. #define DESC8192F_RATE24M				0x08
    428. 

  428. #define DESC8192F_RATE36M				0x09
    429. 

  429. #define DESC8192F_RATE48M				0x0a
    430. 

  430. #define DESC8192F_RATE54M				0x0b
    431. 

  431. 

  432. /* MCS Rates, TxHT = 1 */
    433. 

  433. #define DESC8192F_RATEMCS0				0x0c
    434. 

  434. #define DESC8192F_RATEMCS1				0x0d
    435. 

  435. #define DESC8192F_RATEMCS2				0x0e
    436. 

  436. #define DESC8192F_RATEMCS3				0x0f
    437. 

  437. #define DESC8192F_RATEMCS4				0x10
    438. 

  438. #define DESC8192F_RATEMCS5				0x11
    439. 

  439. #define DESC8192F_RATEMCS6				0x12
    440. 

  440. #define DESC8192F_RATEMCS7				0x13
    441. 

  441. #define DESC8192F_RATEMCS8				0x14
    442. 

  442. #define DESC8192F_RATEMCS9				0x15
    443. 

  443. #define DESC8192F_RATEMCS10		0x16
    444. 

  444. #define DESC8192F_RATEMCS11		0x17
    445. 

  445. #define DESC8192F_RATEMCS12		0x18
    446. 

  446. #define DESC8192F_RATEMCS13		0x19
    447. 

  447. #define DESC8192F_RATEMCS14		0x1a
    448. 

  448. #define DESC8192F_RATEMCS15		0x1b
    449. 

  449. #define DESC8192F_RATEVHTSS1MCS0		0x2c
    450. 

  450. #define DESC8192F_RATEVHTSS1MCS1		0x2d
    451. 

  451. #define DESC8192F_RATEVHTSS1MCS2		0x2e
    452. 

  452. #define DESC8192F_RATEVHTSS1MCS3		0x2f
    453. 

  453. #define DESC8192F_RATEVHTSS1MCS4		0x30
    454. 

  454. #define DESC8192F_RATEVHTSS1MCS5		0x31
    455. 

  455. #define DESC8192F_RATEVHTSS1MCS6		0x32
    456. 

  456. #define DESC8192F_RATEVHTSS1MCS7		0x33
    457. 

  457. #define DESC8192F_RATEVHTSS1MCS8		0x34
    458. 

  458. #define DESC8192F_RATEVHTSS1MCS9		0x35
    459. 

  459. #define DESC8192F_RATEVHTSS2MCS0		0x36
    460. 

  460. #define DESC8192F_RATEVHTSS2MCS1		0x37
    461. 

  461. #define DESC8192F_RATEVHTSS2MCS2		0x38
    462. 

  462. #define DESC8192F_RATEVHTSS2MCS3		0x39
    463. 

  463. #define DESC8192F_RATEVHTSS2MCS4		0x3a
    464. 

  464. #define DESC8192F_RATEVHTSS2MCS5		0x3b
    465. 

  465. #define DESC8192F_RATEVHTSS2MCS6		0x3c
    466. 

  466. #define DESC8192F_RATEVHTSS2MCS7		0x3d
    467. 

  467. #define DESC8192F_RATEVHTSS2MCS8		0x3e
    468. 

  468. #define DESC8192F_RATEVHTSS2MCS9		0x3f
    469. 

  469. 

  470. 

  471. #define	RX_HAL_IS_CCK_RATE_8192F(pDesc)\
    472. 

  472. 	(GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE1M || \
    473. 

  473. 	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE2M || \
    474. 

  474. 	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE5_5M || \
    475. 

  475. 	 GET_RX_STATUS_DESC_RX_RATE_8192F(pDesc) == DESC8192F_RATE11M)
    476. 

  476. 

  477. #ifdef CONFIG_TRX_BD_ARCH
    478. 

  478. 	struct tx_desc;
    479. 

  479. #endif
    480. 

  480. 

  481. void rtl8192f_cal_txdesc_chksum(struct tx_desc *ptxdesc);
    482. 

  482. void rtl8192f_update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem);
    483. 

  483. void rtl8192f_fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
    484. 

  484. void rtl8192f_fill_txdesc_vcs(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
    485. 

  485. void rtl8192f_fill_txdesc_phy(PADAPTER padapter, struct pkt_attrib *pattrib, struct tx_desc *ptxdesc);
    486. 

  486. void rtl8192f_fill_fake_txdesc(PADAPTER padapter, u8 *pDesc, u32 BufferLen, u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame);
    487. 

  487. 

  488. #if defined(CONFIG_CONCURRENT_MODE)
    489. 

  489. 	void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc);
    490. 

  490. #endif
    491. 

  491. void fill_txdesc_bmc_tx_rate(struct pkt_attrib *pattrib, u8 *ptxdesc);
    492. 

  492. 

  493. #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
    494. 

  494. 	s32 rtl8192fs_init_xmit_priv(PADAPTER padapter);
    495. 

  495. 	void rtl8192fs_free_xmit_priv(PADAPTER padapter);
    496. 

  496. 	s32 rtl8192fs_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
    497. 

  497. 	s32 rtl8192fs_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
    498. 

  498. 	s32	rtl8192fs_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
    499. 

  499. 	s32 rtl8192fs_xmit_buf_handler(PADAPTER padapter);
    500. 

  500. 	thread_return rtl8192fs_xmit_thread(thread_context context);
    501. 

  501. 	#define hal_xmit_handler rtl8192fs_xmit_buf_handler
    502. 

  502. #endif
    503. 

  503. 

  504. #ifdef CONFIG_USB_HCI
    505. 

  505. 	s32 rtl8192fu_init_xmit_priv(PADAPTER padapter);
    506. 

  506. 	void rtl8192fu_free_xmit_priv(PADAPTER padapter);
    507. 

  507. 	s32 rtl8192fu_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
    508. 

  508. 	s32 rtl8192fu_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
    509. 

  509. 	s32	 rtl8192fu_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
    510. 

  510. 	s32 rtl8192fu_xmit_buf_handler(PADAPTER padapter);
    511. 

  511. 	#define hal_xmit_handler rtl8192fu_xmit_buf_handler
    512. 

  512. 	void rtl8192fu_xmit_tasklet(void *priv);
    513. 

  513. 	s32 rtl8192fu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
    514. 

  514. 	void _dbg_dump_tx_info(_adapter	*padapter,int frame_tag,struct tx_desc *ptxdesc);
    515. 

  515. #endif
    516. 

  516. 

  517. #ifdef CONFIG_PCI_HCI
    518. 

  518. 	s32 rtl8192fe_init_xmit_priv(PADAPTER padapter);
    519. 

  519. 	void rtl8192fe_free_xmit_priv(PADAPTER padapter);
    520. 

  520. 	struct xmit_buf *rtl8192fe_dequeue_xmitbuf(struct rtw_tx_ring *ring);
    521. 

  521. 	void    rtl8192fe_xmitframe_resume(_adapter *padapter);
    522. 

  522. 	s32 rtl8192fe_hal_xmit(PADAPTER padapter, struct xmit_frame *pxmitframe);
    523. 

  523. 	s32 rtl8192fe_mgnt_xmit(PADAPTER padapter, struct xmit_frame *pmgntframe);
    524. 

  524. 	s32     rtl8192fe_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe);
    525. 

  525. 	void rtl8192fe_xmit_tasklet(void *priv);
    526. 

  526. #endif
    527. 

  527. 

  528. u8	BWMapping_8192F(PADAPTER Adapter, struct pkt_attrib *pattrib);
    529. 

  529. u8	SCMapping_8192F(PADAPTER Adapter, struct pkt_attrib	*pattrib);
    530. 

  530. 

  531. #endif
    532.