halrf_kfree.h 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __HALRF_KFREE_H__
  26. #define __HALRF_KFREE_H__
  27. #define KFREE_VERSION "1.0"
  28. #define KFREE_BAND_NUM 6
  29. #define KFREE_CH_NUM 3
  30. #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_AP))
  31. #define BB_GAIN_NUM 6
  32. #endif
  33. #define KFREE_FLAG_ON BIT(0)
  34. #define KFREE_FLAG_THERMAL_K_ON BIT(1)
  35. #define KFREE_FLAG_ON_2G BIT(2)
  36. #define KFREE_FLAG_ON_5G BIT(3)
  37. #define PA_BIAS_FLAG_ON BIT(4)
  38. #define PPG_THERMAL_OFFSET_21C 0x1EF
  39. #define PPG_2G_TXAB_21C 0x1EE
  40. #define PPG_5GL1_TXA_21C 0x1EC
  41. #define PPG_5GL2_TXA_21C 0x1E8
  42. #define PPG_5GM1_TXA_21C 0x1E4
  43. #define PPG_5GM2_TXA_21C 0x1E0
  44. #define PPG_5GH1_TXA_21C 0x1DC
  45. #define PPG_THERMAL_OFFSET_22B 0x3EF
  46. #define PPG_2G_TXAB_22B 0x3EE
  47. #define PPG_2G_TXCD_22B 0x3ED
  48. #define PPG_5GL1_TXA_22B 0x3EC
  49. #define PPG_5GL1_TXB_22B 0x3EB
  50. #define PPG_5GL1_TXC_22B 0x3EA
  51. #define PPG_5GL1_TXD_22B 0x3E9
  52. #define PPG_5GL2_TXA_22B 0x3E8
  53. #define PPG_5GL2_TXB_22B 0x3E7
  54. #define PPG_5GL2_TXC_22B 0x3E6
  55. #define PPG_5GL2_TXD_22B 0x3E5
  56. #define PPG_5GM1_TXA_22B 0x3E4
  57. #define PPG_5GM1_TXB_22B 0x3E3
  58. #define PPG_5GM1_TXC_22B 0x3E2
  59. #define PPG_5GM1_TXD_22B 0x3E1
  60. #define PPG_5GM2_TXA_22B 0x3E0
  61. #define PPG_5GM2_TXB_22B 0x3DF
  62. #define PPG_5GM2_TXC_22B 0x3DE
  63. #define PPG_5GM2_TXD_22B 0x3DD
  64. #define PPG_5GH1_TXA_22B 0x3DC
  65. #define PPG_5GH1_TXB_22B 0x3DB
  66. #define PPG_5GH1_TXC_22B 0x3DA
  67. #define PPG_5GH1_TXD_22B 0x3D9
  68. #define PPG_PABIAS_2GA_22B 0x3D5
  69. #define PPG_PABIAS_2GB_22B 0x3D6
  70. struct odm_power_trim_data {
  71. u8 flag;
  72. u8 pa_bias_flag;
  73. s8 bb_gain[KFREE_BAND_NUM][MAX_RF_PATH];
  74. s8 thermal;
  75. };
  76. enum phydm_kfree_channeltosw {
  77. PHYDM_2G = 0,
  78. PHYDM_5GLB1 = 1,
  79. PHYDM_5GLB2 = 2,
  80. PHYDM_5GMB1 = 3,
  81. PHYDM_5GMB2 = 4,
  82. PHYDM_5GHB = 5,
  83. };
  84. void phydm_get_thermal_trim_offset(void *dm_void);
  85. void phydm_get_power_trim_offset(void *dm_void);
  86. void phydm_get_pa_bias_offset(void *dm_void);
  87. s8 phydm_get_thermal_offset(void *dm_void);
  88. void phydm_clear_kfree_to_rf(void *dm_void, u8 e_rf_path, u8 data);
  89. void phydm_config_kfree(void *dm_void, u8 channel_to_sw);
  90. #endif /*#ifndef __HALRF_KFREE_H__*/