phydm_hwconfig.c 43 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. /*@************************************************************
  26. * include files
  27. ************************************************************/
  28. #include "mp_precomp.h"
  29. #include "phydm_precomp.h"
  30. #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(dm))
  31. #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(dm))
  32. #if (PHYDM_TESTCHIP_SUPPORT == 1)
  33. #define READ_AND_CONFIG(ic, txt) \
  34. do { \
  35. if (dm->is_mp_chip) \
  36. READ_AND_CONFIG_MP(ic, txt); \
  37. else \
  38. READ_AND_CONFIG_TC(ic, txt); \
  39. } while (0)
  40. #else
  41. #define READ_AND_CONFIG READ_AND_CONFIG_MP
  42. #endif
  43. #define GET_VERSION_MP(ic, txt) (odm_get_version_mp_##ic##txt())
  44. #define GET_VERSION_TC(ic, txt) (odm_get_version_tc_##ic##txt())
  45. #if (PHYDM_TESTCHIP_SUPPORT == 1)
  46. #define GET_VERSION(ic, txt) (dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
  47. #else
  48. #define GET_VERSION(ic, txt) GET_VERSION_MP(ic, txt)
  49. #endif
  50. enum hal_status
  51. odm_config_rf_with_header_file(struct dm_struct *dm,
  52. enum odm_rf_config_type config_type,
  53. u8 e_rf_path)
  54. {
  55. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  56. void *adapter = dm->adapter;
  57. PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
  58. #endif
  59. enum hal_status result = HAL_STATUS_SUCCESS;
  60. PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
  61. (dm->is_mp_chip) ? "MPChip" : "TestChip");
  62. PHYDM_DBG(dm, ODM_COMP_INIT,
  63. "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
  64. dm->support_platform, dm->support_interface, dm->board_type);
  65. /* @1 AP doesn't use PHYDM power tracking table in these ICs */
  66. #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
  67. #if (RTL8812A_SUPPORT == 1)
  68. if (dm->support_ic_type == ODM_RTL8812) {
  69. if (config_type == CONFIG_RF_RADIO) {
  70. if (e_rf_path == RF_PATH_A)
  71. READ_AND_CONFIG_MP(8812a, _radioa);
  72. else if (e_rf_path == RF_PATH_B)
  73. READ_AND_CONFIG_MP(8812a, _radiob);
  74. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  75. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE)
  76. HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
  77. if ((hal_data->EEPROMSVID == 0x17AA && hal_data->EEPROMSMID == 0xA811) ||
  78. (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0xA812) ||
  79. (hal_data->EEPROMSVID == 0x10EC && hal_data->EEPROMSMID == 0x8812))
  80. READ_AND_CONFIG_MP(8812a, _txpwr_lmt_hm812a03);
  81. else
  82. #endif
  83. READ_AND_CONFIG_MP(8812a, _txpwr_lmt);
  84. }
  85. }
  86. #endif
  87. #if (RTL8821A_SUPPORT == 1)
  88. if (dm->support_ic_type == ODM_RTL8821) {
  89. if (config_type == CONFIG_RF_RADIO) {
  90. if (e_rf_path == RF_PATH_A)
  91. READ_AND_CONFIG_MP(8821a, _radioa);
  92. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  93. if (dm->support_interface == ODM_ITRF_USB) {
  94. if (dm->ext_pa_5g || dm->ext_lna_5g)
  95. READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_fem);
  96. else
  97. READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8811a_u_ipa);
  98. } else {
  99. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  100. if (mgnt_info->CustomerID == RT_CID_8821AE_ASUS_MB)
  101. READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_8mm);
  102. else if (mgnt_info->CustomerID == RT_CID_ASUS_NB)
  103. READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a_sar_5mm);
  104. else
  105. #endif
  106. READ_AND_CONFIG_MP(8821a, _txpwr_lmt_8821a);
  107. }
  108. }
  109. }
  110. #endif
  111. #if (RTL8192E_SUPPORT == 1)
  112. if (dm->support_ic_type == ODM_RTL8192E) {
  113. if (config_type == CONFIG_RF_RADIO) {
  114. if (e_rf_path == RF_PATH_A)
  115. READ_AND_CONFIG_MP(8192e, _radioa);
  116. else if (e_rf_path == RF_PATH_B)
  117. READ_AND_CONFIG_MP(8192e, _radiob);
  118. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  119. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN) && (DEV_BUS_TYPE == RT_PCI_INTERFACE) /*Refine by Vincent Lan for 5mm SAR pwr limit*/
  120. HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
  121. if ((hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8192) ||
  122. (hal_data->EEPROMSVID == 0x11AD && hal_data->EEPROMSMID == 0x8193))
  123. READ_AND_CONFIG_MP(8192e, _txpwr_lmt_8192e_sar_5mm);
  124. else
  125. #endif
  126. READ_AND_CONFIG_MP(8192e, _txpwr_lmt);
  127. }
  128. }
  129. #endif
  130. #if (RTL8723D_SUPPORT == 1)
  131. if (dm->support_ic_type == ODM_RTL8723D) {
  132. if (config_type == CONFIG_RF_RADIO) {
  133. if (e_rf_path == RF_PATH_A)
  134. READ_AND_CONFIG_MP(8723d, _radioa);
  135. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  136. READ_AND_CONFIG_MP(8723d, _txpwr_lmt);
  137. }
  138. }
  139. #endif
  140. /* @JJ ADD 20161014 */
  141. #if (RTL8710B_SUPPORT == 1)
  142. if (dm->support_ic_type == ODM_RTL8710B) {
  143. if (config_type == CONFIG_RF_RADIO) {
  144. if (e_rf_path == RF_PATH_A)
  145. READ_AND_CONFIG_MP(8710b, _radioa);
  146. } else if (config_type == CONFIG_RF_TXPWR_LMT)
  147. READ_AND_CONFIG_MP(8710b, _txpwr_lmt);
  148. }
  149. #endif
  150. #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
  151. /* @1 All platforms support */
  152. #if (RTL8188E_SUPPORT == 1)
  153. if (dm->support_ic_type == ODM_RTL8188E) {
  154. if (config_type == CONFIG_RF_RADIO) {
  155. if (e_rf_path == RF_PATH_A)
  156. READ_AND_CONFIG_MP(8188e, _radioa);
  157. } else if (config_type == CONFIG_RF_TXPWR_LMT)
  158. READ_AND_CONFIG_MP(8188e, _txpwr_lmt);
  159. }
  160. #endif
  161. #if (RTL8723B_SUPPORT == 1)
  162. if (dm->support_ic_type == ODM_RTL8723B) {
  163. if (config_type == CONFIG_RF_RADIO)
  164. READ_AND_CONFIG_MP(8723b, _radioa);
  165. else if (config_type == CONFIG_RF_TXPWR_LMT)
  166. READ_AND_CONFIG_MP(8723b, _txpwr_lmt);
  167. }
  168. #endif
  169. #if (RTL8814A_SUPPORT == 1)
  170. if (dm->support_ic_type == ODM_RTL8814A) {
  171. if (config_type == CONFIG_RF_RADIO) {
  172. if (e_rf_path == RF_PATH_A)
  173. READ_AND_CONFIG_MP(8814a, _radioa);
  174. else if (e_rf_path == RF_PATH_B)
  175. READ_AND_CONFIG_MP(8814a, _radiob);
  176. else if (e_rf_path == RF_PATH_C)
  177. READ_AND_CONFIG_MP(8814a, _radioc);
  178. else if (e_rf_path == RF_PATH_D)
  179. READ_AND_CONFIG_MP(8814a, _radiod);
  180. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  181. if (dm->rfe_type == 0)
  182. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type0);
  183. else if (dm->rfe_type == 1)
  184. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type1);
  185. else if (dm->rfe_type == 2)
  186. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type2);
  187. else if (dm->rfe_type == 3)
  188. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type3);
  189. else if (dm->rfe_type == 5)
  190. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type5);
  191. else if (dm->rfe_type == 7)
  192. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type7);
  193. else if (dm->rfe_type == 8)
  194. READ_AND_CONFIG_MP(8814a, _txpwr_lmt_type8);
  195. else
  196. READ_AND_CONFIG_MP(8814a, _txpwr_lmt);
  197. }
  198. }
  199. #endif
  200. #if (RTL8703B_SUPPORT == 1)
  201. if (dm->support_ic_type == ODM_RTL8703B) {
  202. if (config_type == CONFIG_RF_RADIO) {
  203. if (e_rf_path == RF_PATH_A)
  204. READ_AND_CONFIG_MP(8703b, _radioa);
  205. }
  206. }
  207. #endif
  208. #if (RTL8188F_SUPPORT == 1)
  209. if (dm->support_ic_type == ODM_RTL8188F) {
  210. if (config_type == CONFIG_RF_RADIO) {
  211. if (e_rf_path == RF_PATH_A)
  212. READ_AND_CONFIG_MP(8188f, _radioa);
  213. } else if (config_type == CONFIG_RF_TXPWR_LMT)
  214. READ_AND_CONFIG_MP(8188f, _txpwr_lmt);
  215. }
  216. #endif
  217. #if (RTL8822B_SUPPORT == 1)
  218. if (dm->support_ic_type == ODM_RTL8822B) {
  219. if (config_type == CONFIG_RF_RADIO) {
  220. if (e_rf_path == RF_PATH_A)
  221. READ_AND_CONFIG_MP(8822b, _radioa);
  222. else if (e_rf_path == RF_PATH_B)
  223. READ_AND_CONFIG_MP(8822b, _radiob);
  224. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  225. if (dm->rfe_type == 5)
  226. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type5);
  227. else if (dm->rfe_type == 2)
  228. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type2);
  229. else if (dm->rfe_type == 3)
  230. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type3);
  231. else if (dm->rfe_type == 4)
  232. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type4);
  233. else if (dm->rfe_type == 12)
  234. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type12);
  235. else if (dm->rfe_type == 15)
  236. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type15);
  237. else if (dm->rfe_type == 16)
  238. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type16);
  239. else if (dm->rfe_type == 17)
  240. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type17);
  241. else if (dm->rfe_type == 18)
  242. READ_AND_CONFIG_MP(8822b, _txpwr_lmt_type18);
  243. else
  244. READ_AND_CONFIG_MP(8822b, _txpwr_lmt);
  245. }
  246. }
  247. #endif
  248. #if (RTL8197F_SUPPORT == 1)
  249. if (dm->support_ic_type == ODM_RTL8197F) {
  250. if (config_type == CONFIG_RF_RADIO) {
  251. if (e_rf_path == RF_PATH_A)
  252. READ_AND_CONFIG_MP(8197f, _radioa);
  253. else if (e_rf_path == RF_PATH_B)
  254. READ_AND_CONFIG_MP(8197f, _radiob);
  255. }
  256. }
  257. #endif
  258. /*@jj add 20170822*/
  259. #if (RTL8192F_SUPPORT == 1)
  260. if (dm->support_ic_type == ODM_RTL8192F) {
  261. if (config_type == CONFIG_RF_RADIO) {
  262. if (e_rf_path == RF_PATH_A)
  263. READ_AND_CONFIG_MP(8192f, _radioa);
  264. else if (e_rf_path == RF_PATH_B)
  265. READ_AND_CONFIG_MP(8192f, _radiob);
  266. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  267. if (dm->rfe_type == 0)
  268. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type0);
  269. else if (dm->rfe_type == 1)
  270. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type1);
  271. else if (dm->rfe_type == 2)
  272. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type2);
  273. else if (dm->rfe_type == 3)
  274. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type3);
  275. else if (dm->rfe_type == 4)
  276. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type4);
  277. else if (dm->rfe_type == 5)
  278. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type5);
  279. else if (dm->rfe_type == 6)
  280. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type6);
  281. else if (dm->rfe_type == 7)
  282. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type7);
  283. else if (dm->rfe_type == 8)
  284. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type8);
  285. else if (dm->rfe_type == 9)
  286. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type9);
  287. else if (dm->rfe_type == 10)
  288. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type10);
  289. else if (dm->rfe_type == 11)
  290. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type11);
  291. else if (dm->rfe_type == 12)
  292. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type12);
  293. else if (dm->rfe_type == 13)
  294. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type13);
  295. else if (dm->rfe_type == 14)
  296. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type14);
  297. else if (dm->rfe_type == 15)
  298. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type15);
  299. else if (dm->rfe_type == 16)
  300. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type16);
  301. else if (dm->rfe_type == 17)
  302. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type17);
  303. else if (dm->rfe_type == 18)
  304. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type18);
  305. else if (dm->rfe_type == 19)
  306. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type19);
  307. else if (dm->rfe_type == 20)
  308. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type20);
  309. else if (dm->rfe_type == 21)
  310. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type21);
  311. else if (dm->rfe_type == 22)
  312. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type22);
  313. else if (dm->rfe_type == 23)
  314. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type23);
  315. else if (dm->rfe_type == 24)
  316. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type24);
  317. else if (dm->rfe_type == 25)
  318. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type25);
  319. else if (dm->rfe_type == 26)
  320. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type26);
  321. else if (dm->rfe_type == 27)
  322. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type27);
  323. else if (dm->rfe_type == 28)
  324. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type28);
  325. else if (dm->rfe_type == 29)
  326. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type29);
  327. else if (dm->rfe_type == 30)
  328. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type30);
  329. else if (dm->rfe_type == 31)
  330. READ_AND_CONFIG_MP(8192f, _txpwr_lmt_type31);
  331. else
  332. READ_AND_CONFIG_MP(8192f, _txpwr_lmt);
  333. }
  334. }
  335. #endif
  336. #if (RTL8821C_SUPPORT == 1)
  337. if (dm->support_ic_type == ODM_RTL8821C) {
  338. if (config_type == CONFIG_RF_RADIO) {
  339. if (e_rf_path == RF_PATH_A)
  340. READ_AND_CONFIG(8821c, _radioa);
  341. } else if (config_type == CONFIG_RF_TXPWR_LMT) {
  342. READ_AND_CONFIG(8821c, _txpwr_lmt);
  343. }
  344. }
  345. #endif
  346. #if (RTL8195B_SUPPORT == 1)
  347. if (dm->support_ic_type == ODM_RTL8195B) {
  348. if (config_type == CONFIG_RF_RADIO) {
  349. if (e_rf_path == RF_PATH_A)
  350. READ_AND_CONFIG(8195b, _radioa);
  351. }
  352. #if 0
  353. else if (config_type == CONFIG_RF_TXPWR_LMT) {
  354. READ_AND_CONFIG(8821c, _txpwr_lmt);
  355. /*@*/
  356. }
  357. #endif
  358. }
  359. #endif
  360. #if (RTL8198F_SUPPORT == 1)
  361. if (dm->support_ic_type == ODM_RTL8198F) {
  362. if (config_type == CONFIG_RF_RADIO) {
  363. if (e_rf_path == RF_PATH_A)
  364. READ_AND_CONFIG_MP(8198f, _radioa);
  365. else if (e_rf_path == RF_PATH_B)
  366. READ_AND_CONFIG_MP(8198f, _radiob);
  367. else if (e_rf_path == RF_PATH_C)
  368. READ_AND_CONFIG_MP(8198f, _radioc);
  369. else if (e_rf_path == RF_PATH_D)
  370. READ_AND_CONFIG_MP(8198f, _radiod);
  371. }
  372. }
  373. #endif
  374. if (config_type == CONFIG_RF_RADIO) {
  375. if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
  376. result = phydm_set_reg_by_fw(dm,
  377. PHYDM_HALMAC_CMD_END,
  378. 0,
  379. 0,
  380. 0,
  381. (enum rf_path)0,
  382. 0);
  383. PHYDM_DBG(dm, ODM_COMP_INIT,
  384. "rf param offload end!result = %d", result);
  385. }
  386. }
  387. return result;
  388. }
  389. enum hal_status
  390. odm_config_rf_with_tx_pwr_track_header_file(struct dm_struct *dm)
  391. {
  392. PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
  393. (dm->is_mp_chip) ? "MPChip" : "TestChip");
  394. PHYDM_DBG(dm, ODM_COMP_INIT,
  395. "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
  396. dm->support_platform, dm->support_interface, dm->board_type);
  397. /* @1 AP doesn't use PHYDM power tracking table in these ICs */
  398. #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
  399. #if RTL8821A_SUPPORT
  400. if (dm->support_ic_type == ODM_RTL8821) {
  401. if (dm->support_interface == ODM_ITRF_PCIE)
  402. READ_AND_CONFIG_MP(8821a, _txpowertrack_pcie);
  403. else if (dm->support_interface == ODM_ITRF_USB)
  404. READ_AND_CONFIG_MP(8821a, _txpowertrack_usb);
  405. else if (dm->support_interface == ODM_ITRF_SDIO)
  406. READ_AND_CONFIG_MP(8821a, _txpowertrack_sdio);
  407. }
  408. #endif
  409. #if RTL8812A_SUPPORT
  410. if (dm->support_ic_type == ODM_RTL8812) {
  411. if (dm->support_interface == ODM_ITRF_PCIE)
  412. READ_AND_CONFIG_MP(8812a, _txpowertrack_pcie);
  413. else if (dm->support_interface == ODM_ITRF_USB) {
  414. if (dm->rfe_type == 3 && dm->is_mp_chip)
  415. READ_AND_CONFIG_MP(8812a, _txpowertrack_rfe3);
  416. else
  417. READ_AND_CONFIG_MP(8812a, _txpowertrack_usb);
  418. }
  419. }
  420. #endif
  421. #if RTL8192E_SUPPORT
  422. if (dm->support_ic_type == ODM_RTL8192E) {
  423. if (dm->support_interface == ODM_ITRF_PCIE)
  424. READ_AND_CONFIG_MP(8192e, _txpowertrack_pcie);
  425. else if (dm->support_interface == ODM_ITRF_USB)
  426. READ_AND_CONFIG_MP(8192e, _txpowertrack_usb);
  427. else if (dm->support_interface == ODM_ITRF_SDIO)
  428. READ_AND_CONFIG_MP(8192e, _txpowertrack_sdio);
  429. }
  430. #endif
  431. #if RTL8723D_SUPPORT
  432. if (dm->support_ic_type == ODM_RTL8723D) {
  433. if (dm->support_interface == ODM_ITRF_PCIE)
  434. READ_AND_CONFIG_MP(8723d, _txpowertrack_pcie);
  435. else if (dm->support_interface == ODM_ITRF_USB)
  436. READ_AND_CONFIG_MP(8723d, _txpowertrack_usb);
  437. else if (dm->support_interface == ODM_ITRF_SDIO)
  438. READ_AND_CONFIG_MP(8723d, _txpowertrack_sdio);
  439. READ_AND_CONFIG_MP(8723d, _txxtaltrack);
  440. }
  441. #endif
  442. /* @JJ ADD 20161014 */
  443. #if RTL8710B_SUPPORT
  444. if (dm->support_ic_type == ODM_RTL8710B) {
  445. if (dm->package_type == 1)
  446. READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_smic);
  447. else if (dm->package_type == 5)
  448. READ_AND_CONFIG_MP(8710b, _txpowertrack_qfn48m_umc);
  449. READ_AND_CONFIG_MP(8710b, _txxtaltrack);
  450. }
  451. #endif
  452. #if RTL8188E_SUPPORT
  453. if (dm->support_ic_type == ODM_RTL8188E) {
  454. if (odm_get_mac_reg(dm, R_0xf0, 0xF000) >= 8) { /*@if 0xF0[15:12] >= 8, SMIC*/
  455. if (dm->support_interface == ODM_ITRF_PCIE)
  456. READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie_icut);
  457. else if (dm->support_interface == ODM_ITRF_USB)
  458. READ_AND_CONFIG_MP(8188e, _txpowertrack_usb_icut);
  459. else if (dm->support_interface == ODM_ITRF_SDIO)
  460. READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio_icut);
  461. } else { /*@else 0xF0[15:12] < 8, TSMC*/
  462. if (dm->support_interface == ODM_ITRF_PCIE)
  463. READ_AND_CONFIG_MP(8188e, _txpowertrack_pcie);
  464. else if (dm->support_interface == ODM_ITRF_USB)
  465. READ_AND_CONFIG_MP(8188e, _txpowertrack_usb);
  466. else if (dm->support_interface == ODM_ITRF_SDIO)
  467. READ_AND_CONFIG_MP(8188e, _txpowertrack_sdio);
  468. }
  469. }
  470. #endif
  471. #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
  472. /* @1 All platforms support */
  473. #if RTL8723B_SUPPORT
  474. if (dm->support_ic_type == ODM_RTL8723B) {
  475. if (dm->support_interface == ODM_ITRF_PCIE)
  476. READ_AND_CONFIG_MP(8723b, _txpowertrack_pcie);
  477. else if (dm->support_interface == ODM_ITRF_USB)
  478. READ_AND_CONFIG_MP(8723b, _txpowertrack_usb);
  479. else if (dm->support_interface == ODM_ITRF_SDIO)
  480. READ_AND_CONFIG_MP(8723b, _txpowertrack_sdio);
  481. }
  482. #endif
  483. #if RTL8814A_SUPPORT
  484. if (dm->support_ic_type == ODM_RTL8814A) {
  485. if (dm->rfe_type == 0)
  486. READ_AND_CONFIG_MP(8814a, _txpowertrack_type0);
  487. else if (dm->rfe_type == 2)
  488. READ_AND_CONFIG_MP(8814a, _txpowertrack_type2);
  489. else if (dm->rfe_type == 5)
  490. READ_AND_CONFIG_MP(8814a, _txpowertrack_type5);
  491. else if (dm->rfe_type == 7)
  492. READ_AND_CONFIG_MP(8814a, _txpowertrack_type7);
  493. else if (dm->rfe_type == 8)
  494. READ_AND_CONFIG_MP(8814a, _txpowertrack_type8);
  495. else
  496. READ_AND_CONFIG_MP(8814a, _txpowertrack);
  497. READ_AND_CONFIG_MP(8814a, _txpowertssi);
  498. }
  499. #endif
  500. #if RTL8703B_SUPPORT
  501. if (dm->support_ic_type == ODM_RTL8703B) {
  502. if (dm->support_interface == ODM_ITRF_USB)
  503. READ_AND_CONFIG_MP(8703b, _txpowertrack_usb);
  504. else if (dm->support_interface == ODM_ITRF_SDIO)
  505. READ_AND_CONFIG_MP(8703b, _txpowertrack_sdio);
  506. READ_AND_CONFIG_MP(8703b, _txxtaltrack);
  507. }
  508. #endif
  509. #if RTL8188F_SUPPORT
  510. if (dm->support_ic_type == ODM_RTL8188F) {
  511. if (dm->support_interface == ODM_ITRF_USB)
  512. READ_AND_CONFIG_MP(8188f, _txpowertrack_usb);
  513. else if (dm->support_interface == ODM_ITRF_SDIO)
  514. READ_AND_CONFIG_MP(8188f, _txpowertrack_sdio);
  515. }
  516. #endif
  517. #if RTL8822B_SUPPORT
  518. if (dm->support_ic_type == ODM_RTL8822B) {
  519. if (dm->rfe_type == 0)
  520. READ_AND_CONFIG_MP(8822b, _txpowertrack_type0);
  521. else if (dm->rfe_type == 1)
  522. READ_AND_CONFIG_MP(8822b, _txpowertrack_type1);
  523. else if (dm->rfe_type == 2)
  524. READ_AND_CONFIG_MP(8822b, _txpowertrack_type2);
  525. else if ((dm->rfe_type == 3) || (dm->rfe_type == 5))
  526. READ_AND_CONFIG_MP(8822b, _txpowertrack_type3_type5);
  527. else if (dm->rfe_type == 4)
  528. READ_AND_CONFIG_MP(8822b, _txpowertrack_type4);
  529. else if (dm->rfe_type == 6)
  530. READ_AND_CONFIG_MP(8822b, _txpowertrack_type6);
  531. else if (dm->rfe_type == 7)
  532. READ_AND_CONFIG_MP(8822b, _txpowertrack_type7);
  533. else if (dm->rfe_type == 8)
  534. READ_AND_CONFIG_MP(8822b, _txpowertrack_type8);
  535. else if (dm->rfe_type == 9)
  536. READ_AND_CONFIG_MP(8822b, _txpowertrack_type9);
  537. else if (dm->rfe_type == 10)
  538. READ_AND_CONFIG_MP(8822b, _txpowertrack_type10);
  539. else if (dm->rfe_type == 11)
  540. READ_AND_CONFIG_MP(8822b, _txpowertrack_type11);
  541. else if (dm->rfe_type == 12)
  542. READ_AND_CONFIG_MP(8822b, _txpowertrack_type12);
  543. else if (dm->rfe_type == 13)
  544. READ_AND_CONFIG_MP(8822b, _txpowertrack_type13);
  545. else if (dm->rfe_type == 14)
  546. READ_AND_CONFIG_MP(8822b, _txpowertrack_type14);
  547. else if (dm->rfe_type == 15)
  548. READ_AND_CONFIG_MP(8822b, _txpowertrack_type15);
  549. else if (dm->rfe_type == 16)
  550. READ_AND_CONFIG_MP(8822b, _txpowertrack_type16);
  551. else if (dm->rfe_type == 17)
  552. READ_AND_CONFIG_MP(8822b, _txpowertrack_type17);
  553. else if (dm->rfe_type == 18)
  554. READ_AND_CONFIG_MP(8822b, _txpowertrack_type18);
  555. else
  556. READ_AND_CONFIG_MP(8822b, _txpowertrack);
  557. }
  558. #endif
  559. #if RTL8197F_SUPPORT
  560. if (dm->support_ic_type == ODM_RTL8197F) {
  561. if (dm->rfe_type == 0)
  562. READ_AND_CONFIG_MP(8197f, _txpowertrack_type0);
  563. else if (dm->rfe_type == 1)
  564. READ_AND_CONFIG_MP(8197f, _txpowertrack_type1);
  565. else
  566. READ_AND_CONFIG_MP(8197f, _txpowertrack);
  567. }
  568. #endif
  569. /*@jj add 20170822*/
  570. #if RTL8192F_SUPPORT
  571. if (dm->support_ic_type == ODM_RTL8192F) {
  572. if (dm->rfe_type == 0)
  573. READ_AND_CONFIG_MP(8192f, _txpowertrack_type0);
  574. else if (dm->rfe_type == 1)
  575. READ_AND_CONFIG_MP(8192f, _txpowertrack_type1);
  576. else if (dm->rfe_type == 2)
  577. READ_AND_CONFIG_MP(8192f, _txpowertrack_type2);
  578. else if (dm->rfe_type == 3)
  579. READ_AND_CONFIG_MP(8192f, _txpowertrack_type3);
  580. else if (dm->rfe_type == 4)
  581. READ_AND_CONFIG_MP(8192f, _txpowertrack_type4);
  582. else if (dm->rfe_type == 5)
  583. READ_AND_CONFIG_MP(8192f, _txpowertrack_type5);
  584. else if (dm->rfe_type == 6)
  585. READ_AND_CONFIG_MP(8192f, _txpowertrack_type6);
  586. else if (dm->rfe_type == 7)
  587. READ_AND_CONFIG_MP(8192f, _txpowertrack_type7);
  588. else if (dm->rfe_type == 8)
  589. READ_AND_CONFIG_MP(8192f, _txpowertrack_type8);
  590. else if (dm->rfe_type == 9)
  591. READ_AND_CONFIG_MP(8192f, _txpowertrack_type9);
  592. else if (dm->rfe_type == 10)
  593. READ_AND_CONFIG_MP(8192f, _txpowertrack_type10);
  594. else if (dm->rfe_type == 11)
  595. READ_AND_CONFIG_MP(8192f, _txpowertrack_type11);
  596. else if (dm->rfe_type == 12)
  597. READ_AND_CONFIG_MP(8192f, _txpowertrack_type12);
  598. else if (dm->rfe_type == 13)
  599. READ_AND_CONFIG_MP(8192f, _txpowertrack_type13);
  600. else if (dm->rfe_type == 14)
  601. READ_AND_CONFIG_MP(8192f, _txpowertrack_type14);
  602. else if (dm->rfe_type == 15)
  603. READ_AND_CONFIG_MP(8192f, _txpowertrack_type15);
  604. else if (dm->rfe_type == 16)
  605. READ_AND_CONFIG_MP(8192f, _txpowertrack_type16);
  606. else if (dm->rfe_type == 17)
  607. READ_AND_CONFIG_MP(8192f, _txpowertrack_type17);
  608. else if (dm->rfe_type == 18)
  609. READ_AND_CONFIG_MP(8192f, _txpowertrack_type18);
  610. else if (dm->rfe_type == 19)
  611. READ_AND_CONFIG_MP(8192f, _txpowertrack_type19);
  612. else if (dm->rfe_type == 20)
  613. READ_AND_CONFIG_MP(8192f, _txpowertrack_type20);
  614. else if (dm->rfe_type == 21)
  615. READ_AND_CONFIG_MP(8192f, _txpowertrack_type21);
  616. else if (dm->rfe_type == 22)
  617. READ_AND_CONFIG_MP(8192f, _txpowertrack_type22);
  618. else if (dm->rfe_type == 23)
  619. READ_AND_CONFIG_MP(8192f, _txpowertrack_type23);
  620. else if (dm->rfe_type == 24)
  621. READ_AND_CONFIG_MP(8192f, _txpowertrack_type24);
  622. else if (dm->rfe_type == 25)
  623. READ_AND_CONFIG_MP(8192f, _txpowertrack_type25);
  624. else if (dm->rfe_type == 26)
  625. READ_AND_CONFIG_MP(8192f, _txpowertrack_type26);
  626. else if (dm->rfe_type == 27)
  627. READ_AND_CONFIG_MP(8192f, _txpowertrack_type27);
  628. else if (dm->rfe_type == 28)
  629. READ_AND_CONFIG_MP(8192f, _txpowertrack_type28);
  630. else if (dm->rfe_type == 29)
  631. READ_AND_CONFIG_MP(8192f, _txpowertrack_type29);
  632. else if (dm->rfe_type == 30)
  633. READ_AND_CONFIG_MP(8192f, _txpowertrack_type30);
  634. else if (dm->rfe_type == 31)
  635. READ_AND_CONFIG_MP(8192f, _txpowertrack_type31);
  636. else
  637. READ_AND_CONFIG_MP(8192f, _txpowertrack);
  638. READ_AND_CONFIG_MP(8192f, _txxtaltrack);
  639. }
  640. #endif
  641. #if RTL8821C_SUPPORT
  642. if (dm->support_ic_type == ODM_RTL8821C) {
  643. if (dm->rfe_type == 0x5)
  644. READ_AND_CONFIG(8821c, _txpowertrack_type0x28);
  645. else if (dm->rfe_type == 0x4)
  646. READ_AND_CONFIG(8821c, _txpowertrack_type0x20);
  647. else
  648. READ_AND_CONFIG(8821c, _txpowertrack);
  649. }
  650. #endif
  651. #if RTL8198F_SUPPORT
  652. if (dm->support_ic_type == ODM_RTL8198F)
  653. READ_AND_CONFIG_MP(8198f, _txpowertrack);
  654. #endif
  655. #if RTL8195B_SUPPORT
  656. if (dm->support_ic_type == ODM_RTL8195B) {
  657. READ_AND_CONFIG_MP(8195b, _txpowertrack);
  658. READ_AND_CONFIG_MP(8195b, _txxtaltrack);
  659. }
  660. #endif
  661. return HAL_STATUS_SUCCESS;
  662. }
  663. enum hal_status
  664. odm_config_bb_with_header_file(struct dm_struct *dm,
  665. enum odm_bb_config_type config_type)
  666. {
  667. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  668. void *adapter = dm->adapter;
  669. PMGNT_INFO mgnt_info = &((PADAPTER)adapter)->MgntInfo;
  670. #endif
  671. enum hal_status result = HAL_STATUS_SUCCESS;
  672. /* @1 AP doesn't use PHYDM initialization in these ICs */
  673. #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
  674. #if (RTL8812A_SUPPORT == 1)
  675. if (dm->support_ic_type == ODM_RTL8812) {
  676. if (config_type == CONFIG_BB_PHY_REG)
  677. READ_AND_CONFIG_MP(8812a, _phy_reg);
  678. else if (config_type == CONFIG_BB_AGC_TAB)
  679. READ_AND_CONFIG_MP(8812a, _agc_tab);
  680. else if (config_type == CONFIG_BB_PHY_REG_PG) {
  681. if (dm->rfe_type == 3 && dm->is_mp_chip)
  682. READ_AND_CONFIG_MP(8812a, _phy_reg_pg_asus);
  683. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  684. else if (mgnt_info->CustomerID == RT_CID_WNC_NEC && dm->is_mp_chip)
  685. READ_AND_CONFIG_MP(8812a, _phy_reg_pg_nec);
  686. #if RT_PLATFORM == PLATFORM_MACOSX
  687. /*@{1827}{1024} for BUFFALO power by rate table. Isaiah 2013-11-29*/
  688. else if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO)
  689. READ_AND_CONFIG_MP(8812a, _phy_reg_pg_dni);
  690. /* TP-Link T4UH, Isaiah 2015-03-16*/
  691. else if (mgnt_info->CustomerID == RT_CID_TPLINK_HPWR) {
  692. pr_debug("RT_CID_TPLINK_HPWR:: _PHY_REG_PG_TPLINK\n");
  693. READ_AND_CONFIG_MP(8812a, _phy_reg_pg_tplink);
  694. }
  695. #endif
  696. #endif
  697. else
  698. READ_AND_CONFIG_MP(8812a, _phy_reg_pg);
  699. } else if (config_type == CONFIG_BB_PHY_REG_MP)
  700. READ_AND_CONFIG_MP(8812a, _phy_reg_mp);
  701. else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
  702. dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
  703. /*@AGC_TAB DIFF dont support FW offload*/
  704. if ((*dm->channel >= 36) && (*dm->channel <= 64))
  705. AGC_DIFF_CONFIG_MP(8812a, lb);
  706. else if (*dm->channel >= 100)
  707. AGC_DIFF_CONFIG_MP(8812a, hb);
  708. }
  709. }
  710. #endif
  711. #if (RTL8821A_SUPPORT == 1)
  712. if (dm->support_ic_type == ODM_RTL8821) {
  713. if (config_type == CONFIG_BB_PHY_REG)
  714. READ_AND_CONFIG_MP(8821a, _phy_reg);
  715. else if (config_type == CONFIG_BB_AGC_TAB)
  716. READ_AND_CONFIG_MP(8821a, _agc_tab);
  717. else if (config_type == CONFIG_BB_PHY_REG_PG) {
  718. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  719. #if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
  720. HAL_DATA_TYPE * hal_data = GET_HAL_DATA(((PADAPTER)adapter));
  721. if ((hal_data->EEPROMSVID == 0x1043 && hal_data->EEPROMSMID == 0x207F))
  722. READ_AND_CONFIG_MP(8821a, _phy_reg_pg_e202_sa);
  723. else
  724. #endif
  725. #if (RT_PLATFORM == PLATFORM_MACOSX)
  726. /*@ for BUFFALO pwr by rate table */
  727. if (mgnt_info->CustomerID == RT_CID_DNI_BUFFALO) {
  728. /*@ for BUFFALO pwr by rate table (JP/US)*/
  729. if (mgnt_info->ChannelPlan == RT_CHANNEL_DOMAIN_US_2G_CANADA_5G)
  730. READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_us);
  731. else
  732. READ_AND_CONFIG_MP(8821a, _phy_reg_pg_dni_jp);
  733. } else
  734. #endif
  735. #endif
  736. READ_AND_CONFIG_MP(8821a, _phy_reg_pg);
  737. }
  738. }
  739. #endif
  740. #if (RTL8192E_SUPPORT == 1)
  741. if (dm->support_ic_type == ODM_RTL8192E) {
  742. if (config_type == CONFIG_BB_PHY_REG)
  743. READ_AND_CONFIG_MP(8192e, _phy_reg);
  744. else if (config_type == CONFIG_BB_AGC_TAB)
  745. READ_AND_CONFIG_MP(8192e, _agc_tab);
  746. else if (config_type == CONFIG_BB_PHY_REG_PG)
  747. READ_AND_CONFIG_MP(8192e, _phy_reg_pg);
  748. }
  749. #endif
  750. #if (RTL8723D_SUPPORT == 1)
  751. if (dm->support_ic_type == ODM_RTL8723D) {
  752. if (config_type == CONFIG_BB_PHY_REG)
  753. READ_AND_CONFIG_MP(8723d, _phy_reg);
  754. else if (config_type == CONFIG_BB_AGC_TAB)
  755. READ_AND_CONFIG_MP(8723d, _agc_tab);
  756. else if (config_type == CONFIG_BB_PHY_REG_PG)
  757. READ_AND_CONFIG_MP(8723d, _phy_reg_pg);
  758. }
  759. #endif
  760. /* @JJ ADD 20161014 */
  761. #if (RTL8710B_SUPPORT == 1)
  762. if (dm->support_ic_type == ODM_RTL8710B) {
  763. if (config_type == CONFIG_BB_PHY_REG)
  764. READ_AND_CONFIG_MP(8710b, _phy_reg);
  765. else if (config_type == CONFIG_BB_AGC_TAB)
  766. READ_AND_CONFIG_MP(8710b, _agc_tab);
  767. else if (config_type == CONFIG_BB_PHY_REG_PG)
  768. READ_AND_CONFIG_MP(8710b, _phy_reg_pg);
  769. }
  770. #endif
  771. #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
  772. /* @1 All platforms support */
  773. #if (RTL8188E_SUPPORT == 1)
  774. if (dm->support_ic_type == ODM_RTL8188E) {
  775. if (config_type == CONFIG_BB_PHY_REG)
  776. READ_AND_CONFIG_MP(8188e, _phy_reg);
  777. else if (config_type == CONFIG_BB_AGC_TAB)
  778. READ_AND_CONFIG_MP(8188e, _agc_tab);
  779. else if (config_type == CONFIG_BB_PHY_REG_PG)
  780. READ_AND_CONFIG_MP(8188e, _phy_reg_pg);
  781. }
  782. #endif
  783. #if (RTL8723B_SUPPORT == 1)
  784. if (dm->support_ic_type == ODM_RTL8723B) {
  785. if (config_type == CONFIG_BB_PHY_REG)
  786. READ_AND_CONFIG_MP(8723b, _phy_reg);
  787. else if (config_type == CONFIG_BB_AGC_TAB)
  788. READ_AND_CONFIG_MP(8723b, _agc_tab);
  789. else if (config_type == CONFIG_BB_PHY_REG_PG)
  790. READ_AND_CONFIG_MP(8723b, _phy_reg_pg);
  791. }
  792. #endif
  793. #if (RTL8814A_SUPPORT == 1)
  794. if (dm->support_ic_type == ODM_RTL8814A) {
  795. if (config_type == CONFIG_BB_PHY_REG)
  796. READ_AND_CONFIG_MP(8814a, _phy_reg);
  797. else if (config_type == CONFIG_BB_AGC_TAB)
  798. READ_AND_CONFIG_MP(8814a, _agc_tab);
  799. else if (config_type == CONFIG_BB_PHY_REG_PG) {
  800. if (dm->rfe_type == 0)
  801. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type0);
  802. else if (dm->rfe_type == 2)
  803. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type2);
  804. else if (dm->rfe_type == 3)
  805. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type3);
  806. else if (dm->rfe_type == 4)
  807. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type4);
  808. else if (dm->rfe_type == 5)
  809. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type5);
  810. else if (dm->rfe_type == 7)
  811. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type7);
  812. else if (dm->rfe_type == 8)
  813. READ_AND_CONFIG_MP(8814a, _phy_reg_pg_type8);
  814. else
  815. READ_AND_CONFIG_MP(8814a, _phy_reg_pg);
  816. } else if (config_type == CONFIG_BB_PHY_REG_MP)
  817. READ_AND_CONFIG_MP(8814a, _phy_reg_mp);
  818. }
  819. #endif
  820. #if (RTL8703B_SUPPORT == 1)
  821. if (dm->support_ic_type == ODM_RTL8703B) {
  822. if (config_type == CONFIG_BB_PHY_REG)
  823. READ_AND_CONFIG_MP(8703b, _phy_reg);
  824. else if (config_type == CONFIG_BB_AGC_TAB)
  825. READ_AND_CONFIG_MP(8703b, _agc_tab);
  826. else if (config_type == CONFIG_BB_PHY_REG_PG)
  827. READ_AND_CONFIG_MP(8703b, _phy_reg_pg);
  828. }
  829. #endif
  830. #if (RTL8188F_SUPPORT == 1)
  831. if (dm->support_ic_type == ODM_RTL8188F) {
  832. if (config_type == CONFIG_BB_PHY_REG)
  833. READ_AND_CONFIG_MP(8188f, _phy_reg);
  834. else if (config_type == CONFIG_BB_AGC_TAB)
  835. READ_AND_CONFIG_MP(8188f, _agc_tab);
  836. else if (config_type == CONFIG_BB_PHY_REG_PG)
  837. READ_AND_CONFIG_MP(8188f, _phy_reg_pg);
  838. }
  839. #endif
  840. #if (RTL8822B_SUPPORT == 1)
  841. if (dm->support_ic_type == ODM_RTL8822B) {
  842. if (config_type == CONFIG_BB_PHY_REG) {
  843. READ_AND_CONFIG_MP(8822b, _phy_reg);
  844. } else if (config_type == CONFIG_BB_AGC_TAB) {
  845. READ_AND_CONFIG_MP(8822b, _agc_tab);
  846. } else if (config_type == CONFIG_BB_PHY_REG_PG) {
  847. if (dm->rfe_type == 2)
  848. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type2);
  849. else if (dm->rfe_type == 3)
  850. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type3);
  851. else if (dm->rfe_type == 4)
  852. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type4);
  853. else if (dm->rfe_type == 5)
  854. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type5);
  855. else if (dm->rfe_type == 12)
  856. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type12);
  857. else if (dm->rfe_type == 15)
  858. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type15);
  859. else if (dm->rfe_type == 16)
  860. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type16);
  861. else if (dm->rfe_type == 17)
  862. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type17);
  863. else if (dm->rfe_type == 18)
  864. READ_AND_CONFIG_MP(8822b, _phy_reg_pg_type18);
  865. else
  866. READ_AND_CONFIG_MP(8822b, _phy_reg_pg);
  867. }
  868. }
  869. #endif
  870. #if (RTL8197F_SUPPORT == 1)
  871. if (dm->support_ic_type == ODM_RTL8197F) {
  872. if (config_type == CONFIG_BB_PHY_REG) {
  873. READ_AND_CONFIG_MP(8197f, _phy_reg);
  874. if (dm->cut_version == ODM_CUT_A)
  875. phydm_phypara_a_cut(dm);
  876. } else if (config_type == CONFIG_BB_AGC_TAB)
  877. READ_AND_CONFIG_MP(8197f, _agc_tab);
  878. }
  879. #endif
  880. /*@jj add 20170822*/
  881. #if (RTL8192F_SUPPORT == 1)
  882. if (dm->support_ic_type == ODM_RTL8192F) {
  883. if (config_type == CONFIG_BB_PHY_REG) {
  884. READ_AND_CONFIG_MP(8192f, _phy_reg);
  885. } else if (config_type == CONFIG_BB_AGC_TAB) {
  886. READ_AND_CONFIG_MP(8192f, _agc_tab);
  887. } else if (config_type == CONFIG_BB_PHY_REG_PG) {
  888. if (dm->rfe_type == 0)
  889. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type0);
  890. else if (dm->rfe_type == 1)
  891. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type1);
  892. else if (dm->rfe_type == 2)
  893. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type2);
  894. else if (dm->rfe_type == 3)
  895. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type3);
  896. else if (dm->rfe_type == 4)
  897. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type4);
  898. else if (dm->rfe_type == 5)
  899. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type5);
  900. else if (dm->rfe_type == 6)
  901. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type6);
  902. else if (dm->rfe_type == 7)
  903. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type7);
  904. else if (dm->rfe_type == 8)
  905. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type8);
  906. else if (dm->rfe_type == 9)
  907. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type9);
  908. else if (dm->rfe_type == 10)
  909. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type10);
  910. else if (dm->rfe_type == 11)
  911. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type11);
  912. else if (dm->rfe_type == 12)
  913. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type12);
  914. else if (dm->rfe_type == 13)
  915. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type13);
  916. else if (dm->rfe_type == 14)
  917. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type14);
  918. else if (dm->rfe_type == 15)
  919. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type15);
  920. else if (dm->rfe_type == 16)
  921. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type16);
  922. else if (dm->rfe_type == 17)
  923. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type17);
  924. else if (dm->rfe_type == 18)
  925. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type18);
  926. else if (dm->rfe_type == 19)
  927. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type19);
  928. else if (dm->rfe_type == 20)
  929. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type20);
  930. else if (dm->rfe_type == 21)
  931. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type21);
  932. else if (dm->rfe_type == 22)
  933. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type22);
  934. else if (dm->rfe_type == 23)
  935. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type23);
  936. else if (dm->rfe_type == 24)
  937. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type24);
  938. else if (dm->rfe_type == 25)
  939. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type25);
  940. else if (dm->rfe_type == 26)
  941. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type26);
  942. else if (dm->rfe_type == 27)
  943. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type27);
  944. else if (dm->rfe_type == 28)
  945. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type28);
  946. else if (dm->rfe_type == 29)
  947. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type29);
  948. else if (dm->rfe_type == 30)
  949. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type30);
  950. else if (dm->rfe_type == 31)
  951. READ_AND_CONFIG_MP(8192f, _phy_reg_pg_type31);
  952. else
  953. READ_AND_CONFIG_MP(8192f, _phy_reg_pg);
  954. }
  955. }
  956. #endif
  957. #if (RTL8821C_SUPPORT == 1)
  958. if (dm->support_ic_type == ODM_RTL8821C) {
  959. if (config_type == CONFIG_BB_PHY_REG) {
  960. READ_AND_CONFIG(8821c, _phy_reg);
  961. } else if (config_type == CONFIG_BB_AGC_TAB) {
  962. READ_AND_CONFIG(8821c, _agc_tab);
  963. /* @According to RFEtype, choosing correct AGC table*/
  964. if (dm->default_rf_set_8821c == SWITCH_TO_BTG)
  965. AGC_DIFF_CONFIG_MP(8821c, btg);
  966. } else if (config_type == CONFIG_BB_PHY_REG_PG) {
  967. if (dm->rfe_type == 0x5)
  968. READ_AND_CONFIG(8821c, _phy_reg_pg_type0x28);
  969. else
  970. READ_AND_CONFIG(8821c, _phy_reg_pg);
  971. } else if (config_type == CONFIG_BB_AGC_TAB_DIFF) {
  972. dm->fw_offload_ability &= ~PHYDM_PHY_PARAM_OFFLOAD;
  973. /*@AGC_TAB DIFF dont support FW offload*/
  974. if (dm->current_rf_set_8821c == SWITCH_TO_BTG)
  975. AGC_DIFF_CONFIG_MP(8821c, btg);
  976. else if (dm->current_rf_set_8821c == SWITCH_TO_WLG)
  977. AGC_DIFF_CONFIG_MP(8821c, wlg);
  978. } else if (config_type == CONFIG_BB_PHY_REG_MP) {
  979. READ_AND_CONFIG(8821c, _phy_reg_mp);
  980. }
  981. }
  982. #endif
  983. #if (RTL8195A_SUPPORT == 1)
  984. if (dm->support_ic_type == ODM_RTL8195A) {
  985. if (config_type == CONFIG_BB_PHY_REG)
  986. READ_AND_CONFIG(8195a, _phy_reg);
  987. else if (config_type == CONFIG_BB_AGC_TAB)
  988. READ_AND_CONFIG(8195a, _agc_tab);
  989. else if (config_type == CONFIG_BB_PHY_REG_PG)
  990. READ_AND_CONFIG(8195a, _phy_reg_pg);
  991. }
  992. #endif
  993. #if (RTL8195B_SUPPORT == 1)
  994. if (dm->support_ic_type == ODM_RTL8195B) {
  995. if (config_type == CONFIG_BB_PHY_REG)
  996. READ_AND_CONFIG(8195b, _phy_reg);
  997. else if (config_type == CONFIG_BB_AGC_TAB)
  998. READ_AND_CONFIG(8195b, _agc_tab);
  999. /*@else if (config_type == CONFIG_BB_PHY_REG_PG)*/
  1000. /* READ_AND_CONFIG(8195b, _phy_reg_pg);*/
  1001. }
  1002. #endif
  1003. #if (RTL8198F_SUPPORT == 1)
  1004. if (dm->support_ic_type == ODM_RTL8198F) {
  1005. if (config_type == CONFIG_BB_PHY_REG)
  1006. READ_AND_CONFIG_MP(8198f, _phy_reg);
  1007. else if (config_type == CONFIG_BB_AGC_TAB)
  1008. READ_AND_CONFIG_MP(8198f, _agc_tab);
  1009. }
  1010. #endif
  1011. if (config_type == CONFIG_BB_PHY_REG ||
  1012. config_type == CONFIG_BB_AGC_TAB)
  1013. if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
  1014. result = phydm_set_reg_by_fw(dm,
  1015. PHYDM_HALMAC_CMD_END,
  1016. 0,
  1017. 0,
  1018. 0,
  1019. (enum rf_path)0,
  1020. 0);
  1021. PHYDM_DBG(dm, ODM_COMP_INIT,
  1022. "phy param offload end!result = %d", result);
  1023. }
  1024. return result;
  1025. }
  1026. enum hal_status
  1027. odm_config_mac_with_header_file(struct dm_struct *dm)
  1028. {
  1029. enum hal_status result = HAL_STATUS_SUCCESS;
  1030. PHYDM_DBG(dm, ODM_COMP_INIT, "===>%s (%s)\n", __func__,
  1031. (dm->is_mp_chip) ? "MPChip" : "TestChip");
  1032. PHYDM_DBG(dm, ODM_COMP_INIT,
  1033. "support_platform: 0x%X, support_interface: 0x%X, board_type: 0x%X\n",
  1034. dm->support_platform, dm->support_interface, dm->board_type);
  1035. /* @1 AP doesn't use PHYDM initialization in these ICs */
  1036. #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
  1037. #if (RTL8812A_SUPPORT == 1)
  1038. if (dm->support_ic_type == ODM_RTL8812)
  1039. READ_AND_CONFIG_MP(8812a, _mac_reg);
  1040. #endif
  1041. #if (RTL8821A_SUPPORT == 1)
  1042. if (dm->support_ic_type == ODM_RTL8821)
  1043. READ_AND_CONFIG_MP(8821a, _mac_reg);
  1044. #endif
  1045. #if (RTL8192E_SUPPORT == 1)
  1046. if (dm->support_ic_type == ODM_RTL8192E)
  1047. READ_AND_CONFIG_MP(8192e, _mac_reg);
  1048. #endif
  1049. #if (RTL8723D_SUPPORT == 1)
  1050. if (dm->support_ic_type == ODM_RTL8723D)
  1051. READ_AND_CONFIG_MP(8723d, _mac_reg);
  1052. #endif
  1053. /* @JJ ADD 20161014 */
  1054. #if (RTL8710B_SUPPORT == 1)
  1055. if (dm->support_ic_type == ODM_RTL8710B)
  1056. READ_AND_CONFIG_MP(8710b, _mac_reg);
  1057. #endif
  1058. #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
  1059. /* @1 All platforms support */
  1060. #if (RTL8188E_SUPPORT == 1)
  1061. if (dm->support_ic_type == ODM_RTL8188E)
  1062. READ_AND_CONFIG_MP(8188e, _mac_reg);
  1063. #endif
  1064. #if (RTL8723B_SUPPORT == 1)
  1065. if (dm->support_ic_type == ODM_RTL8723B)
  1066. READ_AND_CONFIG_MP(8723b, _mac_reg);
  1067. #endif
  1068. #if (RTL8814A_SUPPORT == 1)
  1069. if (dm->support_ic_type == ODM_RTL8814A)
  1070. READ_AND_CONFIG_MP(8814a, _mac_reg);
  1071. #endif
  1072. #if (RTL8703B_SUPPORT == 1)
  1073. if (dm->support_ic_type == ODM_RTL8703B)
  1074. READ_AND_CONFIG_MP(8703b, _mac_reg);
  1075. #endif
  1076. #if (RTL8188F_SUPPORT == 1)
  1077. if (dm->support_ic_type == ODM_RTL8188F)
  1078. READ_AND_CONFIG_MP(8188f, _mac_reg);
  1079. #endif
  1080. #if (RTL8822B_SUPPORT == 1)
  1081. if (dm->support_ic_type == ODM_RTL8822B)
  1082. READ_AND_CONFIG_MP(8822b, _mac_reg);
  1083. #endif
  1084. #if (RTL8197F_SUPPORT == 1)
  1085. if (dm->support_ic_type == ODM_RTL8197F)
  1086. READ_AND_CONFIG_MP(8197f, _mac_reg);
  1087. #endif
  1088. /*@jj add 20170822*/
  1089. #if (RTL8192F_SUPPORT == 1)
  1090. if (dm->support_ic_type == ODM_RTL8192F)
  1091. READ_AND_CONFIG_MP(8192f, _mac_reg);
  1092. #endif
  1093. #if (RTL8821C_SUPPORT == 1)
  1094. if (dm->support_ic_type == ODM_RTL8821C)
  1095. READ_AND_CONFIG(8821c, _mac_reg);
  1096. #endif
  1097. #if (RTL8195A_SUPPORT == 1)
  1098. if (dm->support_ic_type == ODM_RTL8195A)
  1099. READ_AND_CONFIG_MP(8195a, _mac_reg);
  1100. #endif
  1101. #if (RTL8195B_SUPPORT == 1)
  1102. if (dm->support_ic_type == ODM_RTL8195B)
  1103. READ_AND_CONFIG_MP(8195b, _mac_reg);
  1104. #endif
  1105. #if (RTL8198F_SUPPORT == 1)
  1106. if (dm->support_ic_type == ODM_RTL8198F)
  1107. READ_AND_CONFIG_MP(8198f, _mac_reg);
  1108. #endif
  1109. if (dm->fw_offload_ability & PHYDM_PHY_PARAM_OFFLOAD) {
  1110. result = phydm_set_reg_by_fw(dm,
  1111. PHYDM_HALMAC_CMD_END,
  1112. 0,
  1113. 0,
  1114. 0,
  1115. (enum rf_path)0,
  1116. 0);
  1117. PHYDM_DBG(dm, ODM_COMP_INIT,
  1118. "mac param offload end!result = %d", result);
  1119. }
  1120. return result;
  1121. }
  1122. u32 odm_get_hw_img_version(struct dm_struct *dm)
  1123. {
  1124. u32 version = 0;
  1125. /* @1 AP doesn't use PHYDM initialization in these ICs */
  1126. #if (DM_ODM_SUPPORT_TYPE != ODM_AP)
  1127. #if (RTL8821A_SUPPORT == 1)
  1128. if (dm->support_ic_type == ODM_RTL8821)
  1129. version = GET_VERSION_MP(8821a, _mac_reg);
  1130. #endif
  1131. #if (RTL8192E_SUPPORT == 1)
  1132. if (dm->support_ic_type == ODM_RTL8192E)
  1133. version = GET_VERSION_MP(8192e, _mac_reg);
  1134. #endif
  1135. #if (RTL8812A_SUPPORT == 1)
  1136. if (dm->support_ic_type == ODM_RTL8812)
  1137. version = GET_VERSION_MP(8812a, _mac_reg);
  1138. #endif
  1139. #if (RTL8723D_SUPPORT == 1)
  1140. if (dm->support_ic_type == ODM_RTL8723D)
  1141. version = GET_VERSION_MP(8723d, _mac_reg);
  1142. #endif
  1143. /* @JJ ADD 20161014 */
  1144. #if (RTL8710B_SUPPORT == 1)
  1145. if (dm->support_ic_type == ODM_RTL8710B)
  1146. version = GET_VERSION_MP(8710b, _mac_reg);
  1147. #endif
  1148. #endif /* @(DM_ODM_SUPPORT_TYPE != ODM_AP) */
  1149. /*@1 All platforms support*/
  1150. #if (RTL8188E_SUPPORT == 1)
  1151. if (dm->support_ic_type == ODM_RTL8188E)
  1152. version = GET_VERSION_MP(8188e, _mac_reg);
  1153. #endif
  1154. #if (RTL8723B_SUPPORT == 1)
  1155. if (dm->support_ic_type == ODM_RTL8723B)
  1156. version = GET_VERSION_MP(8723b, _mac_reg);
  1157. #endif
  1158. #if (RTL8814A_SUPPORT == 1)
  1159. if (dm->support_ic_type == ODM_RTL8814A)
  1160. version = GET_VERSION_MP(8814a, _mac_reg);
  1161. #endif
  1162. #if (RTL8703B_SUPPORT == 1)
  1163. if (dm->support_ic_type == ODM_RTL8703B)
  1164. version = GET_VERSION_MP(8703b, _mac_reg);
  1165. #endif
  1166. #if (RTL8188F_SUPPORT == 1)
  1167. if (dm->support_ic_type == ODM_RTL8188F)
  1168. version = GET_VERSION_MP(8188f, _mac_reg);
  1169. #endif
  1170. #if (RTL8822B_SUPPORT == 1)
  1171. if (dm->support_ic_type == ODM_RTL8822B)
  1172. version = GET_VERSION_MP(8822b, _mac_reg);
  1173. #endif
  1174. #if (RTL8197F_SUPPORT == 1)
  1175. if (dm->support_ic_type == ODM_RTL8197F)
  1176. version = GET_VERSION_MP(8197f, _mac_reg);
  1177. #endif
  1178. /*@jj add 20170822*/
  1179. #if (RTL8192F_SUPPORT == 1)
  1180. if (dm->support_ic_type == ODM_RTL8192F)
  1181. version = GET_VERSION_MP(8192f, _mac_reg);
  1182. #endif
  1183. #if (RTL8821C_SUPPORT == 1)
  1184. if (dm->support_ic_type == ODM_RTL8821C)
  1185. version = GET_VERSION(8821c, _mac_reg);
  1186. #endif
  1187. #if (RTL8195B_SUPPORT == 1)
  1188. if (dm->support_ic_type == ODM_RTL8195B)
  1189. version = GET_VERSION(8195b, _mac_reg);
  1190. #endif
  1191. #if (RTL8198F_SUPPORT == 1)
  1192. if (dm->support_ic_type == ODM_RTL8198F)
  1193. version = GET_VERSION_MP(8198f, _mac_reg);
  1194. #endif
  1195. return version;
  1196. }
  1197. u32 query_phydm_trx_capability(struct dm_struct *dm)
  1198. {
  1199. u32 value32 = 0xFFFFFFFF;
  1200. #if (RTL8821C_SUPPORT == 1)
  1201. if (dm->support_ic_type == ODM_RTL8821C)
  1202. value32 = query_phydm_trx_capability_8821c(dm);
  1203. #endif
  1204. #if (RTL8195B_SUPPORT == 1)
  1205. if (dm->support_ic_type == ODM_RTL8195B)
  1206. value32 = query_phydm_trx_capability_8195b(dm);
  1207. #endif
  1208. return value32;
  1209. }
  1210. u32 query_phydm_stbc_capability(struct dm_struct *dm)
  1211. {
  1212. u32 value32 = 0xFFFFFFFF;
  1213. #if (RTL8821C_SUPPORT == 1)
  1214. if (dm->support_ic_type == ODM_RTL8821C)
  1215. value32 = query_phydm_stbc_capability_8821c(dm);
  1216. #endif
  1217. #if (RTL8195B_SUPPORT == 1)
  1218. if (dm->support_ic_type == ODM_RTL8195B)
  1219. value32 = query_phydm_stbc_capability_8195b(dm);
  1220. #endif
  1221. return value32;
  1222. }
  1223. u32 query_phydm_ldpc_capability(struct dm_struct *dm)
  1224. {
  1225. u32 value32 = 0xFFFFFFFF;
  1226. #if (RTL8821C_SUPPORT == 1)
  1227. if (dm->support_ic_type == ODM_RTL8821C)
  1228. value32 = query_phydm_ldpc_capability_8821c(dm);
  1229. #endif
  1230. #if (RTL8195B_SUPPORT == 1)
  1231. if (dm->support_ic_type == ODM_RTL8195B)
  1232. value32 = query_phydm_ldpc_capability_8195b(dm);
  1233. #endif
  1234. return value32;
  1235. }
  1236. u32 query_phydm_txbf_parameters(struct dm_struct *dm)
  1237. {
  1238. u32 value32 = 0xFFFFFFFF;
  1239. #if (RTL8821C_SUPPORT == 1)
  1240. if (dm->support_ic_type == ODM_RTL8821C)
  1241. value32 = query_phydm_txbf_parameters_8821c(dm);
  1242. #endif
  1243. #if (RTL8195B_SUPPORT == 1)
  1244. if (dm->support_ic_type == ODM_RTL8195B)
  1245. value32 = query_phydm_txbf_parameters_8195b(dm);
  1246. #endif
  1247. return value32;
  1248. }
  1249. u32 query_phydm_txbf_capability(struct dm_struct *dm)
  1250. {
  1251. u32 value32 = 0xFFFFFFFF;
  1252. #if (RTL8821C_SUPPORT == 1)
  1253. if (dm->support_ic_type == ODM_RTL8821C)
  1254. value32 = query_phydm_txbf_capability_8821c(dm);
  1255. #endif
  1256. #if (RTL8195B_SUPPORT == 1)
  1257. if (dm->support_ic_type == ODM_RTL8195B)
  1258. value32 = query_phydm_txbf_capability_8195b(dm);
  1259. #endif
  1260. return value32;
  1261. }