hal_mcc.c 60 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2015 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. ******************************************************************************/
  19. #ifdef CONFIG_MCC_MODE
  20. #define _HAL_MCC_C_
  21. #include <drv_types.h> /* PADAPTER */
  22. #include <rtw_mcc.h> /* mcc structure */
  23. #include <hal_data.h> /* HAL_DATA */
  24. #include <rtw_pwrctrl.h> /* power control */
  25. #define MCC_DURATION_IDX 0
  26. #define MCC_TSF_SYNC_OFFSET_IDX 1
  27. #define MCC_START_TIME_OFFSET_IDX 2
  28. #define MCC_INTERVAL_IDX 3
  29. #define MCC_GUARD_OFFSET0_IDX 4
  30. #define MCC_GUARD_OFFSET1_IDX 5
  31. #define TU 1024 /* 1 TU equals 1024 microseconds */
  32. /* port 1 druration, TSF sync offset, start time offset, interval (unit:TU (1024 microseconds))*/
  33. u8 mcc_switch_channel_policy_table[][6]={
  34. {35, 50, 30, 100, 0, 0},
  35. {19, 50, 40, 100, 2, 2},
  36. {25, 50, 30, 100, 5, 5},
  37. };
  38. const int mcc_max_policy_num = sizeof(mcc_switch_channel_policy_table) /sizeof(u8) /6;
  39. static void dump_iqk_val_table(PADAPTER padapter)
  40. {
  41. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
  42. struct hal_iqk_reg_backup *iqk_reg_backup = pHalData->iqk_reg_backup;
  43. u8 total_rf_path = pHalData->NumTotalRFPath;
  44. u8 rf_path_idx = 0;
  45. u8 backup_chan_idx = 0;
  46. u8 backup_reg_idx = 0;
  47. RTW_INFO("=============dump IQK backup table================\n");
  48. for (backup_chan_idx = 0; backup_chan_idx < MAX_IQK_INFO_BACKUP_CHNL_NUM; backup_chan_idx++) {
  49. for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx++) {
  50. for(backup_reg_idx = 0; backup_reg_idx < MAX_IQK_INFO_BACKUP_REG_NUM; backup_reg_idx++) {
  51. RTW_INFO("ch:%d. bw:%d. rf path:%d. reg[%d] = 0x%02x \n"
  52. , iqk_reg_backup[backup_chan_idx].central_chnl
  53. , iqk_reg_backup[backup_chan_idx].bw_mode
  54. , rf_path_idx
  55. , backup_reg_idx
  56. , iqk_reg_backup[backup_chan_idx].reg_backup[rf_path_idx][backup_reg_idx]
  57. );
  58. }
  59. }
  60. }
  61. RTW_INFO("=============================================\n");
  62. }
  63. static void rtw_hal_mcc_build_p2p_noa_attr(PADAPTER padapter, u8 *ie, u32 *ie_len)
  64. {
  65. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  66. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  67. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  68. u8 p2p_noa_attr_ie[MAX_P2P_IE_LEN] = {0x00};
  69. u32 p2p_noa_attr_len = 0;
  70. u8 noa_desc_num = 1;
  71. u8 opp_ps = 0; /* Disable OppPS */
  72. u8 noa_count = 255;
  73. u32 noa_duration = 0x20;
  74. u32 noa_interval = 0x64;
  75. u8 noa_index = 0;
  76. u8 mcc_policy_idx = 0;
  77. mcc_policy_idx = pmccobjpriv->policy_index;
  78. noa_duration = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_DURATION_IDX];
  79. noa_interval = mcc_switch_channel_policy_table[mcc_policy_idx][MCC_INTERVAL_IDX];
  80. /* P2P OUI(4 bytes) */
  81. _rtw_memcpy(p2p_noa_attr_ie, P2P_OUI, 4);
  82. p2p_noa_attr_len = p2p_noa_attr_len + 4;
  83. /* attrute ID(1 byte) */
  84. p2p_noa_attr_ie[p2p_noa_attr_len] = P2P_ATTR_NOA;
  85. p2p_noa_attr_len = p2p_noa_attr_len + 1;
  86. /* attrute length(2 bytes) length = noa_desc_num*13 + 2 */
  87. RTW_PUT_LE16(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_desc_num*13 + 2));
  88. p2p_noa_attr_len = p2p_noa_attr_len + 2;
  89. /* Index (1 byte) */
  90. p2p_noa_attr_ie[p2p_noa_attr_len] = noa_index;
  91. p2p_noa_attr_len = p2p_noa_attr_len + 1;
  92. /* CTWindow and OppPS Parameters (1 byte) */
  93. p2p_noa_attr_ie[p2p_noa_attr_len] = opp_ps;
  94. p2p_noa_attr_len = p2p_noa_attr_len+ 1;
  95. /* NoA Count (1 byte) */
  96. p2p_noa_attr_ie[p2p_noa_attr_len] = noa_count;
  97. p2p_noa_attr_len = p2p_noa_attr_len + 1;
  98. /* NoA Duration (4 bytes) unit: microseconds */
  99. RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_duration * TU));
  100. p2p_noa_attr_len = p2p_noa_attr_len + 4;
  101. /* NoA Interval (4 bytes) unit: microseconds */
  102. RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, (noa_interval * TU));
  103. p2p_noa_attr_len = p2p_noa_attr_len + 4;
  104. /* NoA Start Time (4 bytes) unit: microseconds */
  105. RTW_PUT_LE32(p2p_noa_attr_ie + p2p_noa_attr_len, pmccadapriv->noa_start_time);
  106. if (0)
  107. RTW_INFO("indxe:%d, start_time=0x%02x:0x%02x:0x%02x:0x%02x\n"
  108. , noa_index
  109. , p2p_noa_attr_ie[p2p_noa_attr_len]
  110. , p2p_noa_attr_ie[p2p_noa_attr_len + 1]
  111. , p2p_noa_attr_ie[p2p_noa_attr_len + 2]
  112. , p2p_noa_attr_ie[p2p_noa_attr_len + 3]);
  113. p2p_noa_attr_len = p2p_noa_attr_len + 4;
  114. rtw_set_ie(ie, _VENDOR_SPECIFIC_IE_, p2p_noa_attr_len, (u8 *)p2p_noa_attr_ie, ie_len);
  115. }
  116. /**
  117. * rtw_hal_mcc_update_go_p2p_ie - update go p2p ie(add NoA attribute)
  118. * @padapter: the adapter to be update go p2p ie
  119. */
  120. static void rtw_hal_mcc_update_go_p2p_ie(PADAPTER padapter)
  121. {
  122. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  123. u8 *pos = NULL;
  124. /* no noa attribute, build it */
  125. if (pmccadapriv->p2p_go_noa_ie_len == 0)
  126. rtw_hal_mcc_build_p2p_noa_attr(padapter, pmccadapriv->p2p_go_noa_ie, &pmccadapriv->p2p_go_noa_ie_len);
  127. else {
  128. /* has noa attribut, modify it */
  129. /* update index */
  130. pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 15;
  131. /* 0~255 */
  132. (*pos) = ((*pos) + 1) % 256;
  133. if (1)
  134. RTW_INFO("indxe:%d\n", (*pos));
  135. /* update start time */
  136. pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len - 4;
  137. RTW_PUT_LE32(pos, pmccadapriv->noa_start_time);
  138. if (0)
  139. RTW_INFO("start_time=0x%02x:0x%02x:0x%02x:0x%02x\n"
  140. , ((u8*)(pos))[0]
  141. , ((u8*)(pos))[1]
  142. , ((u8*)(pos))[2]
  143. , ((u8*)(pos))[3]);
  144. }
  145. if (0) {
  146. u8 i = 0;
  147. RTW_INFO("p2p_go_noa_ie_len:%d\n", pmccadapriv->p2p_go_noa_ie_len);
  148. for (i = 0;i < pmccadapriv->p2p_go_noa_ie_len; i++) {
  149. if ((i+1)%8 != 0)
  150. printk("0x%02x ", pmccadapriv->p2p_go_noa_ie[i]);
  151. else
  152. printk("0x%02x\n", pmccadapriv->p2p_go_noa_ie[i]);
  153. }
  154. printk("\n");
  155. }
  156. update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE);
  157. }
  158. /**
  159. * rtw_hal_mcc_remove_go_p2p_ie - remove go p2p ie(add NoA attribute)
  160. * @padapter: the adapter to be update go p2p ie
  161. */
  162. static void rtw_hal_mcc_remove_go_p2p_ie(PADAPTER padapter)
  163. {
  164. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  165. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  166. /* chech has noa ie or not */
  167. if (pmccadapriv->p2p_go_noa_ie_len == 0)
  168. return;
  169. pmccadapriv->p2p_go_noa_ie_len = 0;
  170. update_beacon(padapter, _VENDOR_SPECIFIC_IE_, P2P_OUI, _TRUE);
  171. }
  172. /* restore IQK value for all interface */
  173. void rtw_hal_mcc_restore_iqk_val(PADAPTER padapter)
  174. {
  175. u8 take_care_iqk = _FALSE;
  176. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  177. _adapter *iface = NULL;
  178. u8 i = 0;
  179. rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk);
  180. if (take_care_iqk == _TRUE && MCC_EN(padapter)) {
  181. for (i = 0; i < dvobj->iface_nums; i++) {
  182. iface = dvobj->padapters[i];
  183. if (iface == NULL)
  184. continue;
  185. rtw_hal_ch_sw_iqk_info_restore(iface, CH_SW_USE_CASE_MCC);
  186. }
  187. }
  188. if (0)
  189. dump_iqk_val_table(padapter);
  190. }
  191. u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status)
  192. {
  193. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  194. if (pmccobjpriv->mcc_status & (mcc_status))
  195. return _TRUE;
  196. else
  197. return _FALSE;
  198. }
  199. void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status)
  200. {
  201. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  202. pmccobjpriv->mcc_status |= (mcc_status);
  203. }
  204. void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status)
  205. {
  206. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  207. pmccobjpriv->mcc_status &= (~mcc_status);
  208. }
  209. void rtw_hal_mcc_update_switch_channel_policy_table(PADAPTER padapter)
  210. {
  211. struct registry_priv *registry_par = &padapter->registrypriv;
  212. u8 idx = 0;
  213. if (registry_par->rtw_mcc_policy_table_idx < 0)
  214. return;
  215. if (registry_par->rtw_mcc_policy_table_idx >= mcc_max_policy_num) {
  216. RTW_INFO("[MCC] mcc_policy_table_idx error, do not update policy table\n");
  217. return;
  218. }
  219. idx = registry_par->rtw_mcc_policy_table_idx;
  220. if (registry_par->rtw_mcc_duration > 0)
  221. mcc_switch_channel_policy_table[idx][MCC_DURATION_IDX] = registry_par->rtw_mcc_duration;
  222. if (registry_par->rtw_mcc_tsf_sync_offset > 0)
  223. mcc_switch_channel_policy_table[idx][MCC_TSF_SYNC_OFFSET_IDX] = registry_par->rtw_mcc_tsf_sync_offset;
  224. if (registry_par->rtw_mcc_start_time_offset > 0)
  225. mcc_switch_channel_policy_table[idx][MCC_START_TIME_OFFSET_IDX] = registry_par->rtw_mcc_start_time_offset;
  226. if (registry_par->rtw_mcc_interval > 0)
  227. mcc_switch_channel_policy_table[idx][MCC_INTERVAL_IDX] = registry_par->rtw_mcc_interval;
  228. if (registry_par->rtw_mcc_guard_offset0 >= 0)
  229. mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET0_IDX] = registry_par->rtw_mcc_guard_offset0;
  230. if (registry_par->rtw_mcc_guard_offset1 >= 0)
  231. mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET1_IDX] = registry_par->rtw_mcc_guard_offset1;
  232. }
  233. static void rtw_hal_config_mcc_switch_channel_setting(PADAPTER padapter)
  234. {
  235. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  236. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  237. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  238. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  239. struct registry_priv *registry_par = &padapter->registrypriv;
  240. u8 interval = pmlmepriv->cur_network.network.Configuration.BeaconPeriod;
  241. u8 i = 0;
  242. s8 mcc_policy_idx = 0;
  243. rtw_hal_mcc_update_switch_channel_policy_table(padapter);
  244. mcc_policy_idx = registry_par->rtw_mcc_policy_table_idx;
  245. if (mcc_policy_idx < 0 || mcc_policy_idx >= mcc_max_policy_num) {
  246. pmccobjpriv->policy_index = 0;
  247. RTW_INFO("[MCC] can't find table(%d,%d,%d), use default policy(%d)\n"
  248. , pmccobjpriv->duration, interval, mcc_policy_idx, pmccobjpriv->policy_index);
  249. } else
  250. pmccobjpriv->policy_index = mcc_policy_idx;
  251. RTW_INFO("[MCC] policy(%d): %d,%d,%d,%d,%d,%d\n"
  252. , pmccobjpriv->policy_index
  253. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX]
  254. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_TSF_SYNC_OFFSET_IDX]
  255. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_START_TIME_OFFSET_IDX]
  256. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX]
  257. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX]
  258. , mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX]);
  259. }
  260. static void rtw_hal_config_mcc_role_setting(PADAPTER padapter)
  261. {
  262. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
  263. struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
  264. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  265. struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
  266. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  267. struct wlan_network *cur_network = &(pmlmepriv->cur_network);
  268. struct sta_priv *pstapriv = &padapter->stapriv;
  269. struct sta_info *psta = NULL;
  270. struct registry_priv *preg = &padapter->registrypriv;
  271. u8 policy_index = 0;
  272. u8 mcc_duration = 0;
  273. u8 mcc_interval = 0;
  274. policy_index = pmccobjpriv->policy_index;
  275. mcc_duration = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_DURATION_IDX]
  276. - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET0_IDX]
  277. - mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_GUARD_OFFSET1_IDX];
  278. mcc_interval = mcc_switch_channel_policy_table[pmccobjpriv->policy_index][MCC_INTERVAL_IDX];
  279. /* GO/AP is 1nd order GC/STA is 2nd order */
  280. switch (pmccadapriv->role) {
  281. case MCC_ROLE_STA:
  282. case MCC_ROLE_GC:
  283. pmccadapriv->order = 1;
  284. pmccadapriv->mcc_duration = mcc_duration;
  285. switch (pmlmeext->cur_bwmode) {
  286. case CHANNEL_WIDTH_20:
  287. /*
  288. * target tx byte(bytes) = target tx tp(Mbits/sec) * 1024 * 1024 / 8 * (duration(ms) / 1024)
  289. * = target tx tp(Mbits/sec) * 128 * duration(ms)
  290. * note:
  291. * target tx tp(Mbits/sec) * 1024 * 1024 / 8 ==> Mbits to bytes
  292. * duration(ms) / 1024 ==> msec to sec
  293. */
  294. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  295. break;
  296. case CHANNEL_WIDTH_40:
  297. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  298. break;
  299. case CHANNEL_WIDTH_80:
  300. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  301. break;
  302. case CHANNEL_WIDTH_160:
  303. case CHANNEL_WIDTH_80_80:
  304. RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
  305. , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
  306. break;
  307. }
  308. /* assign used mac to avoid affecting RA */
  309. pmccadapriv->mgmt_queue_macid = MCC_ROLE_STA_GC_MGMT_QUEUE_MACID;
  310. psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
  311. if (psta) {
  312. /* combine AP/GO macid and mgmt queue macid to bitmap */
  313. pmccadapriv->mcc_macid_bitmap = BIT(psta->mac_id) | BIT(pmccadapriv->mgmt_queue_macid);
  314. } else {
  315. RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter));
  316. rtw_warn_on(1);
  317. }
  318. break;
  319. case MCC_ROLE_AP:
  320. case MCC_ROLE_GO:
  321. pmccadapriv->order = 0;
  322. /* total druation value equals interval */
  323. pmccadapriv->mcc_duration = mcc_interval - mcc_duration;
  324. pmccadapriv->p2p_go_noa_ie_len = 0; /* not NoA attribute at init time */
  325. switch (pmlmeext->cur_bwmode) {
  326. case CHANNEL_WIDTH_20:
  327. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  328. break;
  329. case CHANNEL_WIDTH_40:
  330. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  331. break;
  332. case CHANNEL_WIDTH_80:
  333. pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
  334. break;
  335. case CHANNEL_WIDTH_160:
  336. case CHANNEL_WIDTH_80_80:
  337. RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
  338. , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
  339. break;
  340. }
  341. psta = rtw_get_bcmc_stainfo(padapter);
  342. if (psta != NULL)
  343. pmccadapriv->mgmt_queue_macid = psta->mac_id;
  344. else {
  345. pmccadapriv->mgmt_queue_macid = MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID;
  346. RTW_INFO(FUNC_ADPT_FMT":bcmc station is NULL, use macid %d\n"
  347. , FUNC_ADPT_ARG(padapter), pmccadapriv->mgmt_queue_macid);
  348. }
  349. /* combine client macid and mgmt queue macid to bitmap */
  350. pmccadapriv->mcc_macid_bitmap = (0xff << 8) | BIT(pmccadapriv->mgmt_queue_macid);
  351. break;
  352. default:
  353. RTW_INFO("Unknown role\n");
  354. rtw_warn_on(1);
  355. break;
  356. }
  357. pmccobjpriv->iface[pmccadapriv->order] = padapter;
  358. RTW_INFO(FUNC_ADPT_FMT": order:%d, role:%d, mcc duration:%d, target tx bytes:%d, mgmt queue macid:%d, bitmap:0x%02x\n"
  359. , FUNC_ADPT_ARG(padapter), pmccadapriv->order, pmccadapriv->role, pmccadapriv->mcc_duration
  360. , pmccadapriv->mcc_target_tx_bytes_to_port, pmccadapriv->mgmt_queue_macid, pmccadapriv->mcc_macid_bitmap);
  361. }
  362. static void rtw_hal_clear_mcc_macid(PADAPTER padapter)
  363. {
  364. u16 media_status_rpt;
  365. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  366. switch (pmccadapriv->role) {
  367. case MCC_ROLE_STA:
  368. case MCC_ROLE_GC:
  369. break;
  370. case MCC_ROLE_AP:
  371. case MCC_ROLE_GO:
  372. /* nothing to do */
  373. break;
  374. default:
  375. RTW_INFO("Unknown role\n");
  376. rtw_warn_on(1);
  377. break;
  378. }
  379. }
  380. static u8 rtw_hal_decide_mcc_role(PADAPTER padapter)
  381. {
  382. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  383. _adapter *iface = NULL;
  384. struct mcc_adapter_priv *pmccadapriv = NULL;
  385. struct wifidirect_info *pwdinfo = NULL;
  386. struct mlme_priv *pmlmepriv = NULL;
  387. u8 ret = _SUCCESS, i = 0;
  388. for (i = 0; i < dvobj->iface_nums; i++) {
  389. iface = dvobj->padapters[i];
  390. if (iface == NULL)
  391. continue;
  392. pmccadapriv = &iface->mcc_adapterpriv;
  393. if (MLME_IS_GO(iface))
  394. pmccadapriv->role = MCC_ROLE_GO;
  395. else if (MLME_IS_AP(iface))
  396. pmccadapriv->role = MCC_ROLE_AP;
  397. else if (MLME_IS_GC(iface))
  398. pmccadapriv->role = MCC_ROLE_GC;
  399. else if (MLME_IS_STA(iface))
  400. pmccadapriv->role = MCC_ROLE_STA;
  401. else {
  402. pwdinfo = &iface->wdinfo;
  403. pmlmepriv = &iface->mlmepriv;
  404. RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(iface));
  405. RTW_INFO("Unknown:P2P state:%d, mlme state:0x%2x, mlmext info state:0x%02x\n",
  406. pwdinfo->role, pmlmepriv->fw_state, iface->mlmeextpriv.mlmext_info.state);
  407. rtw_warn_on(1);
  408. ret = _FAIL;
  409. goto exit;
  410. }
  411. if (ret == _SUCCESS)
  412. rtw_hal_config_mcc_role_setting(iface);
  413. }
  414. exit:
  415. return ret;
  416. }
  417. static void rtw_hal_init_mcc_parameter(PADAPTER padapter)
  418. {
  419. }
  420. static void rtw_hal_construct_CTS(PADAPTER padapter, u8 *pframe, u32 *pLength)
  421. {
  422. u8 broadcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  423. /* frame type, length = 1*/
  424. set_frame_sub_type(pframe, WIFI_RTS);
  425. /* frame control flag, length = 1 */
  426. *(pframe + 1) = 0;
  427. /* frame duration, length = 2 */
  428. *(pframe + 2) = 0x00;
  429. *(pframe + 3) = 0x78;
  430. /* frame recvaddr, length = 6 */
  431. _rtw_memcpy((pframe + 4), broadcast_addr, ETH_ALEN);
  432. _rtw_memcpy((pframe + 4 + ETH_ALEN), adapter_mac_addr(padapter), ETH_ALEN);
  433. _rtw_memcpy((pframe + 4 + ETH_ALEN*2), adapter_mac_addr(padapter), ETH_ALEN);
  434. *pLength = 22;
  435. }
  436. u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
  437. u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
  438. RSVDPAGE_LOC *rsvd_page_loc)
  439. {
  440. u32 len = 0;
  441. _adapter *iface = NULL;
  442. struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
  443. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  444. struct mlme_ext_info *pmlmeinfo = NULL;
  445. struct mlme_ext_priv *pmlmeext = NULL;
  446. u8 ret = _SUCCESS, i = 0, order = 0, CurtPktPageNum = 0;
  447. u8 bssid[ETH_ALEN] = {0};
  448. /* check proccess mcc start setting */
  449. if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
  450. ret = _FAIL;
  451. goto exit;
  452. }
  453. for (i = 0; i < dvobj->iface_nums; i++) {
  454. iface = dvobj->padapters[i];
  455. if (iface == NULL)
  456. continue;
  457. order = iface->mcc_adapterpriv.order;
  458. dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order] = *page_num;
  459. switch (iface->mcc_adapterpriv.role) {
  460. case MCC_ROLE_STA:
  461. case MCC_ROLE_GC:
  462. /* Build NULL DATA */
  463. RTW_INFO("LocNull(order:%d): %d\n"
  464. , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
  465. len = 0;
  466. pmlmeext = &iface->mlmeextpriv;
  467. pmlmeinfo = &pmlmeext->mlmext_info;
  468. _rtw_memcpy(bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
  469. rtw_hal_construct_NullFunctionData(iface
  470. , &pframe[*index], &len, bssid, _FALSE, 0, 0, _FALSE);
  471. rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc],
  472. len, _FALSE, _FALSE, _FALSE);
  473. CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
  474. *page_num += CurtPktPageNum;
  475. *index += (CurtPktPageNum * page_size);
  476. *total_pkt_len = *index + len;
  477. break;
  478. case MCC_ROLE_AP:
  479. /* Bulid CTS */
  480. RTW_INFO("LocCTS(order:%d): %d\n"
  481. , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
  482. len = 0;
  483. rtw_hal_construct_CTS(iface, &pframe[*index], &len);
  484. rtw_hal_fill_fake_txdesc(iface, &pframe[*index-tx_desc],
  485. len, _FALSE, _FALSE, _FALSE);
  486. CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
  487. *page_num += CurtPktPageNum;
  488. *index += (CurtPktPageNum * page_size);
  489. *total_pkt_len = *index + len;
  490. break;
  491. case MCC_ROLE_GO:
  492. /* To DO */
  493. break;
  494. }
  495. }
  496. exit:
  497. return ret;
  498. }
  499. /*
  500. * 1. Download MCC rsvd page
  501. * 2. Re-Download beacon after download rsvd page
  502. */
  503. static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)
  504. {
  505. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
  506. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  507. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  508. PADAPTER port0_iface = dvobj_get_port0_adapter(dvobj);
  509. PADAPTER iface = NULL;
  510. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  511. u8 mstatus = RT_MEDIA_CONNECT, i = 0;
  512. RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
  513. rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
  514. /* Re-Download beacon */
  515. for (i = 0; i < dvobj->iface_nums; i++) {
  516. iface = pmccobjpriv->iface[i];
  517. pmccadapriv = &iface->mcc_adapterpriv;
  518. if (pmccadapriv->role == MCC_ROLE_AP
  519. || pmccadapriv->role == MCC_ROLE_GO)
  520. tx_beacon_hdl(iface, NULL);
  521. }
  522. }
  523. static void rtw_hal_set_mcc_rsvdpage_cmd(_adapter *padapter)
  524. {
  525. u8 cmd[H2C_MCC_LOCATION_LEN] = {0}, i = 0, order = 0;
  526. _adapter *iface = NULL;
  527. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  528. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  529. for (i = 0; i < dvobj->iface_nums; i++) {
  530. iface = dvobj->padapters[i];
  531. if (iface == NULL)
  532. continue;
  533. order = iface->mcc_adapterpriv.order;
  534. if (order >= H2C_MCC_LOCATION_LEN) {
  535. RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
  536. , FUNC_ADPT_ARG(padapter), order);
  537. continue;
  538. }
  539. SET_H2CCMD_MCC_RSVDPAGE_LOC((cmd + order), (pmccobjpriv->mcc_loc_rsvd_paga[order]));
  540. }
  541. #ifdef CONFIG_MCC_MODE_DEBUG
  542. RTW_INFO("=========================\n");
  543. RTW_INFO("MCC RSVD PAGE LOC:\n");
  544. for (i = 0; i < H2C_MCC_LOCATION_LEN; i++)
  545. pr_dbg("0x%x ", cmd[i]);
  546. pr_dbg("\n");
  547. RTW_INFO("=========================\n");
  548. #endif /* CONFIG_MCC_MODE_DEBUG */
  549. rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_LOCATION, H2C_MCC_LOCATION_LEN, cmd);
  550. }
  551. static void rtw_hal_set_mcc_noa_cmd(PADAPTER padapter)
  552. {
  553. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  554. struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
  555. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  556. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  557. u8 cmd[H2C_MCC_NOA_PARAM_LEN] = {0};
  558. u8 policy_idx = pmccobjpriv->policy_index;
  559. u8 noa_fw_eable = 1;
  560. u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
  561. u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
  562. u8 noa_interval = mcc_switch_channel_policy_table[policy_idx][MCC_INTERVAL_IDX];
  563. u8 guard_offset0 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET0_IDX];
  564. u8 guard_offset1 = mcc_switch_channel_policy_table[policy_idx][MCC_GUARD_OFFSET1_IDX];
  565. u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME;
  566. u8 i = 0;
  567. /* FW set NOA enable */
  568. SET_H2CCMD_MCC_NOA_FW_EN(cmd, noa_fw_eable);
  569. /* TSF Sync offset */
  570. SET_H2CCMD_MCC_NOA_TSF_SYNC_OFFSET(cmd, noa_tsf_sync_offset);
  571. /* NoA start time offset */
  572. SET_H2CCMD_MCC_NOA_START_TIME(cmd, (noa_start_time_offset + guard_offset0));
  573. /* NoA interval */
  574. SET_H2CCMD_MCC_NOA_INTERVAL(cmd, noa_interval);
  575. /* Early time to inform driver by C2H before switch channel */
  576. SET_H2CCMD_MCC_EARLY_TIME(cmd, swchannel_early_time);
  577. #ifdef CONFIG_MCC_MODE_DEBUG
  578. RTW_INFO("=========================\n");
  579. RTW_INFO("NoA:\n");
  580. for (i = 0; i < H2C_MCC_NOA_PARAM_LEN; i++)
  581. pr_dbg("0x%x ", cmd[i]);
  582. pr_dbg("\n");
  583. RTW_INFO("=========================\n");
  584. #endif /* CONFIG_MCC_MODE_DEBUG */
  585. rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_NOA_PARAM, H2C_MCC_NOA_PARAM_LEN, cmd);
  586. }
  587. static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)
  588. {
  589. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  590. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  591. struct mcc_adapter_priv *pmccadapriv = NULL;
  592. _adapter *iface = NULL;
  593. u8 cmd[H2C_MCC_IQK_PARAM_LEN] = {0}, bready = 0, i = 0, order = 0;
  594. u16 TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0;
  595. u8 total_rf_path = GET_HAL_DATA(padapter)->NumTotalRFPath;
  596. u8 rf_path_idx = 0, last_order = MAX_MCC_NUM - 1, last_rf_path_index = total_rf_path - 1;
  597. /* by order, last order & last_rf_path_index must set ready bit = 1 */
  598. for (i = 0; i < dvobj->iface_nums; i++) {
  599. iface = pmccobjpriv->iface[i];
  600. if (iface == NULL)
  601. continue;
  602. pmccadapriv = &iface->mcc_adapterpriv;
  603. order = pmccadapriv->order;
  604. for (rf_path_idx = 0; rf_path_idx < total_rf_path; rf_path_idx ++) {
  605. _rtw_memset(cmd, 0, H2C_MCC_IQK_PARAM_LEN);
  606. TX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_X & 0x7ff;/* [10:0] */
  607. TX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].TX_Y & 0x7ff;/* [10:0] */
  608. RX_X = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_X & 0x3ff;/* [9:0] */
  609. RX_Y = pmccadapriv->mcc_iqk_arr[rf_path_idx].RX_Y & 0x3ff;/* [9:0] */
  610. /* ready or not */
  611. if (order == last_order && rf_path_idx == last_rf_path_index)
  612. bready = 1;
  613. else
  614. bready = 0;
  615. SET_H2CCMD_MCC_IQK_READY(cmd, bready);
  616. SET_H2CCMD_MCC_IQK_ORDER(cmd, order);
  617. SET_H2CCMD_MCC_IQK_PATH(cmd, rf_path_idx);
  618. /* fill RX_X[7:0] to (cmd+1)[7:0] bitlen=8 */
  619. SET_H2CCMD_MCC_IQK_RX_L(cmd, (u8)(RX_X & 0xff));
  620. /* fill RX_X[9:8] to (cmd+2)[1:0] bitlen=2 */
  621. SET_H2CCMD_MCC_IQK_RX_M1(cmd, (u8)((RX_X >> 8) & 0x03));
  622. /* fill RX_Y[5:0] to (cmd+2)[7:2] bitlen=6 */
  623. SET_H2CCMD_MCC_IQK_RX_M2(cmd, (u8)(RX_Y & 0x3f));
  624. /* fill RX_Y[9:6] to (cmd+3)[3:0] bitlen=4 */
  625. SET_H2CCMD_MCC_IQK_RX_H(cmd, (u8)((RX_Y >> 6) & 0x0f));
  626. /* fill TX_X[7:0] to (cmd+4)[7:0] bitlen=8 */
  627. SET_H2CCMD_MCC_IQK_TX_L(cmd, (u8)(TX_X & 0xff));
  628. /* fill TX_X[10:8] to (cmd+5)[2:0] bitlen=3 */
  629. SET_H2CCMD_MCC_IQK_TX_M1(cmd, (u8)((TX_X >> 8) & 0x07));
  630. /* fill TX_Y[4:0] to (cmd+5)[7:3] bitlen=5 */
  631. SET_H2CCMD_MCC_IQK_TX_M2(cmd, (u8)(TX_Y & 0x1f));
  632. /* fill TX_Y[10:5] to (cmd+6)[5:0] bitlen=6 */
  633. SET_H2CCMD_MCC_IQK_TX_H(cmd, (u8)((TX_Y >> 5) & 0x3f));
  634. #ifdef CONFIG_MCC_MODE_DEBUG
  635. RTW_INFO("=========================\n");
  636. RTW_INFO(FUNC_ADPT_FMT" IQK:\n", FUNC_ADPT_ARG(iface));
  637. RTW_INFO("TX_X: 0x%02x\n", TX_X);
  638. RTW_INFO("TX_Y: 0x%02x\n", TX_Y);
  639. RTW_INFO("RX_X: 0x%02x\n", RX_X);
  640. RTW_INFO("RX_Y: 0x%02x\n", RX_Y);
  641. RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
  642. RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
  643. RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
  644. RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
  645. RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
  646. RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
  647. RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
  648. RTW_INFO("=========================\n");
  649. #endif /* CONFIG_MCC_MODE_DEBUG */
  650. rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_IQK_PARAM, H2C_MCC_IQK_PARAM_LEN, cmd);
  651. }
  652. }
  653. }
  654. static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)
  655. {
  656. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  657. struct mcc_adapter_priv *pmccadapriv = NULL;
  658. _adapter *iface = NULL;
  659. u8 cmd[H2C_MCC_MACID_BITMAP_LEN] = {0}, i = 0, order = 0;
  660. u16 bitmap = 0;
  661. for (i = 0; i < dvobj->iface_nums; i++) {
  662. iface = dvobj->padapters[i];
  663. if (iface == NULL)
  664. continue;
  665. pmccadapriv = &iface->mcc_adapterpriv;
  666. order = pmccadapriv->order;
  667. bitmap = pmccadapriv->mcc_macid_bitmap;
  668. if (order >= (H2C_MCC_MACID_BITMAP_LEN/2)) {
  669. RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
  670. , FUNC_ADPT_ARG(padapter), order);
  671. continue;
  672. }
  673. SET_H2CCMD_MCC_MACID_BITMAP_L((cmd + order * 2), (u8)(bitmap & 0xff));
  674. SET_H2CCMD_MCC_MACID_BITMAP_H((cmd + order * 2), (u8)((bitmap >> 8) & 0xff));
  675. }
  676. #ifdef CONFIG_MCC_MODE_DEBUG
  677. RTW_INFO("=========================\n");
  678. RTW_INFO("MACID BITMAP: ");
  679. for (i = 0; i < H2C_MCC_MACID_BITMAP_LEN; i++)
  680. pr_dbg("0x%x ", cmd[i]);
  681. pr_dbg("\n");
  682. RTW_INFO("=========================\n");
  683. #endif /* CONFIG_MCC_MODE_DEBUG */
  684. rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_MACID_BITMAP, H2C_MCC_MACID_BITMAP_LEN, cmd);
  685. }
  686. static void rtw_hal_set_mcc_ctrl_cmd(PADAPTER padapter, u8 stop)
  687. {
  688. u8 cmd[H2C_MCC_CTRL_LEN] = {0}, i = 0;
  689. u8 order = 0, totalnum = 0, chidx = 0, bw = 0, bw40sc = 0, bw80sc = 0;
  690. u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0;
  691. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  692. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  693. struct mlme_ext_priv *pmlmeext = NULL;
  694. struct mlme_ext_info *pmlmeinfo = NULL;
  695. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
  696. _adapter *iface = NULL;
  697. RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop);
  698. for (i = 0; i < dvobj->iface_nums; i++) {
  699. iface = pmccobjpriv->iface[i];
  700. if (iface == NULL)
  701. continue;
  702. if (stop) {
  703. if (iface != padapter)
  704. continue;
  705. }
  706. order = iface->mcc_adapterpriv.order;
  707. if (!stop)
  708. totalnum = dvobj->iface_nums;
  709. else
  710. totalnum = 0xff; /* 0xff means stop */
  711. pmlmeext = &iface->mlmeextpriv;
  712. chidx = pmlmeext->cur_channel;
  713. bw = pmlmeext->cur_bwmode;
  714. bw40sc = pmlmeext->cur_ch_offset;
  715. /* decide 80 band width offset */
  716. if (bw == CHANNEL_WIDTH_80) {
  717. u8 center_ch = rtw_get_center_ch(chidx, bw, bw40sc);
  718. if (center_ch > chidx)
  719. bw80sc = HAL_PRIME_CHNL_OFFSET_LOWER;
  720. else if (center_ch < chidx)
  721. bw80sc = HAL_PRIME_CHNL_OFFSET_UPPER;
  722. else
  723. bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
  724. } else
  725. bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
  726. duration = iface->mcc_adapterpriv.mcc_duration;
  727. role = iface->mcc_adapterpriv.role;
  728. incurch = _FALSE;
  729. if (IS_HARDWARE_TYPE_8812(padapter))
  730. rfetype = pHalData->rfe_type; /* RFETYPE (only for 8812)*/
  731. else
  732. rfetype = 0;
  733. /* STA/GC TX NULL data to inform AP/GC for ps mode */
  734. switch (role) {
  735. case MCC_ROLE_GO:
  736. case MCC_ROLE_AP:
  737. distxnull = MCC_DISABLE_TX_NULL;
  738. break;
  739. case MCC_ROLE_GC:
  740. case MCC_ROLE_STA:
  741. distxnull = MCC_ENABLE_TX_NULL;
  742. break;
  743. }
  744. c2hrpt = MCC_C2H_REPORT_ALL_STATUS;
  745. chscan = MCC_CHIDX;
  746. SET_H2CCMD_MCC_CTRL_ORDER(cmd, order);
  747. SET_H2CCMD_MCC_CTRL_TOTALNUM(cmd, totalnum);
  748. SET_H2CCMD_MCC_CTRL_CHIDX(cmd, chidx);
  749. SET_H2CCMD_MCC_CTRL_BW(cmd, bw);
  750. SET_H2CCMD_MCC_CTRL_BW40SC(cmd, bw40sc);
  751. SET_H2CCMD_MCC_CTRL_BW80SC(cmd, bw80sc);
  752. SET_H2CCMD_MCC_CTRL_DURATION(cmd, duration);
  753. SET_H2CCMD_MCC_CTRL_ROLE(cmd, role);
  754. SET_H2CCMD_MCC_CTRL_INCURCH(cmd, incurch);
  755. SET_H2CCMD_MCC_CTRL_RFETYPE(cmd, rfetype);
  756. SET_H2CCMD_MCC_CTRL_DISTXNULL(cmd, distxnull);
  757. SET_H2CCMD_MCC_CTRL_C2HRPT(cmd, c2hrpt);
  758. SET_H2CCMD_MCC_CTRL_CHSCAN(cmd, chscan);
  759. #ifdef CONFIG_MCC_MODE_DEBUG
  760. RTW_INFO("=========================\n");
  761. RTW_INFO(FUNC_ADPT_FMT" MCC INFO:\n", FUNC_ADPT_ARG(iface));
  762. RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
  763. RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
  764. RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
  765. RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
  766. RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
  767. RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
  768. RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
  769. RTW_INFO("=========================\n");
  770. #endif /* CONFIG_MCC_MODE_DEBUG */
  771. rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_CTRL, H2C_MCC_CTRL_LEN, cmd);
  772. }
  773. }
  774. static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
  775. {
  776. u8 ret = _SUCCESS;
  777. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  778. struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
  779. if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
  780. rtw_warn_on(1);
  781. RTW_INFO("PS mode is not active before start mcc, force exit ps mode\n");
  782. LeaveAllPowerSaveModeDirect(padapter);
  783. }
  784. if (dvobj->iface_nums > MAX_MCC_NUM) {
  785. RTW_INFO("%s: current iface num(%d) > MAX_MCC_NUM(%d)\n", __func__, dvobj->iface_nums, MAX_MCC_NUM);
  786. ret = _FAIL;
  787. goto exit;
  788. }
  789. /* configure mcc switch channel setting */
  790. rtw_hal_config_mcc_switch_channel_setting(padapter);
  791. if (rtw_hal_decide_mcc_role(padapter) == _FAIL) {
  792. ret = _FAIL;
  793. goto exit;
  794. }
  795. /* set mcc status to indicate process mcc start setting */
  796. rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_START_SETTING);
  797. /* only download rsvd page for connect */
  798. if (status == MCC_SETCMD_STATUS_START_CONNECT) {
  799. /* download mcc rsvd page */
  800. rtw_hal_set_fw_mcc_rsvd_page(padapter);
  801. rtw_hal_set_mcc_rsvdpage_cmd(padapter);
  802. }
  803. /* configure NoA setting */
  804. rtw_hal_set_mcc_noa_cmd(padapter);
  805. /* IQK value offload */
  806. rtw_hal_set_mcc_IQK_offload_cmd(padapter);
  807. /* set mac id to fw */
  808. rtw_hal_set_mcc_macid_cmd(padapter);
  809. /* set mcc parameter */
  810. rtw_hal_set_mcc_ctrl_cmd(padapter, _FALSE);
  811. exit:
  812. return ret;
  813. }
  814. static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status)
  815. {
  816. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  817. _adapter *iface = NULL;
  818. u8 i = 0;
  819. /*
  820. * when adapter disconnect, stop mcc mod
  821. * total=0xf means stop mcc mode
  822. */
  823. switch (status) {
  824. default:
  825. /* let fw switch to other interface channel */
  826. for (i = 0; i < dvobj->iface_nums; i++) {
  827. iface = dvobj->padapters[i];
  828. if (iface == NULL)
  829. continue;
  830. /* use other interface to set cmd */
  831. if (iface != padapter) {
  832. rtw_hal_set_mcc_ctrl_cmd(iface, _TRUE);
  833. break;
  834. }
  835. }
  836. break;
  837. }
  838. }
  839. static void rtw_hal_mcc_status_hdl(PADAPTER padapter, u8 status)
  840. {
  841. switch (status) {
  842. case MCC_SETCMD_STATUS_STOP_DISCONNECT:
  843. rtw_hal_clear_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
  844. break;
  845. case MCC_SETCMD_STATUS_STOP_SCAN_START:
  846. rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC);
  847. rtw_hal_clear_mcc_status(padapter, MCC_STATUS_DOING_MCC);
  848. break;
  849. case MCC_SETCMD_STATUS_START_CONNECT:
  850. case MCC_SETCMD_STATUS_START_SCAN_DONE:
  851. rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
  852. break;
  853. default:
  854. RTW_INFO(FUNC_ADPT_FMT" error status(%d)\n", FUNC_ADPT_ARG(padapter), status);
  855. break;
  856. }
  857. }
  858. static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter)
  859. {
  860. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  861. _adapter *iface = NULL;
  862. u8 i = 0;
  863. for (i = 0; i < dvobj->iface_nums; i++) {
  864. iface = dvobj->padapters[i];
  865. if (iface == NULL)
  866. continue;
  867. /* release network queue */
  868. rtw_netif_wake_queue(iface->pnetdev);
  869. iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
  870. iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
  871. iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
  872. if (iface->mcc_adapterpriv.role == MCC_ROLE_GO)
  873. rtw_hal_mcc_remove_go_p2p_ie(iface);
  874. }
  875. }
  876. static void rtw_hal_mcc_start_posthdl(PADAPTER padapter)
  877. {
  878. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  879. _adapter *iface = NULL;
  880. u8 i = 0;
  881. for (i = 0; i < dvobj->iface_nums; i++) {
  882. iface = dvobj->padapters[i];
  883. if (iface == NULL)
  884. continue;
  885. iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
  886. iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
  887. iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
  888. }
  889. }
  890. /*
  891. * rtw_hal_set_mcc_setting - set mcc setting
  892. * @padapter: currnet padapter to stop/start MCC
  893. * @stop: stop mcc or not
  894. * @return val: 1 for SUCCESS, 0 for fail
  895. */
  896. static u8 rtw_hal_set_mcc_setting(PADAPTER padapter, u8 status)
  897. {
  898. u8 ret = _FAIL;
  899. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  900. u8 stop = (status < MCC_SETCMD_STATUS_START_CONNECT) ? _TRUE : _FALSE;
  901. u32 start_time = rtw_get_current_time();
  902. RTW_INFO("===> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
  903. rtw_sctx_init(&pmccobjpriv->mcc_sctx, MCC_EXPIRE_TIME);
  904. pmccobjpriv->mcc_c2h_status = MCC_RPT_MAX;
  905. if (stop == _FALSE) {
  906. /* handle mcc start */
  907. if (rtw_hal_set_mcc_start_setting(padapter, status) == _FAIL)
  908. goto exit;
  909. /* wait for C2H */
  910. if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
  911. RTW_INFO(FUNC_ADPT_FMT": wait for mcc start C2H time out\n", FUNC_ADPT_ARG(padapter));
  912. else
  913. ret = _SUCCESS;
  914. if (ret == _SUCCESS) {
  915. RTW_INFO(FUNC_ADPT_FMT": mcc start sucecssfully\n", FUNC_ADPT_ARG(padapter));
  916. rtw_hal_mcc_start_posthdl(padapter);
  917. }
  918. } else {
  919. /* set mcc status to indicate process mcc start setting */
  920. rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_STOP_SETTING);
  921. /* handle mcc stop */
  922. rtw_hal_set_mcc_stop_setting(padapter, status);
  923. /* wait for C2H */
  924. if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
  925. RTW_INFO(FUNC_ADPT_FMT": wait for mcc stop C2H time out\n", FUNC_ADPT_ARG(padapter));
  926. else {
  927. ret = _SUCCESS;
  928. rtw_hal_mcc_stop_posthdl(padapter);
  929. }
  930. }
  931. exit:
  932. rtw_hal_mcc_status_hdl(padapter, status);
  933. /* clear mcc status */
  934. rtw_hal_clear_mcc_status(padapter
  935. , MCC_STATUS_PROCESS_MCC_START_SETTING | MCC_STATUS_PROCESS_MCC_STOP_SETTING);
  936. RTW_INFO(FUNC_ADPT_FMT" in %dms <===\n"
  937. , FUNC_ADPT_ARG(padapter), rtw_get_passing_time_ms(start_time));
  938. return ret;
  939. }
  940. /**
  941. * rtw_hal_mcc_check_case_not_limit_traffic - handler flow ctrl for special case
  942. * @cur_iface: fw stay channel setting of this iface
  943. * @next_iface: fw will swich channel setting of this iface
  944. */
  945. static void rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface, PADAPTER next_iface)
  946. {
  947. u8 cur_bw = cur_iface->mlmeextpriv.cur_bwmode;
  948. u8 next_bw = next_iface->mlmeextpriv.cur_bwmode;
  949. /* for both interface are VHT80, doesn't limit_traffic according to iperf results */
  950. if (cur_bw == CHANNEL_WIDTH_80 && next_bw == CHANNEL_WIDTH_80) {
  951. cur_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
  952. next_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
  953. }
  954. }
  955. /**
  956. * rtw_hal_mcc_sw_ch_fw_notify_hdl - handler flow ctrl
  957. */
  958. static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)
  959. {
  960. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
  961. struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
  962. struct mcc_adapter_priv *cur_mccadapriv = NULL, *next_mccadapriv = NULL;
  963. _adapter *iface = NULL, *cur_iface = NULL, *next_iface = NULL;
  964. struct registry_priv *preg = &padapter->registrypriv;
  965. u8 cur_op_ch = pdvobjpriv->oper_channel;
  966. u8 i = 0, iface_num = pdvobjpriv->iface_nums, cur_order = 0, next_order = 0;
  967. static u8 cnt = 1;
  968. u32 single_tx_cri = preg->rtw_mcc_single_tx_cri;
  969. for (i = 0; i < iface_num; i++) {
  970. iface = pdvobjpriv->padapters[i];
  971. if (cur_op_ch == iface->mlmeextpriv.cur_channel) {
  972. cur_iface = iface;
  973. cur_mccadapriv = &cur_iface->mcc_adapterpriv;
  974. cur_order = cur_mccadapriv->order;
  975. next_order = (cur_order + 1) % iface_num;
  976. next_iface = pmccobjpriv->iface[next_order];
  977. next_mccadapriv = &next_iface->mcc_adapterpriv;
  978. break;
  979. }
  980. }
  981. /* check other interface tx busy traffic or not under every 2 switch channel notify(Mbits/100ms) */
  982. if (cnt == 2) {
  983. cur_mccadapriv->mcc_tp = (cur_mccadapriv->mcc_tx_bytes_from_kernel
  984. - cur_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
  985. cur_mccadapriv->mcc_last_tx_bytes_from_kernel = cur_mccadapriv->mcc_tx_bytes_from_kernel;
  986. next_mccadapriv->mcc_tp = (next_mccadapriv->mcc_tx_bytes_from_kernel
  987. - next_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
  988. next_mccadapriv->mcc_last_tx_bytes_from_kernel = next_mccadapriv->mcc_tx_bytes_from_kernel;
  989. cnt = 1;
  990. } else
  991. cnt = 2;
  992. /* check single TX or cuncurrnet TX */
  993. if (next_mccadapriv->mcc_tp < single_tx_cri) {
  994. /* single TX, does not stop */
  995. cur_mccadapriv->mcc_tx_stop = _FALSE;
  996. cur_mccadapriv->mcc_tp_limit = _FALSE;
  997. } else {
  998. /* concurrent TX, stop */
  999. cur_mccadapriv->mcc_tx_stop = _TRUE;
  1000. cur_mccadapriv->mcc_tp_limit = _TRUE;
  1001. }
  1002. if (cur_mccadapriv->mcc_tp < single_tx_cri) {
  1003. next_mccadapriv->mcc_tx_stop = _FALSE;
  1004. next_mccadapriv->mcc_tp_limit = _FALSE;
  1005. } else {
  1006. next_mccadapriv->mcc_tx_stop = _FALSE;
  1007. next_mccadapriv->mcc_tp_limit = _TRUE;
  1008. next_mccadapriv->mcc_tx_bytes_to_port = 0;
  1009. }
  1010. /* stop current iface kernel queue or not */
  1011. if (cur_mccadapriv->mcc_tx_stop)
  1012. rtw_netif_stop_queue(cur_iface->pnetdev);
  1013. else
  1014. rtw_netif_wake_queue(cur_iface->pnetdev);
  1015. /* stop next iface kernel queue or not */
  1016. if (next_mccadapriv->mcc_tx_stop)
  1017. rtw_netif_stop_queue(next_iface->pnetdev);
  1018. else
  1019. rtw_netif_wake_queue(next_iface->pnetdev);
  1020. /* start xmit tasklet */
  1021. rtw_os_xmit_schedule(next_iface);
  1022. rtw_hal_mcc_check_case_not_limit_traffic(cur_iface, next_iface);
  1023. if (0) {
  1024. RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
  1025. cur_mccadapriv->order, cur_mccadapriv->mcc_tx_stop, cur_mccadapriv->mcc_tp);
  1026. dump_os_queue(0, cur_iface);
  1027. RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
  1028. next_mccadapriv->order, next_mccadapriv->mcc_tx_stop, next_mccadapriv->mcc_tp);
  1029. dump_os_queue(0, next_iface);
  1030. }
  1031. }
  1032. static void rtw_hal_mcc_update_noa_start_time_hdl(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
  1033. {
  1034. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
  1035. struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
  1036. struct mcc_adapter_priv *pmccadapriv = NULL;
  1037. PADAPTER iface = NULL;
  1038. u8 i = 0;
  1039. u8 policy_idx = pmccobjpriv->policy_index;
  1040. u8 noa_tsf_sync_offset = mcc_switch_channel_policy_table[policy_idx][MCC_TSF_SYNC_OFFSET_IDX];
  1041. u8 noa_start_time_offset = mcc_switch_channel_policy_table[policy_idx][MCC_START_TIME_OFFSET_IDX];
  1042. for (i = 0; i < pdvobjpriv->iface_nums; i++) {
  1043. iface = pdvobjpriv->padapters[i];
  1044. if (iface == NULL)
  1045. continue;
  1046. pmccadapriv = &iface->mcc_adapterpriv;
  1047. /* GO & channel match */
  1048. if (pmccadapriv->role == MCC_ROLE_GO) {
  1049. /* convert GO TBTT from FW to noa_start_time(TU convert to mircosecond) */
  1050. pmccadapriv->noa_start_time = RTW_GET_LE32(tmpBuf + 2) + noa_start_time_offset * TU;
  1051. if (0) {
  1052. RTW_INFO("TBTT:0x%02x\n", RTW_GET_LE32(tmpBuf + 2));
  1053. RTW_INFO("noa_tsf_sync_offset:%d, noa_start_time_offset:%d\n", noa_tsf_sync_offset, noa_start_time_offset);
  1054. RTW_INFO(FUNC_ADPT_FMT"buf=0x%02x:0x%02x:0x%02x:0x%02x, noa_start_time=0x%02x\n"
  1055. , FUNC_ADPT_ARG(iface)
  1056. , tmpBuf[2]
  1057. , tmpBuf[3]
  1058. , tmpBuf[4]
  1059. , tmpBuf[5]
  1060. ,pmccadapriv->noa_start_time);
  1061. }
  1062. rtw_hal_mcc_update_go_p2p_ie(iface);
  1063. break;
  1064. }
  1065. }
  1066. }
  1067. /**
  1068. * rtw_hal_mcc_c2h_handler - mcc c2h handler
  1069. */
  1070. void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
  1071. {
  1072. struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
  1073. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1074. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  1075. struct submit_ctx *mcc_sctx = &pmccobjpriv->mcc_sctx;
  1076. _irqL irqL;
  1077. /* RTW_INFO("[length]=%d, [C2H data]="MAC_FMT"\n", buflen, MAC_ARG(tmpBuf)); */
  1078. /* To avoid reg is set, but driver recive c2h to set wrong oper_channel */
  1079. if (MCC_RPT_STOPMCC == pmccobjpriv->mcc_c2h_status) {
  1080. RTW_INFO(FUNC_ADPT_FMT" MCC alread stops return\n", FUNC_ADPT_ARG(padapter));
  1081. return;
  1082. }
  1083. pmccobjpriv->mcc_c2h_status = tmpBuf[0];
  1084. switch (pmccobjpriv->mcc_c2h_status) {
  1085. case MCC_RPT_SUCCESS:
  1086. pdvobjpriv->oper_channel = tmpBuf[1];
  1087. _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1088. pmccobjpriv->cur_mcc_success_cnt++;
  1089. _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1090. break;
  1091. case MCC_RPT_TXNULL_FAIL:
  1092. RTW_INFO("[MCC] TXNULL FAIL\n");
  1093. break;
  1094. case MCC_RPT_STOPMCC:
  1095. RTW_INFO("[MCC] MCC stop (time:%d)\n", rtw_get_current_time());
  1096. pmccobjpriv->mcc_c2h_status = MCC_RPT_STOPMCC;
  1097. rtw_sctx_done(&mcc_sctx);
  1098. break;
  1099. case MCC_RPT_READY:
  1100. _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1101. /* initialize counter & time */
  1102. pmccobjpriv->mcc_launch_time = rtw_get_current_time();
  1103. pmccobjpriv->mcc_c2h_status = MCC_RPT_READY;
  1104. pmccobjpriv->cur_mcc_success_cnt = 0;
  1105. pmccobjpriv->prev_mcc_success_cnt = 0;
  1106. pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
  1107. _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1108. RTW_INFO("[MCC] MCC ready (time:%d)\n", pmccobjpriv->mcc_launch_time);
  1109. rtw_sctx_done(&mcc_sctx);
  1110. break;
  1111. case MCC_RPT_SWICH_CHANNEL_NOTIFY:
  1112. pdvobjpriv->oper_channel = tmpBuf[1];
  1113. rtw_hal_mcc_sw_ch_fw_notify_hdl(padapter);
  1114. break;
  1115. case MCC_RPT_UPDATE_NOA_START_TIME:
  1116. rtw_hal_mcc_update_noa_start_time_hdl(padapter, buflen, tmpBuf);
  1117. break;
  1118. default:
  1119. /* RTW_INFO("[MCC] Other MCC status(%d)\n", pmccobjpriv->mcc_c2h_status); */
  1120. break;
  1121. }
  1122. }
  1123. /**
  1124. * rtw_hal_mcc_sw_status_check - check mcc swich channel status
  1125. * @padapter: primary adapter
  1126. */
  1127. void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
  1128. {
  1129. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  1130. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  1131. struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
  1132. u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL;
  1133. _irqL irqL;
  1134. /* #define MCC_RESTART 1 */
  1135. if (!MCC_EN(padapter))
  1136. return;
  1137. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1138. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
  1139. if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
  1140. rtw_warn_on(1);
  1141. RTW_INFO("PS mode is not active under mcc, force exit ps mode\n");
  1142. LeaveAllPowerSaveModeDirect(padapter);
  1143. }
  1144. if (rtw_get_passing_time_ms(pmccobjpriv->mcc_launch_time) > 2000) {
  1145. _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1146. cur_cnt = pmccobjpriv->cur_mcc_success_cnt;
  1147. prev_cnt = pmccobjpriv->prev_mcc_success_cnt;
  1148. if (cur_cnt < prev_cnt)
  1149. diff_cnt = (cur_cnt + 255) - prev_cnt;
  1150. else
  1151. diff_cnt = cur_cnt - prev_cnt;
  1152. if (diff_cnt < 30) {
  1153. pmccobjpriv->mcc_tolerance_time--;
  1154. RTW_INFO("%s: diff_cnt:%d, tolerance_time:%d\n",
  1155. __func__, diff_cnt, pmccobjpriv->mcc_tolerance_time);
  1156. } else
  1157. pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
  1158. pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
  1159. if (pmccobjpriv->mcc_tolerance_time != 0)
  1160. check_ret = _SUCCESS;
  1161. _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1162. if (check_ret != _SUCCESS) {
  1163. RTW_INFO("============ MCC swich channel check fail (%d)=============\n", diff_cnt);
  1164. /* restart MCC */
  1165. #ifdef MCC_RESTART
  1166. rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
  1167. rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
  1168. #endif /* MCC_RESTART */
  1169. }
  1170. } else {
  1171. _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1172. pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
  1173. _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
  1174. }
  1175. }
  1176. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1177. }
  1178. /**
  1179. * rtw_hal_mcc_change_scan_flag - change scan flag under mcc
  1180. *
  1181. * MCC mode under sitesurvey goto AP channel to tx bcn & data
  1182. * MCC mode under sitesurvey doesn't support TX data for station mode (FW not support)
  1183. *
  1184. * @padapter: the adapter to be change scan flag
  1185. * @ch: pointer to rerurn ch
  1186. * @bw: pointer to rerurn bw
  1187. * @offset: pointer to rerurn offset
  1188. */
  1189. u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset)
  1190. {
  1191. u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, role = 0;
  1192. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  1193. struct mcc_adapter_priv *pmccadapriv = NULL;
  1194. struct mlme_ext_priv *pmlmeext = NULL;
  1195. if (!MCC_EN(padapter))
  1196. goto exit;
  1197. if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
  1198. goto exit;
  1199. for (i = 0; i < dvobj->iface_nums; i++) {
  1200. if (!dvobj->padapters[i])
  1201. continue;
  1202. pmlmeext = &dvobj->padapters[i]->mlmeextpriv;
  1203. pmccadapriv = &dvobj->padapters[i]->mcc_adapterpriv;
  1204. role = pmccadapriv->role;
  1205. switch (role) {
  1206. case MCC_ROLE_AP:
  1207. case MCC_ROLE_GO:
  1208. *ch = pmlmeext->cur_channel;
  1209. *bw = pmlmeext->cur_bwmode;
  1210. *offset = pmlmeext->cur_ch_offset;
  1211. need_ch_setting_union = _FALSE;
  1212. break;
  1213. case MCC_ROLE_STA:
  1214. case MCC_ROLE_GC:
  1215. break;
  1216. default:
  1217. RTW_INFO("unknown role\n");
  1218. rtw_warn_on(1);
  1219. break;
  1220. }
  1221. /* check other scan flag */
  1222. flags = mlmeext_scan_backop_flags(pmlmeext);
  1223. if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC))
  1224. flags &= ~SS_BACKOP_PS_ANNC;
  1225. if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME))
  1226. flags &= ~SS_BACKOP_TX_RESUME;
  1227. mlmeext_assign_scan_backop_flags(pmlmeext, flags);
  1228. }
  1229. exit:
  1230. return need_ch_setting_union;
  1231. }
  1232. /**
  1233. * rtw_hal_mcc_calc_tx_bytes_from_kernel - calculte tx bytes from kernel to check concurrent tx or not
  1234. * @padapter: the adapter to be record tx bytes
  1235. * @len: data len
  1236. */
  1237. inline void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len)
  1238. {
  1239. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  1240. if (MCC_EN(padapter)) {
  1241. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
  1242. pmccadapriv->mcc_tx_bytes_from_kernel += len;
  1243. if (0)
  1244. RTW_INFO("%s(order:%d): mcc tx bytes from kernel:%lld\n"
  1245. , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_from_kernel);
  1246. }
  1247. }
  1248. }
  1249. /**
  1250. * rtw_hal_mcc_calc_tx_bytes_to_port - calculte tx bytes to write port in order to flow crtl
  1251. * @padapter: the adapter to be record tx bytes
  1252. * @len: data len
  1253. */
  1254. inline void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len)
  1255. {
  1256. if (MCC_EN(padapter)) {
  1257. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1258. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  1259. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
  1260. pmccadapriv->mcc_tx_bytes_to_port += len;
  1261. if (0)
  1262. RTW_INFO("%s(order:%d): mcc tx bytes to port:%d, mcc target tx bytes to port:%d\n"
  1263. , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_to_port
  1264. , pmccadapriv->mcc_target_tx_bytes_to_port);
  1265. }
  1266. }
  1267. /**
  1268. * rtw_hal_mcc_stop_tx_bytes_to_port - stop write port to hw or not
  1269. * @padapter: the adapter to be stopped
  1270. */
  1271. inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)
  1272. {
  1273. if (MCC_EN(padapter)) {
  1274. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1275. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  1276. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
  1277. if (pmccadapriv->mcc_tp_limit) {
  1278. if (pmccadapriv->mcc_tx_bytes_to_port >= pmccadapriv->mcc_target_tx_bytes_to_port) {
  1279. pmccadapriv->mcc_tx_stop = _TRUE;
  1280. rtw_netif_stop_queue(padapter->pnetdev);
  1281. return _TRUE;
  1282. }
  1283. }
  1284. }
  1285. }
  1286. return _FALSE;
  1287. }
  1288. /**
  1289. * rtw_hal_set_mcc_setting_scan_start - setting mcc under scan start
  1290. * @padapter: the adapter to be setted
  1291. * @ch_setting_changed: softap channel setting to be changed or not
  1292. */
  1293. u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter)
  1294. {
  1295. u8 ret = _FAIL;
  1296. if (MCC_EN(padapter)) {
  1297. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1298. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1299. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
  1300. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
  1301. ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_SCAN_START);
  1302. /* issue null data to all station connected to AP before scan */
  1303. rtw_hal_mcc_issue_null_data(padapter, 0, 1);
  1304. }
  1305. }
  1306. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1307. }
  1308. return ret;
  1309. }
  1310. /**
  1311. * rtw_hal_set_mcc_setting_scan_complete - setting mcc after scan commplete
  1312. * @padapter: the adapter to be setted
  1313. * @ch_setting_changed: softap channel setting to be changed or not
  1314. */
  1315. u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter)
  1316. {
  1317. u8 ret = _FAIL;
  1318. if (MCC_EN(padapter)) {
  1319. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1320. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1321. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
  1322. ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE);
  1323. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1324. }
  1325. return ret;
  1326. }
  1327. /**
  1328. * rtw_hal_set_mcc_setting_start_bss_network - setting mcc under softap start
  1329. * @padapter: the adapter to be setted
  1330. * @chbw_grouped: channel bw offset can not be allowed or not
  1331. */
  1332. u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_allow)
  1333. {
  1334. u8 ret = _FAIL;
  1335. if (MCC_EN(padapter)) {
  1336. /* channel bw offset can not be allowed, start MCC */
  1337. if (chbw_allow == _FALSE) {
  1338. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1339. rtw_hal_mcc_restore_iqk_val(padapter);
  1340. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1341. ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
  1342. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1343. }
  1344. }
  1345. return ret;
  1346. }
  1347. /**
  1348. * rtw_hal_set_mcc_setting_disconnect - setting mcc under mlme disconnect(stop softap/disconnect from AP)
  1349. * @padapter: the adapter to be setted
  1350. */
  1351. u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter)
  1352. {
  1353. u8 ret = _FAIL;
  1354. if (MCC_EN(padapter)) {
  1355. struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
  1356. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1357. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
  1358. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
  1359. ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
  1360. }
  1361. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1362. }
  1363. return ret;
  1364. }
  1365. /**
  1366. * rtw_hal_set_mcc_setting_join_done_chk_ch - setting mcc under join done
  1367. * @padapter: the adapter to be checked
  1368. */
  1369. u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter)
  1370. {
  1371. u8 ret = _FAIL;
  1372. if (MCC_EN(padapter)) {
  1373. struct mi_state mstate;
  1374. rtw_mi_status_no_self(padapter, &mstate);
  1375. if (MSTATE_STA_LD_NUM(&mstate) || MSTATE_STA_LG_NUM(&mstate) || MSTATE_AP_NUM(&mstate)) {
  1376. bool chbw_allow = _TRUE;
  1377. u8 u_ch, u_offset, u_bw;
  1378. struct mlme_ext_priv *cur_mlmeext = &padapter->mlmeextpriv;
  1379. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  1380. if (rtw_mi_get_ch_setting_union_no_self(padapter, &u_ch, &u_bw, &u_offset) <= 0) {
  1381. dump_adapters_status(RTW_DBGDUMP , dvobj);
  1382. rtw_warn_on(1);
  1383. }
  1384. RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n"
  1385. , FUNC_ADPT_ARG(padapter), u_ch, u_bw, u_offset);
  1386. /* chbw_allow? */
  1387. chbw_allow = rtw_is_chbw_grouped(cur_mlmeext->cur_channel
  1388. , cur_mlmeext->cur_bwmode, cur_mlmeext->cur_ch_offset
  1389. , u_ch, u_bw, u_offset);
  1390. RTW_INFO(FUNC_ADPT_FMT" chbw_allow:%d\n"
  1391. , FUNC_ADPT_ARG(padapter), chbw_allow);
  1392. /* if chbw_allow = false, start MCC setting */
  1393. if (chbw_allow == _FALSE) {
  1394. struct mcc_obj_priv *pmccobjpriv = &dvobj->mcc_objpriv;
  1395. rtw_hal_mcc_restore_iqk_val(padapter);
  1396. _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1397. ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
  1398. _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
  1399. }
  1400. }
  1401. }
  1402. return ret;
  1403. }
  1404. /**
  1405. * rtw_hal_set_mcc_setting_chk_start_clnt_join - check change channel under start clnt join
  1406. * @padapter: the adapter to be checked
  1407. * @ch: pointer to rerurn ch
  1408. * @bw: pointer to rerurn bw
  1409. * @offset: pointer to rerurn offset
  1410. * @chbw_allow: allow to use adapter's channel setting
  1411. */
  1412. u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow)
  1413. {
  1414. u8 ret = _FAIL;
  1415. /* if chbw_allow = false under en_mcc = TRUE, we do not change channel related setting */
  1416. if (MCC_EN(padapter)) {
  1417. /* restore union channel related setting to current channel related setting */
  1418. if (chbw_allow == _FALSE) {
  1419. struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
  1420. *ch = pmlmeext->cur_channel;
  1421. *bw = pmlmeext->cur_bwmode;
  1422. *offset = pmlmeext->cur_ch_offset;
  1423. RTW_INFO(FUNC_ADPT_FMT" en_mcc:%d(%d,%d,%d,)\n"
  1424. , FUNC_ADPT_ARG(padapter), padapter->registrypriv.en_mcc
  1425. , *ch, *bw, *offset);
  1426. ret = _SUCCESS;
  1427. }
  1428. }
  1429. return ret;
  1430. }
  1431. static void rtw_hal_mcc_dump_noa_content(void *sel, PADAPTER padapter)
  1432. {
  1433. struct mcc_adapter_priv *pmccadapriv = NULL;
  1434. u8 *pos = NULL;
  1435. pmccadapriv = &padapter->mcc_adapterpriv;
  1436. /* last position for NoA attribute */
  1437. pos = pmccadapriv->p2p_go_noa_ie + pmccadapriv->p2p_go_noa_ie_len;
  1438. RTW_PRINT_SEL(sel, "\nStart to dump NoA Content\n");
  1439. RTW_PRINT_SEL(sel, "NoA Counts:%d\n", *(pos - 13));
  1440. RTW_PRINT_SEL(sel, "NoA Duration(TU):%d\n", (RTW_GET_LE32(pos - 12))/TU);
  1441. RTW_PRINT_SEL(sel, "NoA Interval(TU):%d\n", (RTW_GET_LE32(pos - 8))/TU);
  1442. RTW_PRINT_SEL(sel, "NoA Start time(microseconds):0x%02x\n", RTW_GET_LE32(pos - 4));
  1443. RTW_PRINT_SEL(sel, "End to dump NoA Content\n");
  1444. }
  1445. void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj)
  1446. {
  1447. struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
  1448. struct mcc_adapter_priv *pmccadapriv = NULL;
  1449. _adapter *iface = NULL, *adapter = NULL;
  1450. struct registry_priv *regpriv = NULL;
  1451. u8 i = 0;
  1452. /* regpriv is common for all adapter */
  1453. adapter = dvobj->padapters[IFACE_ID0];
  1454. RTW_PRINT_SEL(sel, "**********************************************\n");
  1455. for (i = 0; i < dvobj->iface_nums; i++) {
  1456. iface = dvobj->padapters[i];
  1457. if (!iface)
  1458. continue;
  1459. regpriv = &iface->registrypriv;
  1460. pmccadapriv = &iface->mcc_adapterpriv;
  1461. if (pmccadapriv) {
  1462. RTW_PRINT_SEL(sel, "adapter mcc info:\n");
  1463. RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface));
  1464. RTW_PRINT_SEL(sel, "order:%d\n", pmccadapriv->order);
  1465. RTW_PRINT_SEL(sel, "duration:%d\n", pmccadapriv->mcc_duration);
  1466. RTW_PRINT_SEL(sel, "target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port);
  1467. RTW_PRINT_SEL(sel, "current TP:%d\n", pmccadapriv->mcc_tp);
  1468. RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid);
  1469. RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n\n", pmccadapriv->mcc_macid_bitmap);
  1470. RTW_PRINT_SEL(sel, "registry data:\n");
  1471. RTW_PRINT_SEL(sel, "en_mcc:%d\n", regpriv->en_mcc);
  1472. RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp);
  1473. RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp);
  1474. RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp);
  1475. RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp);
  1476. RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp);
  1477. RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp);
  1478. RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri);
  1479. if (MLME_IS_GO(iface))
  1480. rtw_hal_mcc_dump_noa_content(sel, iface);
  1481. RTW_PRINT_SEL(sel, "**********************************************\n");
  1482. }
  1483. }
  1484. RTW_PRINT_SEL(sel, "------------------------------------------\n");
  1485. RTW_PRINT_SEL(sel, "policy index:%d\n", pmccobjpriv->policy_index);
  1486. RTW_PRINT_SEL(sel, "------------------------------------------\n");
  1487. RTW_PRINT_SEL(sel, "define data:\n");
  1488. RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP);
  1489. RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", MCC_AP_BW40_TARGET_TX_TP);
  1490. RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", MCC_AP_BW80_TARGET_TX_TP);
  1491. RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", MCC_STA_BW20_TARGET_TX_TP);
  1492. RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M):%d Mbps\n", MCC_STA_BW40_TARGET_TX_TP);
  1493. RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", MCC_STA_BW80_TARGET_TX_TP);
  1494. RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", MCC_SINGLE_TX_CRITERIA);
  1495. RTW_PRINT_SEL(sel, "------------------------------------------\n");
  1496. }
  1497. inline void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
  1498. {
  1499. if (MCC_EN(padapter)) {
  1500. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
  1501. /* use QSLT_MGNT to check mgnt queue or bcn queue */
  1502. if (pattrib->qsel == QSLT_MGNT) {
  1503. pattrib->mac_id = padapter->mcc_adapterpriv.mgmt_queue_macid;
  1504. pattrib->qsel = QSLT_VO;
  1505. }
  1506. }
  1507. }
  1508. }
  1509. inline u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg)
  1510. {
  1511. u8 ret = _TRUE, i = 0;
  1512. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  1513. _adapter *iface;
  1514. struct mlme_ext_priv *mlmeext;
  1515. if (MCC_EN(padapter)) {
  1516. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
  1517. for (i = 0; i < dvobj->iface_nums; i++) {
  1518. iface = dvobj->padapters[i];
  1519. mlmeext = &iface->mlmeextpriv;
  1520. if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE) {
  1521. #ifdef DBG_EXPIRATION_CHK
  1522. RTW_INFO(FUNC_ADPT_FMT" don't enter %s under scan for MCC mode\n", FUNC_ADPT_ARG(padapter), msg);
  1523. #endif
  1524. ret = _FALSE;
  1525. goto exit;
  1526. }
  1527. }
  1528. }
  1529. }
  1530. exit:
  1531. return ret;
  1532. }
  1533. void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode)
  1534. {
  1535. struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
  1536. _adapter *iface = NULL;
  1537. u32 start = rtw_get_current_time();
  1538. u8 i = 0;
  1539. if (!MCC_EN(padapter))
  1540. return;
  1541. if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
  1542. return;
  1543. if (chbw_allow == _TRUE)
  1544. return;
  1545. for (i = 0; i < dvobj->iface_nums; i++) {
  1546. iface = dvobj->padapters[i];
  1547. /* issue null data to inform ap station will leave */
  1548. if (is_client_associated_to_ap(iface)) {
  1549. struct mlme_ext_priv *mlmeext = &iface->mlmeextpriv;
  1550. u8 ch = mlmeext->cur_channel;
  1551. u8 bw = mlmeext->cur_bwmode;
  1552. u8 offset = mlmeext->cur_ch_offset;
  1553. set_channel_bwmode(iface, ch, bw, offset);
  1554. issue_nulldata(iface, NULL, ps_mode, 3, 50);
  1555. }
  1556. }
  1557. RTW_INFO("%s(%d ms)\n", __func__, rtw_get_passing_time_ms(start));
  1558. }
  1559. u8 *rtw_hal_mcc_append_go_p2p_ie(PADAPTER padapter, u8 *pframe, u32 *len)
  1560. {
  1561. struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
  1562. if (!MCC_EN(padapter))
  1563. return pframe;
  1564. if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
  1565. return pframe;
  1566. if (pmccadapriv->p2p_go_noa_ie_len == 0)
  1567. return pframe;
  1568. _rtw_memcpy(pframe, pmccadapriv->p2p_go_noa_ie, pmccadapriv->p2p_go_noa_ie_len);
  1569. *len = *len + pmccadapriv->p2p_go_noa_ie_len;
  1570. return pframe + pmccadapriv->p2p_go_noa_ie_len;
  1571. }
  1572. void rtw_hal_dump_mcc_policy_table(void *sel)
  1573. {
  1574. u8 idx = 0;
  1575. RTW_PRINT_SEL(sel, "duration\t,tsf sync offset\t,start time offset\t,interval\t,guard offset0\t,guard offset1\n");
  1576. for (idx = 0; idx < mcc_max_policy_num; idx ++) {
  1577. RTW_PRINT_SEL(sel, "%d\t\t,%d\t\t\t,%d\t\t\t,%d\t\t,%d\t\t,%d\n"
  1578. , mcc_switch_channel_policy_table[idx][MCC_DURATION_IDX]
  1579. , mcc_switch_channel_policy_table[idx][MCC_TSF_SYNC_OFFSET_IDX]
  1580. , mcc_switch_channel_policy_table[idx][MCC_START_TIME_OFFSET_IDX]
  1581. , mcc_switch_channel_policy_table[idx][MCC_INTERVAL_IDX]
  1582. , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET0_IDX]
  1583. , mcc_switch_channel_policy_table[idx][MCC_GUARD_OFFSET1_IDX]);
  1584. }
  1585. }
  1586. #endif /* CONFIG_MCC_MODE */