rtl8821c_ops.c 104 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2016 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #define _RTL8821C_OPS_C_
  21. #include <drv_types.h> /* basic_types.h, rtw_io.h and etc. */
  22. #include <rtw_xmit.h> /* struct xmit_priv */
  23. #ifdef DBG_CONFIG_ERROR_DETECT
  24. #include <rtw_sreset.h>
  25. #endif /* DBG_CONFIG_ERROR_DETECT */
  26. #include <hal_data.h> /* PHAL_DATA_TYPE, GET_HAL_DATA() */
  27. #include <hal_com.h> /* rtw_hal_config_rftype(), dump_chip_info() and etc. */
  28. #include "../hal_halmac.h" /* GET_RX_DESC_XXX_8821C() */
  29. #include "rtl8821c.h"
  30. #ifdef CONFIG_PCI_HCI
  31. #include "rtl8821ce_hal.h"
  32. #endif
  33. #include "rtl8821c_dm.h"
  34. static void read_chip_version(PADAPTER adapter)
  35. {
  36. PHAL_DATA_TYPE hal;
  37. u32 value32;
  38. hal = GET_HAL_DATA(adapter);
  39. value32 = rtw_read32(adapter, REG_SYS_CFG1_8821C);
  40. hal->version_id.ICType = CHIP_8821C;
  41. hal->version_id.ChipType = ((value32 & BIT_RTL_ID_8821C) ? TEST_CHIP : NORMAL_CHIP);
  42. hal->version_id.CUTVersion = BIT_GET_CHIP_VER_8821C(value32);
  43. hal->version_id.VendorType = BIT_GET_VENDOR_ID_8821C(value32);
  44. hal->version_id.VendorType >>= 2;
  45. switch (hal->version_id.VendorType) {
  46. case 0:
  47. hal->version_id.VendorType = CHIP_VENDOR_TSMC;
  48. break;
  49. case 1:
  50. hal->version_id.VendorType = CHIP_VENDOR_SMIC;
  51. break;
  52. case 2:
  53. hal->version_id.VendorType = CHIP_VENDOR_UMC;
  54. break;
  55. }
  56. hal->version_id.RFType = ((value32 & BIT_RF_TYPE_ID_8821C) ? RF_TYPE_2T2R : RF_TYPE_1T1R);
  57. hal->RegulatorMode = ((value32 & BIT_SPSLDO_SEL_8821C) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR);
  58. value32 = rtw_read32(adapter, REG_SYS_STATUS1_8821C);
  59. hal->version_id.ROMVer = BIT_GET_RF_RL_ID_8821C(value32);
  60. /* For multi-function consideration. */
  61. hal->MultiFunc = RT_MULTI_FUNC_NONE;
  62. value32 = rtw_read32(adapter, REG_WL_BT_PWR_CTRL_8821C);
  63. hal->MultiFunc |= ((value32 & BIT_WL_FUNC_EN_8821C) ? RT_MULTI_FUNC_WIFI : 0);
  64. hal->MultiFunc |= ((value32 & BIT_BT_FUNC_EN_8821C) ? RT_MULTI_FUNC_BT : 0);
  65. hal->PolarityCtl = ((value32 & BIT_WL_HWPDN_SL_8821C) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT);
  66. rtw_hal_config_rftype(adapter);
  67. dump_chip_info(hal->version_id);
  68. }
  69. /*
  70. * Return:
  71. * _TRUE valid ID
  72. * _FALSE invalid ID
  73. */
  74. static u8 Hal_EfuseParseIDCode(PADAPTER adapter, u8 *map)
  75. {
  76. u16 EEPROMId;
  77. /* Check 0x8129 again for making sure autoload status!! */
  78. EEPROMId = le16_to_cpu(*(u16 *)map);
  79. RTW_INFO("EEPROM ID = 0x%04x\n", EEPROMId);
  80. if (EEPROMId == RTL_EEPROM_ID)
  81. return _TRUE;
  82. RTW_INFO("<WARN> EEPROM ID is invalid!!\n");
  83. return _FALSE;
  84. }
  85. static void Hal_EfuseParseEEPROMVer(PADAPTER adapter, u8 *map, u8 mapvalid)
  86. {
  87. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  88. if (_TRUE == mapvalid)
  89. hal->EEPROMVersion = map[EEPROM_VERSION_8821C];
  90. else
  91. hal->EEPROMVersion = 1;
  92. RTW_INFO("EEPROM Version = %d\n", hal->EEPROMVersion);
  93. }
  94. static void Hal_EfuseParseTxPowerInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
  95. {
  96. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  97. TxPowerInfo24G tbl2G4;
  98. TxPowerInfo5G tbl5g;
  99. hal_load_txpwr_info(adapter, &tbl2G4, &tbl5g, map);
  100. if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF))
  101. hal->EEPROMRegulatory = map[EEPROM_RF_BOARD_OPTION_8821C] & 0x7; /* bit0~2 */
  102. else
  103. hal->EEPROMRegulatory = EEPROM_DEFAULT_BOARD_OPTION & 0x7; /* bit0~2 */
  104. RTW_INFO("EEPROM Regulatory=0x%02x\n", hal->EEPROMRegulatory);
  105. }
  106. static void Hal_EfuseParseBoardType(PADAPTER adapter, u8 *map, u8 mapvalid)
  107. {
  108. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  109. if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF))
  110. hal->InterfaceSel = (map[EEPROM_RF_BOARD_OPTION_8821C] & 0xE0) >> 5;
  111. else
  112. hal->InterfaceSel = (EEPROM_DEFAULT_BOARD_OPTION & 0xE0) >> 5;
  113. RTW_INFO("EEPROM Board Type=0x%02x\n", hal->InterfaceSel);
  114. }
  115. static void Hal_EfuseParseBTCoexistInfo(PADAPTER adapter, u8 *map, u8 mapvalid)
  116. {
  117. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  118. struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
  119. u8 setting;
  120. u32 tmpu4;
  121. #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
  122. if (hal_spec->hci_type <= 3 && hal_spec->hci_type >= 1) {
  123. hal->EEPROMBluetoothCoexist = _FALSE;
  124. goto exit;
  125. }
  126. #endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
  127. if ((_TRUE == mapvalid) && (map[EEPROM_RF_BOARD_OPTION_8821C] != 0xFF)) {
  128. /* 0xc1[7:5] = 0x01 */
  129. if (((map[EEPROM_RF_BOARD_OPTION_8821C] & 0xe0) >> 5) == 0x01)
  130. hal->EEPROMBluetoothCoexist = _TRUE;
  131. else
  132. hal->EEPROMBluetoothCoexist = _FALSE;
  133. } else
  134. hal->EEPROMBluetoothCoexist = _FALSE;
  135. hal->EEPROMBluetoothType = BT_RTL8821C;
  136. setting = map[EEPROM_RF_BT_SETTING_8821C];
  137. if ((_TRUE == mapvalid) && (setting != 0xFF)) {
  138. /*Bit[0]: Total antenna number
  139. 0: 2-Antenna / 1: 1-Antenna */
  140. hal->EEPROMBluetoothAntNum = setting & BIT(0);
  141. /*
  142. * Bit[6]: One-Ant structure use Ant2(aux.) path or Ant1(main) path
  143. * 0: Ant2(aux.)
  144. * 1: Ant1(main), default
  145. */
  146. hal->ant_path = (setting & BIT(6)) ? ODM_RF_PATH_B : ODM_RF_PATH_A;
  147. } else {
  148. hal->EEPROMBluetoothAntNum = Ant_x1;
  149. hal->ant_path = ODM_RF_PATH_A;
  150. }
  151. exit:
  152. RTW_INFO("EEPROM %s BT-coex, ant_num=%d\n",
  153. hal->EEPROMBluetoothCoexist == _TRUE ? "Enable" : "Disable",
  154. hal->EEPROMBluetoothAntNum == Ant_x2 ? 2 : 1);
  155. }
  156. static void Hal_EfuseParseChnlPlan(PADAPTER adapter, u8 *map, u8 autoloadfail)
  157. {
  158. adapter->mlmepriv.ChannelPlan = hal_com_config_channel_plan(
  159. adapter,
  160. map ? &map[EEPROM_COUNTRY_CODE_8821C] : NULL,
  161. map ? map[EEPROM_CHANNEL_PLAN_8821C] : 0xFF,
  162. adapter->registrypriv.alpha2,
  163. adapter->registrypriv.channel_plan,
  164. RTW_CHPLAN_REALTEK_DEFINE,
  165. autoloadfail
  166. );
  167. RTW_INFO("EEPROM ChannelPlan=0x%02x\n", adapter->mlmepriv.ChannelPlan);
  168. }
  169. static void Hal_EfuseParseXtal(PADAPTER adapter, u8 *map, u8 mapvalid)
  170. {
  171. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  172. if ((_TRUE == mapvalid) && map[EEPROM_XTAL_8821C] != 0xFF)
  173. hal->crystal_cap = map[EEPROM_XTAL_8821C];
  174. else
  175. hal->crystal_cap = EEPROM_Default_CrystalCap;
  176. RTW_INFO("EEPROM crystal_cap=0x%02x\n", hal->crystal_cap);
  177. }
  178. static void Hal_EfuseParseThermalMeter(PADAPTER adapter, u8 *map, u8 mapvalid)
  179. {
  180. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  181. /* ThermalMeter from EEPROM */
  182. if ((_TRUE == mapvalid) && (map[EEPROM_THERMAL_METER_8821C] != 0xFF))
  183. hal->eeprom_thermal_meter = map[EEPROM_THERMAL_METER_8821C];
  184. else {
  185. hal->eeprom_thermal_meter = EEPROM_Default_ThermalMeter;
  186. hal->odmpriv.rf_calibrate_info.is_apk_thermal_meter_ignore = _TRUE;
  187. }
  188. RTW_INFO("EEPROM ThermalMeter=0x%02x\n", hal->eeprom_thermal_meter);
  189. }
  190. static void Hal_EfuseParseAntennaDiversity(PADAPTER adapter, u8 *map, u8 mapvalid)
  191. {
  192. #ifdef CONFIG_ANTENNA_DIVERSITY
  193. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  194. struct registry_priv *registry_par = &adapter->registrypriv;
  195. if (hal->EEPROMBluetoothAntNum == Ant_x1)
  196. hal->AntDivCfg = 0;
  197. else {
  198. if (registry_par->antdiv_cfg == 2)/* 0:OFF , 1:ON, 2:By EFUSE */
  199. hal->AntDivCfg = (map[EEPROM_RF_BOARD_OPTION_8821C] & BIT3) ? _TRUE : _FALSE;
  200. else
  201. hal->AntDivCfg = registry_par->antdiv_cfg;
  202. }
  203. /*hal->TRxAntDivType = S0S1_TRX_HW_ANTDIV;*/
  204. hal->with_extenal_ant_switch = ((map[EEPROM_RF_BT_SETTING_8821C] & BIT7) >> 7);
  205. RTW_INFO("EEPROM AntDivCfg=%d, AntDivType=%d, extenal_ant_switch:%d\n",
  206. __func__, hal->AntDivCfg, hal->TRxAntDivType, hal->with_extenal_ant_switch);
  207. #endif /* CONFIG_ANTENNA_DIVERSITY */
  208. }
  209. static void Hal_EfuseTxBBSwing(PADAPTER adapter, u8 *map, u8 mapvalid)
  210. {
  211. PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
  212. if (_TRUE == mapvalid) {
  213. hal_data->tx_bbswing_24G = map[EEPROM_TX_BBSWING_2G_8821C];
  214. if (0xFF == hal_data->tx_bbswing_24G)
  215. hal_data->tx_bbswing_24G = 0;
  216. hal_data->tx_bbswing_5G = map[EEPROM_TX_BBSWING_5G_8821C];
  217. if (0xFF == hal_data->tx_bbswing_5G)
  218. hal_data->tx_bbswing_5G = 0;
  219. } else {
  220. hal_data->tx_bbswing_24G = 0;
  221. hal_data->tx_bbswing_5G = 0;
  222. }
  223. RTW_INFO("EEPROM tx_bbswing_24G =0x%02x\n", hal_data->tx_bbswing_24G);
  224. RTW_INFO("EEPROM tx_bbswing_5G =0x%02x\n", hal_data->tx_bbswing_5G);
  225. }
  226. static void Hal_EfuseParseCustomerID(PADAPTER adapter, u8 *map, u8 mapvalid)
  227. {
  228. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  229. if (_TRUE == mapvalid)
  230. hal->EEPROMCustomerID = map[EEPROM_CUSTOMER_ID_8821C];
  231. else
  232. hal->EEPROMCustomerID = 0;
  233. RTW_INFO("EEPROM Customer ID=0x%02x\n", hal->EEPROMCustomerID);
  234. }
  235. static void Hal_DetectWoWMode(PADAPTER adapter)
  236. {
  237. #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  238. adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _TRUE;
  239. #else /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
  240. adapter_to_pwrctl(adapter)->bSupportRemoteWakeup = _FALSE;
  241. #endif /* !(CONFIG_WOWLAN || CONFIG_AP_WOWLAN) */
  242. RTW_INFO("EEPROM SupportRemoteWakeup=%d\n", adapter_to_pwrctl(adapter)->bSupportRemoteWakeup);
  243. }
  244. static void hal_ReadPAType(PADAPTER adapter, u8 *map, u8 mapvalid)
  245. {
  246. PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
  247. if (mapvalid) {
  248. /* AUTO - Get INFO from eFuse*/
  249. if (GetRegAmplifierType2G(adapter) == 0) {
  250. switch (hal_data->rfe_type) {
  251. default:
  252. hal_data->PAType_2G = 0;
  253. hal_data->LNAType_2G = 0;
  254. hal_data->ExternalPA_2G = 0;
  255. hal_data->ExternalLNA_2G = 0;
  256. break;
  257. }
  258. } else {
  259. hal_data->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
  260. hal_data->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
  261. }
  262. /* AUTO */
  263. if (GetRegAmplifierType5G(adapter) == 0) {
  264. switch (hal_data->rfe_type) {
  265. default:
  266. hal_data->PAType_5G = 0;
  267. hal_data->LNAType_5G = 0;
  268. hal_data->external_pa_5g = 0;
  269. hal_data->external_lna_5g = 0;
  270. break;
  271. }
  272. } else {
  273. hal_data->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
  274. hal_data->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
  275. }
  276. } else {
  277. /*Get INFO from registry*/
  278. hal_data->ExternalPA_2G = EEPROM_Default_PAType;
  279. hal_data->external_pa_5g = 0xFF;
  280. hal_data->ExternalLNA_2G = EEPROM_Default_LNAType;
  281. hal_data->external_lna_5g = 0xFF;
  282. if (GetRegAmplifierType2G(adapter) == 0) {
  283. hal_data->ExternalPA_2G = 0;
  284. hal_data->ExternalLNA_2G = 0;
  285. } else {
  286. hal_data->ExternalPA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_PA) ? 1 : 0;
  287. hal_data->ExternalLNA_2G = (GetRegAmplifierType2G(adapter) & ODM_BOARD_EXT_LNA) ? 1 : 0;
  288. }
  289. if (GetRegAmplifierType5G(adapter) == 0) {
  290. hal_data->external_pa_5g = 0;
  291. hal_data->external_lna_5g = 0;
  292. } else {
  293. hal_data->external_pa_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_PA_5G) ? 1 : 0;
  294. hal_data->external_lna_5g = (GetRegAmplifierType5G(adapter) & ODM_BOARD_EXT_LNA_5G) ? 1 : 0;
  295. }
  296. }
  297. RTW_INFO("EEPROM PAType_2G is 0x%x, ExternalPA_2G = %d\n", hal_data->PAType_2G, hal_data->ExternalPA_2G);
  298. RTW_INFO("EEPROM PAType_5G is 0x%x, external_pa_5g = %d\n", hal_data->PAType_5G, hal_data->external_pa_5g);
  299. RTW_INFO("EEPROM LNAType_2G is 0x%x, ExternalLNA_2G = %d\n", hal_data->LNAType_2G, hal_data->ExternalLNA_2G);
  300. RTW_INFO("EEPROM LNAType_5G is 0x%x, external_lna_5g = %d\n", hal_data->LNAType_5G, hal_data->external_lna_5g);
  301. }
  302. static void Hal_ReadAmplifierType(PADAPTER adapter, u8 *map, u8 mapvalid)
  303. {
  304. PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
  305. if (hal_data->rfe_type < 8) { /*According to RF-EFUSE DOC : R15]*/
  306. RTW_INFO("WIFI Module is iPA/iLNA\n");
  307. return;
  308. }
  309. hal_ReadPAType(adapter, map, mapvalid);
  310. /* [2.4G] extPA */
  311. hal_data->TypeGPA = hal_data->PAType_2G;
  312. /* [5G] extPA */
  313. hal_data->TypeAPA = hal_data->PAType_5G;
  314. /* [2.4G] extLNA */
  315. hal_data->TypeGLNA = hal_data->LNAType_2G;
  316. /* [5G] extLNA */
  317. hal_data->TypeALNA = hal_data->LNAType_5G;
  318. RTW_INFO("EEPROM TypeGPA = 0x%X\n", hal_data->TypeGPA);
  319. RTW_INFO("EEPROM TypeAPA = 0x%X\n", hal_data->TypeAPA);
  320. RTW_INFO("EEPROM TypeGLNA = 0x%X\n", hal_data->TypeGLNA);
  321. RTW_INFO("EEPROM TypeALNA = 0x%X\n", hal_data->TypeALNA);
  322. }
  323. static void Hal_ReadRFEType(PADAPTER adapter, u8 *map, u8 mapvalid)
  324. {
  325. /* [20160-06-22 -R15]
  326. Type 0 - (2-Ant, DPDT), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  327. Type 1 - (1-Ant, SPDT@Ant1), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  328. Type 2 -(1-Ant, SPDT@Ant1) , (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  329. Type 3 - (1-Ant, DPDT@Ant2), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  330. Type 4 - (1-Ant, DPDT@Ant2), (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  331. Type 5 - (2-Ant), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  332. Type 6 - (2-Ant), (2G_WLG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  333. Type 7 - (1-Ant), (2G_BTG, iPA, iLNA, iSW), (5G, iPA, iLNA, iSW)
  334. */
  335. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  336. /* check registry valye */
  337. if (GetRegRFEType(adapter) != CONFIG_RTW_RFE_TYPE) {
  338. hal->rfe_type = GetRegRFEType(adapter);
  339. goto exit;
  340. }
  341. if (mapvalid) {
  342. /* check efuse map */
  343. hal->rfe_type = map[EEPROM_RFE_OPTION_8821C];
  344. if (0xFF != hal->rfe_type)
  345. goto exit;
  346. }
  347. /* error handle */
  348. hal->rfe_type = 0;
  349. RTW_ERR("please pg efuse or change RFE_Type of registrypriv!!\n");
  350. exit:
  351. RTW_INFO("EEPROM rfe_type=0x%x\n", hal->rfe_type);
  352. }
  353. static void Hal_EfuseParsePackageType(PADAPTER adapter, u8 *map, u8 mapvalid)
  354. {
  355. }
  356. #ifdef CONFIG_USB_HCI
  357. static void Hal_ReadUsbModeSwitch(PADAPTER adapter, u8 *map, u8 mapvalid)
  358. {
  359. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  360. if (_TRUE == mapvalid)
  361. /* check efuse 0x06 bit7 */
  362. hal->EEPROMUsbSwitch = (map[EEPROM_USB_MODE_8821CU] & BIT7) >> 7;
  363. else
  364. hal->EEPROMUsbSwitch = _FALSE;
  365. RTW_INFO("EEPROM USB Switch=%d\n", hal->EEPROMUsbSwitch);
  366. }
  367. #endif /* CONFIG_USB_HCI */
  368. /*
  369. * Description:
  370. * Collect all information from efuse or files.
  371. * This function will do
  372. * 1. Read registers to check hardware efuse available or not
  373. * 2. Read Efuse/EEPROM
  374. * 3. Read file if necessary
  375. * 4. Parsing Efuse data
  376. */
  377. u8 rtl8821c_read_efuse(PADAPTER adapter)
  378. {
  379. PHAL_DATA_TYPE hal;
  380. u8 val8;
  381. u8 *efuse_map = NULL;
  382. u8 valid;
  383. hal = GET_HAL_DATA(adapter);
  384. efuse_map = hal->efuse_eeprom_data;
  385. #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
  386. hal_read_mac_hidden_rpt(adapter);
  387. #endif
  388. /* 1. Read registers to check hardware eFuse available or not */
  389. val8 = rtw_read8(adapter, REG_SYS_EEPROM_CTRL_8821C);
  390. hal->bautoload_fail_flag = (val8 & BIT_AUTOLOAD_SUS_8821C) ? _FALSE : _TRUE;
  391. /*
  392. * In 8821C, bautoload_fail_flag is used to present eFuse map is valid
  393. * or not, no matter the map comes from hardware or files.
  394. */
  395. /* 2. Read eFuse */
  396. EFUSE_ShadowMapUpdate(adapter, EFUSE_WIFI, 0);
  397. /* 3. Read Efuse file if necessary */
  398. #ifdef CONFIG_EFUSE_CONFIG_FILE
  399. if (check_phy_efuse_tx_power_info_valid(adapter) == _FALSE)
  400. if (Hal_readPGDataFromConfigFile(adapter) != _SUCCESS)
  401. RTW_INFO("%s: <WARN> invalid phy efuse and read from file fail, will use driver default!!\n", __FUNCTION__);
  402. #endif /* CONFIG_EFUSE_CONFIG_FILE */
  403. /* 4. Parse Efuse data */
  404. valid = Hal_EfuseParseIDCode(adapter, efuse_map);
  405. if (_TRUE == valid)
  406. hal->bautoload_fail_flag = _FALSE;
  407. else
  408. hal->bautoload_fail_flag = _TRUE;
  409. Hal_EfuseParseEEPROMVer(adapter, efuse_map, valid);
  410. hal_config_macaddr(adapter, hal->bautoload_fail_flag);
  411. Hal_EfuseParseTxPowerInfo(adapter, efuse_map, valid);
  412. Hal_EfuseParseBoardType(adapter, efuse_map, valid);
  413. Hal_EfuseParseBTCoexistInfo(adapter, efuse_map, valid);
  414. Hal_EfuseParseChnlPlan(adapter, efuse_map, hal->bautoload_fail_flag);
  415. Hal_EfuseParseXtal(adapter, efuse_map, valid);
  416. Hal_EfuseParseThermalMeter(adapter, efuse_map, valid);
  417. Hal_EfuseParseAntennaDiversity(adapter, efuse_map, valid);
  418. Hal_EfuseParseCustomerID(adapter, efuse_map, valid);
  419. Hal_DetectWoWMode(adapter);
  420. Hal_ReadRFEType(adapter, efuse_map, valid);
  421. Hal_ReadAmplifierType(adapter, efuse_map, valid);
  422. Hal_EfuseTxBBSwing(adapter, efuse_map, valid);
  423. /* Data out of Efuse Map */
  424. Hal_EfuseParsePackageType(adapter, efuse_map, valid);
  425. #ifdef CONFIG_USB_HCI
  426. Hal_ReadUsbModeSwitch(adapter, efuse_map, valid);
  427. #endif /* CONFIG_USB_HCI */
  428. return _SUCCESS;
  429. }
  430. void rtl8821c_run_thread(PADAPTER adapter)
  431. {
  432. }
  433. void rtl8821c_cancel_thread(PADAPTER adapter)
  434. {
  435. }
  436. /*
  437. * Description:
  438. * Using 0x100 to check the power status of FW.
  439. */
  440. static u8 check_ips_status(PADAPTER adapter)
  441. {
  442. u8 val8;
  443. RTW_INFO(FUNC_ADPT_FMT ": Read 0x100=0x%02x 0x86=0x%02x\n",
  444. FUNC_ADPT_ARG(adapter),
  445. rtw_read8(adapter, 0x100), rtw_read8(adapter, 0x86));
  446. val8 = rtw_read8(adapter, 0x100);
  447. if (val8 == 0xEA)
  448. return _TRUE;
  449. return _FALSE;
  450. }
  451. static void update_ra_mask_8821c(_adapter *adapter, struct sta_info *psta, struct macid_cfg *h2c_macid_cfg)
  452. {
  453. u8 arg[4] = {0};
  454. arg[0] = h2c_macid_cfg->mac_id;
  455. arg[1] = h2c_macid_cfg->rate_id;
  456. arg[2] = (h2c_macid_cfg->ignore_bw << 4) | h2c_macid_cfg->short_gi;
  457. arg[3] = psta->init_rate;
  458. rtl8821c_set_FwMacIdConfig_cmd(adapter, h2c_macid_cfg->ra_mask, arg, h2c_macid_cfg->bandwidth);
  459. }
  460. static void xmit_status_check(PADAPTER p)
  461. {
  462. }
  463. static void linked_status_check(PADAPTER p)
  464. {
  465. }
  466. static const struct hw_port_reg port_cfg[] = {
  467. /*port 0*/
  468. {
  469. .net_type = (REG_CR_8821C + 2),
  470. .net_type_shift = 0,
  471. .macaddr = REG_MACID,
  472. .bssid = REG_BSSID,
  473. .bcn_ctl = REG_BCN_CTRL,
  474. .tsf_rst = REG_DUAL_TSF_RST,
  475. .tsf_rst_bit = BIT_TSFTR_RST,
  476. .bcn_space = REG_MBSSID_BCN_SPACE,
  477. .bcn_space_shift = 0,
  478. .bcn_space_mask = 0xffff,
  479. .ps_aid = REG_BCN_PSR_RPT_8821C,
  480. },
  481. /*port 1*/
  482. {
  483. .net_type = (REG_CR_8821C + 2),
  484. .net_type_shift = 2,
  485. .macaddr = REG_MACID1,
  486. .bssid = REG_BSSID1,
  487. .bcn_ctl = REG_BCN_CTRL_CLINT0,
  488. .tsf_rst = REG_DUAL_TSF_RST,
  489. .tsf_rst_bit = BIT_TSFTR_CLI0_RST,
  490. .bcn_space = REG_MBSSID_BCN_SPACE,
  491. .bcn_space_shift = 16,
  492. .bcn_space_mask = 0xfff,
  493. .ps_aid = REG_BCN_PSR_RPT1_8821C,
  494. },
  495. /*port 2*/
  496. {
  497. .net_type = REG_CR_EXT_8821C,
  498. .net_type_shift = 0,
  499. .macaddr = REG_MACID2,
  500. .bssid = REG_BSSID2,
  501. .bcn_ctl = REG_BCN_CTRL_CLINT1,
  502. .tsf_rst = REG_DUAL_TSF_RST,
  503. .tsf_rst_bit = BIT_TSFTR_CLI1_RST,
  504. .bcn_space = REG_MBSSID_BCN_SPACE2,
  505. .bcn_space_shift = 0,
  506. .bcn_space_mask = 0xfff,
  507. .ps_aid = REG_BCN_PSR_RPT2_8821C,
  508. },
  509. /*port 3*/
  510. {
  511. .net_type = REG_CR_EXT_8821C,
  512. .net_type_shift = 2,
  513. .macaddr = REG_MACID3,
  514. .bssid = REG_BSSID3,
  515. .bcn_ctl = REG_BCN_CTRL_CLINT2,
  516. .tsf_rst = REG_DUAL_TSF_RST,
  517. .tsf_rst_bit = BIT_TSFTR_CLI2_RST,
  518. .bcn_space = REG_MBSSID_BCN_SPACE2,
  519. .bcn_space_shift = 16,
  520. .bcn_space_mask = 0xfff,
  521. .ps_aid = REG_BCN_PSR_RPT3_8821C,
  522. },
  523. /*port 4*/
  524. {
  525. .net_type = REG_CR_EXT_8821C,
  526. .net_type_shift = 4,
  527. .macaddr = REG_MACID4,
  528. .bssid = REG_BSSID4,
  529. .bcn_ctl = REG_BCN_CTRL_CLINT3,
  530. .tsf_rst = REG_DUAL_TSF_RST,
  531. .tsf_rst_bit = BIT_TSFTR_CLI3_RST,
  532. .bcn_space = REG_MBSSID_BCN_SPACE3,
  533. .bcn_space_shift = 0,
  534. .bcn_space_mask = 0xfff,
  535. .ps_aid = REG_BCN_PSR_RPT4_8821C,
  536. },
  537. };
  538. static void hw_bcn_ctrl_set(_adapter *adapter, u8 bcn_ctl_val)
  539. {
  540. u8 hw_port = get_hw_port(adapter);
  541. u32 bcn_ctl_addr = 0;
  542. if (hw_port >= MAX_HW_PORT) {
  543. RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
  544. rtw_warn_on(1);
  545. return;
  546. }
  547. bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
  548. rtw_write8(adapter, bcn_ctl_addr, bcn_ctl_val);
  549. }
  550. static void hw_bcn_ctrl_add(_adapter *adapter, u8 bcn_ctl_val)
  551. {
  552. u8 hw_port = get_hw_port(adapter);
  553. u32 bcn_ctl_addr = 0;
  554. u8 val8 = 0;
  555. if (hw_port >= MAX_HW_PORT) {
  556. RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
  557. rtw_warn_on(1);
  558. return;
  559. }
  560. bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
  561. val8 = rtw_read8(adapter, bcn_ctl_addr) | bcn_ctl_val;
  562. rtw_write8(adapter, bcn_ctl_addr, val8);
  563. }
  564. static void hw_bcn_ctrl_clr(_adapter *adapter, u8 bcn_ctl_val)
  565. {
  566. u8 hw_port = get_hw_port(adapter);
  567. u32 bcn_ctl_addr = 0;
  568. u8 val8 = 0;
  569. if (hw_port >= MAX_HW_PORT) {
  570. RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
  571. rtw_warn_on(1);
  572. return;
  573. }
  574. bcn_ctl_addr = port_cfg[hw_port].bcn_ctl;
  575. val8 = rtw_read8(adapter, bcn_ctl_addr);
  576. val8 &= ~bcn_ctl_val;
  577. rtw_write8(adapter, bcn_ctl_addr, val8);
  578. }
  579. static void hw_bcn_func(_adapter *adapter, u8 enable)
  580. {
  581. if (enable)
  582. hw_bcn_ctrl_add(adapter, BIT_EN_BCN_FUNCTION);
  583. else
  584. hw_bcn_ctrl_clr(adapter, BIT_EN_BCN_FUNCTION);
  585. }
  586. static void hw_bcn_ctrl_tsf(_adapter *adapter, u8 tsf_udt)
  587. {
  588. if (tsf_udt)
  589. hw_bcn_ctrl_clr(adapter, BIT_DIS_TSF_UDT);
  590. else
  591. hw_bcn_ctrl_add(adapter, BIT_DIS_TSF_UDT);
  592. }
  593. void hw_port0_tsf_sync_sel(_adapter *adapter, u8 hw_port, u8 benable, u16 tr_offset)
  594. {
  595. u8 val8;
  596. u8 client_id = 0;
  597. if (adapter->tsf.sync_port != MAX_HW_PORT)
  598. return;
  599. if (benable && hw_port == HW_PORT0) {
  600. RTW_ERR(FUNC_ADPT_FMT ": hw_port is port0 under enable\n", FUNC_ADPT_ARG(adapter));
  601. rtw_warn_on(1);
  602. return;
  603. }
  604. /*Disable Port0's beacon function*/
  605. hw_bcn_func(adapter, _FALSE);
  606. /*Reg 0x518[15:0]: TSFTR_SYN_OFFSET*/
  607. if (tr_offset)
  608. rtw_write16(adapter, REG_TSFTR_SYN_OFFSET, tr_offset);
  609. /*reg 0x577[6]=1*/ /*auto sync by tbtt*/
  610. rtw_write8(adapter, REG_MISC_CTRL, rtw_read8(adapter, REG_MISC_CTRL) | BIT(6));
  611. if (HW_PORT1 == hw_port)
  612. client_id = 0;
  613. else if (HW_PORT2 == hw_port)
  614. client_id = 1;
  615. else if (HW_PORT3 == hw_port)
  616. client_id = 2;
  617. else if (HW_PORT4 == hw_port)
  618. client_id = 3;
  619. /*0x5B4 [6:4] :SYNC_CLI_SEL - The selector for the CLINT port of sync tsft source for port 0*/
  620. /* Bit[5:4] : 0 for clint0, 1 for clint1, 2 for clint2, 3 for clint3.
  621. Bit6 : 1= enable sync to port 0. 0=disable sync to port 0.*/
  622. val8 = rtw_read8(adapter, REG_TIMER0_SRC_SEL);
  623. if (benable) {
  624. val8 &= 0x8F;
  625. val8 |= (BIT(6) | (client_id << 4));
  626. } else {
  627. val8 &= ~BIT(6);
  628. }
  629. rtw_write8(adapter, REG_TIMER0_SRC_SEL, val8);
  630. /*Enable Port0's beacon function*/
  631. hw_bcn_func(adapter, _TRUE);
  632. adapter->tsf.sync_port = hw_port;
  633. adapter->tsf.offset = tr_offset;
  634. }
  635. void hw_port0_tsf_sync(_adapter *adapter)
  636. {
  637. rtw_write8(adapter, REG_SCHEDULER_RST, rtw_read8(adapter, REG_SCHEDULER_RST) | BIT_SYNC_CLI);
  638. }
  639. void get_tsf_by_port(_adapter *adapter, u8 *tsftr, u8 hw_port)
  640. {
  641. u8 i;
  642. u8 val8 = 0;
  643. if (hw_port >= MAX_HW_PORT) {
  644. RTW_ERR("%s hw port(%d) invalid\n", __func__, hw_port);
  645. return;
  646. }
  647. /*0x554[30:28] -BIT_BCN_TIMER_SEL_FWRD*/
  648. val8 = rtw_read8(adapter, REG_MBSSID_BCN_SPACE + 3);
  649. val8 &= 0x8F;
  650. val8 |= hw_port << 4;
  651. rtw_write8(adapter, REG_MBSSID_BCN_SPACE + 3, val8);
  652. for (i = 0; i < 8; i++)
  653. tsftr[i] = rtw_read8(adapter, REG_TSFTR+i);
  654. }
  655. void hw_get_tsftr(_adapter *adapter, u8 *tsftr)
  656. {
  657. if (!tsftr) {
  658. RTW_ERR("%s tsftr is NULL\n", __func__);
  659. return;
  660. }
  661. get_tsf_by_port(adapter, tsftr, adapter->hw_port);
  662. }
  663. void hw_tsf_reset(_adapter *adapter)
  664. {
  665. u8 hw_port = get_hw_port(adapter);
  666. u32 tsf_rst_addr = 0;
  667. u8 tsf_rst_bit = 0;
  668. if (hw_port >= MAX_HW_PORT) {
  669. RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
  670. rtw_warn_on(1);
  671. return;
  672. }
  673. tsf_rst_addr = port_cfg[hw_port].tsf_rst;
  674. tsf_rst_bit = port_cfg[hw_port].tsf_rst_bit;
  675. rtw_write8(adapter, tsf_rst_addr, tsf_rst_bit);
  676. }
  677. #ifdef CONFIG_TSF_RESET_OFFLOAD
  678. static int reset_tsf(PADAPTER adapter, u8 reset_port)
  679. {
  680. u8 reset_cnt_before = 0, reset_cnt_after = 0, loop_cnt = 0;
  681. u32 reg_reset_tsf_cnt = (HW_PORT0 == reset_port) ?
  682. REG_FW_RESET_TSF_CNT_0 : REG_FW_RESET_TSF_CNT_1;
  683. /* site survey will cause reset_tsf fail */
  684. rtw_mi_buddy_scan_abort(adapter, _FALSE);
  685. reset_cnt_after = reset_cnt_before = rtw_read8(adapter, reg_reset_tsf_cnt);
  686. rtl8821c_reset_tsf(adapter, reset_port);
  687. while ((reset_cnt_after == reset_cnt_before) && (loop_cnt < 10)) {
  688. rtw_msleep_os(100);
  689. loop_cnt++;
  690. reset_cnt_after = rtw_read8(adapter, reg_reset_tsf_cnt);
  691. }
  692. return (loop_cnt >= 10) ? _FAIL : _TRUE;
  693. }
  694. #endif /* CONFIG_TSF_RESET_OFFLOAD */
  695. static void hw_var_set_macaddr(PADAPTER adapter, u8 *val)
  696. {
  697. if (!val) {
  698. RTW_INFO(ADPT_FMT "set mac address(NULL) failed\n", ADPT_ARG(adapter));
  699. rtw_warn_on(1);
  700. }
  701. rtw_halmac_set_mac_address(adapter_to_dvobj(adapter), adapter->hw_port, val);
  702. }
  703. static void hw_var_set_bssid(PADAPTER adapter, u8 *val)
  704. {
  705. if (!val) {
  706. RTW_INFO(ADPT_FMT "set bssid (NULL) failed\n", ADPT_ARG(adapter));
  707. rtw_warn_on(1);
  708. }
  709. rtw_halmac_set_bssid(adapter_to_dvobj(adapter), adapter->hw_port, val);
  710. }
  711. static void hw_var_set_monitor(PADAPTER Adapter, u8 *val)
  712. {
  713. u32 rcr_bits;
  714. u8 mode;
  715. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
  716. struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv);
  717. mode = *((u8 *)val);
  718. if (mode != _HW_STATE_MONITOR_) {
  719. RTW_ERR(FUNC_ADPT_FMT" mode(0x%02x) invalid\n", FUNC_ADPT_ARG(Adapter), mode);
  720. return;
  721. }
  722. /* Receive all type */
  723. rcr_bits = RCR_AAP | RCR_APM | RCR_AM | RCR_AB | RCR_APWRMGT | RCR_ADF | RCR_ACF | RCR_AMF | RCR_APP_PHYST_RXFF;
  724. #ifdef CONFIG_RX_PACKET_APPEND_FCS
  725. /* Append FCS */
  726. rcr_bits |= RCR_APPFCS;
  727. #endif
  728. #ifdef CONFIG_RX_PACKET_APPEND_CRC
  729. /*CRC and ICV packet will drop in rx func*/
  730. rcr_bits |= (RCR_ACRC32 | RCR_AICV);
  731. #endif
  732. rtl8821c_rcr_config(Adapter, rcr_bits);
  733. /* Receive all data frames */
  734. rtw_write16(Adapter, REG_RXFLTMAP_8821C, 0xFFFF);
  735. #if 0
  736. /* tx pause */
  737. rtw_write8(padapter, REG_TXPAUSE, 0xFF);
  738. #endif
  739. }
  740. static void hw_var_set_opmode(PADAPTER Adapter, u8 *val)
  741. {
  742. u8 mode = *((u8 *)val);
  743. static u8 isMonitor = _FALSE;
  744. HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
  745. if (isMonitor == _TRUE) {
  746. /* reset RCR */
  747. rtl8821c_rcr_config(Adapter, pHalData->ReceiveConfig);
  748. isMonitor = _FALSE;
  749. }
  750. if (mode == _HW_STATE_MONITOR_) {
  751. isMonitor = _TRUE;
  752. /* set net_type */
  753. Set_MSR(Adapter, _HW_STATE_NOLINK_);
  754. hw_var_set_monitor(Adapter, val);
  755. return;
  756. }
  757. Adapter->tsf.sync_port = MAX_HW_PORT;
  758. Adapter->tsf.offset = 0;
  759. rtw_hal_set_hwreg(Adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(Adapter)); /* set mac addr to mac register */
  760. RTW_INFO(ADPT_FMT ": hw_port(%d) set mode=%d\n", ADPT_ARG(Adapter), get_hw_port(Adapter), mode);
  761. #ifdef CONFIG_MI_WITH_MBSSID_CAM /*For Port0 - MBSS CAM*/
  762. if (Adapter->hw_port != HW_PORT0) {
  763. RTW_ERR(ADPT_FMT ": Configure MBSSID cam on HW_PORT%d\n", ADPT_ARG(Adapter), Adapter->hw_port);
  764. rtw_warn_on(1);
  765. } else
  766. hw_var_set_opmode_mbid(Adapter, mode);
  767. #else
  768. /* set net_type */
  769. Set_MSR(Adapter, mode);
  770. if ((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) {
  771. #ifdef CONFIG_CONCURRENT_MODE
  772. if (!rtw_mi_check_status(Adapter, MI_AP_MODE))
  773. #endif
  774. #ifdef CONFIG_INTERRUPT_BASED_TXBCN
  775. #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
  776. rtw_write8(Adapter, REG_DRVERLYINT, 0x05);/* restore early int time to 5ms */
  777. #if defined(CONFIG_SDIO_HCI)
  778. rtl8821cs_update_interrupt_mask(Adapter, 0, SDIO_HIMR_BCNERLY_INT_MSK);
  779. #endif
  780. #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
  781. #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
  782. #if defined(CONFIG_SDIO_HCI)
  783. rtl8821cs_update_interrupt_mask(Adapter, 0, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK));
  784. #endif
  785. #endif /* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */
  786. #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
  787. StopTxBeacon(Adapter);
  788. hw_bcn_ctrl_set(Adapter, BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
  789. } else if ((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) {
  790. ResumeTxBeacon(Adapter);
  791. hw_bcn_ctrl_set(Adapter, BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
  792. } else if (mode == _HW_STATE_AP_) {
  793. if (Adapter->hw_port == HW_PORT0) {
  794. #ifdef CONFIG_INTERRUPT_BASED_TXBCN
  795. #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
  796. #if defined(CONFIG_SDIO_HCI)
  797. rtl8821cs_update_interrupt_mask(Adapter, SDIO_HIMR_BCNERLY_INT_MSK, 0);
  798. #endif
  799. #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
  800. #ifdef CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR
  801. #if defined(CONFIG_SDIO_HCI)
  802. rtl8821cs_update_interrupt_mask(Adapter, (SDIO_HIMR_TXBCNOK_MSK | SDIO_HIMR_TXBCNERR_MSK), 0);
  803. #endif
  804. #endif/* CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR */
  805. #endif /* CONFIG_INTERRUPT_BASED_TXBCN */
  806. ResumeTxBeacon(Adapter);
  807. rtl8821c_rcr_clear(Adapter, RCR_CBSSID_DATA);/* Clear CBSSID_DATA */
  808. /* for 11n Logo 4.2.31/4.2.32, disable BSSID BCN check for AP mode */
  809. if (Adapter->registrypriv.wifi_spec)
  810. rtl8821c_rcr_clear(Adapter, RCR_CBSSID_BCN);
  811. /* enable to rx data frame */
  812. rtw_write16(Adapter, REG_RXFLTMAP_8821C, 0xFFFF);
  813. /* Beacon Control related register for first time */
  814. rtw_write8(Adapter, REG_BCNDMATIM_8821C, 0x02); /* 2ms */
  815. rtw_write8(Adapter, REG_ATIMWND_8821C, 0x0a); /* 10ms */
  816. rtw_write16(Adapter, REG_BCNTCFG_8821C, 0x00);
  817. rtw_write16(Adapter, REG_TBTT_PROHIBIT_8821C, 0xff04);
  818. /*rtw_write16(Adapter, REG_TSFTR_SYN_OFFSET_8821C, 0x7fff);*//* +32767 (~32ms) */
  819. hw_tsf_reset(Adapter);
  820. /* don't enable update TSF0 for if1 (due to TSF update when beacon/probe rsp are received) */
  821. #if defined(CONFIG_INTERRUPT_BASED_TXBCN_BCN_OK_ERR)
  822. hw_bcn_ctrl_set(Adapter, BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C | BIT_P0_EN_TXBCN_RPT_8821C);
  823. #else
  824. hw_bcn_ctrl_set(Adapter, BIT_EN_BCN_FUNCTION_8821C | BIT_DIS_TSF_UDT_8821C);
  825. #endif
  826. /*TODO hw_port0_tsf_sync_sel must modify for multi-interface && multi-port*/
  827. if (rtw_mi_buddy_check_fwstate(Adapter, (WIFI_STATION_STATE | WIFI_ASOC_STATE)))
  828. hw_port0_tsf_sync_sel(Adapter, HW_PORT1, _TRUE, 0x32);/* About offset = 50ms*/
  829. } else {
  830. RTW_ERR(ADPT_FMT ": set AP mode on HW_PORT%d\n", ADPT_ARG(Adapter), Adapter->hw_port);
  831. rtw_warn_on(1);
  832. }
  833. }
  834. #endif
  835. }
  836. #ifdef CONFIG_AP_PORT_SWAP
  837. void rtw_hal_port_reconfig(_adapter *adapter, u8 port)
  838. {
  839. struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
  840. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  841. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  842. u32 bssid_offset = 0;
  843. u8 bssid[6] = {0};
  844. u8 vnet_type = 0;
  845. u8 vbcn_ctrl = 0;
  846. u8 i;
  847. if (port > (hal_spec->port_num - 1)) {
  848. RTW_INFO("[WARN] "ADPT_FMT"- hw_port : %d,will switch to invalid port-%d\n",
  849. ADPT_ARG(adapter), adapter->hw_port, port);
  850. rtw_warn_on(1);
  851. }
  852. RTW_PRINT(ADPT_FMT" - hw_port : %d,will switch to port-%d\n",
  853. ADPT_ARG(adapter), adapter->hw_port, port);
  854. /*backup*/
  855. vnet_type = (rtw_read8(adapter, port_cfg[adapter->hw_port].net_type) >> port_cfg[adapter->hw_port].net_type_shift) & 0x03;
  856. vbcn_ctrl = rtw_read8(adapter, port_cfg[adapter->hw_port].bcn_ctl);
  857. if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)) {
  858. RTW_INFO("port0-iface is STA mode and linked\n");
  859. bssid_offset = port_cfg[adapter->hw_port].bssid;
  860. for (i = 0; i < 6; i++)
  861. bssid[i] = rtw_read8(adapter, bssid_offset + i);
  862. }
  863. /*reconfigure*/
  864. adapter->hw_port = port;
  865. hw_var_set_macaddr(adapter, adapter_mac_addr(adapter));
  866. Set_MSR(adapter, vnet_type);
  867. if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)) {
  868. hw_var_set_bssid(adapter, bssid);
  869. hw_tsf_reset(adapter);
  870. }
  871. rtw_write8(adapter, port_cfg[adapter->hw_port].bcn_ctl, vbcn_ctrl);
  872. }
  873. static void rtl8821c_ap_port_switch(_adapter *adapter, u8 mode)
  874. {
  875. u8 hw_port = get_hw_port(adapter);
  876. struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
  877. u8 ap_nums = 0;
  878. _adapter *if_port0 = NULL;
  879. int i;
  880. RTW_INFO(ADPT_FMT ": hw_port(%d) will set mode to %d\n", ADPT_ARG(adapter), hw_port, mode);
  881. #if 0
  882. #ifdef CONFIG_P2P
  883. if (!rtw_p2p_chk_state(&adapter->wdinfo, P2P_STATE_NONE)) {
  884. RTW_INFO("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__,
  885. rtw_p2p_role(&adapter->wdinfo), rtw_p2p_state(&adapter->wdinfo), rtw_p2p_pre_state(&adapter->wdinfo));
  886. }
  887. #endif
  888. #endif
  889. if (mode != _HW_STATE_AP_)
  890. return;
  891. if ((mode == _HW_STATE_AP_) && (hw_port == HW_PORT0))
  892. return;
  893. /*check and prepare switch port to port0 for AP mode's BCN function*/
  894. ap_nums = rtw_mi_get_ap_num(adapter);
  895. if (ap_nums > 0) {
  896. RTW_ERR("SortAP mode numbers:%d, must move setting to MBSSID CAM, not support yet\n", ap_nums);
  897. rtw_warn_on(1);
  898. return;
  899. }
  900. /*Get iface of port-0*/
  901. for (i = 0; i < dvobj->iface_nums; i++) {
  902. if (get_hw_port(dvobj->padapters[i]) == HW_PORT0) {
  903. if_port0 = dvobj->padapters[i];
  904. break;
  905. }
  906. }
  907. if (if_port0 == NULL) {
  908. RTW_ERR("%s if_port0 == NULL\n", __func__);
  909. rtw_warn_on(1);
  910. return;
  911. }
  912. rtw_hal_port_reconfig(if_port0, hw_port);
  913. adapter->hw_port = HW_PORT0;
  914. RTW_INFO(ADPT_FMT ": Cfg SoftAP mode to hw_port(%d) done\n", ADPT_ARG(adapter), adapter->hw_port);
  915. }
  916. #endif
  917. static void hw_var_set_basic_rate(PADAPTER adapter, u8 *ratetbl)
  918. {
  919. #define RATE_1M BIT(0)
  920. #define RATE_2M BIT(1)
  921. #define RATE_5_5M BIT(2)
  922. #define RATE_11M BIT(3)
  923. #define RATE_6M BIT(4)
  924. #define RATE_9M BIT(5)
  925. #define RATE_12M BIT(6)
  926. #define RATE_18M BIT(7)
  927. #define RATE_24M BIT(8)
  928. #define RATE_36M BIT(9)
  929. #define RATE_48M BIT(10)
  930. #define RATE_54M BIT(11)
  931. #define RATE_MCS0 BIT(12)
  932. #define RATE_MCS1 BIT(13)
  933. #define RATE_MCS2 BIT(14)
  934. #define RATE_MCS3 BIT(15)
  935. #define RATE_MCS4 BIT(16)
  936. #define RATE_MCS5 BIT(17)
  937. #define RATE_MCS6 BIT(18)
  938. #define RATE_MCS7 BIT(19)
  939. #define RATES_CCK (RATE_11M | RATE_5_5M | RATE_2M | RATE_1M)
  940. #define RATES_OFDM (RATE_54M | RATE_48M | RATE_36M | RATE_24M | RATE_18M | RATE_12M | RATE_9M | RATE_6M)
  941. struct mlme_ext_info *mlmext_info = &adapter->mlmeextpriv.mlmext_info;
  942. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  943. u16 input_b = 0, masked = 0, ioted = 0, BrateCfg = 0;
  944. u16 rrsr_2g_force_mask = RATES_CCK;
  945. u16 rrsr_2g_allow_mask = RATE_24M | RATE_12M | RATE_6M | RATES_CCK;
  946. u16 rrsr_5g_force_mask = RATE_6M;
  947. u16 rrsr_5g_allow_mask = RATES_OFDM;
  948. u32 val32;
  949. HalSetBrateCfg(adapter, ratetbl, &BrateCfg);
  950. input_b = BrateCfg;
  951. /* apply force and allow mask */
  952. if (hal->current_band_type == BAND_ON_2_4G) {
  953. BrateCfg |= rrsr_2g_force_mask;
  954. BrateCfg &= rrsr_2g_allow_mask;
  955. } else {
  956. BrateCfg |= rrsr_5g_force_mask;
  957. BrateCfg &= rrsr_5g_allow_mask;
  958. }
  959. masked = BrateCfg;
  960. /* IOT consideration */
  961. if (mlmext_info->assoc_AP_vendor == HT_IOT_PEER_CISCO) {
  962. /* if peer is cisco and didn't use ofdm rate, we enable 6M ack */
  963. if ((BrateCfg & (RATE_24M | RATE_12M | RATE_6M)) == 0)
  964. BrateCfg |= RATE_6M;
  965. }
  966. ioted = BrateCfg;
  967. hal->BasicRateSet = BrateCfg;
  968. RTW_INFO("[HW_VAR_BASIC_RATE] %#x->%#x->%#x\n", input_b, masked, ioted);
  969. /* Set RRSR rate table. */
  970. val32 = rtw_read32(adapter, REG_RRSR_8821C);
  971. val32 &= ~(BIT_MASK_RRSC_BITMAP << BIT_SHIFT_RRSC_BITMAP);
  972. val32 |= BIT_RRSC_BITMAP(BrateCfg);
  973. val32 = rtw_write32(adapter, REG_RRSR_8821C, val32);
  974. }
  975. static void hw_var_set_bcn_func(PADAPTER adapter, u8 enable)
  976. {
  977. u8 val8;
  978. if (enable) {
  979. /* enable TX BCN report
  980. * Reg REG_FWHW_TXQ_CTRL_8821C[2] = 1
  981. * Reg REG_BCN_CTRL_8821C[3][5] = 1
  982. */
  983. val8 = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8821C);
  984. val8 |= BIT_EN_BCN_TRXRPT_V1_8821C;
  985. rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C, val8);
  986. if (adapter->hw_port == HW_PORT0)
  987. hw_bcn_ctrl_add(adapter, BIT_EN_BCN_FUNCTION_8821C | BIT_P0_EN_TXBCN_RPT_8821C);
  988. else
  989. hw_bcn_ctrl_add(adapter, BIT_EN_BCN_FUNCTION_8821C);
  990. } else {
  991. if (adapter->hw_port == HW_PORT0) {
  992. val8 = BIT_EN_BCN_FUNCTION_8821C | BIT_P0_EN_TXBCN_RPT_8821C;
  993. #ifdef CONFIG_BT_COEXIST
  994. /* Always enable port0 beacon function for PSTDMA */
  995. if (GET_HAL_DATA(adapter)->EEPROMBluetoothCoexist)
  996. val8 = BIT_P0_EN_TXBCN_RPT_8821C;
  997. #endif
  998. hw_bcn_ctrl_clr(adapter, val8);
  999. } else
  1000. hw_bcn_ctrl_clr(adapter, BIT_EN_BCN_FUNCTION_8821C);
  1001. }
  1002. }
  1003. static void hw_var_set_correct_tsf(PADAPTER Adapter)
  1004. {
  1005. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  1006. /*do nothing*/
  1007. #else
  1008. #if 1
  1009. /*hw_tsf_reset(Adapter);*/
  1010. #ifdef CONFIG_CONCURRENT_MODE
  1011. struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
  1012. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  1013. /* Update buddy port's TSF if it is SoftAP for beacon TX issue!*/
  1014. if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE
  1015. && rtw_mi_check_status(Adapter, MI_AP_MODE)) {
  1016. struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
  1017. int i;
  1018. _adapter *iface;
  1019. for (i = 0; i < dvobj->iface_nums; i++) {
  1020. iface = dvobj->padapters[i];
  1021. if (!iface)
  1022. continue;
  1023. if (iface == Adapter)
  1024. continue;
  1025. if ( check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE
  1026. && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE
  1027. ) {
  1028. hw_port0_tsf_sync_sel(Adapter, Adapter->hw_port, _TRUE, 0x32);/* About offset = 50ms*/
  1029. break;
  1030. }
  1031. }
  1032. } else if (((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE)
  1033. && (Adapter->hw_port == HW_PORT0))
  1034. #endif /*CONFIG_CONCURRENT_MODE*/
  1035. /* disable func of port0 TSF sync from another port*/
  1036. hw_port0_tsf_sync_sel(Adapter, Adapter->hw_port, _FALSE, 0);
  1037. #else
  1038. u64 tsf;
  1039. struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv;
  1040. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  1041. /*tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; */
  1042. tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval * 1024)) - 1024; /*us*/
  1043. if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
  1044. /*pHalData->RegTxPause |= STOP_BCNQ;BIT(6)
  1045. rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6)));*/
  1046. StopTxBeacon(Adapter);
  1047. }
  1048. rtw_hal_correct_tsf(Adapter, Adapter->hw_port, tsf);
  1049. #ifdef CONFIG_CONCURRENT_MODE
  1050. /* Update buddy port's TSF if it is SoftAP for beacon TX issue!*/
  1051. if ((pmlmeinfo->state & 0x03) == WIFI_FW_STATION_STATE
  1052. && rtw_mi_check_status(Adapter, MI_AP_MODE)) {
  1053. struct dvobj_priv *dvobj = adapter_to_dvobj(Adapter);
  1054. int i;
  1055. _adapter *iface;
  1056. for (i = 0; i < dvobj->iface_nums; i++) {
  1057. iface = dvobj->padapters[i];
  1058. if (!iface)
  1059. continue;
  1060. if (iface == Adapter)
  1061. continue;
  1062. if (check_fwstate(&iface->mlmepriv, WIFI_AP_STATE) == _TRUE
  1063. && check_fwstate(&iface->mlmepriv, WIFI_ASOC_STATE) == _TRUE
  1064. ) {
  1065. rtw_hal_correct_tsf(iface, iface->hw_port, tsf);
  1066. #ifdef CONFIG_TSF_RESET_OFFLOAD
  1067. if (reset_tsf(iface, iface->hw_port) == _FALSE)
  1068. RTW_INFO("%s-[ERROR] "ADPT_FMT" Reset port%d TSF fail\n", __func__, ADPT_ARG(iface), iface->hw_port);
  1069. #endif /* CONFIG_TSF_RESET_OFFLOAD*/
  1070. }
  1071. }
  1072. }
  1073. #endif /*CONFIG_CONCURRENT_MODE*/
  1074. if (((pmlmeinfo->state & 0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
  1075. /*pHalData->RegTxPause &= (~STOP_BCNQ);
  1076. rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6))));*/
  1077. ResumeTxBeacon(Adapter);
  1078. }
  1079. #endif
  1080. #endif/*CONFIG_MI_WITH_MBSSID_CAM*/
  1081. }
  1082. static void hw_var_set_check_bssid(PADAPTER adapter, u8 enable)
  1083. {
  1084. u32 rcr;
  1085. rcr = BIT_CBSSID_DATA_8821C | BIT_CBSSID_BCN_8821C;
  1086. if (enable)
  1087. rtl8821c_rcr_add(adapter, rcr);
  1088. else
  1089. rtl8821c_rcr_clear(adapter, rcr);
  1090. RTW_INFO("%s: [HW_VAR_CHECK_BSSID] 0x%x=0x%x\n", __FUNCTION__,
  1091. REG_RCR_8821C, rtw_read32(adapter, REG_RCR_8821C));
  1092. }
  1093. static void hw_var_set_mlme_disconnect(PADAPTER adapter)
  1094. {
  1095. u8 val8;
  1096. #ifdef CONFIG_CONCURRENT_MODE
  1097. if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
  1098. #endif
  1099. /* reject all data frames under not link state */
  1100. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0);
  1101. /* reset TSF*/
  1102. hw_tsf_reset(adapter);
  1103. /* disable update TSF*/
  1104. hw_bcn_ctrl_tsf(adapter, _FALSE);
  1105. /* disable Port's beacon function */
  1106. hw_bcn_func(adapter, _FALSE);
  1107. }
  1108. static void hw_var_set_mlme_sitesurvey(PADAPTER adapter, u8 enable)
  1109. {
  1110. struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
  1111. u32 rcr_bit;
  1112. u16 value_rxfltmap2;
  1113. u8 val8;
  1114. PHAL_DATA_TYPE hal;
  1115. struct mlme_priv *pmlmepriv;
  1116. int i;
  1117. _adapter *iface;
  1118. #ifdef DBG_IFACE_STATUS
  1119. DBG_IFACE_STATUS_DUMP(adapter);
  1120. #endif
  1121. hal = GET_HAL_DATA(adapter);
  1122. pmlmepriv = &adapter->mlmepriv;
  1123. #ifdef CONFIG_FIND_BEST_CHANNEL
  1124. rcr_bit = BIT_CBSSID_BCN_8821C | BIT_CBSSID_DATA_8821C;
  1125. /* Receive all data frames */
  1126. value_rxfltmap2 = 0xFFFF;
  1127. #else /* CONFIG_FIND_BEST_CHANNEL */
  1128. rcr_bit = BIT_CBSSID_BCN_8821C;
  1129. /* config RCR to receive different BSSID & not to receive data frame */
  1130. value_rxfltmap2 = 0;
  1131. #endif /* CONFIG_FIND_BEST_CHANNEL */
  1132. if (rtw_mi_check_fwstate(adapter, WIFI_AP_STATE))
  1133. rcr_bit = BIT_CBSSID_BCN_8821C;
  1134. #ifdef CONFIG_TDLS
  1135. /* TDLS will clear RCR_CBSSID_DATA bit for connection. */
  1136. else if (adapter->tdlsinfo.link_established == _TRUE)
  1137. rcr_bit = BIT_CBSSID_BCN_8821C;
  1138. #endif /* CONFIG_TDLS */
  1139. if (enable) {
  1140. /*
  1141. * 1. configure REG_RXFLTMAP2
  1142. * 2. disable TSF update & buddy TSF update to avoid updating wrong TSF due to clear RCR_CBSSID_BCN
  1143. * 3. config RCR to receive different BSSID BCN or probe rsp
  1144. */
  1145. rtw_write16(adapter, REG_RXFLTMAP_8821C, value_rxfltmap2);
  1146. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  1147. /*do nothing~~*/
  1148. #else
  1149. /* disable update TSF */
  1150. for (i = 0; i < dvobj->iface_nums; i++) {
  1151. iface = dvobj->padapters[i];
  1152. if (!iface)
  1153. continue;
  1154. if (rtw_linked_check(iface) &&
  1155. check_fwstate(&(iface->mlmepriv), WIFI_AP_STATE) != _TRUE) {
  1156. hw_bcn_ctrl_tsf(iface, _FALSE);
  1157. iface->mlmeextpriv.en_hw_update_tsf = _FALSE;
  1158. }
  1159. }
  1160. #endif/*CONFIG_MI_WITH_MBSSID_CAM*/
  1161. rtl8821c_rcr_clear(adapter, rcr_bit);
  1162. /* Save orignal RRSR setting. */
  1163. hal->RegRRSR = rtw_read16(adapter, REG_RRSR_8821C);
  1164. if (rtw_mi_check_status(adapter, MI_AP_MODE))
  1165. rtl8821c_stop_tx_beacon(adapter);
  1166. } else {
  1167. /* sitesurvey done
  1168. * 1. enable rx data frame
  1169. * 2. config RCR not to receive different BSSID BCN or probe rsp
  1170. * 3. can enable TSF update & buddy TSF right now due to HW support(IC before 8821C not support ex:8812A/8814A/8192E...)
  1171. */
  1172. if (rtw_mi_check_fwstate(adapter, _FW_LINKED | WIFI_AP_STATE))/* enable to rx data frame */
  1173. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0xFFFF);
  1174. /* for 11n Logo 4.2.31/4.2.32, disable BSSID BCN check for AP mode */
  1175. if (adapter->registrypriv.wifi_spec && MLME_IS_AP(adapter))
  1176. rcr_bit &= ~(BIT_CBSSID_BCN_8821C);
  1177. rtl8821c_rcr_add(adapter, rcr_bit);
  1178. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  1179. /*if ((rtw_mi_get_assoced_sta_num(Adapter) == 1) && (!rtw_mi_check_status(Adapter, MI_AP_MODE)))
  1180. rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/
  1181. #else
  1182. for (i = 0; i < dvobj->iface_nums; i++) {
  1183. iface = dvobj->padapters[i];
  1184. if (!iface)
  1185. continue;
  1186. if (rtw_linked_check(iface) &&
  1187. check_fwstate(&(iface->mlmepriv), WIFI_AP_STATE) != _TRUE) {
  1188. /* enable HW TSF update when receive beacon*/
  1189. hw_bcn_ctrl_tsf(iface, _TRUE);
  1190. iface->mlmeextpriv.en_hw_update_tsf = _FALSE;
  1191. }
  1192. }
  1193. #endif
  1194. /* Restore orignal RRSR setting. */
  1195. rtw_write16(adapter, REG_RRSR_8821C, hal->RegRRSR);
  1196. if (rtw_mi_check_status(adapter, MI_AP_MODE)) {
  1197. rtl8821c_resume_tx_beacon(adapter);
  1198. rtw_mi_tx_beacon_hdl(adapter);
  1199. }
  1200. }
  1201. }
  1202. static void hw_var_set_mlme_join(PADAPTER adapter, u8 type)
  1203. {
  1204. u8 val8;
  1205. u16 val16;
  1206. u32 val32;
  1207. u8 RetryLimit;
  1208. PHAL_DATA_TYPE hal;
  1209. struct mlme_priv *pmlmepriv;
  1210. RetryLimit = 0x30;
  1211. hal = GET_HAL_DATA(adapter);
  1212. pmlmepriv = &adapter->mlmepriv;
  1213. #ifdef CONFIG_CONCURRENT_MODE
  1214. if (type == 0) {
  1215. /* prepare to join */
  1216. if (rtw_mi_check_status(adapter, MI_AP_MODE))
  1217. rtl8821c_stop_tx_beacon(adapter);
  1218. /* enable to rx data frame.Accept all data frame */
  1219. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0xFFFF);
  1220. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  1221. /*
  1222. if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && (rtw_mi_get_assoced_sta_num(Adapter) == 1))
  1223. rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN);
  1224. else if ((rtw_mi_get_ap_num(Adapter) == 1) && (rtw_mi_get_assoced_sta_num(Adapter) == 1))
  1225. rtw_write32(adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN);
  1226. else*/
  1227. rtl8821c_rcr_clear(adapter, BIT_CBSSID_DATA_8821C | BIT_CBSSID_BCN_8821C);
  1228. #else
  1229. if (rtw_mi_check_status(adapter, MI_AP_MODE))
  1230. val32 = BIT_CBSSID_BCN_8821C;
  1231. else
  1232. val32 = BIT_CBSSID_DATA_8821C | BIT_CBSSID_BCN_8821C;
  1233. rtl8821c_rcr_add(adapter, val32);
  1234. #endif
  1235. hw_bcn_func(adapter, _TRUE);
  1236. if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
  1237. RetryLimit = (hal->CustomerID == RT_CID_CCX) ? 7 : 48;
  1238. else /* Ad-hoc Mode */
  1239. RetryLimit = 0x7;
  1240. } else if (type == 1) {
  1241. /* joinbss_event call back when join res < 0 */
  1242. if (rtw_mi_check_status(adapter, MI_LINKED) == _FALSE)
  1243. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0x00);
  1244. if (rtw_mi_check_status(adapter, MI_AP_MODE)) {
  1245. rtl8821c_resume_tx_beacon(adapter);
  1246. /* reset TSF 1/2 after resume_tx_beacon */
  1247. val8 = BIT_TSFTR_RST_8821C | BIT_TSFTR_CLI0_RST_8821C;
  1248. rtw_write8(adapter, REG_DUAL_TSF_RST_8821C, val8);
  1249. }
  1250. } else if (type == 2) {
  1251. /* sta add event callback */
  1252. #ifdef CONFIG_MI_WITH_MBSSID_CAM
  1253. /*if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) && (rtw_mi_get_assoced_sta_num(padapter) == 1))
  1254. rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~DIS_TSF_UDT));*/
  1255. #else
  1256. /* enable update TSF */
  1257. hw_bcn_ctrl_tsf(adapter, _TRUE);
  1258. #endif
  1259. if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE)) {
  1260. rtw_write8(adapter, 0x542, 0x02);
  1261. RetryLimit = 0x7;
  1262. }
  1263. if (rtw_mi_check_status(adapter, MI_AP_MODE)) {
  1264. rtl8821c_resume_tx_beacon(adapter);
  1265. /* reset TSF 1/2 after resume_tx_beacon */
  1266. rtw_write8(adapter, REG_DUAL_TSF_RST_8821C, BIT_TSFTR_RST_8821C | BIT_TSFTR_CLI0_RST_8821C);
  1267. }
  1268. }
  1269. val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
  1270. rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
  1271. #else /* !CONFIG_CONCURRENT_MODE */
  1272. if (type == 0) {
  1273. /* prepare to join */
  1274. /* enable to rx data frame.Accept all data frame */
  1275. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0xFFFF);
  1276. hw_var_set_check_bssid(adapter, !adapter->in_cta_test);
  1277. if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)
  1278. RetryLimit = (hal->CustomerID == RT_CID_CCX) ? 7 : 48;
  1279. else /* Ad-hoc Mode */
  1280. RetryLimit = 0x7;
  1281. hw_bcn_func(adapter, _TRUE);
  1282. } else if (type == 1) {
  1283. /* joinbss_event call back when join res < 0 */
  1284. rtw_write16(adapter, REG_RXFLTMAP_8821C, 0x00);
  1285. } else if (type == 2) {
  1286. /* sta add event callback */
  1287. /* enable update TSF */
  1288. hw_bcn_ctrl_tsf(adapter, _TRUE);
  1289. if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE | WIFI_ADHOC_MASTER_STATE))
  1290. RetryLimit = 0x7;
  1291. }
  1292. val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
  1293. rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
  1294. #endif /* !CONFIG_CONCURRENT_MODE */
  1295. }
  1296. static void hw_var_set_acm_ctrl(PADAPTER adapter, u8 ctrl)
  1297. {
  1298. u8 hwctrl = 0;
  1299. if (ctrl) {
  1300. hwctrl |= BIT_ACMHWEN_8821C;
  1301. if (ctrl & BIT(1)) /* BE */
  1302. hwctrl |= BIT_BEQ_ACM_EN_8821C;
  1303. else
  1304. hwctrl &= (~BIT_BEQ_ACM_EN_8821C);
  1305. if (ctrl & BIT(2)) /* VI */
  1306. hwctrl |= BIT_VIQ_ACM_EN_8821C;
  1307. else
  1308. hwctrl &= (~BIT_VIQ_ACM_EN_8821C);
  1309. if (ctrl & BIT(3)) /* VO */
  1310. hwctrl |= BIT_VOQ_ACM_EN_8821C;
  1311. else
  1312. hwctrl &= (~BIT_VOQ_ACM_EN_8821C);
  1313. }
  1314. RTW_INFO("[HW_VAR_ACM_CTRL] Write 0x%02X\n", hwctrl);
  1315. rtw_write8(adapter, REG_ACMHWCTRL_8821C, hwctrl);
  1316. }
  1317. static void hw_var_set_rcr_am(PADAPTER adapter, u8 enable)
  1318. {
  1319. u32 rcr;
  1320. rcr = BIT_AM_8821C;
  1321. if (enable)
  1322. rtl8821c_rcr_add(adapter, rcr);
  1323. else
  1324. rtl8821c_rcr_clear(adapter, rcr);
  1325. RTW_INFO("%s: [HW_VAR_ON_RCR_AM] RCR(0x%x)=0x%x\n",
  1326. __FUNCTION__, REG_RCR_8821C, rtw_read32(adapter, REG_RCR_8821C));
  1327. }
  1328. static void hw_var_set_bcn_interval(PADAPTER adapter, u16 bcn_interval)
  1329. {
  1330. u8 hw_port = get_hw_port(adapter);
  1331. u32 bcn_interval_addr = 0;
  1332. u8 bcn_interval_shift = 0;
  1333. u16 bcn_interval_mask = 0;
  1334. u32 val32 = 0;
  1335. if (hw_port >= MAX_HW_PORT) {
  1336. RTW_ERR(FUNC_ADPT_FMT" HW Port(%d) invalid\n", FUNC_ADPT_ARG(adapter), hw_port);
  1337. rtw_warn_on(1);
  1338. return;
  1339. }
  1340. bcn_interval_addr = port_cfg[hw_port].bcn_space;
  1341. bcn_interval_shift = port_cfg[hw_port].bcn_space_shift;
  1342. bcn_interval_mask = port_cfg[hw_port].bcn_space_mask;
  1343. val32 = rtw_read32(adapter, bcn_interval_addr);
  1344. val32 &= (~(bcn_interval_mask << bcn_interval_shift));
  1345. val32 |= (bcn_interval & bcn_interval_mask) << bcn_interval_shift;
  1346. rtw_write32(adapter, bcn_interval_addr, val32);
  1347. RTW_INFO(ADPT_FMT" BEACON_INTERVAL : 0x%x = 0x%x\n", ADPT_ARG(adapter),
  1348. bcn_interval_addr, (rtw_read32(adapter, bcn_interval_addr) >> bcn_interval_shift) & bcn_interval_mask);
  1349. }
  1350. static void hw_var_set_sec_cfg(PADAPTER adapter, u8 cfg)
  1351. {
  1352. u16 reg_scr_ori;
  1353. u16 reg_scr;
  1354. reg_scr = reg_scr_ori = rtw_read16(adapter, REG_SECCFG_8821C);
  1355. reg_scr |= (BIT_CHK_KEYID_8821C | BIT_RXDEC_8821C | BIT_TXENC_8821C);
  1356. if (_rtw_camctl_chk_cap(adapter, SEC_CAP_CHK_BMC))
  1357. reg_scr |= BIT_CHK_BMC_8821C;
  1358. if (_rtw_camctl_chk_flags(adapter, SEC_STATUS_STA_PK_GK_CONFLICT_DIS_BMC_SEARCH))
  1359. reg_scr |= BIT_NOSKMC_8821C;
  1360. if (reg_scr != reg_scr_ori)
  1361. rtw_write16(adapter, REG_SECCFG_8821C, reg_scr);
  1362. RTW_INFO("%s: [HW_VAR_SEC_CFG] 0x%x=0x%x\n", __FUNCTION__,
  1363. REG_SECCFG_8821C, rtw_read32(adapter, REG_SECCFG_8821C));
  1364. }
  1365. static void hw_var_set_sec_dk_cfg(PADAPTER adapter, u8 enable)
  1366. {
  1367. struct security_priv *sec = &adapter->securitypriv;
  1368. u8 reg_scr = rtw_read8(adapter, REG_SECCFG_8821C);
  1369. if (enable) {
  1370. /* Enable default key related setting */
  1371. reg_scr |= BIT_TXBCUSEDK_8821C;
  1372. if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
  1373. reg_scr |= BIT_RXUHUSEDK_8821C | BIT_TXUHUSEDK_8821C;
  1374. } else {
  1375. /* Disable default key related setting */
  1376. reg_scr &= ~(BIT_RXBCUSEDK_8821C | BIT_TXBCUSEDK_8821C | BIT_RXUHUSEDK_8821C | BIT_TXUHUSEDK_8821C);
  1377. }
  1378. rtw_write8(adapter, REG_SECCFG_8821C, reg_scr);
  1379. RTW_INFO("%s: [HW_VAR_SEC_DK_CFG] 0x%x=0x%08x\n", __FUNCTION__,
  1380. REG_SECCFG_8821C, rtw_read32(adapter, REG_SECCFG_8821C));
  1381. }
  1382. static void hw_var_set_bcn_valid(PADAPTER adapter)
  1383. {
  1384. u8 val8 = 0;
  1385. /* only port 0 can TX BCN */
  1386. val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1);
  1387. val8 = val8 | BIT(7);
  1388. rtw_write8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1, val8);
  1389. }
  1390. static void hw_var_set_cam_empty_entry(PADAPTER adapter, u8 ucIndex)
  1391. {
  1392. u8 i;
  1393. u32 ulCommand = 0;
  1394. u32 ulContent = 0;
  1395. u32 ulEncAlgo = CAM_AES;
  1396. for (i = 0; i < CAM_CONTENT_COUNT; i++) {
  1397. /* filled id in CAM config 2 byte */
  1398. if (i == 0)
  1399. ulContent |= (ucIndex & 0x03) | ((u16)(ulEncAlgo) << 2);
  1400. else
  1401. ulContent = 0;
  1402. /* polling bit, and No Write enable, and address */
  1403. ulCommand = CAM_CONTENT_COUNT * ucIndex + i;
  1404. ulCommand |= BIT_SECCAM_POLLING_8821C | BIT_SECCAM_WE_8821C;
  1405. /* write content 0 is equall to mark invalid */
  1406. rtw_write32(adapter, REG_CAMWRITE_8821C, ulContent);
  1407. rtw_write32(adapter, REG_CAMCMD_8821C, ulCommand);
  1408. }
  1409. }
  1410. static void hw_var_set_ack_preamble(PADAPTER adapter, u8 bShortPreamble)
  1411. {
  1412. u8 val8 = 0;
  1413. val8 = rtw_read8(adapter, REG_WMAC_TRXPTCL_CTL_8821C + 2);
  1414. val8 |= BIT(4) | BIT(5);
  1415. if (bShortPreamble)
  1416. val8 |= BIT1;
  1417. else
  1418. val8 &= (~BIT1);
  1419. rtw_write8(adapter, REG_WMAC_TRXPTCL_CTL_8821C + 2, val8);
  1420. }
  1421. void hw_var_set_dl_rsvd_page(PADAPTER adapter, u8 mstatus)
  1422. {
  1423. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  1424. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  1425. struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
  1426. struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
  1427. BOOLEAN bcn_valid = _FALSE;
  1428. u8 DLBcnCount = 0;
  1429. u32 poll = 0;
  1430. u8 val8;
  1431. RTW_INFO(FUNC_ADPT_FMT ":+ hw_port=%d mstatus(%x)\n",
  1432. FUNC_ADPT_ARG(adapter), get_hw_port(adapter), mstatus);
  1433. if (mstatus == RT_MEDIA_CONNECT) {
  1434. BOOLEAN bRecover = _FALSE;
  1435. u8 v8;
  1436. /* We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 8821C -bit 10:0 */
  1437. rtw_write16(adapter, port_cfg[get_hw_port(adapter)].ps_aid, (0xF800 | pmlmeinfo->aid));
  1438. /* Enable SW TX beacon - Set REG_CR bit 8. DMA beacon by SW */
  1439. v8 = rtw_read8(adapter, REG_CR_8821C + 1);
  1440. v8 |= (BIT_ENSWBCN_8821C >> 8);
  1441. rtw_write8(adapter, REG_CR_8821C + 1, v8);
  1442. /*
  1443. * Disable Hw protection for a time which revserd for Hw sending beacon.
  1444. * Fix download reserved page packet fail that access collision with the protection time.
  1445. */
  1446. val8 = rtw_read8(adapter, REG_BCN_CTRL_8821C);
  1447. val8 &= ~BIT_EN_BCN_FUNCTION_8821C;
  1448. val8 |= BIT_DIS_TSF_UDT_8821C;
  1449. rtw_write8(adapter, REG_BCN_CTRL_8821C, val8);
  1450. #if 0
  1451. /* Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. */
  1452. if (hal->RegFwHwTxQCtrl & BIT(6))
  1453. bRecover = _TRUE;
  1454. /* To tell Hw the packet is not a real beacon frame. */
  1455. val8 = hal->RegFwHwTxQCtrl & ~BIT(6);
  1456. rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, val8);
  1457. hal->RegFwHwTxQCtrl &= ~BIT(6);
  1458. #endif
  1459. /* Clear beacon valid check bit. */
  1460. rtw_hal_set_hwreg(adapter, HW_VAR_BCN_VALID, NULL);
  1461. rtw_hal_set_hwreg(adapter, HW_VAR_DL_BCN_SEL, NULL);
  1462. DLBcnCount = 0;
  1463. poll = 0;
  1464. do {
  1465. /* download rsvd page. */
  1466. rtw_hal_set_fw_rsvd_page(adapter, 0);
  1467. DLBcnCount++;
  1468. do {
  1469. rtw_yield_os();
  1470. /* check rsvd page download OK. */
  1471. rtw_hal_get_hwreg(adapter, HW_VAR_BCN_VALID, (u8 *)(&bcn_valid));
  1472. poll++;
  1473. } while (!bcn_valid && (poll % 10) != 0 && !RTW_CANNOT_RUN(adapter));
  1474. } while (!bcn_valid && DLBcnCount <= 100 && !RTW_CANNOT_RUN(adapter));
  1475. if (RTW_CANNOT_RUN(adapter))
  1476. ;
  1477. else if (!bcn_valid)
  1478. RTW_INFO(FUNC_ADPT_FMT ": DL RSVD page failed! DLBcnCount:%u, poll:%u\n",
  1479. FUNC_ADPT_ARG(adapter), DLBcnCount, poll);
  1480. else {
  1481. struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
  1482. pwrctl->fw_psmode_iface_id = adapter->iface_id;
  1483. RTW_INFO(ADPT_FMT ": DL RSVD page success! DLBcnCount:%u, poll:%u\n",
  1484. ADPT_ARG(adapter), DLBcnCount, poll);
  1485. }
  1486. val8 = rtw_read8(adapter, REG_BCN_CTRL_8821C);
  1487. val8 |= BIT_EN_BCN_FUNCTION_8821C;
  1488. val8 &= ~BIT_DIS_TSF_UDT_8821C;
  1489. rtw_write8(adapter, REG_BCN_CTRL_8821C, val8);
  1490. #if 0
  1491. /*
  1492. * To make sure that if there exists an adapter which would like to send beacon.
  1493. * If exists, the origianl value of 0x422[6] will be 1, we should check this to
  1494. * prevent from setting 0x422[6] to 0 after download reserved page, or it will cause
  1495. * the beacon cannot be sent by HW.
  1496. */
  1497. if (bRecover) {
  1498. rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, hal->RegFwHwTxQCtrl | BIT(6));
  1499. hal->RegFwHwTxQCtrl |= BIT(6);
  1500. }
  1501. #endif
  1502. #ifndef CONFIG_PCI_HCI
  1503. /* Clear CR[8] or beacon packet will not be send to TxBuf anymore. */
  1504. v8 = rtw_read8(adapter, REG_CR_8821C + 1);
  1505. v8 &= ~BIT(0); /* ~ENSWBCN */
  1506. rtw_write8(adapter, REG_CR_8821C + 1, v8);
  1507. #endif /* !CONFIG_PCI_HCI */
  1508. }
  1509. }
  1510. static void hw_var_set_h2c_fw_joinbssrpt(PADAPTER adapter, u8 mstatus)
  1511. {
  1512. if (mstatus == RT_MEDIA_CONNECT)
  1513. hw_var_set_dl_rsvd_page(adapter, RT_MEDIA_CONNECT);
  1514. }
  1515. /*
  1516. * Description: Get the reserved page number in Tx packet buffer.
  1517. * Retrun value: the page number.
  1518. */
  1519. u8 get_txbuffer_rsvdpagenum(PADAPTER adapter, bool wowlan)
  1520. {
  1521. u8 RsvdPageNum = HALMAC_RSVD_DRV_PGNUM_8821C;
  1522. #ifdef CONFIG_PNO_SUPPORT
  1523. RsvdPageNum = 32;
  1524. #endif
  1525. return RsvdPageNum;
  1526. }
  1527. /*
  1528. * Parameters:
  1529. * adapter
  1530. * enable _TRUE: enable; _FALSE: disable
  1531. */
  1532. static u8 rx_agg_switch(PADAPTER adapter, u8 enable)
  1533. {
  1534. /* if (rtl8821c_config_rx_agg(adapter, enable)) */
  1535. return _SUCCESS;
  1536. return _FAIL;
  1537. }
  1538. void rtl8821c_sethwreg(PADAPTER adapter, u8 variable, u8 *val)
  1539. {
  1540. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  1541. u8 val8;
  1542. u16 val16;
  1543. u32 val32;
  1544. switch (variable) {
  1545. case HW_VAR_SET_OPMODE:
  1546. hw_var_set_opmode(adapter, val);
  1547. break;
  1548. case HW_VAR_MAC_ADDR:
  1549. hw_var_set_macaddr(adapter, val);
  1550. break;
  1551. case HW_VAR_BSSID:
  1552. hw_var_set_bssid(adapter, val);
  1553. break;
  1554. /*
  1555. case HW_VAR_INIT_RTS_RATE:
  1556. break;
  1557. */
  1558. case HW_VAR_BASIC_RATE:
  1559. hw_var_set_basic_rate(adapter, val);
  1560. break;
  1561. case HW_VAR_TXPAUSE:
  1562. rtw_write8(adapter, REG_TXPAUSE_8821C, *val);
  1563. break;
  1564. case HW_VAR_BCN_FUNC:
  1565. hw_var_set_bcn_func(adapter, *val);
  1566. break;
  1567. case HW_VAR_CORRECT_TSF:
  1568. hw_var_set_correct_tsf(adapter);
  1569. break;
  1570. case HW_VAR_CHECK_BSSID:
  1571. hw_var_set_check_bssid(adapter, *val);
  1572. break;
  1573. case HW_VAR_MLME_DISCONNECT:
  1574. hw_var_set_mlme_disconnect(adapter);
  1575. break;
  1576. case HW_VAR_MLME_SITESURVEY:
  1577. hw_var_set_mlme_sitesurvey(adapter, *val);
  1578. #ifdef CONFIG_BT_COEXIST
  1579. if (hal->EEPROMBluetoothCoexist)
  1580. rtw_btcoex_ScanNotify(adapter, *val ? _TRUE : _FALSE);
  1581. else
  1582. rtw_btcoex_wifionly_scan_notify(adapter);
  1583. #else /* !CONFIG_BT_COEXIST */
  1584. rtw_btcoex_wifionly_scan_notify(adapter);
  1585. #endif /* CONFIG_BT_COEXIST */
  1586. break;
  1587. case HW_VAR_MLME_JOIN:
  1588. hw_var_set_mlme_join(adapter, *val);
  1589. #ifdef CONFIG_BT_COEXIST
  1590. if (hal->EEPROMBluetoothCoexist) {
  1591. switch (*val) {
  1592. case 0:
  1593. /* Notify coex. mechanism before join */
  1594. rtw_btcoex_ConnectNotify(adapter, _TRUE);
  1595. break;
  1596. case 1:
  1597. case 2:
  1598. /* Notify coex. mechanism after join, whether successful or failed */
  1599. rtw_btcoex_ConnectNotify(adapter, _FALSE);
  1600. break;
  1601. }
  1602. }
  1603. #endif /* CONFIG_BT_COEXIST */
  1604. break;
  1605. case HW_VAR_ON_RCR_AM:
  1606. hw_var_set_rcr_am(adapter, 1);
  1607. break;
  1608. case HW_VAR_OFF_RCR_AM:
  1609. hw_var_set_rcr_am(adapter, 0);
  1610. break;
  1611. case HW_VAR_BEACON_INTERVAL:
  1612. hw_var_set_bcn_interval(adapter, *(u16 *)val);
  1613. #ifdef CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT
  1614. {
  1615. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  1616. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  1617. u16 bcn_interval = *((u16 *)val);
  1618. if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
  1619. RTW_INFO("%s==> bcn_interval:%d, eraly_int:%d\n", __FUNCTION__, bcn_interval, bcn_interval >> 1);
  1620. rtw_write8(adapter, REG_DRVERLYINT, bcn_interval >> 1); /* 50ms for sdio */
  1621. }
  1622. }
  1623. #endif/* CONFIG_INTERRUPT_BASED_TXBCN_EARLY_INT */
  1624. break;
  1625. case HW_VAR_SLOT_TIME:
  1626. rtw_write8(adapter, REG_SLOT_8821C, *val);
  1627. break;
  1628. case HW_VAR_RESP_SIFS:
  1629. /* RESP_SIFS for CCK */
  1630. rtw_write8(adapter, REG_RESP_SIFS_CCK_8821C, val[0]);
  1631. rtw_write8(adapter, REG_RESP_SIFS_CCK_8821C + 1, val[1]);
  1632. /* RESP_SIFS for OFDM */
  1633. rtw_write8(adapter, REG_RESP_SIFS_OFDM_8821C, val[2]);
  1634. rtw_write8(adapter, REG_RESP_SIFS_OFDM_8821C + 1, val[3]);
  1635. break;
  1636. case HW_VAR_ACK_PREAMBLE:
  1637. hw_var_set_ack_preamble(adapter, *val);
  1638. break;
  1639. case HW_VAR_SEC_CFG:
  1640. hw_var_set_sec_cfg(adapter, *val);
  1641. break;
  1642. case HW_VAR_SEC_DK_CFG:
  1643. if (val)
  1644. hw_var_set_sec_dk_cfg(adapter, _TRUE);
  1645. else
  1646. hw_var_set_sec_dk_cfg(adapter, _FALSE);
  1647. break;
  1648. case HW_VAR_BCN_VALID:
  1649. hw_var_set_bcn_valid(adapter);
  1650. break;
  1651. /*
  1652. case HW_VAR_RF_TYPE:
  1653. break;
  1654. */
  1655. case HW_VAR_CAM_EMPTY_ENTRY:
  1656. hw_var_set_cam_empty_entry(adapter, *val);
  1657. break;
  1658. case HW_VAR_CAM_INVALID_ALL:
  1659. val32 = BIT_SECCAM_POLLING_8821C | BIT_SECCAM_CLR_8821C;
  1660. rtw_write32(adapter, REG_CAMCMD_8821C, val32);
  1661. break;
  1662. case HW_VAR_AC_PARAM_VO:
  1663. rtw_write32(adapter, REG_EDCA_VO_PARAM_8821C, *(u32 *)val);
  1664. break;
  1665. case HW_VAR_AC_PARAM_VI:
  1666. rtw_write32(adapter, REG_EDCA_VI_PARAM_8821C, *(u32 *)val);
  1667. break;
  1668. case HW_VAR_AC_PARAM_BE:
  1669. hal->ac_param_be = *(u32 *)val;
  1670. rtw_write32(adapter, REG_EDCA_BE_PARAM_8821C, *(u32 *)val);
  1671. break;
  1672. case HW_VAR_AC_PARAM_BK:
  1673. rtw_write32(adapter, REG_EDCA_BK_PARAM_8821C, *(u32 *)val);
  1674. break;
  1675. case HW_VAR_ACM_CTRL:
  1676. hw_var_set_acm_ctrl(adapter, *val);
  1677. break;
  1678. /*
  1679. case HW_VAR_AMPDU_MIN_SPACE:
  1680. break;
  1681. */
  1682. case HW_VAR_AMPDU_FACTOR: {
  1683. u32 AMPDULen = *val; /* enum AGGRE_SIZE */
  1684. AMPDULen = (0x2000 << AMPDULen) - 1;
  1685. rtw_write32(adapter, REG_AMPDU_MAX_LENGTH_8821C, AMPDULen);
  1686. }
  1687. break;
  1688. case HW_VAR_RXDMA_AGG_PG_TH:
  1689. /*
  1690. * TH=1 => invalidate RX DMA aggregation
  1691. * TH=0 => validate RX DMA aggregation, use init value.
  1692. */
  1693. if (*val == 0)
  1694. /* enable RXDMA aggregation */
  1695. rx_agg_switch(adapter, _TRUE);
  1696. else
  1697. /* disable RXDMA aggregation */
  1698. rx_agg_switch(adapter, _FALSE);
  1699. break;
  1700. case HW_VAR_H2C_FW_PWRMODE:
  1701. rtl8821c_set_FwPwrMode_cmd(adapter, *val);
  1702. break;
  1703. /*
  1704. case HW_VAR_H2C_PS_TUNE_PARAM:
  1705. break;
  1706. */
  1707. case HW_VAR_H2C_FW_JOINBSSRPT:
  1708. hw_var_set_h2c_fw_joinbssrpt(adapter, *val);
  1709. break;
  1710. /*
  1711. case HW_VAR_FWLPS_RF_ON:
  1712. break;
  1713. */
  1714. #ifdef CONFIG_P2P
  1715. case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
  1716. rtw_set_p2p_ps_offload_cmd(adapter, *val);
  1717. break;
  1718. #endif
  1719. #ifdef CONFIG_TDLS
  1720. case HW_VAR_TDLS_WRCR:
  1721. rtl8821c_rcr_clear(adapter, BIT_CBSSID_DATA_8821C);
  1722. break;
  1723. case HW_VAR_TDLS_RS_RCR:
  1724. rtl8821c_rcr_add(adapter, BIT_CBSSID_DATA_8821C);
  1725. break;
  1726. #endif
  1727. /*
  1728. case HW_VAR_TRIGGER_GPIO_0:
  1729. case HW_VAR_BT_SET_COEXIST:
  1730. case HW_VAR_BT_ISSUE_DELBA:
  1731. case HW_VAR_CURRENT_ANTENNA:
  1732. break;
  1733. */
  1734. #ifdef CONFIG_SW_ANTENNA_DIVERSITY
  1735. case HW_VAR_ANTENNA_DIVERSITY_SELECT:
  1736. ODM_SetAntConfig(&hal->odmpriv, *val);
  1737. break;
  1738. #endif
  1739. /*
  1740. case HW_VAR_SWITCH_EPHY_WoWLAN:
  1741. case HW_VAR_EFUSE_USAGE:
  1742. case HW_VAR_EFUSE_BYTES:
  1743. case HW_VAR_EFUSE_BT_USAGE:
  1744. case HW_VAR_EFUSE_BT_BYTES:
  1745. break;
  1746. */
  1747. case HW_VAR_FIFO_CLEARN_UP: {
  1748. struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(adapter);
  1749. u8 trycnt = 100;
  1750. u32 reg_hw_ssn;
  1751. /* pause tx */
  1752. rtw_write8(adapter, REG_TXPAUSE_8821C, 0xff);
  1753. /* keep hw sn */
  1754. if (adapter->xmitpriv.hw_ssn_seq_no == 1)
  1755. reg_hw_ssn = REG_HW_SEQ1_8821C;
  1756. else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
  1757. reg_hw_ssn = REG_HW_SEQ2_8821C;
  1758. else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
  1759. reg_hw_ssn = REG_HW_SEQ3_8821C;
  1760. else
  1761. reg_hw_ssn = REG_HW_SEQ0_8821C;
  1762. adapter->xmitpriv.nqos_ssn = rtw_read16(adapter, reg_hw_ssn);
  1763. if (pwrpriv->bkeepfwalive != _TRUE) {
  1764. /* RX DMA stop */
  1765. val32 = rtw_read32(adapter, REG_RXPKT_NUM_8821C);
  1766. val32 |= BIT_RW_RELEASE_EN;
  1767. rtw_write32(adapter, REG_RXPKT_NUM_8821C, val32);
  1768. do {
  1769. val32 = rtw_read32(adapter, REG_RXPKT_NUM_8821C);
  1770. val32 &= BIT_RXDMA_IDLE_8821C;
  1771. if (val32)
  1772. break;
  1773. RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] val=%x times:%d\n", val32, trycnt);
  1774. } while (--trycnt);
  1775. if (trycnt == 0)
  1776. RTW_INFO("[HW_VAR_FIFO_CLEARN_UP] Stop RX DMA failed!\n");
  1777. #if 0
  1778. /* RQPN Load 0 */
  1779. rtw_write16(adapter, REG_RQPN_NPQ, 0);
  1780. rtw_write32(adapter, REG_RQPN, 0x80000000);
  1781. rtw_mdelay_os(2);
  1782. #endif
  1783. }
  1784. }
  1785. break;
  1786. case HW_VAR_RESTORE_HW_SEQ: {
  1787. /* restore Sequence No. */
  1788. u32 reg_hw_ssn;
  1789. if (adapter->xmitpriv.hw_ssn_seq_no == 1)
  1790. reg_hw_ssn = REG_HW_SEQ1_8821C;
  1791. else if (adapter->xmitpriv.hw_ssn_seq_no == 2)
  1792. reg_hw_ssn = REG_HW_SEQ2_8821C;
  1793. else if (adapter->xmitpriv.hw_ssn_seq_no == 3)
  1794. reg_hw_ssn = REG_HW_SEQ3_8821C;
  1795. else
  1796. reg_hw_ssn = REG_HW_SEQ0_8821C;
  1797. rtw_write8(adapter, reg_hw_ssn, adapter->xmitpriv.nqos_ssn);
  1798. }
  1799. break;
  1800. case HW_VAR_CHECK_TXBUF: {
  1801. u16 rtylmtorg;
  1802. u8 RetryLimit = 0x01;
  1803. u32 start, passtime;
  1804. u32 timelmt = 2000; /* ms */
  1805. u32 waittime = 10; /* ms */
  1806. u32 high, low, normal, extra, publc;
  1807. u16 rsvd, available;
  1808. u8 empty;
  1809. rtylmtorg = rtw_read16(adapter, REG_RETRY_LIMIT_8821C);
  1810. val16 = BIT_LRL_8821C(RetryLimit) | BIT_SRL_8821C(RetryLimit);
  1811. rtw_write16(adapter, REG_RETRY_LIMIT_8821C, val16);
  1812. /* Check TX FIFO empty or not */
  1813. empty = _FALSE;
  1814. high = 0;
  1815. low = 0;
  1816. normal = 0;
  1817. extra = 0;
  1818. publc = 0;
  1819. start = rtw_get_current_time();
  1820. while ((rtw_get_passing_time_ms(start) < timelmt)
  1821. && !RTW_CANNOT_RUN(adapter)) {
  1822. high = rtw_read32(adapter, REG_FIFOPAGE_INFO_1_8821C);
  1823. low = rtw_read32(adapter, REG_FIFOPAGE_INFO_2_8821C);
  1824. normal = rtw_read32(adapter, REG_FIFOPAGE_INFO_3_8821C);
  1825. extra = rtw_read32(adapter, REG_FIFOPAGE_INFO_4_8821C);
  1826. publc = rtw_read32(adapter, REG_FIFOPAGE_INFO_5_8821C);
  1827. rsvd = BIT_GET_HPQ_V1_8821C(high);
  1828. available = BIT_GET_HPQ_AVAL_PG_V1_8821C(high);
  1829. if (rsvd != available) {
  1830. rtw_msleep_os(waittime);
  1831. continue;
  1832. }
  1833. rsvd = BIT_GET_LPQ_V1_8821C(low);
  1834. available = BIT_GET_LPQ_AVAL_PG_V1_8821C(low);
  1835. if (rsvd != available) {
  1836. rtw_msleep_os(waittime);
  1837. continue;
  1838. }
  1839. rsvd = BIT_GET_NPQ_V1_8821C(normal);
  1840. available = BIT_GET_NPQ_AVAL_PG_V1_8821C(normal);
  1841. if (rsvd != available) {
  1842. rtw_msleep_os(waittime);
  1843. continue;
  1844. }
  1845. rsvd = BIT_GET_EXQ_V1_8821C(extra);
  1846. available = BIT_GET_EXQ_AVAL_PG_V1_8821C(extra);
  1847. if (rsvd != available) {
  1848. rtw_msleep_os(waittime);
  1849. continue;
  1850. }
  1851. rsvd = BIT_GET_PUBQ_V1_8821C(publc);
  1852. available = BIT_GET_PUBQ_AVAL_PG_V1_8821C(publc);
  1853. if (rsvd != available) {
  1854. rtw_msleep_os(waittime);
  1855. continue;
  1856. }
  1857. empty = _TRUE;
  1858. break;
  1859. }
  1860. passtime = rtw_get_passing_time_ms(start);
  1861. if (_TRUE == empty)
  1862. RTW_INFO("[HW_VAR_CHECK_TXBUF] Empty in %d ms\n", passtime);
  1863. else if (RTW_CANNOT_RUN(adapter))
  1864. RTW_INFO("[HW_VAR_CHECK_TXBUF] bDriverStopped or bSurpriseRemoved\n");
  1865. else {
  1866. RTW_INFO("[HW_VAR_CHECK_TXBUF] NOT empty in %d ms\n", passtime);
  1867. RTW_INFO("[HW_VAR_CHECK_TXBUF] 0x230=0x%08x 0x234=0x%08x 0x238=0x%08x 0x23c=0x%08x 0x240=0x%08x\n",
  1868. high, low, normal, extra, publc);
  1869. }
  1870. rtw_write16(adapter, REG_RETRY_LIMIT_8821C, rtylmtorg);
  1871. }
  1872. break;
  1873. /*
  1874. case HW_VAR_PCIE_STOP_TX_DMA:
  1875. break;
  1876. */
  1877. /*
  1878. case HW_VAR_SYS_CLKR:
  1879. break;
  1880. */
  1881. case HW_VAR_NAV_UPPER: {
  1882. #define HAL_NAV_UPPER_UNIT 128 /* micro-second */
  1883. u32 usNavUpper = *(u32 *)val;
  1884. if (usNavUpper > HAL_NAV_UPPER_UNIT * 0xFF) {
  1885. RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_NAV_UPPER] value(0x%08X us) is larger than (%d * 0xFF)!!!\n",
  1886. FUNC_ADPT_ARG(adapter), usNavUpper, HAL_NAV_UPPER_UNIT);
  1887. break;
  1888. }
  1889. usNavUpper = (usNavUpper + HAL_NAV_UPPER_UNIT - 1) / HAL_NAV_UPPER_UNIT;
  1890. rtw_write8(adapter, REG_NAV_CTRL_8821C + 2, (u8)usNavUpper);
  1891. }
  1892. break;
  1893. /*
  1894. case HW_VAR_RPT_TIMER_SETTING:
  1895. case HW_VAR_TX_RPT_MAX_MACID:
  1896. case HW_VAR_CHK_HI_QUEUE_EMPTY:
  1897. break;
  1898. */
  1899. /*
  1900. case HW_VAR_AMPDU_MAX_TIME:
  1901. case HW_VAR_WIRELESS_MODE:
  1902. case HW_VAR_USB_MODE:
  1903. break;
  1904. */
  1905. #ifdef CONFIG_AP_PORT_SWAP
  1906. case HW_VAR_PORT_SWITCH:
  1907. {
  1908. u8 mode = *((u8 *)val);
  1909. rtl8821c_ap_port_switch(adapter, mode);
  1910. }
  1911. break;
  1912. #endif
  1913. case HW_VAR_DO_IQK:
  1914. if (*val)
  1915. hal->bNeedIQK = _TRUE;
  1916. else
  1917. hal->bNeedIQK = _FALSE;
  1918. break;
  1919. case HW_VAR_DM_IN_LPS:
  1920. rtl8821c_phy_haldm_in_lps(adapter);
  1921. break;
  1922. /*
  1923. case HW_VAR_SET_REQ_FW_PS:
  1924. case HW_VAR_FW_PS_STATE:
  1925. case HW_VAR_SOUNDING_ENTER:
  1926. case HW_VAR_SOUNDING_LEAVE:
  1927. case HW_VAR_SOUNDING_RATE:
  1928. case HW_VAR_SOUNDING_STATUS:
  1929. case HW_VAR_SOUNDING_FW_NDPA:
  1930. case HW_VAR_SOUNDING_CLK:
  1931. break;
  1932. */
  1933. case HW_VAR_DL_RSVD_PAGE:
  1934. #ifdef CONFIG_BT_COEXIST
  1935. if (check_fwstate(&adapter->mlmepriv, WIFI_AP_STATE) == _TRUE)
  1936. rtl8821c_download_BTCoex_AP_mode_rsvd_page(adapter);
  1937. else
  1938. #endif
  1939. {
  1940. hw_var_set_dl_rsvd_page(adapter, RT_MEDIA_CONNECT);
  1941. }
  1942. break;
  1943. case HW_VAR_MACID_SLEEP: {
  1944. u32 reg_macid_sleep;
  1945. u8 bit_shift;
  1946. u8 id = *(u8 *)val;
  1947. if (id < 32) {
  1948. reg_macid_sleep = REG_MACID_SLEEP_8821C;
  1949. bit_shift = id;
  1950. } else if (id < 64) {
  1951. reg_macid_sleep = REG_MACID_SLEEP1_8821C;
  1952. bit_shift = id - 32;
  1953. } else if (id < 96) {
  1954. reg_macid_sleep = REG_MACID_SLEEP2_8821C;
  1955. bit_shift = id - 64;
  1956. } else if (id < 128) {
  1957. reg_macid_sleep = REG_MACID_SLEEP3_8821C;
  1958. bit_shift = id - 96;
  1959. } else {
  1960. rtw_warn_on(1);
  1961. break;
  1962. }
  1963. val32 = rtw_read32(adapter, reg_macid_sleep);
  1964. RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_MACID_SLEEP] macid=%d, org reg_0x%03x=0x%08X\n",
  1965. FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32);
  1966. if (val32 & BIT(bit_shift))
  1967. break;
  1968. val32 |= BIT(bit_shift);
  1969. rtw_write32(adapter, reg_macid_sleep, val32);
  1970. }
  1971. break;
  1972. case HW_VAR_MACID_WAKEUP: {
  1973. u32 reg_macid_sleep;
  1974. u8 bit_shift;
  1975. u8 id = *(u8 *)val;
  1976. if (id < 32) {
  1977. reg_macid_sleep = REG_MACID_SLEEP_8821C;
  1978. bit_shift = id;
  1979. } else if (id < 64) {
  1980. reg_macid_sleep = REG_MACID_SLEEP1_8821C;
  1981. bit_shift = id - 32;
  1982. } else if (id < 96) {
  1983. reg_macid_sleep = REG_MACID_SLEEP2_8821C;
  1984. bit_shift = id - 64;
  1985. } else if (id < 128) {
  1986. reg_macid_sleep = REG_MACID_SLEEP3_8821C;
  1987. bit_shift = id - 96;
  1988. } else {
  1989. rtw_warn_on(1);
  1990. break;
  1991. }
  1992. val32 = rtw_read32(adapter, reg_macid_sleep);
  1993. RTW_INFO(FUNC_ADPT_FMT ": [HW_VAR_MACID_WAKEUP] macid=%d, org reg_0x%03x=0x%08X\n",
  1994. FUNC_ADPT_ARG(adapter), id, reg_macid_sleep, val32);
  1995. if (!(val32 & BIT(bit_shift)))
  1996. break;
  1997. val32 &= ~BIT(bit_shift);
  1998. rtw_write32(adapter, reg_macid_sleep, val32);
  1999. }
  2000. break;
  2001. default:
  2002. SetHwReg(adapter, variable, val);
  2003. break;
  2004. }
  2005. }
  2006. struct qinfo {
  2007. u32 head:8;
  2008. u32 pkt_num:7;
  2009. u32 tail:8;
  2010. u32 ac:2;
  2011. u32 macid:7;
  2012. };
  2013. struct bcn_qinfo {
  2014. u16 head:8;
  2015. u16 pkt_num:8;
  2016. };
  2017. static void dump_qinfo(void *sel, struct qinfo *info, const char *tag)
  2018. {
  2019. RTW_PRINT_SEL(sel, "%shead:0x%02x, tail:0x%02x, pkt_num:%u, macid:%u, ac:%u\n",
  2020. tag ? tag : "", info->head, info->tail, info->pkt_num, info->macid, info->ac);
  2021. }
  2022. static void dump_bcn_qinfo(void *sel, struct bcn_qinfo *info, const char *tag)
  2023. {
  2024. RTW_PRINT_SEL(sel, "%shead:0x%02x, pkt_num:%u\n",
  2025. tag ? tag : "", info->head, info->pkt_num);
  2026. }
  2027. static void dump_mac_qinfo(void *sel, _adapter *adapter)
  2028. {
  2029. u32 q0_info;
  2030. u32 q1_info;
  2031. u32 q2_info;
  2032. u32 q3_info;
  2033. u32 q4_info;
  2034. u32 q5_info;
  2035. u32 q6_info;
  2036. u32 q7_info;
  2037. u32 mg_q_info;
  2038. u32 hi_q_info;
  2039. u16 bcn_q_info;
  2040. q0_info = rtw_read32(adapter, REG_Q0_INFO_8821C);
  2041. q1_info = rtw_read32(adapter, REG_Q1_INFO_8821C);
  2042. q2_info = rtw_read32(adapter, REG_Q2_INFO_8821C);
  2043. q3_info = rtw_read32(adapter, REG_Q3_INFO_8821C);
  2044. q4_info = rtw_read32(adapter, REG_Q4_INFO_8821C);
  2045. q5_info = rtw_read32(adapter, REG_Q5_INFO_8821C);
  2046. q6_info = rtw_read32(adapter, REG_Q6_INFO_8821C);
  2047. q7_info = rtw_read32(adapter, REG_Q7_INFO_8821C);
  2048. mg_q_info = rtw_read32(adapter, REG_MGQ_INFO_8821C);
  2049. hi_q_info = rtw_read32(adapter, REG_HIQ_INFO_8821C);
  2050. bcn_q_info = rtw_read16(adapter, REG_BCNQ_INFO_8821C);
  2051. dump_qinfo(sel, (struct qinfo *)&q0_info, "Q0 ");
  2052. dump_qinfo(sel, (struct qinfo *)&q1_info, "Q1 ");
  2053. dump_qinfo(sel, (struct qinfo *)&q2_info, "Q2 ");
  2054. dump_qinfo(sel, (struct qinfo *)&q3_info, "Q3 ");
  2055. dump_qinfo(sel, (struct qinfo *)&q4_info, "Q4 ");
  2056. dump_qinfo(sel, (struct qinfo *)&q5_info, "Q5 ");
  2057. dump_qinfo(sel, (struct qinfo *)&q6_info, "Q6 ");
  2058. dump_qinfo(sel, (struct qinfo *)&q7_info, "Q7 ");
  2059. dump_qinfo(sel, (struct qinfo *)&mg_q_info, "MG ");
  2060. dump_qinfo(sel, (struct qinfo *)&hi_q_info, "HI ");
  2061. dump_bcn_qinfo(sel, (struct bcn_qinfo *)&bcn_q_info, "BCN ");
  2062. }
  2063. static u8 hw_var_get_bcn_valid(PADAPTER adapter)
  2064. {
  2065. u8 val8 = 0;
  2066. u8 ret = _FALSE;
  2067. /* only port 0 can TX BCN */
  2068. val8 = rtw_read8(adapter, REG_FIFOPAGE_CTRL_2_8821C + 1);
  2069. ret = (BIT(7) & val8) ? _TRUE : _FALSE;
  2070. return ret;
  2071. }
  2072. void rtl8821c_gethwreg(PADAPTER adapter, u8 variable, u8 *val)
  2073. {
  2074. PHAL_DATA_TYPE hal;
  2075. u8 val8;
  2076. u16 val16;
  2077. u32 val32;
  2078. hal = GET_HAL_DATA(adapter);
  2079. switch (variable) {
  2080. /*
  2081. case HW_VAR_SET_OPMODE:
  2082. case HW_VAR_MAC_ADDR:
  2083. case HW_VAR_BSSID:
  2084. case HW_VAR_INIT_RTS_RATE:
  2085. case HW_VAR_BASIC_RATE:
  2086. break;
  2087. */
  2088. case HW_VAR_TXPAUSE:
  2089. *val = rtw_read8(adapter, REG_TXPAUSE_8821C);
  2090. break;
  2091. /*
  2092. case HW_VAR_BCN_FUNC:
  2093. case HW_VAR_CORRECT_TSF:
  2094. case HW_VAR_CHECK_BSSID:
  2095. case HW_VAR_MLME_DISCONNECT:
  2096. case HW_VAR_MLME_SITESURVEY:
  2097. case HW_VAR_MLME_JOIN:
  2098. case HW_VAR_ON_RCR_AM:
  2099. case HW_VAR_OFF_RCR_AM:
  2100. case HW_VAR_BEACON_INTERVAL:
  2101. case HW_VAR_SLOT_TIME:
  2102. case HW_VAR_RESP_SIFS:
  2103. case HW_VAR_ACK_PREAMBLE:
  2104. case HW_VAR_SEC_CFG:
  2105. case HW_VAR_SEC_DK_CFG:
  2106. break;
  2107. */
  2108. case HW_VAR_BCN_VALID:
  2109. *val = hw_var_get_bcn_valid(adapter);
  2110. break;
  2111. /*
  2112. case HW_VAR_RF_TYPE:
  2113. case HW_VAR_CAM_EMPTY_ENTRY:
  2114. case HW_VAR_CAM_INVALID_ALL:
  2115. case HW_VAR_AC_PARAM_VO:
  2116. case HW_VAR_AC_PARAM_VI:
  2117. case HW_VAR_AC_PARAM_BE:
  2118. case HW_VAR_AC_PARAM_BK:
  2119. case HW_VAR_ACM_CTRL:
  2120. case HW_VAR_AMPDU_MIN_SPACE:
  2121. case HW_VAR_AMPDU_FACTOR:
  2122. case HW_VAR_RXDMA_AGG_PG_TH:
  2123. case HW_VAR_H2C_FW_PWRMODE:
  2124. case HW_VAR_H2C_PS_TUNE_PARAM:
  2125. case HW_VAR_H2C_FW_JOINBSSRPT:
  2126. break;
  2127. */
  2128. case HW_VAR_FWLPS_RF_ON:
  2129. /* When we halt NIC, we should check if FW LPS is leave. */
  2130. if (rtw_is_surprise_removed(adapter) ||
  2131. (adapter_to_pwrctl(adapter)->rf_pwrstate == rf_off)) {
  2132. /*
  2133. * If it is in HW/SW Radio OFF or IPS state,
  2134. * we do not check Fw LPS Leave,
  2135. * because Fw is unload.
  2136. */
  2137. *val = _TRUE;
  2138. } else {
  2139. rtl8821c_rcr_get(adapter, &val32);
  2140. val32 &= (BIT_UC_MD_EN_8821C | BIT_BC_MD_EN_8821C | BIT_TIM_PARSER_EN_8821C);
  2141. if (val32)
  2142. *val = _FALSE;
  2143. else
  2144. *val = _TRUE;
  2145. }
  2146. break;
  2147. /*
  2148. case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
  2149. case HW_VAR_TDLS_WRCR:
  2150. case HW_VAR_TDLS_RS_RCR:
  2151. case HW_VAR_TRIGGER_GPIO_0:
  2152. case HW_VAR_BT_SET_COEXIST:
  2153. case HW_VAR_BT_ISSUE_DELBA:
  2154. break;
  2155. */
  2156. #ifdef CONFIG_ANTENNA_DIVERSITY
  2157. case HW_VAR_CURRENT_ANTENNA:
  2158. *val = hal->CurAntenna;
  2159. break;
  2160. #endif
  2161. /*
  2162. case HW_VAR_ANTENNA_DIVERSITY_SELECT:
  2163. case HW_VAR_SWITCH_EPHY_WoWLAN:
  2164. case HW_VAR_EFUSE_USAGE:
  2165. case HW_VAR_EFUSE_BYTES:
  2166. case HW_VAR_EFUSE_BT_USAGE:
  2167. case HW_VAR_EFUSE_BT_BYTES:
  2168. case HW_VAR_FIFO_CLEARN_UP:
  2169. case HW_VAR_RESTORE_HW_SEQ:
  2170. case HW_VAR_CHECK_TXBUF:
  2171. case HW_VAR_PCIE_STOP_TX_DMA:
  2172. break;
  2173. */
  2174. /*
  2175. case HW_VAR_HCI_SUS_STATE:
  2176. break;
  2177. */
  2178. #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  2179. case HW_VAR_SYS_CLKR:
  2180. *val = rtw_read8(adapter, REG_SYS_CLK_CTRL_8821C);
  2181. break;
  2182. #endif
  2183. /*
  2184. case HW_VAR_NAV_UPPER:
  2185. case HW_VAR_RPT_TIMER_SETTING:
  2186. case HW_VAR_TX_RPT_MAX_MACID:
  2187. break;
  2188. */
  2189. case HW_VAR_CHK_HI_QUEUE_EMPTY:
  2190. val16 = rtw_read16(adapter, REG_TXPKT_EMPTY_8821C);
  2191. *val = (val16 & BIT_HQQ_EMPTY_8821C) ? _TRUE : _FALSE;
  2192. break;
  2193. /*
  2194. case HW_VAR_AMPDU_MAX_TIME:
  2195. case HW_VAR_WIRELESS_MODE:
  2196. case HW_VAR_USB_MODE:
  2197. case HW_VAR_DO_IQK:
  2198. case HW_VAR_DM_IN_LPS:
  2199. case HW_VAR_SET_REQ_FW_PS:
  2200. case HW_VAR_FW_PS_STATE:
  2201. case HW_VAR_SOUNDING_ENTER:
  2202. case HW_VAR_SOUNDING_LEAVE:
  2203. case HW_VAR_SOUNDING_RATE:
  2204. case HW_VAR_SOUNDING_STATUS:
  2205. case HW_VAR_SOUNDING_FW_NDPA:
  2206. case HW_VAR_SOUNDING_CLK:
  2207. case HW_VAR_DL_RSVD_PAGE:
  2208. case HW_VAR_MACID_SLEEP:
  2209. case HW_VAR_MACID_WAKEUP:
  2210. break;
  2211. */
  2212. case HW_VAR_DUMP_MAC_QUEUE_INFO:
  2213. dump_mac_qinfo(val, adapter);
  2214. break;
  2215. /*
  2216. case HW_VAR_ASIX_IOT:
  2217. case HW_VAR_H2C_BT_MP_OPER:
  2218. break;
  2219. */
  2220. default:
  2221. GetHwReg(adapter, variable, val);
  2222. break;
  2223. }
  2224. }
  2225. /*
  2226. * Description:
  2227. * Change default setting of specified variable.
  2228. */
  2229. u8 rtl8821c_sethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
  2230. {
  2231. PHAL_DATA_TYPE hal;
  2232. u8 bResult;
  2233. hal = GET_HAL_DATA(adapter);
  2234. bResult = _SUCCESS;
  2235. switch (variable) {
  2236. /*
  2237. case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
  2238. case HAL_DEF_IS_SUPPORT_ANT_DIV:
  2239. case HAL_DEF_DRVINFO_SZ:
  2240. case HAL_DEF_MAX_RECVBUF_SZ:
  2241. case HAL_DEF_RX_PACKET_OFFSET:
  2242. case HAL_DEF_RX_DMA_SZ_WOW:
  2243. case HAL_DEF_RX_DMA_SZ:
  2244. case HAL_DEF_RX_PAGE_SIZE:
  2245. case HAL_DEF_DBG_DUMP_RXPKT:
  2246. case HAL_DEF_RA_DECISION_RATE:
  2247. case HAL_DEF_RA_SGI:
  2248. case HAL_DEF_PT_PWR_STATUS:
  2249. case HW_VAR_MAX_RX_AMPDU_FACTOR:
  2250. case HW_DEF_RA_INFO_DUMP:
  2251. case HAL_DEF_DBG_DUMP_TXPKT:
  2252. case HAL_DEF_TX_PAGE_BOUNDARY:
  2253. case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
  2254. case HAL_DEF_ANT_DETECT:
  2255. case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
  2256. case HAL_DEF_PCI_AMD_L1_SUPPORT:
  2257. case HAL_DEF_PCI_ASPM_OSC:
  2258. case HAL_DEF_MACID_SLEEP:
  2259. case HAL_DEF_DBG_DIS_PWT:
  2260. case HAL_DEF_EFUSE_USAGE:
  2261. case HAL_DEF_EFUSE_BYTES:
  2262. case HW_VAR_BEST_AMPDU_DENSITY:
  2263. break;
  2264. */
  2265. default:
  2266. bResult = SetHalDefVar(adapter, variable, pval);
  2267. break;
  2268. }
  2269. return bResult;
  2270. }
  2271. /*
  2272. * Description:
  2273. * Query setting of specified variable.
  2274. */
  2275. u8 rtl8821c_gethaldefvar(PADAPTER adapter, HAL_DEF_VARIABLE variable, void *pval)
  2276. {
  2277. PHAL_DATA_TYPE hal;
  2278. u8 bResult;
  2279. u8 val8 = 0;
  2280. hal = GET_HAL_DATA(adapter);
  2281. bResult = _SUCCESS;
  2282. switch (variable) {
  2283. /*
  2284. case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
  2285. break;
  2286. */
  2287. case HAL_DEF_IS_SUPPORT_ANT_DIV:
  2288. #ifdef CONFIG_ANTENNA_DIVERSITY
  2289. *(u8 *)pval = _TRUE;
  2290. #else
  2291. *(u8 *)pval = _FALSE;
  2292. #endif
  2293. break;
  2294. case HAL_DEF_MAX_RECVBUF_SZ:
  2295. *((u32 *)pval) = MAX_RECVBUF_SZ;
  2296. break;
  2297. case HAL_DEF_RX_PACKET_OFFSET:
  2298. rtw_halmac_get_drv_info_sz(adapter_to_dvobj(adapter), &val8);
  2299. *((u32 *)pval) = HALMAC_RX_DESC_SIZE_8821C + val8;
  2300. break;
  2301. /*
  2302. case HAL_DEF_DRVINFO_SZ:
  2303. rtw_halmac_get_drv_info_sz(adapter_to_dvobj(adapter), &val8);
  2304. *((u32 *)pval) = val8;
  2305. break;
  2306. case HAL_DEF_RX_DMA_SZ_WOW:
  2307. case HAL_DEF_RX_DMA_SZ:
  2308. case HAL_DEF_RX_PAGE_SIZE:
  2309. case HAL_DEF_DBG_DUMP_RXPKT:
  2310. case HAL_DEF_RA_DECISION_RATE:
  2311. case HAL_DEF_RA_SGI:
  2312. break;
  2313. */
  2314. /* only for 8188E */
  2315. case HAL_DEF_PT_PWR_STATUS:
  2316. break;
  2317. case HAL_DEF_TX_LDPC:
  2318. *(u8 *)pval = ((hal->phy_spec.ldpc_cap >> 8) & 0xFF) ? _TRUE : _FALSE;
  2319. break;
  2320. case HAL_DEF_RX_LDPC:
  2321. *(u8 *)pval = (hal->phy_spec.ldpc_cap & 0xFF) ? _TRUE : _FALSE;
  2322. break;
  2323. case HAL_DEF_TX_STBC:
  2324. *(u8 *)pval = ((hal->phy_spec.stbc_cap >> 8) & 0xFF) ? _TRUE : _FALSE;
  2325. break;
  2326. /* support 1RX for STBC */
  2327. case HAL_DEF_RX_STBC:
  2328. *(u8 *)pval = hal->phy_spec.stbc_cap & 0xFF;
  2329. break;
  2330. /* support Explicit TxBF for HT/VHT */
  2331. case HAL_DEF_EXPLICIT_BEAMFORMER:
  2332. *(u8 *)pval = _FALSE;
  2333. break;
  2334. case HAL_DEF_EXPLICIT_BEAMFORMEE:
  2335. #ifdef CONFIG_BEAMFORMING
  2336. *(u8 *)pval = _TRUE;
  2337. #else
  2338. *(u8 *)pval = _FALSE;
  2339. #endif
  2340. break;
  2341. /*
  2342. case HAL_DEF_BEAMFORMER_CAP:
  2343. case HAL_DEF_BEAMFORMEE_CAP:
  2344. break;
  2345. */
  2346. case HW_DEF_RA_INFO_DUMP:
  2347. #if 0
  2348. {
  2349. u8 mac_id = *(u8 *)pval;
  2350. u32 cmd;
  2351. u32 ra_info1, ra_info2;
  2352. u32 rate_mask1, rate_mask2;
  2353. u8 curr_tx_rate, curr_tx_sgi, hight_rate, lowest_rate;
  2354. RTW_INFO("============ RA status check Mac_id:%d ===================\n", mac_id);
  2355. cmd = 0x40000100 | mac_id;
  2356. rtw_write32(adapter, REG_HMEBOX_DBG_2_8723B, cmd);
  2357. rtw_msleep_os(10);
  2358. ra_info1 = rtw_read32(adapter, 0x2F0);
  2359. curr_tx_rate = ra_info1 & 0x7F;
  2360. curr_tx_sgi = (ra_info1 >> 7) & 0x01;
  2361. RTW_INFO("[ ra_info1:0x%08x ] =>cur_tx_rate=%s, cur_sgi:%d, PWRSTS=0x%02x\n",
  2362. ra_info1,
  2363. HDATA_RATE(curr_tx_rate),
  2364. curr_tx_sgi,
  2365. (ra_info1 >> 8) & 0x07);
  2366. cmd = 0x40000400 | mac_id;
  2367. rtw_write32(adapter, REG_HMEBOX_DBG_2_8723B, cmd);
  2368. rtw_msleep_os(10);
  2369. ra_info1 = rtw_read32(adapter, 0x2F0);
  2370. ra_info2 = rtw_read32(adapter, 0x2F4);
  2371. rate_mask1 = rtw_read32(adapter, 0x2F8);
  2372. rate_mask2 = rtw_read32(adapter, 0x2FC);
  2373. hight_rate = ra_info2 & 0xFF;
  2374. lowest_rate = (ra_info2 >> 8) & 0xFF;
  2375. RTW_INFO("[ ra_info1:0x%08x ] =>RSSI=%d, BW_setting=0x%02x, DISRA=0x%02x, VHT_EN=0x%02x\n",
  2376. ra_info1,
  2377. ra_info1 & 0xFF,
  2378. (ra_info1 >> 8) & 0xFF,
  2379. (ra_info1 >> 16) & 0xFF,
  2380. (ra_info1 >> 24) & 0xFF);
  2381. RTW_INFO("[ ra_info2:0x%08x ] =>hight_rate=%s, lowest_rate=%s, SGI=0x%02x, RateID=%d\n",
  2382. ra_info2,
  2383. HDATA_RATE(hight_rate),
  2384. HDATA_RATE(lowest_rate),
  2385. (ra_info2 >> 16) & 0xFF,
  2386. (ra_info2 >> 24) & 0xFF);
  2387. RTW_INFO("rate_mask2=0x%08x, rate_mask1=0x%08x\n", rate_mask2, rate_mask1);
  2388. }
  2389. #endif
  2390. break;
  2391. /*
  2392. case HAL_DEF_DBG_DUMP_TXPKT:
  2393. break;
  2394. */
  2395. case HAL_DEF_TX_PAGE_SIZE:
  2396. *(u32 *)pval = HALMAC_TX_PAGE_SIZE_8821C;
  2397. break;
  2398. case HAL_DEF_TX_PAGE_BOUNDARY:
  2399. rtw_halmac_get_rsvd_drv_pg_bndy(adapter_to_dvobj(adapter), (u16 *)pval);
  2400. break;
  2401. /* case HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN:
  2402. case HAL_DEF_ANT_DETECT:
  2403. case HAL_DEF_PCI_SUUPORT_L1_BACKDOOR:
  2404. case HAL_DEF_PCI_AMD_L1_SUPPORT:
  2405. case HAL_DEF_PCI_ASPM_OSC:
  2406. break;
  2407. */
  2408. case HAL_DEF_MACID_SLEEP:
  2409. *(u8 *)pval = _TRUE; /* support macid sleep */
  2410. break;
  2411. /*
  2412. case HAL_DEF_DBG_DIS_PWT:
  2413. case HAL_DEF_EFUSE_USAGE:
  2414. case HAL_DEF_EFUSE_BYTES:
  2415. break;
  2416. */
  2417. case HW_VAR_BEST_AMPDU_DENSITY:
  2418. *((u32 *)pval) = AMPDU_DENSITY_VALUE_4;
  2419. break;
  2420. default:
  2421. bResult = GetHalDefVar(adapter, variable, pval);
  2422. break;
  2423. }
  2424. return bResult;
  2425. }
  2426. /* xmit section */
  2427. void rtl8821c_init_xmit_priv(_adapter *adapter)
  2428. {
  2429. struct xmit_priv *pxmitpriv = &adapter->xmitpriv;
  2430. pxmitpriv->hw_ssn_seq_no = rtw_get_hwseq_no(adapter);
  2431. pxmitpriv->nqos_ssn = 0;
  2432. }
  2433. #if defined(CONFIG_CONCURRENT_MODE)
  2434. void fill_txdesc_force_bmc_camid(struct pkt_attrib *pattrib, u8 *ptxdesc)
  2435. {
  2436. if ((pattrib->encrypt > 0) && (!pattrib->bswenc)
  2437. && (pattrib->bmc_camid != INVALID_SEC_MAC_CAM_ID)) {
  2438. SET_TX_DESC_EN_DESC_ID_8821C(ptxdesc, 1);
  2439. SET_TX_DESC_MACID_8821C(ptxdesc, pattrib->bmc_camid);
  2440. }
  2441. }
  2442. #endif
  2443. void rtl8821c_fill_txdesc_sectype(struct pkt_attrib *pattrib, u8 *ptxdesc)
  2444. {
  2445. if ((pattrib->encrypt > 0) && !pattrib->bswenc) {
  2446. /* SEC_TYPE : 0:NO_ENC,1:WEP40/TKIP,2:WAPI,3:AES */
  2447. switch (pattrib->encrypt) {
  2448. case _WEP40_:
  2449. case _WEP104_:
  2450. case _TKIP_:
  2451. case _TKIP_WTMIC_:
  2452. SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x1);
  2453. break;
  2454. #ifdef CONFIG_WAPI_SUPPORT
  2455. case _SMS4_:
  2456. SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x2);
  2457. break;
  2458. #endif
  2459. case _AES_:
  2460. SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x3);
  2461. break;
  2462. case _NO_PRIVACY_:
  2463. default:
  2464. SET_TX_DESC_SEC_TYPE_8821C(ptxdesc, 0x0);
  2465. break;
  2466. }
  2467. }
  2468. }
  2469. void rtl8821c_fill_txdesc_vcs(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
  2470. {
  2471. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  2472. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  2473. if (pattrib->vcs_mode) {
  2474. switch (pattrib->vcs_mode) {
  2475. case RTS_CTS:
  2476. SET_TX_DESC_RTSEN_8821C(ptxdesc, 1);
  2477. break;
  2478. case CTS_TO_SELF:
  2479. SET_TX_DESC_CTS2SELF_8821C(ptxdesc, 1);
  2480. break;
  2481. case NONE_VCS:
  2482. default:
  2483. break;
  2484. }
  2485. if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
  2486. SET_TX_DESC_RTS_SHORT_8821C(ptxdesc, 1);
  2487. SET_TX_DESC_RTSRATE_8821C(ptxdesc, 0x8);/* RTS Rate=24M */
  2488. SET_TX_DESC_RTS_RTY_LOWEST_RATE_8821C(ptxdesc, 0xf);
  2489. }
  2490. }
  2491. u8 rtl8821c_bw_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
  2492. {
  2493. u8 BWSettingOfDesc = 0;
  2494. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  2495. if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
  2496. if (pattrib->bwmode == CHANNEL_WIDTH_80)
  2497. BWSettingOfDesc = 2;
  2498. else if (pattrib->bwmode == CHANNEL_WIDTH_40)
  2499. BWSettingOfDesc = 1;
  2500. else
  2501. BWSettingOfDesc = 0;
  2502. } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
  2503. if ((pattrib->bwmode == CHANNEL_WIDTH_40) || (pattrib->bwmode == CHANNEL_WIDTH_80))
  2504. BWSettingOfDesc = 1;
  2505. else
  2506. BWSettingOfDesc = 0;
  2507. } else
  2508. BWSettingOfDesc = 0;
  2509. return BWSettingOfDesc;
  2510. }
  2511. u8 rtl8821c_sc_mapping(PADAPTER adapter, struct pkt_attrib *pattrib)
  2512. {
  2513. u8 SCSettingOfDesc = 0;
  2514. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  2515. if (hal->current_channel_bw == CHANNEL_WIDTH_80) {
  2516. if (pattrib->bwmode == CHANNEL_WIDTH_80)
  2517. SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
  2518. else if (pattrib->bwmode == CHANNEL_WIDTH_40) {
  2519. if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
  2520. SCSettingOfDesc = VHT_DATA_SC_40_LOWER_OF_80MHZ;
  2521. else if (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
  2522. SCSettingOfDesc = VHT_DATA_SC_40_UPPER_OF_80MHZ;
  2523. else
  2524. RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
  2525. } else {
  2526. if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
  2527. SCSettingOfDesc = VHT_DATA_SC_20_LOWEST_OF_80MHZ;
  2528. else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER))
  2529. SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
  2530. else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
  2531. SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
  2532. else if ((hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER) && (hal->nCur80MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER))
  2533. SCSettingOfDesc = VHT_DATA_SC_20_UPPERST_OF_80MHZ;
  2534. else
  2535. RTW_INFO("SCMapping: DONOT CARE Mode Setting\n");
  2536. }
  2537. } else if (hal->current_channel_bw == CHANNEL_WIDTH_40) {
  2538. if (pattrib->bwmode == CHANNEL_WIDTH_40)
  2539. SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
  2540. else if (pattrib->bwmode == CHANNEL_WIDTH_20) {
  2541. if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_UPPER)
  2542. SCSettingOfDesc = VHT_DATA_SC_20_UPPER_OF_80MHZ;
  2543. else if (hal->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER)
  2544. SCSettingOfDesc = VHT_DATA_SC_20_LOWER_OF_80MHZ;
  2545. else
  2546. SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
  2547. }
  2548. } else
  2549. SCSettingOfDesc = VHT_DATA_SC_DONOT_CARE;
  2550. return SCSettingOfDesc;
  2551. }
  2552. void rtl8821c_fill_txdesc_phy(PADAPTER adapter, struct pkt_attrib *pattrib, u8 *ptxdesc)
  2553. {
  2554. if (pattrib->ht_en) {
  2555. /* Set Bandwidth and sub-channel settings. */
  2556. SET_TX_DESC_DATA_BW_8821C(ptxdesc, rtl8821c_bw_mapping(adapter, pattrib));
  2557. SET_TX_DESC_DATA_SC_8821C(ptxdesc, rtl8821c_sc_mapping(adapter, pattrib));
  2558. }
  2559. }
  2560. void rtl8821c_cal_txdesc_chksum(PADAPTER adapter, u8 *ptxdesc)
  2561. {
  2562. PHALMAC_ADAPTER halmac;
  2563. PHALMAC_API api;
  2564. halmac = adapter_to_halmac(adapter);
  2565. api = HALMAC_GET_API(halmac);
  2566. api->halmac_fill_txdesc_checksum(halmac, ptxdesc);
  2567. }
  2568. #ifdef CONFIG_MP_INCLUDED
  2569. void rtl8821c_prepare_mp_txdesc(PADAPTER adapter, struct mp_priv *pmp_priv)
  2570. {
  2571. u8 *desc;
  2572. struct pkt_attrib *attrib;
  2573. u32 pkt_size;
  2574. s32 bmcast;
  2575. u8 data_rate, pwr_status, offset;
  2576. desc = pmp_priv->tx.desc;
  2577. attrib = &pmp_priv->tx.attrib;
  2578. pkt_size = attrib->last_txcmdsz;
  2579. bmcast = IS_MCAST(attrib->ra);
  2580. SET_TX_DESC_LS_8821C(desc, 1);
  2581. SET_TX_DESC_TXPKTSIZE_8821C(desc, pkt_size);
  2582. offset = HALMAC_TX_DESC_SIZE_8821C;
  2583. SET_TX_DESC_OFFSET_8821C(desc, offset);
  2584. #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI)
  2585. SET_TX_DESC_PKT_OFFSET_8821C(desc, 0); /* Don't need to set PACKET Offset bit,it's no use 512bytes of length */
  2586. #else
  2587. SET_TX_DESC_PKT_OFFSET_8821C(desc, 1);
  2588. #endif
  2589. if (bmcast)
  2590. SET_TX_DESC_BMC_8821C(desc, 1);
  2591. SET_TX_DESC_MACID_8821C(desc, attrib->mac_id);
  2592. SET_TX_DESC_RATE_ID_8821C(desc, attrib->raid);
  2593. SET_TX_DESC_QSEL_8821C(desc, attrib->qsel);
  2594. if (pmp_priv->preamble)
  2595. SET_TX_DESC_DATA_SHORT_8821C(desc, 1);
  2596. if (!attrib->qos_en)
  2597. SET_TX_DESC_EN_HWSEQ_8821C(desc, 1);
  2598. else
  2599. SET_TX_DESC_SW_SEQ_8821C(desc, attrib->seqnum);
  2600. if (pmp_priv->bandwidth <= CHANNEL_WIDTH_160)
  2601. SET_TX_DESC_DATA_BW_8821C(desc, pmp_priv->bandwidth);
  2602. else {
  2603. RTW_INFO("%s: <ERROR> unknown bandwidth %d, use 20M\n",
  2604. __FUNCTION__, pmp_priv->bandwidth);
  2605. SET_TX_DESC_DATA_BW_8821C(desc, CHANNEL_WIDTH_20);
  2606. }
  2607. SET_TX_DESC_DISDATAFB_8821C(desc, 1);
  2608. SET_TX_DESC_USE_RATE_8821C(desc, 1);
  2609. SET_TX_DESC_DATARATE_8821C(desc, pmp_priv->rateidx);
  2610. }
  2611. #endif /* CONFIG_MP_INCLUDED */
  2612. #define OFFSET_SZ 0
  2613. static void fill_default_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
  2614. {
  2615. PADAPTER adapter = pxmitframe->padapter;
  2616. HAL_DATA_TYPE *phal_data = GET_HAL_DATA(adapter);
  2617. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  2618. struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
  2619. struct pkt_attrib *pattrib = &pxmitframe->attrib;
  2620. s32 bmcst = IS_MCAST(pattrib->ra);
  2621. u8 offset, pkt_offset = 0;
  2622. #define RA_SW_DEFINE_CONT 0x01
  2623. u8 drv_fixed_reate = _FALSE;
  2624. #if 0
  2625. #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
  2626. if (adapter->registrypriv.mp_mode == 0) {
  2627. if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt) &&
  2628. (rtw_usb_bulk_size_boundary(adapter, TXDESC_SIZE + pattrib->last_txcmdsz) == _FALSE)) {
  2629. ptxdesc = (pmem + PACKET_OFFSET_SZ);
  2630. /* RTW_INFO("==> non-agg-pkt,shift pointer...\n"); */
  2631. pull = 1;
  2632. }
  2633. }
  2634. #endif /* CONFIG_USE_USB_BUFFER_ALLOC_TX*/
  2635. #endif
  2636. _rtw_memset(pbuf, 0, HALMAC_TX_DESC_SIZE_8821C);
  2637. /*SET_TX_DESC_LS_8821C(pbuf, 1);*/ /*for USB only*/
  2638. SET_TX_DESC_TXPKTSIZE_8821C(pbuf, pattrib->last_txcmdsz);
  2639. offset = HALMAC_TX_DESC_SIZE_8821C + OFFSET_SZ;
  2640. #ifdef CONFIG_TX_EARLY_MODE
  2641. if (pxmitframe->frame_tag == DATA_FRAMETAG)
  2642. if (bagg_pkt)
  2643. offset += EARLY_MODE_INFO_SIZE ;/*0x28 */
  2644. pkt_offset = pxmitframe->pkt_offset = 0x01;
  2645. #endif
  2646. SET_TX_DESC_OFFSET_8821C(pbuf, offset);
  2647. if (bmcst)
  2648. SET_TX_DESC_BMC_8821C(pbuf, 1);
  2649. SET_TX_DESC_MULTIPLE_PORT_8821C(pbuf, adapter->hw_port);
  2650. #if 0
  2651. #ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX
  2652. if (adapter->registrypriv.mp_mode == 0) {
  2653. if ((PACKET_OFFSET_SZ != 0) && (!bagg_pkt)) {
  2654. if ((pull) && (pxmitframe->pkt_offset > 0)) {
  2655. pxmitframe->pkt_offset = pxmitframe->pkt_offset - 1;
  2656. pkt_offset = pxmitframe->pkt_offset;
  2657. }
  2658. }
  2659. }
  2660. /*RTW_INFO("%s, pkt_offset=0x%02x\n", __func__, pxmitframe->pkt_offset);*/
  2661. #endif
  2662. #endif
  2663. /* pkt_offset, unit:8 bytes padding*/
  2664. if (pkt_offset > 0)
  2665. SET_TX_DESC_PKT_OFFSET_8821C(pbuf, pkt_offset);
  2666. SET_TX_DESC_MACID_8821C(pbuf, pattrib->mac_id);
  2667. SET_TX_DESC_RATE_ID_8821C(pbuf, pattrib->raid);
  2668. SET_TX_DESC_QSEL_8821C(pbuf, pattrib->qsel);
  2669. /* 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS.
  2670. * (1) The sequence number of each non-Qos frame / broadcast / multicast /
  2671. * mgnt frame should be controled by Hw because Fw will also send null data
  2672. * which we cannot control when Fw LPS enable.
  2673. * --> default enable non-Qos data sequense number. 2010.06.23. by tynli.
  2674. * (2) Enable HW SEQ control for beacon packet, because we use Hw beacon.
  2675. * (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets.
  2676. */
  2677. /* HW sequence, to fix to use 0 queue. todo: 4AC packets to use auto queue select */
  2678. if (!pattrib->qos_en) {
  2679. SET_TX_DESC_DISQSELSEQ_8821C(pbuf, 1);
  2680. SET_TX_DESC_EN_HWSEQ_8821C(pbuf, 1);
  2681. SET_TX_DESC_HW_SSN_SEL_8821C(pbuf, pattrib->hw_ssn_sel);
  2682. SET_TX_DESC_EN_HWEXSEQ_8821C(pbuf, 0);
  2683. } else
  2684. SET_TX_DESC_SW_SEQ_8821C(pbuf, pattrib->seqnum);
  2685. if (pxmitframe->frame_tag == DATA_FRAMETAG) {
  2686. rtl8821c_fill_txdesc_sectype(pattrib, pbuf);
  2687. #if defined(CONFIG_CONCURRENT_MODE)
  2688. if (bmcst)
  2689. fill_txdesc_force_bmc_camid(pattrib, pbuf);
  2690. #endif
  2691. #if defined(CONFIG_USB_TX_AGGREGATION) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  2692. if (pxmitframe->agg_num > 1) {
  2693. /*RTW_INFO("%s agg_num:%d\n",__func__,pxmitframe->agg_num );*/
  2694. SET_TX_DESC_DMA_TXAGG_NUM_8821C(pbuf, pxmitframe->agg_num);
  2695. }
  2696. #endif /*CONFIG_USB_TX_AGGREGATION*/
  2697. rtl8821c_fill_txdesc_vcs(adapter, pattrib, pbuf);
  2698. if ((pattrib->ether_type != 0x888e) &&
  2699. (pattrib->ether_type != 0x0806) &&
  2700. (pattrib->ether_type != 0x88B4) &&
  2701. (pattrib->dhcp_pkt != 1) &&
  2702. (!bmcst)
  2703. #ifdef CONFIG_AUTO_AP_MODE
  2704. && (pattrib->pctrl != _TRUE)
  2705. #endif
  2706. ) {
  2707. /* Non EAP & ARP & DHCP type data packet */
  2708. if (pattrib->ampdu_en == _TRUE) {
  2709. SET_TX_DESC_AGG_EN_8821C(pbuf, 1);
  2710. SET_TX_DESC_MAX_AGG_NUM_8821C(pbuf, 0x1F);
  2711. SET_TX_DESC_AMPDU_DENSITY_8821C(pbuf, pattrib->ampdu_spacing);
  2712. } else
  2713. SET_TX_DESC_BK_8821C(pbuf, 1);
  2714. if (adapter->fix_bw != 0xFF)
  2715. pattrib->bwmode = adapter->fix_bw;
  2716. rtl8821c_fill_txdesc_phy(adapter, pattrib, pbuf);
  2717. if (phal_data->current_band_type == BAND_ON_5G)/*Data Rate Fallback Limit rate*/
  2718. SET_TX_DESC_DATA_RTY_LOWEST_RATE_8821C(pbuf, 4);
  2719. else
  2720. SET_TX_DESC_DATA_RTY_LOWEST_RATE_8821C(pbuf, 0);
  2721. if (phal_data->fw_ractrl == _FALSE) {
  2722. SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
  2723. drv_fixed_reate = _TRUE;
  2724. if (phal_data->INIDATA_RATE[pattrib->mac_id] & BIT(7))
  2725. SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1);
  2726. SET_TX_DESC_DATARATE_8821C(pbuf, phal_data->INIDATA_RATE[pattrib->mac_id] & 0x7F);
  2727. }
  2728. /* modify data rate by iwpriv*/
  2729. if (adapter->fix_rate != 0xFF) {
  2730. SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
  2731. drv_fixed_reate = _TRUE;
  2732. if (adapter->fix_rate & BIT(7))
  2733. SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1);
  2734. SET_TX_DESC_DATARATE_8821C(pbuf, adapter->fix_rate & 0x7F);
  2735. if (!adapter->data_fb)
  2736. SET_TX_DESC_DISDATAFB_8821C(pbuf, 1);
  2737. }
  2738. if (pattrib->ldpc)
  2739. SET_TX_DESC_DATA_LDPC_8821C(pbuf, 1);
  2740. if (pattrib->stbc)
  2741. SET_TX_DESC_DATA_STBC_8821C(pbuf, 1);
  2742. #ifdef CONFIG_CMCC_TEST
  2743. SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1); /* use cck short premble */
  2744. #endif
  2745. } else {
  2746. /*
  2747. * EAP data packet and ARP packet.
  2748. * Use the 1M data rate to send the EAP/ARP packet.
  2749. * This will maybe make the handshake smooth.
  2750. */
  2751. SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
  2752. drv_fixed_reate = _TRUE;
  2753. SET_TX_DESC_BK_8821C(pbuf, 1);
  2754. /* HW will ignore this setting if the transmission rate is legacy OFDM.*/
  2755. if (pmlmeinfo->preamble_mode == PREAMBLE_SHORT)
  2756. SET_TX_DESC_DATA_SHORT_8821C(pbuf, 1);
  2757. SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
  2758. if (bmcst)
  2759. SET_TX_DESC_DISDATAFB_8821C(pbuf, 1);
  2760. /*RTW_INFO(FUNC_ADPT_FMT ": SP Packet(0x%04X) rate=0x%x\n",
  2761. FUNC_ADPT_ARG(adapter), pattrib->ether_type, MRateToHwRate(pmlmeext->tx_rate));*/
  2762. }
  2763. #ifdef CONFIG_TDLS
  2764. #ifdef CONFIG_XMIT_ACK
  2765. /* CCX-TXRPT ack for xmit mgmt frames. */
  2766. if (pxmitframe->ack_report) {
  2767. #ifdef DBG_CCX
  2768. RTW_INFO("%s set spe_rpt\n", __func__);
  2769. #endif
  2770. SET_TX_DESC_SPE_RPT_8821C(pbuf, 1);
  2771. }
  2772. #endif /* CONFIG_XMIT_ACK */
  2773. #endif
  2774. } else if (pxmitframe->frame_tag == MGNT_FRAMETAG) {
  2775. SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
  2776. drv_fixed_reate = _TRUE;
  2777. SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pattrib->rate));
  2778. /* VHT NDPA or HT NDPA Packet for Beamformer.*/
  2779. #ifdef CONFIG_BEAMFORMING
  2780. if ((pattrib->subtype == WIFI_NDPA) ||
  2781. ((pattrib->subtype == WIFI_ACTION_NOACK) && (pattrib->order == 1))) {
  2782. SET_TX_DESC_NAVUSEHDR_8821C(pbuf, 1);
  2783. SET_TX_DESC_DATA_BW_8821C(pbuf, rtl8821c_bw_mapping(adapter, pattrib));
  2784. SET_TX_DESC_DATA_SC_8821C(pbuf, rtl8821c_sc_mapping(adapter, pattrib));
  2785. /*SET_TX_DESC_RTS_SC_8821C(pbuf, rtl8821c_sc_mapping(adapter,pattrib)); ??????*/
  2786. SET_TX_DESC_RTY_LMT_EN_8821C(pbuf, 1);
  2787. SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 5);
  2788. SET_TX_DESC_DISDATAFB_8821C(pbuf, 1);
  2789. /*if(pattrib->rts_cca)
  2790. SET_TX_DESC_NDPA_8821C(ptxdesc, 2);
  2791. else*/
  2792. SET_TX_DESC_NDPA_8821C(pbuf, 1);
  2793. } else
  2794. #endif
  2795. {
  2796. SET_TX_DESC_RTY_LMT_EN_8821C(pbuf, 1);
  2797. if (pattrib->retry_ctrl == _TRUE)
  2798. SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 6);
  2799. else
  2800. SET_TX_DESC_RTS_DATA_RTY_LMT_8821C(pbuf, 12);
  2801. }
  2802. #ifdef CONFIG_XMIT_ACK
  2803. /* CCX-TXRPT ack for xmit mgmt frames. */
  2804. if (pxmitframe->ack_report) {
  2805. #ifdef DBG_CCX
  2806. RTW_INFO("%s set spe_rpt\n", __func__);
  2807. #endif
  2808. SET_TX_DESC_SPE_RPT_8821C(pbuf, 1);
  2809. }
  2810. #endif /* CONFIG_XMIT_ACK */
  2811. } else if (pxmitframe->frame_tag == TXAGG_FRAMETAG)
  2812. RTW_INFO("%s: TXAGG_FRAMETAG\n", __func__);
  2813. #ifdef CONFIG_MP_INCLUDED
  2814. else if (pxmitframe->frame_tag == MP_FRAMETAG) {
  2815. RTW_INFO("%s: MP_FRAMETAG\n", __func__);
  2816. fill_txdesc_for_mp(adapter, pbuf);
  2817. }
  2818. #endif
  2819. else {
  2820. RTW_INFO("%s: frame_tag=0x%x\n", __func__, pxmitframe->frame_tag);
  2821. SET_TX_DESC_USE_RATE_8821C(pbuf, 1);
  2822. drv_fixed_reate = _TRUE;
  2823. SET_TX_DESC_DATARATE_8821C(pbuf, MRateToHwRate(pmlmeext->tx_rate));
  2824. }
  2825. if (drv_fixed_reate == _TRUE)
  2826. SET_TX_DESC_SW_DEFINE_8821C(pbuf, RA_SW_DEFINE_CONT);
  2827. if (adapter->power_offset != 0)
  2828. SET_TX_DESC_TXPWR_OFSET_8821C(pbuf, adapter->power_offset);
  2829. #ifdef CONFIG_BEAMFORMING
  2830. SET_TX_DESC_G_ID_8821C(pbuf, pattrib->txbf_g_id);
  2831. SET_TX_DESC_P_AID_8821C(pbuf, pattrib->txbf_p_aid);
  2832. #endif
  2833. SET_TX_DESC_PORT_ID_8821C(pbuf, get_hw_port(adapter));
  2834. }
  2835. void rtl8821c_dbg_dump_tx_desc(PADAPTER adapter, int frame_tag, u8 *ptxdesc)
  2836. {
  2837. u8 bDumpTxPkt;
  2838. u8 bDumpTxDesc = _FALSE;
  2839. rtw_hal_get_def_var(adapter, HAL_DEF_DBG_DUMP_TXPKT, &bDumpTxPkt);
  2840. /* 1 for data frame, 2 for mgnt frame */
  2841. if (bDumpTxPkt == 1) {
  2842. RTW_INFO("dump tx_desc for data frame\n");
  2843. if ((frame_tag & 0x0f) == DATA_FRAMETAG)
  2844. bDumpTxDesc = _TRUE;
  2845. } else if (bDumpTxPkt == 2) {
  2846. RTW_INFO("dump tx_desc for mgnt frame\n");
  2847. if ((frame_tag & 0x0f) == MGNT_FRAMETAG)
  2848. bDumpTxDesc = _TRUE;
  2849. }
  2850. /* 8821C TX SIZE = 48(HALMAC_TX_DESC_SIZE_8821C) */
  2851. if (_TRUE == bDumpTxDesc) {
  2852. RTW_INFO("=====================================\n");
  2853. RTW_INFO("Offset00(0x%08x)\n", *((u32 *)(ptxdesc)));
  2854. RTW_INFO("Offset04(0x%08x)\n", *((u32 *)(ptxdesc + 4)));
  2855. RTW_INFO("Offset08(0x%08x)\n", *((u32 *)(ptxdesc + 8)));
  2856. RTW_INFO("Offset12(0x%08x)\n", *((u32 *)(ptxdesc + 12)));
  2857. RTW_INFO("Offset16(0x%08x)\n", *((u32 *)(ptxdesc + 16)));
  2858. RTW_INFO("Offset20(0x%08x)\n", *((u32 *)(ptxdesc + 20)));
  2859. RTW_INFO("Offset24(0x%08x)\n", *((u32 *)(ptxdesc + 24)));
  2860. RTW_INFO("Offset28(0x%08x)\n", *((u32 *)(ptxdesc + 28)));
  2861. RTW_INFO("Offset32(0x%08x)\n", *((u32 *)(ptxdesc + 32)));
  2862. RTW_INFO("Offset36(0x%08x)\n", *((u32 *)(ptxdesc + 36)));
  2863. RTW_INFO("Offset40(0x%08x)\n", *((u32 *)(ptxdesc + 40)));
  2864. RTW_INFO("Offset44(0x%08x)\n", *((u32 *)(ptxdesc + 44)));
  2865. RTW_INFO("=====================================\n");
  2866. }
  2867. }
  2868. /*
  2869. * Description:
  2870. *
  2871. * Parameters:
  2872. * pxmitframe xmitframe
  2873. * pbuf where to fill tx desc
  2874. */
  2875. void rtl8821c_update_txdesc(struct xmit_frame *pxmitframe, u8 *pbuf)
  2876. {
  2877. fill_default_txdesc(pxmitframe, pbuf);
  2878. #ifdef CONFIG_ANTENNA_DIVERSITY
  2879. odm_set_tx_ant_by_tx_info(&GET_HAL_DATA(pxmitframe->padapter)->odmpriv, pbuf, pxmitframe->attrib.mac_id);
  2880. #endif /* CONFIG_ANTENNA_DIVERSITY */
  2881. rtl8821c_cal_txdesc_chksum(pxmitframe->padapter, pbuf);
  2882. rtl8821c_dbg_dump_tx_desc(pxmitframe->padapter, pxmitframe->frame_tag, pbuf);
  2883. }
  2884. /*
  2885. * Description:
  2886. * In normal chip, we should send some packet to HW which will be used by FW
  2887. * in FW LPS mode.
  2888. * The function is to fill the Tx descriptor of this packets,
  2889. * then FW can tell HW to send these packet directly.
  2890. */
  2891. static void fill_fake_txdesc(PADAPTER adapter, u8 *pDesc, u32 BufferLen,
  2892. u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
  2893. {
  2894. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  2895. /* Clear all status */
  2896. _rtw_memset(pDesc, 0, HALMAC_TX_DESC_SIZE_8821C);
  2897. SET_TX_DESC_LS_8821C(pDesc, 1);
  2898. SET_TX_DESC_OFFSET_8821C(pDesc, HALMAC_TX_DESC_SIZE_8821C);
  2899. SET_TX_DESC_TXPKTSIZE_8821C(pDesc, BufferLen);
  2900. SET_TX_DESC_QSEL_8821C(pDesc, QSLT_MGNT); /* Fixed queue of Mgnt queue */
  2901. if (pmlmeext->cur_wireless_mode & WIRELESS_11B)
  2902. SET_TX_DESC_RATE_ID_8821C(pDesc, RATEID_IDX_B);
  2903. else
  2904. SET_TX_DESC_RATE_ID_8821C(pDesc, RATEID_IDX_G);
  2905. /* Set NAVUSEHDR to prevent Ps-poll AId filed to be changed to error vlaue by HW */
  2906. if (_TRUE == IsPsPoll)
  2907. SET_TX_DESC_NAVUSEHDR_8821C(pDesc, 1);
  2908. else {
  2909. SET_TX_DESC_DISQSELSEQ_8821C(pDesc, 1);
  2910. SET_TX_DESC_EN_HWSEQ_8821C(pDesc, 1);
  2911. SET_TX_DESC_HW_SSN_SEL_8821C(pDesc, 0);/*pattrib->hw_ssn_sel*/
  2912. SET_TX_DESC_EN_HWEXSEQ_8821C(pDesc, 0);
  2913. }
  2914. if (_TRUE == IsBTQosNull)
  2915. SET_TX_DESC_BT_NULL_8821C(pDesc, 1);
  2916. SET_TX_DESC_USE_RATE_8821C(pDesc, 1);
  2917. SET_TX_DESC_DATARATE_8821C(pDesc, MRateToHwRate(pmlmeext->tx_rate));
  2918. /*
  2919. * Encrypt the data frame if under security mode excepct null data.
  2920. */
  2921. if (_TRUE == bDataFrame) {
  2922. u32 EncAlg;
  2923. EncAlg = adapter->securitypriv.dot11PrivacyAlgrthm;
  2924. switch (EncAlg) {
  2925. case _NO_PRIVACY_:
  2926. SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x0);
  2927. break;
  2928. case _WEP40_:
  2929. case _WEP104_:
  2930. case _TKIP_:
  2931. SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x1);
  2932. break;
  2933. case _SMS4_:
  2934. SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x2);
  2935. break;
  2936. case _AES_:
  2937. SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x3);
  2938. break;
  2939. default:
  2940. SET_TX_DESC_SEC_TYPE_8821C(pDesc, 0x0);
  2941. break;
  2942. }
  2943. }
  2944. SET_TX_DESC_PORT_ID_8821C(pDesc, get_hw_port(adapter));
  2945. SET_TX_DESC_MULTIPLE_PORT_8821C(pDesc, get_hw_port(adapter));
  2946. #if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
  2947. /*
  2948. * USB interface drop packet if the checksum of descriptor isn't correct.
  2949. * Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.).
  2950. */
  2951. rtl8821c_cal_txdesc_chksum(adapter, pDesc);
  2952. #endif
  2953. }
  2954. void rtl8821c_rxdesc2attribute(struct rx_pkt_attrib *pattrib, u8 *desc)
  2955. {
  2956. _rtw_memset(pattrib, 0, sizeof(struct rx_pkt_attrib));
  2957. pattrib->pkt_len = (u16)GET_RX_DESC_PKT_LEN_8821C(desc);
  2958. pattrib->crc_err = (u8)GET_RX_DESC_CRC32_8821C(desc);
  2959. pattrib->icv_err = (u8)GET_RX_DESC_ICV_ERR_8821C(desc);
  2960. pattrib->drvinfo_sz = (u8)GET_RX_DESC_DRV_INFO_SIZE_8821C(desc) << 3;
  2961. pattrib->encrypt = (u8)GET_RX_DESC_SECURITY_8821C(desc);
  2962. pattrib->qos = (u8)GET_RX_DESC_QOS_8821C(desc);
  2963. pattrib->shift_sz = (u8)GET_RX_DESC_SHIFT_8821C(desc);
  2964. pattrib->physt = (u8)GET_RX_DESC_PHYST_8821C(desc);
  2965. pattrib->bdecrypted = (u8)GET_RX_DESC_SWDEC_8821C(desc) ? 0 : 1;
  2966. pattrib->priority = (u8)GET_RX_DESC_TID_8821C(desc);
  2967. pattrib->amsdu = (u8)GET_RX_DESC_AMSDU_8821C(desc);
  2968. pattrib->mdata = (u8)GET_RX_DESC_MD_8821C(desc);
  2969. pattrib->mfrag = (u8)GET_RX_DESC_MF_8821C(desc);
  2970. pattrib->seq_num = (u16)GET_RX_DESC_SEQ_8821C(desc);
  2971. pattrib->frag_num = (u8)GET_RX_DESC_FRAG_8821C(desc);
  2972. pattrib->ppdu_cnt = (u8)GET_RX_DESC_PPDU_CNT_8821C(desc);
  2973. if (GET_RX_DESC_C2H_8821C(desc))
  2974. pattrib->pkt_rpt_type = C2H_PACKET;
  2975. else
  2976. pattrib->pkt_rpt_type = NORMAL_RX;
  2977. pattrib->data_rate = (u8)GET_RX_DESC_RX_RATE_8821C(desc);
  2978. }
  2979. void rtl8821c_query_rx_desc(union recv_frame *precvframe, u8 *pdesc)
  2980. {
  2981. rtl8821c_rxdesc2attribute(&precvframe->u.hdr.attrib, pdesc);
  2982. }
  2983. static void InitBeaconParameters(PADAPTER adapter)
  2984. {
  2985. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  2986. rtw_write16(adapter, REG_TBTT_PROHIBIT_8821C, 0x6404); /* ms */
  2987. rtw_write8(adapter, REG_DRVERLYINT_8821C, DRIVER_EARLY_INT_TIME_8821C); /* 5ms */
  2988. rtw_write8(adapter, REG_BCNDMATIM_8821C, BCN_DMA_ATIME_INT_TIME_8821C); /* 2ms */
  2989. /*
  2990. * Suggested by designer timchen. Change beacon AIFS to the largest number
  2991. * beacause test chip does not contension before sending beacon.
  2992. */
  2993. rtw_write16(adapter, REG_BCNTCFG_8821C, 0x660F);
  2994. hal->RegBcnCtrlVal = rtw_read8(adapter, REG_BCN_CTRL_8821C);
  2995. hal->RegTxPause = rtw_read8(adapter, REG_TXPAUSE_8821C);
  2996. hal->RegFwHwTxQCtrl = rtw_read8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2);
  2997. hal->RegReg542 = rtw_read8(adapter, REG_TBTT_PROHIBIT_8821C + 2);
  2998. hal->RegCR_1 = rtw_read8(adapter, REG_CR_8821C + 1);
  2999. }
  3000. void rtl8821c_resume_tx_beacon(PADAPTER adapter)
  3001. {
  3002. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  3003. hal->RegFwHwTxQCtrl |= (BIT_EN_BCNQ_DL_8821C >> 16);
  3004. rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, hal->RegFwHwTxQCtrl);
  3005. rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 1, 0xff);
  3006. hal->RegReg542 |= BIT(0);
  3007. rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 2, hal->RegReg542);
  3008. }
  3009. void rtl8821c_stop_tx_beacon(PADAPTER adapter)
  3010. {
  3011. PHAL_DATA_TYPE hal = GET_HAL_DATA(adapter);
  3012. hal->RegFwHwTxQCtrl &= ~(BIT_EN_BCNQ_DL_8821C >> 16);
  3013. rtw_write8(adapter, REG_FWHW_TXQ_CTRL_8821C + 2, hal->RegFwHwTxQCtrl);
  3014. rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 1, 0x64);
  3015. hal->RegReg542 &= ~BIT(0);
  3016. rtw_write8(adapter, REG_TBTT_PROHIBIT_8821C + 2, hal->RegReg542);
  3017. }
  3018. static void beacon_function_enable(PADAPTER adapter, u8 Enable, u8 Linked)
  3019. {
  3020. hw_bcn_ctrl_add(adapter, BIT_DIS_TSF_UDT_8821C | BIT_EN_BCN_FUNCTION_8821C);
  3021. }
  3022. static void set_beacon_related_registers(PADAPTER adapter)
  3023. {
  3024. struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
  3025. struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
  3026. /* reset TSF, enable update TSF, correcting TSF On Beacon */
  3027. #if 0
  3028. /* * REG_BCN_INTERVAL */
  3029. /* * REG_BCNDMATIM */
  3030. /* * REG_ATIMWND */
  3031. /* * REG_TBTT_PROHIBIT */
  3032. /* * REG_DRVERLYINT */
  3033. /* * REG_BCN_MAX_ERR */
  3034. /* * REG_BCNTCFG (0x510) */
  3035. /* * REG_DUAL_TSF_RST */
  3036. /* * REG_BCN_CTRL (0x550) */
  3037. #endif
  3038. /* ATIM window */
  3039. rtw_write16(adapter, REG_ATIMWND_8821C, 2);
  3040. /* Beacon interval (in unit of TU). */
  3041. hw_var_set_bcn_interval(adapter, pmlmeinfo->bcn_interval);
  3042. InitBeaconParameters(adapter);
  3043. rtw_write8(adapter, REG_SLOT_8821C, 0x09);
  3044. /* Reset TSF Timer to zero */
  3045. hw_tsf_reset(adapter);
  3046. rtw_write8(adapter, REG_RXTSF_OFFSET_CCK_8821C, 0x50);
  3047. rtw_write8(adapter, REG_RXTSF_OFFSET_OFDM_8821C, 0x50);
  3048. beacon_function_enable(adapter, _TRUE, _TRUE);
  3049. rtl8821c_resume_tx_beacon(adapter);
  3050. }
  3051. void rtl8821c_set_hal_ops(PADAPTER adapter)
  3052. {
  3053. struct hal_ops *ops_func = &adapter->hal_func;
  3054. /*** initialize section ***/
  3055. ops_func->read_chip_version = read_chip_version;
  3056. /*
  3057. ops->init_default_value = NULL;
  3058. */
  3059. ops_func->read_adapter_info = rtl8821c_read_efuse;
  3060. ops_func->hal_power_on = rtl8821c_power_on;
  3061. ops_func->hal_power_off = rtl8821c_power_off;
  3062. ops_func->dm_init = rtl8821c_phy_init_dm_priv;
  3063. ops_func->dm_deinit = rtl8821c_phy_deinit_dm_priv;
  3064. /*** xmit section ***/
  3065. /*
  3066. ops->init_xmit_priv = NULL;
  3067. ops->free_xmit_priv = NULL;
  3068. ops->hal_xmit = NULL;
  3069. ops->mgnt_xmit = NULL;
  3070. ops->hal_xmitframe_enqueue = NULL;
  3071. #ifdef CONFIG_XMIT_THREAD_MODE
  3072. ops->xmit_thread_handler = NULL;
  3073. #endif
  3074. */
  3075. /*
  3076. ops_func->run_thread = rtl8821c_run_thread;
  3077. ops_func->cancel_thread = rtl8821c_cancel_thread;
  3078. */
  3079. /*** recv section ***/
  3080. /*
  3081. ops->init_recv_priv = NULL;
  3082. ops->free_recv_priv = NULL;
  3083. #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
  3084. ops->inirp_init = NULL;
  3085. ops->inirp_deinit = NULL;
  3086. #endif
  3087. */
  3088. /*** interrupt hdl section ***/
  3089. /*
  3090. ops->enable_interrupt = NULL;
  3091. ops->disable_interrupt = NULL;
  3092. */
  3093. ops_func->check_ips_status = check_ips_status;
  3094. /*
  3095. #if defined(CONFIG_PCI_HCI)
  3096. ops->interrupt_handler = NULL;
  3097. #endif
  3098. #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
  3099. ops->interrupt_handler = NULL;
  3100. #endif
  3101. #if defined(CONFIG_PCI_HCI)
  3102. ops->irp_reset = NULL;
  3103. #endif
  3104. */
  3105. /*** DM section ***/
  3106. /*
  3107. ops->InitSwLeds = NULL;
  3108. ops->DeInitSwLeds = NULL;
  3109. */
  3110. ops_func->set_chnl_bw_handler = rtl8821c_set_channel_bw;
  3111. ops_func->set_tx_power_level_handler = rtl8821c_set_tx_power_level;
  3112. ops_func->get_tx_power_level_handler = rtl8821c_get_tx_power_level;
  3113. ops_func->set_tx_power_index_handler = rtl8821c_set_tx_power_index;
  3114. ops_func->get_tx_power_index_handler = rtl8821c_get_tx_power_index;
  3115. ops_func->hal_dm_watchdog = rtl8821c_phy_haldm_watchdog;
  3116. #ifdef CONFIG_LPS_LCLK_WD_TIMER
  3117. ops_func->hal_dm_watchdog_in_lps = rtl8821c_phy_haldm_watchdog_in_lps;
  3118. #endif
  3119. ops_func->GetHalODMVarHandler = GetHalODMVar;
  3120. ops_func->SetHalODMVarHandler = SetHalODMVar;
  3121. ops_func->update_ra_mask_handler = update_ra_mask_8821c;
  3122. ops_func->SetBeaconRelatedRegistersHandler = set_beacon_related_registers;
  3123. #ifdef CONFIG_ANTENNA_DIVERSITY
  3124. /*
  3125. ops->AntDivBeforeLinkHandler = NULL;
  3126. ops->AntDivCompareHandler = NULL;
  3127. */
  3128. #endif
  3129. /*
  3130. ops->interface_ps_func = NULL;
  3131. */
  3132. ops_func->read_bbreg = rtl8821c_read_bb_reg;
  3133. ops_func->write_bbreg = rtl8821c_write_bb_reg;
  3134. ops_func->read_rfreg = rtl8821c_read_rf_reg;
  3135. ops_func->write_rfreg = rtl8821c_write_rf_reg;
  3136. #ifdef CONFIG_HOSTAPD_MLME
  3137. /*
  3138. ops->hostap_mgnt_xmit_entry = NULL;
  3139. */
  3140. #endif
  3141. /*
  3142. ops->EfusePowerSwitch = NULL;
  3143. ops->BTEfusePowerSwitch = NULL;
  3144. ops->ReadEFuse = NULL;
  3145. ops->EFUSEGetEfuseDefinition = NULL;
  3146. ops->EfuseGetCurrentSize = NULL;
  3147. ops->Efuse_PgPacketRead = NULL;
  3148. ops->Efuse_PgPacketWrite = NULL;
  3149. ops->Efuse_WordEnableDataWrite = NULL;
  3150. ops->Efuse_PgPacketWrite_BT = NULL;
  3151. */
  3152. #ifdef DBG_CONFIG_ERROR_DETECT
  3153. ops_func->sreset_init_value = sreset_init_value;
  3154. ops_func->sreset_reset_value = sreset_reset_value;
  3155. ops_func->silentreset = sreset_reset;
  3156. ops_func->sreset_xmit_status_check = xmit_status_check;
  3157. ops_func->sreset_linked_status_check = linked_status_check;
  3158. ops_func->sreset_get_wifi_status = sreset_get_wifi_status;
  3159. ops_func->sreset_inprogress = sreset_inprogress;
  3160. #endif /* DBG_CONFIG_ERROR_DETECT */
  3161. #ifdef CONFIG_IOL
  3162. /*
  3163. ops->IOL_exec_cmds_sync = NULL;
  3164. */
  3165. #endif
  3166. ops_func->hal_notch_filter = rtl8821c_notch_filter_switch;
  3167. ops_func->hal_mac_c2h_handler = c2h_handler_rtl8821c;
  3168. ops_func->fill_h2c_cmd = rtl8821c_fillh2ccmd;
  3169. ops_func->fill_fake_txdesc = fill_fake_txdesc;
  3170. ops_func->fw_dl = rtl8821c_fw_dl;
  3171. #ifdef CONFIG_LPS_PG
  3172. ops_func->fw_mem_dl = rtl8821c_fw_mem_dl;
  3173. #endif
  3174. #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
  3175. /*
  3176. ops->clear_interrupt = NULL;
  3177. */
  3178. #endif
  3179. ops_func->hal_get_tx_buff_rsvd_page_num = get_txbuffer_rsvdpagenum;
  3180. #ifdef CONFIG_GPIO_API
  3181. /*
  3182. ops->update_hisr_hsisr_ind = NULL;
  3183. */
  3184. #endif
  3185. ops_func->fw_correct_bcn = rtl8821c_fw_update_beacon_cmd;
  3186. /* HALMAC related functions */
  3187. ops_func->init_mac_register = rtl8821c_init_phy_parameter_mac;
  3188. ops_func->init_phy = rtl8821c_phy_init;
  3189. }