halmac_func_88xx.c 145 KB

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  1. #include "halmac_88xx_cfg.h"
  2. HALMAC_RET_STATUS
  3. halmac_dump_efuse_fw_88xx(
  4. IN PHALMAC_ADAPTER pHalmac_adapter
  5. );
  6. HALMAC_RET_STATUS
  7. halmac_dump_efuse_drv_88xx(
  8. IN PHALMAC_ADAPTER pHalmac_adapter
  9. );
  10. HALMAC_RET_STATUS
  11. halmac_update_eeprom_mask_88xx(
  12. IN PHALMAC_ADAPTER pHalmac_adapter,
  13. INOUT PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  14. OUT u8 *pEeprom_mask_updated
  15. );
  16. HALMAC_RET_STATUS
  17. halmac_check_efuse_enough_88xx(
  18. IN PHALMAC_ADAPTER pHalmac_adapter,
  19. IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  20. IN u8 *pEeprom_mask_updated
  21. );
  22. HALMAC_RET_STATUS
  23. halmac_program_efuse_88xx(
  24. IN PHALMAC_ADAPTER pHalmac_adapter,
  25. IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  26. IN u8 *pEeprom_mask_updated
  27. );
  28. HALMAC_RET_STATUS
  29. halmac_pwr_sub_seq_parer_88xx(
  30. IN PHALMAC_ADAPTER pHalmac_adapter,
  31. IN u8 cut,
  32. IN u8 fab,
  33. IN u8 intf,
  34. IN PHALMAC_WLAN_PWR_CFG pPwr_sub_seq_cfg
  35. );
  36. HALMAC_RET_STATUS
  37. halmac_parse_c2h_debug_88xx(
  38. IN PHALMAC_ADAPTER pHalmac_adapter,
  39. IN u8 *pC2h_buf,
  40. IN u32 c2h_size
  41. );
  42. HALMAC_RET_STATUS
  43. halmac_parse_scan_status_rpt_88xx(
  44. IN PHALMAC_ADAPTER pHalmac_adapter,
  45. IN u8 *pC2h_buf,
  46. IN u32 c2h_size
  47. );
  48. HALMAC_RET_STATUS
  49. halmac_parse_psd_data_88xx(
  50. IN PHALMAC_ADAPTER pHalmac_adapter,
  51. IN u8 *pC2h_buf,
  52. IN u32 c2h_size
  53. );
  54. HALMAC_RET_STATUS
  55. halmac_parse_efuse_data_88xx(
  56. IN PHALMAC_ADAPTER pHalmac_adapter,
  57. IN u8 *pC2h_buf,
  58. IN u32 c2h_size
  59. );
  60. HALMAC_RET_STATUS
  61. halmac_parse_h2c_ack_88xx(
  62. IN PHALMAC_ADAPTER pHalmac_adapter,
  63. IN u8 *pC2h_buf,
  64. IN u32 c2h_size
  65. );
  66. HALMAC_RET_STATUS
  67. halmac_parse_h2c_ack_physical_efuse_88xx(
  68. IN PHALMAC_ADAPTER pHalmac_adapter,
  69. IN u8 *pC2h_buf,
  70. IN u32 c2h_size
  71. );
  72. HALMAC_RET_STATUS
  73. halmac_enqueue_para_buff_88xx(
  74. IN PHALMAC_ADAPTER pHalmac_adapter,
  75. IN PHALMAC_PHY_PARAMETER_INFO para_info,
  76. IN u8 *pCurr_buff_wptr,
  77. OUT u8 *pEnd_cmd
  78. );
  79. HALMAC_RET_STATUS
  80. halmac_parse_h2c_ack_phy_efuse_88xx(
  81. IN PHALMAC_ADAPTER pHalmac_adapter,
  82. IN u8 *pC2h_buf,
  83. IN u32 c2h_size
  84. );
  85. HALMAC_RET_STATUS
  86. halmac_parse_h2c_ack_cfg_para_88xx(
  87. IN PHALMAC_ADAPTER pHalmac_adapter,
  88. IN u8 *pC2h_buf,
  89. IN u32 c2h_size
  90. );
  91. HALMAC_RET_STATUS
  92. halmac_gen_cfg_para_h2c_88xx(
  93. IN PHALMAC_ADAPTER pHalmac_adapter,
  94. IN u8 *pH2c_buff
  95. );
  96. HALMAC_RET_STATUS
  97. halmac_parse_h2c_ack_update_packet_88xx(
  98. IN PHALMAC_ADAPTER pHalmac_adapter,
  99. IN u8 *pC2h_buf,
  100. IN u32 c2h_size
  101. );
  102. HALMAC_RET_STATUS
  103. halmac_parse_h2c_ack_update_datapack_88xx(
  104. IN PHALMAC_ADAPTER pHalmac_adapter,
  105. IN u8 *pC2h_buf,
  106. IN u32 c2h_size
  107. );
  108. HALMAC_RET_STATUS
  109. halmac_parse_h2c_ack_run_datapack_88xx(
  110. IN PHALMAC_ADAPTER pHalmac_adapter,
  111. IN u8 *pC2h_buf,
  112. IN u32 c2h_size
  113. );
  114. HALMAC_RET_STATUS
  115. halmac_parse_h2c_ack_channel_switch_88xx(
  116. IN PHALMAC_ADAPTER pHalmac_adapter,
  117. IN u8 *pC2h_buf,
  118. IN u32 c2h_size
  119. );
  120. HALMAC_RET_STATUS
  121. halmac_parse_h2c_ack_iqk_88xx(
  122. IN PHALMAC_ADAPTER pHalmac_adapter,
  123. IN u8 *pC2h_buf,
  124. IN u32 c2h_size
  125. );
  126. HALMAC_RET_STATUS
  127. halmac_parse_h2c_ack_power_tracking_88xx(
  128. IN PHALMAC_ADAPTER pHalmac_adapter,
  129. IN u8 *pC2h_buf,
  130. IN u32 c2h_size
  131. );
  132. VOID
  133. halmac_init_offload_feature_state_machine_88xx(
  134. IN PHALMAC_ADAPTER pHalmac_adapter
  135. )
  136. {
  137. PHALMAC_STATE pState = &(pHalmac_adapter->halmac_state);
  138. pState->efuse_state_set.efuse_cmd_construct_state = HALMAC_EFUSE_CMD_CONSTRUCT_IDLE;
  139. pState->efuse_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  140. pState->efuse_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  141. pState->cfg_para_state_set.cfg_para_cmd_construct_state = HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE;
  142. pState->cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  143. pState->cfg_para_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  144. pState->scan_state_set.scan_cmd_construct_state = HALMAC_SCAN_CMD_CONSTRUCT_IDLE;
  145. pState->scan_state_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  146. pState->scan_state_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  147. pState->update_packet_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  148. pState->update_packet_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  149. pState->iqk_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  150. pState->iqk_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  151. pState->power_tracking_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  152. pState->power_tracking_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  153. pState->psd_set.process_status = HALMAC_CMD_PROCESS_IDLE;
  154. pState->psd_set.seq_num = pHalmac_adapter->h2c_packet_seq;
  155. pState->psd_set.data_size = 0;
  156. pState->psd_set.segment_size = 0;
  157. pState->psd_set.pData = NULL;
  158. }
  159. HALMAC_RET_STATUS
  160. halmac_dump_efuse_88xx(
  161. IN PHALMAC_ADAPTER pHalmac_adapter,
  162. IN HALMAC_EFUSE_READ_CFG cfg
  163. )
  164. {
  165. u32 chk_h2c_init;
  166. VOID *pDriver_adapter = NULL;
  167. PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  168. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  169. HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.efuse_state_set.process_status);
  170. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  171. *pProcess_status = HALMAC_CMD_PROCESS_SENDING;
  172. if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT))
  173. return HALMAC_RET_ERROR_STATE;
  174. if (HALMAC_EFUSE_R_AUTO == cfg) {
  175. chk_h2c_init = HALMAC_REG_READ_32(pHalmac_adapter, REG_H2C_PKT_READADDR);
  176. if (HALMAC_DLFW_NONE == pHalmac_adapter->halmac_state.dlfw_state || 0 == chk_h2c_init)
  177. status = halmac_dump_efuse_drv_88xx(pHalmac_adapter);
  178. else
  179. status = halmac_dump_efuse_fw_88xx(pHalmac_adapter);
  180. } else if (HALMAC_EFUSE_R_FW == cfg) {
  181. status = halmac_dump_efuse_fw_88xx(pHalmac_adapter);
  182. } else {
  183. status = halmac_dump_efuse_drv_88xx(pHalmac_adapter);
  184. }
  185. if (HALMAC_RET_SUCCESS != status) {
  186. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "halmac_read_efuse error = %x\n", status);
  187. return status;
  188. }
  189. return status;
  190. }
  191. HALMAC_RET_STATUS
  192. halmac_func_read_efuse_88xx(
  193. IN PHALMAC_ADAPTER pHalmac_adapter,
  194. IN u32 offset,
  195. IN u32 size,
  196. OUT u8 *pEfuse_map
  197. )
  198. {
  199. VOID *pDriver_adapter = NULL;
  200. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  201. if (NULL == pEfuse_map) {
  202. PLATFORM_MSG_PRINT(pHalmac_adapter->pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Malloc for dump efuse map error\n");
  203. return HALMAC_RET_NULL_POINTER;
  204. }
  205. if (_TRUE == pHalmac_adapter->hal_efuse_map_valid)
  206. PLATFORM_RTL_MEMCPY(pDriver_adapter, pEfuse_map, pHalmac_adapter->pHalEfuse_map + offset, size);
  207. else
  208. if (HALMAC_RET_SUCCESS != halmac_read_hw_efuse_88xx(pHalmac_adapter, offset, size, pEfuse_map))
  209. return HALMAC_RET_EFUSE_R_FAIL;
  210. return HALMAC_RET_SUCCESS;
  211. }
  212. HALMAC_RET_STATUS
  213. halmac_read_hw_efuse_88xx(
  214. IN PHALMAC_ADAPTER pHalmac_adapter,
  215. IN u32 offset,
  216. IN u32 size,
  217. OUT u8 *pEfuse_map
  218. )
  219. {
  220. u8 value8;
  221. u32 value32;
  222. u32 address;
  223. u32 tmp32, counter;
  224. VOID *pDriver_adapter = NULL;
  225. PHALMAC_API pHalmac_api;
  226. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  227. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  228. /* Read efuse no need 2.5V LDO */
  229. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3);
  230. if (value8 & BIT(7))
  231. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3, (u8)(value8 & ~(BIT(7))));
  232. value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
  233. for (address = offset; address < offset + size; address++) {
  234. value32 = value32 & ~((BIT_MASK_EF_DATA) | (BIT_MASK_EF_ADDR << BIT_SHIFT_EF_ADDR));
  235. value32 = value32 | ((address & BIT_MASK_EF_ADDR) << BIT_SHIFT_EF_ADDR);
  236. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_EFUSE_CTRL, value32 & (~BIT_EF_FLAG));
  237. counter = 1000000;
  238. do {
  239. PLATFORM_RTL_DELAY_US(pDriver_adapter, 1);
  240. tmp32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
  241. counter--;
  242. if (0 == counter) {
  243. PLATFORM_MSG_PRINT(pHalmac_adapter->pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "HALMAC_RET_EFUSE_R_FAIL\n");
  244. return HALMAC_RET_EFUSE_R_FAIL;
  245. }
  246. } while (0 == (tmp32 & BIT_EF_FLAG));
  247. *(pEfuse_map + address - offset) = (u8)(tmp32 & BIT_MASK_EF_DATA);
  248. }
  249. return HALMAC_RET_SUCCESS;
  250. }
  251. HALMAC_RET_STATUS
  252. halmac_dump_efuse_drv_88xx(
  253. IN PHALMAC_ADAPTER pHalmac_adapter
  254. )
  255. {
  256. u8 *pEfuse_map = NULL;
  257. u32 efuse_size;
  258. VOID *pDriver_adapter = NULL;
  259. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  260. efuse_size = pHalmac_adapter->hw_config_info.efuse_size;
  261. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  262. pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
  263. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  264. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate efuse map Fail!!\n");
  265. return HALMAC_RET_MALLOC_FAIL;
  266. }
  267. }
  268. pEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
  269. if (NULL == pEfuse_map) {
  270. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local efuse map Fail!!\n");
  271. return HALMAC_RET_MALLOC_FAIL;
  272. }
  273. if (HALMAC_RET_SUCCESS != halmac_read_hw_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map)) {
  274. PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
  275. return HALMAC_RET_EFUSE_R_FAIL;
  276. }
  277. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  278. PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pEfuse_map, efuse_size);
  279. pHalmac_adapter->hal_efuse_map_valid = _TRUE;
  280. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  281. PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
  282. return HALMAC_RET_SUCCESS;
  283. }
  284. HALMAC_RET_STATUS
  285. halmac_dump_efuse_fw_88xx(
  286. IN PHALMAC_ADAPTER pHalmac_adapter
  287. )
  288. {
  289. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  290. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  291. u16 h2c_seq_mum = 0;
  292. VOID *pDriver_adapter = NULL;
  293. HALMAC_H2C_HEADER_INFO h2c_header_info;
  294. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  295. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  296. h2c_header_info.sub_cmd_id = SUB_CMD_ID_DUMP_PHYSICAL_EFUSE;
  297. h2c_header_info.content_size = 0;
  298. h2c_header_info.ack = _TRUE;
  299. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  300. pHalmac_adapter->halmac_state.efuse_state_set.seq_num = h2c_seq_mum;
  301. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  302. pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pHalmac_adapter->hw_config_info.efuse_size);
  303. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  304. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac allocate efuse map Fail!!\n");
  305. return HALMAC_RET_MALLOC_FAIL;
  306. }
  307. }
  308. if (_FALSE == pHalmac_adapter->hal_efuse_map_valid) {
  309. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  310. if (HALMAC_RET_SUCCESS != status) {
  311. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_read_efuse_fw Fail = %x!!\n", status);
  312. return status;
  313. }
  314. }
  315. return HALMAC_RET_SUCCESS;
  316. }
  317. HALMAC_RET_STATUS
  318. halmac_func_write_efuse_88xx(
  319. IN PHALMAC_ADAPTER pHalmac_adapter,
  320. IN u32 offset,
  321. IN u8 value
  322. )
  323. {
  324. const u8 wite_protect_code = 0x69;
  325. u32 value32, tmp32, counter;
  326. VOID *pDriver_adapter = NULL;
  327. PHALMAC_API pHalmac_api;
  328. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  329. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  330. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  331. pHalmac_adapter->hal_efuse_map_valid = _FALSE;
  332. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  333. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PMC_DBG_CTRL2 + 3, wite_protect_code);
  334. /* Enable 2.5V LDO */
  335. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3) | BIT(7)));
  336. value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
  337. value32 = value32 & ~((BIT_MASK_EF_DATA) | (BIT_MASK_EF_ADDR << BIT_SHIFT_EF_ADDR));
  338. value32 = value32 | ((offset & BIT_MASK_EF_ADDR) << BIT_SHIFT_EF_ADDR) | (value & BIT_MASK_EF_DATA);
  339. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_EFUSE_CTRL, value32 | BIT_EF_FLAG);
  340. counter = 1000000;
  341. do {
  342. PLATFORM_RTL_DELAY_US(pDriver_adapter, 1);
  343. tmp32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_EFUSE_CTRL);
  344. counter--;
  345. if (0 == counter) {
  346. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_write_efuse Fail !!\n");
  347. return HALMAC_RET_EFUSE_W_FAIL;
  348. }
  349. } while (BIT_EF_FLAG == (tmp32 & BIT_EF_FLAG));
  350. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PMC_DBG_CTRL2 + 3, 0x00);
  351. /* Disable 2.5V LDO */
  352. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 3) & ~(BIT(7))));
  353. return HALMAC_RET_SUCCESS;
  354. }
  355. HALMAC_RET_STATUS
  356. halmac_func_switch_efuse_bank_88xx(
  357. IN PHALMAC_ADAPTER pHalmac_adapter,
  358. IN HALMAC_EFUSE_BANK efuse_bank
  359. )
  360. {
  361. u8 reg_value;
  362. PHALMAC_API pHalmac_api;
  363. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  364. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  365. if (HALMAC_RET_SUCCESS != halmac_transition_efuse_state_88xx(pHalmac_adapter, HALMAC_EFUSE_CMD_CONSTRUCT_BUSY))
  366. return HALMAC_RET_ERROR_STATE;
  367. reg_value = HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 1);
  368. if (efuse_bank == (reg_value & (BIT(0) | BIT(1))))
  369. return HALMAC_RET_SUCCESS;
  370. reg_value &= ~(BIT(0) | BIT(1));
  371. reg_value |= efuse_bank;
  372. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 1, reg_value);
  373. if ((HALMAC_REG_READ_8(pHalmac_adapter, REG_LDO_EFUSE_CTRL + 1) & (BIT(0) | BIT(1))) != efuse_bank)
  374. return HALMAC_RET_SWITCH_EFUSE_BANK_FAIL;
  375. return HALMAC_RET_SUCCESS;
  376. }
  377. HALMAC_RET_STATUS
  378. halmac_eeprom_parser_88xx(
  379. IN PHALMAC_ADAPTER pHalmac_adapter,
  380. IN u8 *pPhysical_efuse_map,
  381. OUT u8 *pLogical_efuse_map
  382. )
  383. {
  384. u8 j;
  385. u8 value8;
  386. u8 block_index;
  387. u8 valid_word_enable, word_enable;
  388. u8 efuse_read_header, efuse_read_header2 = 0;
  389. u32 eeprom_index;
  390. u32 efuse_index = 0;
  391. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  392. VOID *pDriver_adapter = NULL;
  393. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  394. PLATFORM_RTL_MEMSET(pDriver_adapter, pLogical_efuse_map, 0xFF, eeprom_size);
  395. do {
  396. value8 = *(pPhysical_efuse_map + efuse_index);
  397. efuse_read_header = value8;
  398. if ((efuse_read_header & 0x1f) == 0x0f) {
  399. efuse_index++;
  400. value8 = *(pPhysical_efuse_map + efuse_index);
  401. efuse_read_header2 = value8;
  402. block_index = ((efuse_read_header2 & 0xF0) >> 1) | ((efuse_read_header >> 5) & 0x07);
  403. word_enable = efuse_read_header2 & 0x0F;
  404. } else {
  405. block_index = (efuse_read_header & 0xF0) >> 4;
  406. word_enable = efuse_read_header & 0x0F;
  407. }
  408. if (efuse_read_header == 0xff)
  409. break;
  410. efuse_index++;
  411. if (efuse_index >= pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - 1)
  412. return HALMAC_RET_EEPROM_PARSING_FAIL;
  413. for (j = 0; j < 4; j++) {
  414. valid_word_enable = (u8)((~(word_enable >> j)) & BIT(0));
  415. if (valid_word_enable == 1) {
  416. eeprom_index = (block_index << 3) + (j << 1);
  417. if ((eeprom_index + 1) > eeprom_size) {
  418. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Error: EEPROM addr exceeds eeprom_size:0x%X, at eFuse 0x%X\n", eeprom_size, efuse_index - 1);
  419. if ((efuse_read_header & 0x1f) == 0x0f)
  420. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Error: EEPROM header: 0x%X, 0x%X,\n", efuse_read_header, efuse_read_header2);
  421. else
  422. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "Error: EEPROM header: 0x%X,\n", efuse_read_header);
  423. return HALMAC_RET_EEPROM_PARSING_FAIL;
  424. } else {
  425. value8 = *(pPhysical_efuse_map + efuse_index);
  426. *(pLogical_efuse_map + eeprom_index) = value8;
  427. eeprom_index++;
  428. efuse_index++;
  429. if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX - 1)
  430. return HALMAC_RET_EEPROM_PARSING_FAIL;
  431. value8 = *(pPhysical_efuse_map + efuse_index);
  432. *(pLogical_efuse_map + eeprom_index) = value8;
  433. efuse_index++;
  434. if (efuse_index > pHalmac_adapter->hw_config_info.efuse_size - HALMAC_PROTECTED_EFUSE_SIZE_88XX)
  435. return HALMAC_RET_EEPROM_PARSING_FAIL;
  436. }
  437. }
  438. }
  439. } while (1);
  440. pHalmac_adapter->efuse_end = efuse_index;
  441. return HALMAC_RET_SUCCESS;
  442. }
  443. HALMAC_RET_STATUS
  444. halmac_read_logical_efuse_map_88xx(
  445. IN PHALMAC_ADAPTER pHalmac_adapter,
  446. IN u8 *pMap
  447. )
  448. {
  449. u8 *pEfuse_map = NULL;
  450. u32 efuse_size;
  451. VOID *pDriver_adapter = NULL;
  452. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  453. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  454. efuse_size = pHalmac_adapter->hw_config_info.efuse_size;
  455. if (_FALSE == pHalmac_adapter->hal_efuse_map_valid) {
  456. pEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
  457. if (NULL == pEfuse_map) {
  458. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local efuse map Fail!!\n");
  459. return HALMAC_RET_MALLOC_FAIL;
  460. }
  461. status = halmac_func_read_efuse_88xx(pHalmac_adapter, 0, efuse_size, pEfuse_map);
  462. if (HALMAC_RET_SUCCESS != status) {
  463. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_read_efuse error = %x\n", status);
  464. PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
  465. return status;
  466. }
  467. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  468. pHalmac_adapter->pHalEfuse_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, efuse_size);
  469. if (NULL == pHalmac_adapter->pHalEfuse_map) {
  470. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate efuse map Fail!!\n");
  471. PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
  472. return HALMAC_RET_MALLOC_FAIL;
  473. }
  474. }
  475. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  476. PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map, pEfuse_map, efuse_size);
  477. pHalmac_adapter->hal_efuse_map_valid = _TRUE;
  478. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  479. PLATFORM_RTL_FREE(pDriver_adapter, pEfuse_map, efuse_size);
  480. }
  481. if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pMap))
  482. return HALMAC_RET_EEPROM_PARSING_FAIL;
  483. return status;
  484. }
  485. HALMAC_RET_STATUS
  486. halmac_func_write_logical_efuse_88xx(
  487. IN PHALMAC_ADAPTER pHalmac_adapter,
  488. IN u32 offset,
  489. IN u8 value
  490. )
  491. {
  492. u8 pg_efuse_byte1, pg_efuse_byte2;
  493. u8 pg_block, pg_block_index;
  494. u8 pg_efuse_header, pg_efuse_header2;
  495. u8 *pEeprom_map = NULL;
  496. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  497. u32 efuse_end, pg_efuse_num;
  498. VOID *pDriver_adapter = NULL;
  499. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  500. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  501. pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
  502. if (NULL == pEeprom_map) {
  503. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
  504. return HALMAC_RET_MALLOC_FAIL;
  505. }
  506. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
  507. status = halmac_read_logical_efuse_map_88xx(pHalmac_adapter, pEeprom_map);
  508. if (HALMAC_RET_SUCCESS != status) {
  509. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_read_logical_efuse_map_88xx error = %x\n", status);
  510. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  511. return status;
  512. }
  513. if (*(pEeprom_map + offset) != value) {
  514. efuse_end = pHalmac_adapter->efuse_end;
  515. pg_block = (u8)(offset >> 3);
  516. pg_block_index = (u8)((offset & (8 - 1)) >> 1);
  517. if (offset > 0x7f) {
  518. pg_efuse_header = (((pg_block & 0x07) << 5) & 0xE0) | 0x0F;
  519. pg_efuse_header2 = (u8)(((pg_block & 0x78) << 1) + ((0x1 << pg_block_index) ^ 0x0F));
  520. } else {
  521. pg_efuse_header = (u8)((pg_block << 4) + ((0x01 << pg_block_index) ^ 0x0F));
  522. }
  523. if ((offset & 1) == 0) {
  524. pg_efuse_byte1 = value;
  525. pg_efuse_byte2 = *(pEeprom_map + offset + 1);
  526. } else {
  527. pg_efuse_byte1 = *(pEeprom_map + offset - 1);
  528. pg_efuse_byte2 = value;
  529. }
  530. if (offset > 0x7f) {
  531. pg_efuse_num = 4;
  532. if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end)) {
  533. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  534. return HALMAC_RET_EFUSE_NOT_ENOUGH;
  535. }
  536. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
  537. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_header2);
  538. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 2, pg_efuse_byte1);
  539. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 3, pg_efuse_byte2);
  540. } else {
  541. pg_efuse_num = 3;
  542. if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end)) {
  543. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  544. return HALMAC_RET_EFUSE_NOT_ENOUGH;
  545. }
  546. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
  547. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_byte1);
  548. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 2, pg_efuse_byte2);
  549. }
  550. if (HALMAC_RET_SUCCESS != status) {
  551. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_write_logical_efuse error = %x\n", status);
  552. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  553. return status;
  554. }
  555. }
  556. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  557. return HALMAC_RET_SUCCESS;
  558. }
  559. HALMAC_RET_STATUS
  560. halmac_func_pg_efuse_by_map_88xx(
  561. IN PHALMAC_ADAPTER pHalmac_adapter,
  562. IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  563. IN HALMAC_EFUSE_READ_CFG cfg
  564. )
  565. {
  566. u8 *pEeprom_mask_updated = NULL;
  567. u32 eeprom_mask_size = pHalmac_adapter->hw_config_info.eeprom_size >> 4;
  568. VOID *pDriver_adapter = NULL;
  569. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  570. pEeprom_mask_updated = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_mask_size);
  571. if (NULL == pEeprom_mask_updated) {
  572. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
  573. return HALMAC_RET_MALLOC_FAIL;
  574. }
  575. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_mask_updated, 0x00, eeprom_mask_size);
  576. status = halmac_update_eeprom_mask_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
  577. if (HALMAC_RET_SUCCESS != status) {
  578. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_update_eeprom_mask_88xx error = %x\n", status);
  579. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
  580. return status;
  581. }
  582. status = halmac_check_efuse_enough_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
  583. if (HALMAC_RET_SUCCESS != status) {
  584. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_check_efuse_enough_88xx error = %x\n", status);
  585. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
  586. return status;
  587. }
  588. status = halmac_program_efuse_88xx(pHalmac_adapter, pPg_efuse_info, pEeprom_mask_updated);
  589. if (HALMAC_RET_SUCCESS != status) {
  590. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac_program_efuse_88xx error = %x\n", status);
  591. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
  592. return status;
  593. }
  594. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_mask_updated, eeprom_mask_size);
  595. return HALMAC_RET_SUCCESS;
  596. }
  597. HALMAC_RET_STATUS
  598. halmac_update_eeprom_mask_88xx(
  599. IN PHALMAC_ADAPTER pHalmac_adapter,
  600. INOUT PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  601. OUT u8 *pEeprom_mask_updated
  602. )
  603. {
  604. u8 *pEeprom_map = NULL;
  605. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  606. u8 *pEeprom_map_pg, *pEeprom_mask;
  607. u16 i, j;
  608. u16 map_byte_offset, mask_byte_offset;
  609. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  610. VOID *pDriver_adapter = NULL;
  611. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  612. pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
  613. if (NULL == pEeprom_map) {
  614. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
  615. return HALMAC_RET_MALLOC_FAIL;
  616. }
  617. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
  618. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_mask_updated, 0x00, pPg_efuse_info->efuse_mask_size);
  619. status = halmac_read_logical_efuse_map_88xx(pHalmac_adapter, pEeprom_map);
  620. if (HALMAC_RET_SUCCESS != status) {
  621. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  622. return status;
  623. }
  624. pEeprom_map_pg = pPg_efuse_info->pEfuse_map;
  625. pEeprom_mask = pPg_efuse_info->pEfuse_mask;
  626. for (i = 0; i < pPg_efuse_info->efuse_mask_size; i++)
  627. *(pEeprom_mask_updated + i) = *(pEeprom_mask + i);
  628. for (i = 0; i < pPg_efuse_info->efuse_map_size; i = i + 16) {
  629. for (j = 0; j < 16; j = j + 2) {
  630. map_byte_offset = i + j;
  631. mask_byte_offset = i >> 4;
  632. if (*(pEeprom_map_pg + map_byte_offset) == *(pEeprom_map + map_byte_offset)) {
  633. if (*(pEeprom_map_pg + map_byte_offset + 1) == *(pEeprom_map + map_byte_offset + 1)) {
  634. switch (j) {
  635. case 0:
  636. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(4) ^ 0xFF);
  637. break;
  638. case 2:
  639. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(5) ^ 0xFF);
  640. break;
  641. case 4:
  642. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(6) ^ 0xFF);
  643. break;
  644. case 6:
  645. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(7) ^ 0xFF);
  646. break;
  647. case 8:
  648. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(0) ^ 0xFF);
  649. break;
  650. case 10:
  651. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(1) ^ 0xFF);
  652. break;
  653. case 12:
  654. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(2) ^ 0xFF);
  655. break;
  656. case 14:
  657. *(pEeprom_mask_updated + mask_byte_offset) = *(pEeprom_mask_updated + mask_byte_offset) & (BIT(3) ^ 0xFF);
  658. break;
  659. default:
  660. break;
  661. }
  662. }
  663. }
  664. }
  665. }
  666. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  667. return status;
  668. }
  669. HALMAC_RET_STATUS
  670. halmac_check_efuse_enough_88xx(
  671. IN PHALMAC_ADAPTER pHalmac_adapter,
  672. IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  673. IN u8 *pEeprom_mask_updated
  674. )
  675. {
  676. u8 pre_word_enb, word_enb;
  677. u8 pg_efuse_header, pg_efuse_header2;
  678. u8 pg_block;
  679. u16 i, j;
  680. u32 efuse_end;
  681. u32 tmp_eeprom_offset, pg_efuse_num = 0;
  682. efuse_end = pHalmac_adapter->efuse_end;
  683. for (i = 0; i < pPg_efuse_info->efuse_map_size; i = i + 8) {
  684. tmp_eeprom_offset = i;
  685. if ((tmp_eeprom_offset & 7) > 0) {
  686. pre_word_enb = (*(pEeprom_mask_updated + (i >> 4)) & 0x0F);
  687. word_enb = pre_word_enb ^ 0x0F;
  688. } else {
  689. pre_word_enb = (*(pEeprom_mask_updated + (i >> 4)) >> 4);
  690. word_enb = pre_word_enb ^ 0x0F;
  691. }
  692. pg_block = (u8)(tmp_eeprom_offset >> 3);
  693. if (pre_word_enb > 0) {
  694. if (tmp_eeprom_offset > 0x7f) {
  695. pg_efuse_header = (((pg_block & 0x07) << 5) & 0xE0) | 0x0F;
  696. pg_efuse_header2 = (u8)(((pg_block & 0x78) << 1) + word_enb);
  697. } else {
  698. pg_efuse_header = (u8)((pg_block << 4) + word_enb);
  699. }
  700. if (tmp_eeprom_offset > 0x7f) {
  701. pg_efuse_num++;
  702. pg_efuse_num++;
  703. efuse_end = efuse_end + 2;
  704. for (j = 0; j < 4; j++) {
  705. if (((pre_word_enb >> j) & 0x1) > 0) {
  706. pg_efuse_num++;
  707. pg_efuse_num++;
  708. efuse_end = efuse_end + 2;
  709. }
  710. }
  711. } else {
  712. pg_efuse_num++;
  713. efuse_end = efuse_end + 1;
  714. for (j = 0; j < 4; j++) {
  715. if (((pre_word_enb >> j) & 0x1) > 0) {
  716. pg_efuse_num++;
  717. pg_efuse_num++;
  718. efuse_end = efuse_end + 2;
  719. }
  720. }
  721. }
  722. }
  723. }
  724. if (pHalmac_adapter->hw_config_info.efuse_size <= (pg_efuse_num + HALMAC_PROTECTED_EFUSE_SIZE_88XX + pHalmac_adapter->efuse_end))
  725. return HALMAC_RET_EFUSE_NOT_ENOUGH;
  726. return HALMAC_RET_SUCCESS;
  727. }
  728. HALMAC_RET_STATUS
  729. halmac_program_efuse_88xx(
  730. IN PHALMAC_ADAPTER pHalmac_adapter,
  731. IN PHALMAC_PG_EFUSE_INFO pPg_efuse_info,
  732. IN u8 *pEeprom_mask_updated
  733. )
  734. {
  735. u8 pre_word_enb, word_enb;
  736. u8 pg_efuse_header, pg_efuse_header2;
  737. u8 pg_block;
  738. u16 i, j;
  739. u32 efuse_end;
  740. u32 tmp_eeprom_offset;
  741. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  742. efuse_end = pHalmac_adapter->efuse_end;
  743. for (i = 0; i < pPg_efuse_info->efuse_map_size; i = i + 8) {
  744. tmp_eeprom_offset = i;
  745. if (((tmp_eeprom_offset >> 3) & 1) > 0) {
  746. pre_word_enb = (*(pEeprom_mask_updated + (i >> 4)) & 0x0F);
  747. word_enb = pre_word_enb ^ 0x0F;
  748. } else {
  749. pre_word_enb = (*(pEeprom_mask_updated + (i >> 4)) >> 4);
  750. word_enb = pre_word_enb ^ 0x0F;
  751. }
  752. pg_block = (u8)(tmp_eeprom_offset >> 3);
  753. if (pre_word_enb > 0) {
  754. if (tmp_eeprom_offset > 0x7f) {
  755. pg_efuse_header = (((pg_block & 0x07) << 5) & 0xE0) | 0x0F;
  756. pg_efuse_header2 = (u8)(((pg_block & 0x78) << 1) + word_enb);
  757. } else {
  758. pg_efuse_header = (u8)((pg_block << 4) + word_enb);
  759. }
  760. if (tmp_eeprom_offset > 0x7f) {
  761. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
  762. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, pg_efuse_header2);
  763. efuse_end = efuse_end + 2;
  764. for (j = 0; j < 4; j++) {
  765. if (((pre_word_enb >> j) & 0x1) > 0) {
  766. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
  767. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1) + 1));
  768. efuse_end = efuse_end + 2;
  769. }
  770. }
  771. } else {
  772. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, pg_efuse_header);
  773. efuse_end = efuse_end + 1;
  774. for (j = 0; j < 4; j++) {
  775. if (((pre_word_enb >> j) & 0x1) > 0) {
  776. halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1)));
  777. status = halmac_func_write_efuse_88xx(pHalmac_adapter, efuse_end + 1, *(pPg_efuse_info->pEfuse_map + tmp_eeprom_offset + (j << 1) + 1));
  778. efuse_end = efuse_end + 2;
  779. }
  780. }
  781. }
  782. }
  783. }
  784. return status;
  785. }
  786. HALMAC_RET_STATUS
  787. halmac_update_fw_info_88xx(
  788. IN PHALMAC_ADAPTER pHalmac_adapter,
  789. IN u8 *pHamacl_fw,
  790. IN u32 halmac_fw_size
  791. )
  792. {
  793. PHALMAC_FW_VERSION pFw_info = &(pHalmac_adapter->fw_version);
  794. pFw_info->version = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_VERSION_88XX)));
  795. pFw_info->sub_version = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBVERSION_88XX);
  796. pFw_info->sub_index = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_SUBINDEX_88XX);
  797. pFw_info->h2c_version = (u16)rtk_le32_to_cpu(*((u32 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_H2C_FORMAT_VER_88XX)));
  798. pFw_info->build_time.month = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_MONTH_88XX);
  799. pFw_info->build_time.date = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_DATE_88XX);
  800. pFw_info->build_time.hour = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_HOUR_88XX);
  801. pFw_info->build_time.min = *(pHamacl_fw + HALMAC_FWHDR_OFFSET_MIN_88XX);
  802. pFw_info->build_time.year = rtk_le16_to_cpu(*((u16 *)(pHamacl_fw + HALMAC_FWHDR_OFFSET_YEAR_88XX)));
  803. return HALMAC_RET_SUCCESS;
  804. }
  805. HALMAC_RET_STATUS
  806. halmac_dlfw_to_mem_88xx(
  807. IN PHALMAC_ADAPTER pHalmac_adapter,
  808. IN u8 *pRam_code,
  809. IN u32 dest,
  810. IN u32 code_size
  811. )
  812. {
  813. u8 *pCode_ptr;
  814. u8 first_part;
  815. u32 mem_offset;
  816. u32 pkt_size_tmp, send_pkt_size;
  817. VOID *pDriver_adapter = NULL;
  818. PHALMAC_API pHalmac_api;
  819. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  820. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  821. pCode_ptr = pRam_code;
  822. mem_offset = 0;
  823. first_part = 1;
  824. pkt_size_tmp = code_size;
  825. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0CTRL, HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) | BIT_DDMACH0_RESET_CHKSUM_STS);
  826. while (0 != pkt_size_tmp) {
  827. if (pkt_size_tmp >= pHalmac_adapter->max_download_size)
  828. send_pkt_size = pHalmac_adapter->max_download_size;
  829. else
  830. send_pkt_size = pkt_size_tmp;
  831. if (HALMAC_RET_SUCCESS != halmac_send_fwpkt_88xx(pHalmac_adapter, pCode_ptr + mem_offset, send_pkt_size)) {
  832. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_send_fwpkt_88xx fail!!");
  833. return HALMAC_RET_DLFW_FAIL;
  834. }
  835. if (HALMAC_RET_SUCCESS != halmac_iddma_dlfw_88xx(pHalmac_adapter, HALMAC_OCPBASE_TXBUF_88XX + pHalmac_adapter->hw_config_info.txdesc_size,
  836. dest + mem_offset, send_pkt_size, first_part)) {
  837. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx fail!!");
  838. return HALMAC_RET_DLFW_FAIL;
  839. }
  840. first_part = 0;
  841. mem_offset += send_pkt_size;
  842. pkt_size_tmp -= send_pkt_size;
  843. }
  844. if (HALMAC_RET_SUCCESS != halmac_check_fw_chksum_88xx(pHalmac_adapter, dest)) {
  845. PLATFORM_MSG_PRINT(pHalmac_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_check_fw_chksum_88xx fail!!");
  846. return HALMAC_RET_DLFW_FAIL;
  847. }
  848. return HALMAC_RET_SUCCESS;
  849. }
  850. HALMAC_RET_STATUS
  851. halmac_send_fwpkt_88xx(
  852. IN PHALMAC_ADAPTER pHalmac_adapter,
  853. IN u8 *pRam_code,
  854. IN u32 code_size
  855. )
  856. {
  857. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  858. if (HALMAC_RET_SUCCESS != halmac_download_rsvd_page_88xx(pHalmac_adapter, pRam_code, code_size)) {
  859. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "PLATFORM_SEND_RSVD_PAGE 0 error!!\n");
  860. return HALMAC_RET_DL_RSVD_PAGE_FAIL;
  861. }
  862. return HALMAC_RET_SUCCESS;
  863. }
  864. HALMAC_RET_STATUS
  865. halmac_iddma_dlfw_88xx(
  866. IN PHALMAC_ADAPTER pHalmac_adapter,
  867. IN u32 source,
  868. IN u32 dest,
  869. IN u32 length,
  870. IN u8 first
  871. )
  872. {
  873. u32 counter;
  874. u32 ch0_control = (u32)(BIT_DDMACH0_CHKSUM_EN | BIT_DDMACH0_OWN);
  875. VOID *pDriver_adapter = NULL;
  876. PHALMAC_API pHalmac_api;
  877. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  878. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  879. counter = HALMC_DDMA_POLLING_COUNT;
  880. while (HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) & BIT_DDMACH0_OWN) {
  881. counter--;
  882. if (0 == counter) {
  883. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx error-1!!\n");
  884. return HALMAC_RET_DDMA_FAIL;
  885. }
  886. }
  887. ch0_control |= (length & BIT_MASK_DDMACH0_DLEN);
  888. if (0 == first)
  889. ch0_control |= BIT_DDMACH0_CHKSUM_CONT;
  890. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0SA, source);
  891. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0DA, dest);
  892. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DDMA_CH0CTRL, ch0_control);
  893. counter = HALMC_DDMA_POLLING_COUNT;
  894. while (HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) & BIT_DDMACH0_OWN) {
  895. counter--;
  896. if (0 == counter) {
  897. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_iddma_dlfw_88xx error-2!!\n");
  898. return HALMAC_RET_DDMA_FAIL;
  899. }
  900. }
  901. return HALMAC_RET_SUCCESS;
  902. }
  903. HALMAC_RET_STATUS
  904. halmac_check_fw_chksum_88xx(
  905. IN PHALMAC_ADAPTER pHalmac_adapter,
  906. IN u32 memory_address
  907. )
  908. {
  909. u8 mcu_fw_ctrl;
  910. VOID *pDriver_adapter = NULL;
  911. PHALMAC_API pHalmac_api;
  912. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  913. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  914. mcu_fw_ctrl = HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUFW_CTRL);
  915. if (HALMAC_REG_READ_32(pHalmac_adapter, REG_DDMA_CH0CTRL) & BIT_DDMACH0_CHKSUM_STS) {
  916. if (memory_address < HALMAC_OCPBASE_DMEM_88XX) {
  917. mcu_fw_ctrl |= BIT_IMEM_DW_OK;
  918. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl & ~(BIT_IMEM_CHKSUM_OK)));
  919. } else {
  920. mcu_fw_ctrl |= BIT_DMEM_DW_OK;
  921. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl & ~(BIT_DMEM_CHKSUM_OK)));
  922. }
  923. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_FW, HALMAC_DBG_ERR, "halmac_check_fw_chksum_88xx error!!\n");
  924. return HALMAC_RET_FW_CHECKSUM_FAIL;
  925. } else {
  926. if (memory_address < HALMAC_OCPBASE_DMEM_88XX) {
  927. mcu_fw_ctrl |= BIT_IMEM_DW_OK;
  928. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_IMEM_CHKSUM_OK));
  929. } else {
  930. mcu_fw_ctrl |= BIT_DMEM_DW_OK;
  931. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(mcu_fw_ctrl | BIT_DMEM_CHKSUM_OK));
  932. }
  933. return HALMAC_RET_SUCCESS;
  934. }
  935. }
  936. HALMAC_RET_STATUS
  937. halmac_dlfw_end_flow_88xx(
  938. IN PHALMAC_ADAPTER pHalmac_adapter
  939. )
  940. {
  941. u8 value8;
  942. u32 counter;
  943. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  944. PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  945. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TXDMA_STATUS, BIT(2));
  946. /* Check IMEM & DMEM checksum is OK or not */
  947. if (0x50 == (HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUFW_CTRL) & 0x50))
  948. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MCUFW_CTRL, (u16)(HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL) | BIT_FW_DW_RDY));
  949. else
  950. return HALMAC_RET_DLFW_FAIL;
  951. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_MCUFW_CTRL, (u8)(HALMAC_REG_READ_8(pHalmac_adapter, REG_MCUFW_CTRL) & ~(BIT(0))));
  952. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_RSV_CTRL + 1);
  953. value8 = (u8)(value8 | BIT(0));
  954. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RSV_CTRL + 1, value8);
  955. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_FUNC_EN + 1);
  956. value8 = (u8)(value8 | BIT(2));
  957. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN + 1, value8); /* Release MCU reset */
  958. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Download Finish, Reset CPU\n");
  959. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WL2LTECOEX_INDIRECT_ACCESS_CTRL_V1, 0xC00F0038);
  960. counter = 10000;
  961. while (0xC078 != HALMAC_REG_READ_16(pHalmac_adapter, REG_MCUFW_CTRL)) {
  962. if (counter == 0) {
  963. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Check 0x80 = 0xC078 fail\n");
  964. if (0xFAAAAA00 == (HALMAC_REG_READ_32(pHalmac_adapter, REG_FW_DBG7) & 0xFFFFFF00))
  965. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Key fail\n");
  966. return HALMAC_RET_DLFW_FAIL;
  967. }
  968. counter--;
  969. PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
  970. }
  971. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Check 0x80 = 0xC078 counter = %d\n", counter);
  972. return HALMAC_RET_SUCCESS;
  973. }
  974. HALMAC_RET_STATUS
  975. halmac_free_dl_fw_end_flow_88xx(
  976. IN PHALMAC_ADAPTER pHalmac_adapter
  977. )
  978. {
  979. u32 counter;
  980. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  981. PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  982. counter = 100;
  983. while (0 != HALMAC_REG_READ_8(pHalmac_adapter, REG_HMETFR + 3)) {
  984. counter--;
  985. if (0 == counter) {
  986. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]0x1CF != 0\n");
  987. return HALMAC_RET_DLFW_FAIL;
  988. }
  989. PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
  990. }
  991. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_HMETFR + 3, ID_INFORM_DLEMEM_RDY);
  992. counter = 10000;
  993. while (ID_INFORM_DLEMEM_RDY != HALMAC_REG_READ_8(pHalmac_adapter, REG_C2HEVT_3 + 3)) {
  994. counter--;
  995. if (0 == counter) {
  996. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]0x1AF != 0x80\n");
  997. return HALMAC_RET_DLFW_FAIL;
  998. }
  999. PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
  1000. }
  1001. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_C2HEVT_3 + 3, 0);
  1002. return HALMAC_RET_SUCCESS;
  1003. }
  1004. HALMAC_RET_STATUS
  1005. halmac_pwr_seq_parser_88xx(
  1006. IN PHALMAC_ADAPTER pHalmac_adapter,
  1007. IN u8 cut,
  1008. IN u8 fab,
  1009. IN u8 intf,
  1010. IN PHALMAC_WLAN_PWR_CFG *ppPwr_seq_cfg
  1011. )
  1012. {
  1013. u32 seq_idx = 0;
  1014. VOID *pDriver_adapter = NULL;
  1015. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1016. PHALMAC_WLAN_PWR_CFG pSeq_cmd;
  1017. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1018. do {
  1019. pSeq_cmd = &(*ppPwr_seq_cfg[seq_idx]);
  1020. if (NULL == pSeq_cmd)
  1021. break;
  1022. status = halmac_pwr_sub_seq_parer_88xx(pHalmac_adapter, cut, fab, intf, pSeq_cmd);
  1023. if (HALMAC_RET_SUCCESS != status) {
  1024. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[Err]pwr sub seq parser fail, status = 0x%X!\n", status);
  1025. return status;
  1026. }
  1027. seq_idx++;
  1028. } while (1);
  1029. return status;
  1030. }
  1031. HALMAC_RET_STATUS
  1032. halmac_pwr_sub_seq_parer_88xx(
  1033. IN PHALMAC_ADAPTER pHalmac_adapter,
  1034. IN u8 cut,
  1035. IN u8 fab,
  1036. IN u8 intf,
  1037. IN PHALMAC_WLAN_PWR_CFG pPwr_sub_seq_cfg
  1038. )
  1039. {
  1040. u8 value, flag;
  1041. u8 polling_bit;
  1042. u32 offset;
  1043. u32 polling_count;
  1044. static u32 poll_to_static, poll_long_static;
  1045. VOID *pDriver_adapter = NULL;
  1046. PHALMAC_WLAN_PWR_CFG pSub_seq_cmd;
  1047. PHALMAC_API pHalmac_api;
  1048. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1049. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1050. pSub_seq_cmd = pPwr_sub_seq_cfg;
  1051. do {
  1052. if ((pSub_seq_cmd->interface_msk & intf) && (pSub_seq_cmd->fab_msk & fab) && (pSub_seq_cmd->cut_msk & cut)) {
  1053. switch (pSub_seq_cmd->cmd) {
  1054. case HALMAC_PWR_CMD_WRITE:
  1055. if (pSub_seq_cmd->base == HALMAC_PWR_BASEADDR_SDIO)
  1056. offset = pSub_seq_cmd->offset | SDIO_LOCAL_OFFSET;
  1057. else
  1058. offset = pSub_seq_cmd->offset;
  1059. value = HALMAC_REG_READ_8(pHalmac_adapter, offset);
  1060. value = (u8)(value & (u8)(~(pSub_seq_cmd->msk)));
  1061. value = (u8)(value | (u8)(pSub_seq_cmd->value & pSub_seq_cmd->msk));
  1062. HALMAC_REG_WRITE_8(pHalmac_adapter, offset, value);
  1063. break;
  1064. case HALMAC_PWR_CMD_POLLING:
  1065. polling_bit = 0;
  1066. polling_count = HALMAC_POLLING_READY_TIMEOUT_COUNT;
  1067. flag = 0;
  1068. if (pSub_seq_cmd->base == HALMAC_PWR_BASEADDR_SDIO)
  1069. offset = pSub_seq_cmd->offset | SDIO_LOCAL_OFFSET;
  1070. else
  1071. offset = pSub_seq_cmd->offset;
  1072. do {
  1073. polling_count--;
  1074. value = HALMAC_REG_READ_8(pHalmac_adapter, offset);
  1075. value = (u8)(value & pSub_seq_cmd->msk);
  1076. if (value == (pSub_seq_cmd->value & pSub_seq_cmd->msk)) {
  1077. polling_bit = 1;
  1078. } else {
  1079. if (0 == polling_count) {
  1080. if (HALMAC_INTERFACE_PCIE == pHalmac_adapter->halmac_interface && 0 == flag) {
  1081. /* For PCIE + USB package poll power bit timeout issue */
  1082. poll_to_static++;
  1083. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_WARN, "[WARN]PCIE polling timeout : %d!!\n", poll_to_static);
  1084. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_PW_CTRL, HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_PW_CTRL) | BIT(3));
  1085. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_PW_CTRL, HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_PW_CTRL) & ~BIT(3));
  1086. polling_bit = 0;
  1087. polling_count = HALMAC_POLLING_READY_TIMEOUT_COUNT;
  1088. flag = 1;
  1089. } else {
  1090. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd polling timeout!!\n");
  1091. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd offset : %X!!\n", pSub_seq_cmd->offset);
  1092. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd value : %X!!\n", pSub_seq_cmd->value);
  1093. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Pwr cmd msk : %X!!\n", pSub_seq_cmd->msk);
  1094. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_ERR, "[ERR]Read offset = %X value = %X!!\n", offset, value);
  1095. return HALMAC_RET_PWRSEQ_POLLING_FAIL;
  1096. }
  1097. } else {
  1098. PLATFORM_RTL_DELAY_US(pDriver_adapter, 50);
  1099. }
  1100. }
  1101. } while (!polling_bit);
  1102. break;
  1103. case HALMAC_PWR_CMD_DELAY:
  1104. if (pSub_seq_cmd->value == HALMAC_PWRSEQ_DELAY_US)
  1105. PLATFORM_RTL_DELAY_US(pDriver_adapter, pSub_seq_cmd->offset);
  1106. else
  1107. PLATFORM_RTL_DELAY_US(pDriver_adapter, 1000 * pSub_seq_cmd->offset);
  1108. break;
  1109. case HALMAC_PWR_CMD_READ:
  1110. break;
  1111. case HALMAC_PWR_CMD_END:
  1112. return HALMAC_RET_SUCCESS;
  1113. default:
  1114. return HALMAC_RET_PWRSEQ_CMD_INCORRECT;
  1115. }
  1116. }
  1117. pSub_seq_cmd++;
  1118. } while (1);
  1119. return HALMAC_RET_SUCCESS;
  1120. }
  1121. HALMAC_RET_STATUS
  1122. halmac_get_h2c_buff_free_space_88xx(
  1123. IN PHALMAC_ADAPTER pHalmac_adapter
  1124. )
  1125. {
  1126. u32 hw_wptr, fw_rptr;
  1127. PHALMAC_API pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1128. hw_wptr = HALMAC_REG_READ_32(pHalmac_adapter, REG_H2C_PKT_WRITEADDR) & BIT_MASK_H2C_WR_ADDR;
  1129. fw_rptr = HALMAC_REG_READ_32(pHalmac_adapter, REG_H2C_PKT_READADDR) & BIT_MASK_H2C_READ_ADDR;
  1130. if (hw_wptr >= fw_rptr)
  1131. pHalmac_adapter->h2c_buf_free_space = pHalmac_adapter->h2c_buff_size - (hw_wptr - fw_rptr);
  1132. else
  1133. pHalmac_adapter->h2c_buf_free_space = fw_rptr - hw_wptr;
  1134. return HALMAC_RET_SUCCESS;
  1135. }
  1136. HALMAC_RET_STATUS
  1137. halmac_send_h2c_pkt_88xx(
  1138. IN PHALMAC_ADAPTER pHalmac_adapter,
  1139. IN u8 *pHal_h2c_cmd,
  1140. IN u32 size,
  1141. IN u8 ack
  1142. )
  1143. {
  1144. u32 counter = 100;
  1145. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1146. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1147. while (pHalmac_adapter->h2c_buf_free_space <= HALMAC_H2C_CMD_SIZE_UNIT_88XX) {
  1148. halmac_get_h2c_buff_free_space_88xx(pHalmac_adapter);
  1149. counter--;
  1150. if (0 == counter) {
  1151. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "h2c free space is not enough!!\n");
  1152. return HALMAC_RET_H2C_SPACE_FULL;
  1153. }
  1154. }
  1155. /* Send TxDesc + H2C_CMD */
  1156. if (_FALSE == PLATFORM_SEND_H2C_PKT(pDriver_adapter, pHal_h2c_cmd, size)) {
  1157. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Send H2C_CMD pkt error!!\n");
  1158. return HALMAC_RET_SEND_H2C_FAIL;
  1159. }
  1160. pHalmac_adapter->h2c_buf_free_space -= HALMAC_H2C_CMD_SIZE_UNIT_88XX;
  1161. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "H2C free space : %d\n", pHalmac_adapter->h2c_buf_free_space);
  1162. return status;
  1163. }
  1164. HALMAC_RET_STATUS
  1165. halmac_download_rsvd_page_88xx(
  1166. IN PHALMAC_ADAPTER pHalmac_adapter,
  1167. IN u8 *pHal_buf,
  1168. IN u32 size
  1169. )
  1170. {
  1171. u8 restore[3];
  1172. u8 value8;
  1173. u32 counter;
  1174. VOID *pDriver_adapter = NULL;
  1175. PHALMAC_API pHalmac_api;
  1176. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1177. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1178. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1179. if (0 == size) {
  1180. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Rsvd page packet size is zero!!\n");
  1181. return HALMAC_RET_ZERO_LEN_RSVD_PACKET;
  1182. }
  1183. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1);
  1184. value8 = (u8)(value8 | BIT(7));
  1185. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1, value8);
  1186. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_CR + 1);
  1187. restore[0] = value8;
  1188. value8 = (u8)(value8 | BIT(0));
  1189. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, value8);
  1190. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_BCN_CTRL);
  1191. restore[1] = value8;
  1192. value8 = (u8)((value8 & ~(BIT(3))) | BIT(4));
  1193. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, value8);
  1194. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2);
  1195. restore[2] = value8;
  1196. value8 = (u8)(value8 & ~(BIT(6)));
  1197. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, value8);
  1198. if (_FALSE == PLATFORM_SEND_RSVD_PAGE(pDriver_adapter, pHal_buf, size)) {
  1199. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "PLATFORM_SEND_RSVD_PAGE 1 error!!\n");
  1200. status = HALMAC_RET_DL_RSVD_PAGE_FAIL;
  1201. }
  1202. /* Check Bcn_Valid_Bit */
  1203. counter = 1000;
  1204. while (!(HALMAC_REG_READ_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1) & BIT(7))) {
  1205. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  1206. counter--;
  1207. if (0 == counter) {
  1208. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Polling Bcn_Valid_Fail error!!\n");
  1209. status = HALMAC_RET_POLLING_BCN_VALID_FAIL;
  1210. break;
  1211. }
  1212. }
  1213. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1);
  1214. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FIFOPAGE_CTRL_2 + 1, (value8 | BIT(7)));
  1215. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_FWHW_TXQ_CTRL + 2, restore[2]);
  1216. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_BCN_CTRL, restore[1]);
  1217. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_CR + 1, restore[0]);
  1218. return status;
  1219. }
  1220. HALMAC_RET_STATUS
  1221. halmac_set_h2c_header_88xx(
  1222. IN PHALMAC_ADAPTER pHalmac_adapter,
  1223. OUT u8 *pHal_h2c_hdr,
  1224. IN u16 *seq,
  1225. IN u8 ack
  1226. )
  1227. {
  1228. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1229. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_set_h2c_header_88xx!!\n");
  1230. H2C_CMD_HEADER_SET_CATEGORY(pHal_h2c_hdr, 0x00);
  1231. H2C_CMD_HEADER_SET_TOTAL_LEN(pHal_h2c_hdr, 16);
  1232. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
  1233. H2C_CMD_HEADER_SET_SEQ_NUM(pHal_h2c_hdr, pHalmac_adapter->h2c_packet_seq);
  1234. *seq = pHalmac_adapter->h2c_packet_seq;
  1235. pHalmac_adapter->h2c_packet_seq++;
  1236. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
  1237. if (_TRUE == ack)
  1238. H2C_CMD_HEADER_SET_ACK(pHal_h2c_hdr, _TRUE);
  1239. return HALMAC_RET_SUCCESS;
  1240. }
  1241. HALMAC_RET_STATUS
  1242. halmac_set_fw_offload_h2c_header_88xx(
  1243. IN PHALMAC_ADAPTER pHalmac_adapter,
  1244. OUT u8 *pHal_h2c_hdr,
  1245. IN PHALMAC_H2C_HEADER_INFO pH2c_header_info,
  1246. OUT u16 *pSeq_num
  1247. )
  1248. {
  1249. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1250. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_set_fw_offload_h2c_header_88xx!!\n");
  1251. FW_OFFLOAD_H2C_SET_TOTAL_LEN(pHal_h2c_hdr, 8 + pH2c_header_info->content_size);
  1252. FW_OFFLOAD_H2C_SET_SUB_CMD_ID(pHal_h2c_hdr, pH2c_header_info->sub_cmd_id);
  1253. FW_OFFLOAD_H2C_SET_CATEGORY(pHal_h2c_hdr, 0x01);
  1254. FW_OFFLOAD_H2C_SET_CMD_ID(pHal_h2c_hdr, 0xFF);
  1255. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
  1256. FW_OFFLOAD_H2C_SET_SEQ_NUM(pHal_h2c_hdr, pHalmac_adapter->h2c_packet_seq);
  1257. *pSeq_num = pHalmac_adapter->h2c_packet_seq;
  1258. pHalmac_adapter->h2c_packet_seq++;
  1259. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->h2c_seq_mutex));
  1260. if (_TRUE == pH2c_header_info->ack)
  1261. FW_OFFLOAD_H2C_SET_ACK(pHal_h2c_hdr, _TRUE);
  1262. return HALMAC_RET_SUCCESS;
  1263. }
  1264. HALMAC_RET_STATUS
  1265. halmac_send_h2c_set_pwr_mode_88xx(
  1266. IN PHALMAC_ADAPTER pHalmac_adapter,
  1267. IN PHALMAC_FWLPS_OPTION pHal_FwLps_Opt
  1268. )
  1269. {
  1270. u8 h2c_buff[HALMAC_H2C_CMD_SIZE_88XX];
  1271. u8 *pH2c_header, *pH2c_cmd;
  1272. u16 seq = 0;
  1273. VOID *pDriver_adapter = NULL;
  1274. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1275. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_set_pwr_mode_88xx!!\n");
  1276. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1277. pH2c_header = h2c_buff;
  1278. pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
  1279. PLATFORM_RTL_MEMSET(pDriver_adapter, h2c_buff, 0x00, HALMAC_H2C_CMD_SIZE_88XX);
  1280. SET_PWR_MODE_SET_CMD_ID(pH2c_cmd, CMD_ID_SET_PWR_MODE);
  1281. SET_PWR_MODE_SET_CLASS(pH2c_cmd, CLASS_SET_PWR_MODE);
  1282. SET_PWR_MODE_SET_MODE(pH2c_cmd, pHal_FwLps_Opt->mode);
  1283. SET_PWR_MODE_SET_CLK_REQUEST(pH2c_cmd, pHal_FwLps_Opt->clk_request);
  1284. SET_PWR_MODE_SET_RLBM(pH2c_cmd, pHal_FwLps_Opt->rlbm);
  1285. SET_PWR_MODE_SET_SMART_PS(pH2c_cmd, pHal_FwLps_Opt->smart_ps);
  1286. SET_PWR_MODE_SET_AWAKE_INTERVAL(pH2c_cmd, pHal_FwLps_Opt->awake_interval);
  1287. SET_PWR_MODE_SET_B_ALL_QUEUE_UAPSD(pH2c_cmd, pHal_FwLps_Opt->all_queue_uapsd);
  1288. SET_PWR_MODE_SET_PWR_STATE(pH2c_cmd, pHal_FwLps_Opt->pwr_state);
  1289. SET_PWR_MODE_SET_ANT_AUTO_SWITCH(pH2c_cmd, pHal_FwLps_Opt->ant_auto_switch);
  1290. SET_PWR_MODE_SET_PS_ALLOW_BT_HIGH_PRIORITY(pH2c_cmd, pHal_FwLps_Opt->ps_allow_bt_high_Priority);
  1291. SET_PWR_MODE_SET_PROTECT_BCN(pH2c_cmd, pHal_FwLps_Opt->protect_bcn);
  1292. SET_PWR_MODE_SET_SILENCE_PERIOD(pH2c_cmd, pHal_FwLps_Opt->silence_period);
  1293. SET_PWR_MODE_SET_FAST_BT_CONNECT(pH2c_cmd, pHal_FwLps_Opt->fast_bt_connect);
  1294. SET_PWR_MODE_SET_TWO_ANTENNA_EN(pH2c_cmd, pHal_FwLps_Opt->two_antenna_en);
  1295. SET_PWR_MODE_SET_ADOPT_USER_SETTING(pH2c_cmd, pHal_FwLps_Opt->adopt_user_Setting);
  1296. SET_PWR_MODE_SET_DRV_BCN_EARLY_SHIFT(pH2c_cmd, pHal_FwLps_Opt->drv_bcn_early_shift);
  1297. halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, &seq, _TRUE);
  1298. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, h2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1299. if (HALMAC_RET_SUCCESS != status) {
  1300. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_set_pwr_mode_88xx Fail = %x!!\n", status);
  1301. return status;
  1302. }
  1303. return HALMAC_RET_SUCCESS;
  1304. }
  1305. HALMAC_RET_STATUS
  1306. halmac_func_send_original_h2c_88xx(
  1307. IN PHALMAC_ADAPTER pHalmac_adapter,
  1308. IN u8 *original_h2c,
  1309. IN u16 *seq,
  1310. IN u8 ack
  1311. )
  1312. {
  1313. u8 H2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1314. u8 *pH2c_header, *pH2c_cmd;
  1315. VOID *pDriver_adapter = NULL;
  1316. PHALMAC_API pHalmac_api;
  1317. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1318. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1319. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1320. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_original_h2c ==========>\n");
  1321. pH2c_header = H2c_buff;
  1322. pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
  1323. PLATFORM_RTL_MEMCPY(pDriver_adapter, pH2c_cmd, original_h2c, 8); /* Original H2C 8 byte */
  1324. halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, seq, ack);
  1325. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, H2c_buff, HALMAC_H2C_CMD_SIZE_88XX, ack);
  1326. if (HALMAC_RET_SUCCESS != status) {
  1327. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_original_h2c Fail = %x!!\n", status);
  1328. return status;
  1329. }
  1330. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_original_h2c <==========\n");
  1331. return HALMAC_RET_SUCCESS;
  1332. }
  1333. HALMAC_RET_STATUS
  1334. halmac_media_status_rpt_88xx(
  1335. IN PHALMAC_ADAPTER pHalmac_adapter,
  1336. IN u8 op_mode,
  1337. IN u8 mac_id_ind,
  1338. IN u8 mac_id,
  1339. IN u8 mac_id_end
  1340. )
  1341. {
  1342. u8 H2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1343. u8 *pH2c_header, *pH2c_cmd;
  1344. u16 seq = 0;
  1345. VOID *pDriver_adapter = NULL;
  1346. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1347. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_set_pwr_mode_88xx!!\n");
  1348. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1349. pH2c_header = H2c_buff;
  1350. pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
  1351. PLATFORM_RTL_MEMSET(pDriver_adapter, H2c_buff, 0x00, HALMAC_H2C_CMD_SIZE_88XX);
  1352. MEDIA_STATUS_RPT_SET_CMD_ID(pH2c_cmd, CMD_ID_MEDIA_STATUS_RPT);
  1353. MEDIA_STATUS_RPT_SET_CLASS(pH2c_cmd, CLASS_MEDIA_STATUS_RPT);
  1354. MEDIA_STATUS_RPT_SET_OP_MODE(pH2c_cmd, op_mode);
  1355. MEDIA_STATUS_RPT_SET_MACID_IN(pH2c_cmd, mac_id_ind);
  1356. MEDIA_STATUS_RPT_SET_MACID(pH2c_cmd, mac_id);
  1357. MEDIA_STATUS_RPT_SET_MACID_END(pH2c_cmd, mac_id_end);
  1358. halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, &seq, _TRUE);
  1359. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, H2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1360. if (HALMAC_RET_SUCCESS != status) {
  1361. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_media_status_rpt_88xx Fail = %x!!\n", status);
  1362. return status;
  1363. }
  1364. return HALMAC_RET_SUCCESS;
  1365. }
  1366. HALMAC_RET_STATUS
  1367. halmac_send_h2c_update_packet_88xx(
  1368. IN PHALMAC_ADAPTER pHalmac_adapter,
  1369. IN HALMAC_PACKET_ID pkt_id,
  1370. IN u8 *pkt,
  1371. IN u32 pkt_size
  1372. )
  1373. {
  1374. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1375. u16 h2c_seq_mum = 0;
  1376. VOID *pDriver_adapter = NULL;
  1377. PHALMAC_API pHalmac_api;
  1378. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1379. HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
  1380. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1381. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1382. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1383. ret_status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pkt, pkt_size);
  1384. if (HALMAC_RET_SUCCESS != ret_status) {
  1385. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", ret_status);
  1386. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1387. return ret_status;
  1388. }
  1389. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1390. UPDATE_PACKET_SET_SIZE(pH2c_buff, pkt_size + pHalmac_adapter->hw_config_info.txdesc_size);
  1391. UPDATE_PACKET_SET_PACKET_ID(pH2c_buff, pkt_id);
  1392. UPDATE_PACKET_SET_PACKET_LOC(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
  1393. h2c_header_info.sub_cmd_id = SUB_CMD_ID_UPDATE_PACKET;
  1394. h2c_header_info.content_size = 8;
  1395. h2c_header_info.ack = _TRUE;
  1396. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1397. pHalmac_adapter->halmac_state.update_packet_set.seq_num = h2c_seq_mum;
  1398. ret_status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1399. if (HALMAC_RET_SUCCESS != ret_status) {
  1400. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_update_packet_88xx Fail = %x!!\n", ret_status);
  1401. return ret_status;
  1402. }
  1403. return ret_status;
  1404. }
  1405. HALMAC_RET_STATUS
  1406. halmac_send_h2c_phy_parameter_88xx(
  1407. IN PHALMAC_ADAPTER pHalmac_adapter,
  1408. IN PHALMAC_PHY_PARAMETER_INFO para_info,
  1409. IN u8 full_fifo
  1410. )
  1411. {
  1412. u8 drv_trigger_send = _FALSE;
  1413. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1414. u16 h2c_seq_mum = 0;
  1415. u32 info_size = 0;
  1416. VOID *pDriver_adapter = NULL;
  1417. PHALMAC_API pHalmac_api;
  1418. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1419. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1420. PHALMAC_CONFIG_PARA_INFO pConfig_para_info;
  1421. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1422. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1423. pConfig_para_info = &(pHalmac_adapter->config_para_info);
  1424. /* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_phy_parameter_88xx!!\n"); */
  1425. if (NULL == pConfig_para_info->pCfg_para_buf) {
  1426. if (_TRUE == full_fifo)
  1427. pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_FULL_FIFO_88XX;
  1428. else
  1429. pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
  1430. pConfig_para_info->pCfg_para_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pConfig_para_info->para_buf_size);
  1431. if (NULL != pConfig_para_info->pCfg_para_buf) {
  1432. PLATFORM_RTL_MEMSET(pDriver_adapter, pConfig_para_info->pCfg_para_buf, 0x00, pConfig_para_info->para_buf_size);
  1433. pConfig_para_info->full_fifo_mode = full_fifo;
  1434. pConfig_para_info->pPara_buf_w = pConfig_para_info->pCfg_para_buf;
  1435. pConfig_para_info->para_num = 0;
  1436. pConfig_para_info->avai_para_buf_size = pConfig_para_info->para_buf_size;
  1437. pConfig_para_info->value_accumulation = 0;
  1438. pConfig_para_info->offset_accumulation = 0;
  1439. } else {
  1440. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Allocate pCfg_para_buf fail!!\n");
  1441. return HALMAC_RET_MALLOC_FAIL;
  1442. }
  1443. }
  1444. if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING))
  1445. return HALMAC_RET_ERROR_STATE;
  1446. halmac_enqueue_para_buff_88xx(pHalmac_adapter, para_info, pConfig_para_info->pPara_buf_w, &drv_trigger_send);
  1447. if (HALMAC_PARAMETER_CMD_END != para_info->cmd_id) {
  1448. pConfig_para_info->para_num++;
  1449. pConfig_para_info->pPara_buf_w += HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1450. pConfig_para_info->avai_para_buf_size = pConfig_para_info->avai_para_buf_size - HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1451. }
  1452. if (((pConfig_para_info->avai_para_buf_size - pHalmac_adapter->hw_config_info.txdesc_size) > HALMAC_FW_OFFLOAD_CMD_SIZE_88XX) &&
  1453. (_FALSE == drv_trigger_send)) {
  1454. return HALMAC_RET_SUCCESS;
  1455. } else {
  1456. if (0 == pConfig_para_info->para_num) {
  1457. PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
  1458. pConfig_para_info->pCfg_para_buf = NULL;
  1459. pConfig_para_info->pPara_buf_w = NULL;
  1460. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "no cfg parameter element!!\n");
  1461. if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE))
  1462. return HALMAC_RET_ERROR_STATE;
  1463. return HALMAC_RET_SUCCESS;
  1464. }
  1465. if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT))
  1466. return HALMAC_RET_ERROR_STATE;
  1467. pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = HALMAC_CMD_PROCESS_SENDING;
  1468. if (_TRUE == pConfig_para_info->full_fifo_mode)
  1469. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, 0);
  1470. else
  1471. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1472. info_size = pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1473. status = halmac_download_rsvd_page_88xx(pHalmac_adapter, (u8 *)pConfig_para_info->pCfg_para_buf, info_size);
  1474. if (HALMAC_RET_SUCCESS != status) {
  1475. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail!!\n");
  1476. } else {
  1477. halmac_gen_cfg_para_h2c_88xx(pHalmac_adapter, pH2c_buff);
  1478. h2c_header_info.sub_cmd_id = SUB_CMD_ID_CFG_PARAMETER;
  1479. h2c_header_info.content_size = 4;
  1480. h2c_header_info.ack = _TRUE;
  1481. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1482. pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num = h2c_seq_mum;
  1483. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1484. if (HALMAC_RET_SUCCESS != status)
  1485. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
  1486. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "config parameter time = %d\n", HALMAC_REG_READ_32(pHalmac_adapter, REG_FW_DBG6));
  1487. }
  1488. PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
  1489. pConfig_para_info->pCfg_para_buf = NULL;
  1490. pConfig_para_info->pPara_buf_w = NULL;
  1491. /* Restore bcn head */
  1492. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1493. if (HALMAC_RET_SUCCESS != halmac_transition_cfg_para_state_88xx(pHalmac_adapter, HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE))
  1494. return HALMAC_RET_ERROR_STATE;
  1495. }
  1496. if (_FALSE == drv_trigger_send) {
  1497. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "Buffer full trigger sending H2C!!\n");
  1498. return HALMAC_RET_PARA_SENDING;
  1499. }
  1500. return status;
  1501. }
  1502. HALMAC_RET_STATUS
  1503. halmac_enqueue_para_buff_88xx(
  1504. IN PHALMAC_ADAPTER pHalmac_adapter,
  1505. IN PHALMAC_PHY_PARAMETER_INFO para_info,
  1506. IN u8 *pCurr_buff_wptr,
  1507. OUT u8 *pEnd_cmd
  1508. )
  1509. {
  1510. VOID *pDriver_adapter = NULL;
  1511. PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &(pHalmac_adapter->config_para_info);
  1512. *pEnd_cmd = _FALSE;
  1513. PHY_PARAMETER_INFO_SET_LENGTH(pCurr_buff_wptr, HALMAC_FW_OFFLOAD_CMD_SIZE_88XX);
  1514. PHY_PARAMETER_INFO_SET_IO_CMD(pCurr_buff_wptr, para_info->cmd_id);
  1515. switch (para_info->cmd_id) {
  1516. case HALMAC_PARAMETER_CMD_BB_W8:
  1517. case HALMAC_PARAMETER_CMD_BB_W16:
  1518. case HALMAC_PARAMETER_CMD_BB_W32:
  1519. case HALMAC_PARAMETER_CMD_MAC_W8:
  1520. case HALMAC_PARAMETER_CMD_MAC_W16:
  1521. case HALMAC_PARAMETER_CMD_MAC_W32:
  1522. PHY_PARAMETER_INFO_SET_IO_ADDR(pCurr_buff_wptr, para_info->content.MAC_REG_W.offset);
  1523. PHY_PARAMETER_INFO_SET_DATA(pCurr_buff_wptr, para_info->content.MAC_REG_W.value);
  1524. PHY_PARAMETER_INFO_SET_MASK(pCurr_buff_wptr, para_info->content.MAC_REG_W.msk);
  1525. PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buff_wptr, para_info->content.MAC_REG_W.msk_en);
  1526. pConfig_para_info->value_accumulation += para_info->content.MAC_REG_W.value;
  1527. pConfig_para_info->offset_accumulation += para_info->content.MAC_REG_W.offset;
  1528. break;
  1529. case HALMAC_PARAMETER_CMD_RF_W:
  1530. PHY_PARAMETER_INFO_SET_RF_ADDR(pCurr_buff_wptr, para_info->content.RF_REG_W.offset); /*In rf register, the address is only 1 byte*/
  1531. PHY_PARAMETER_INFO_SET_RF_PATH(pCurr_buff_wptr, para_info->content.RF_REG_W.rf_path);
  1532. PHY_PARAMETER_INFO_SET_DATA(pCurr_buff_wptr, para_info->content.RF_REG_W.value);
  1533. PHY_PARAMETER_INFO_SET_MASK(pCurr_buff_wptr, para_info->content.RF_REG_W.msk);
  1534. PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buff_wptr, para_info->content.RF_REG_W.msk_en);
  1535. pConfig_para_info->value_accumulation += para_info->content.RF_REG_W.value;
  1536. pConfig_para_info->offset_accumulation += (para_info->content.RF_REG_W.offset + (para_info->content.RF_REG_W.rf_path << 8));
  1537. break;
  1538. case HALMAC_PARAMETER_CMD_DELAY_US:
  1539. case HALMAC_PARAMETER_CMD_DELAY_MS:
  1540. PHY_PARAMETER_INFO_SET_DELAY_VALUE(pCurr_buff_wptr, para_info->content.DELAY_TIME.delay_time);
  1541. break;
  1542. case HALMAC_PARAMETER_CMD_END:
  1543. *pEnd_cmd = _TRUE;
  1544. break;
  1545. default:
  1546. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, " halmac_send_h2c_phy_parameter_88xx illegal cmd_id!!\n");
  1547. break;
  1548. }
  1549. return HALMAC_RET_SUCCESS;
  1550. }
  1551. HALMAC_RET_STATUS
  1552. halmac_gen_cfg_para_h2c_88xx(
  1553. IN PHALMAC_ADAPTER pHalmac_adapter,
  1554. IN u8 *pH2c_buff
  1555. )
  1556. {
  1557. VOID *pDriver_adapter = NULL;
  1558. PHALMAC_CONFIG_PARA_INFO pConfig_para_info = &(pHalmac_adapter->config_para_info);
  1559. CFG_PARAMETER_SET_NUM(pH2c_buff, pConfig_para_info->para_num);
  1560. if (_TRUE == pConfig_para_info->full_fifo_mode) {
  1561. CFG_PARAMETER_SET_INIT_CASE(pH2c_buff, 0x1);
  1562. CFG_PARAMETER_SET_PHY_PARAMETER_LOC(pH2c_buff, 0);
  1563. } else {
  1564. CFG_PARAMETER_SET_INIT_CASE(pH2c_buff, 0x0);
  1565. CFG_PARAMETER_SET_PHY_PARAMETER_LOC(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
  1566. }
  1567. return HALMAC_RET_SUCCESS;
  1568. }
  1569. #if 0
  1570. HALMAC_RET_STATUS
  1571. halmac_send_h2c_update_datapack_88xx(
  1572. IN PHALMAC_ADAPTER pHalmac_adapter,
  1573. IN HALMAC_DATA_TYPE halmac_data_type,
  1574. IN PHALMAC_PHY_PARAMETER_INFO para_info
  1575. )
  1576. {
  1577. u8 drv_trigger_send = _FALSE;
  1578. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1579. u8 *pCurr_buf_w;
  1580. u16 h2c_seq_mum = 0;
  1581. u32 info_size = 0;
  1582. VOID *pDriver_adapter = NULL;
  1583. PHALMAC_API pHalmac_api;
  1584. PHALMAC_CONFIG_PARA_INFO pConfig_para_info;
  1585. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1586. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1587. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1588. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1589. pConfig_para_info = &(pHalmac_adapter->config_para_info);
  1590. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_phy_parameter_88xx!!\n");
  1591. if (NULL == pConfig_para_info->pCfg_para_buf) {/*Buff null, allocate memory according to use mode*/
  1592. /*else, only 4k reserved page is used*/
  1593. pConfig_para_info->para_buf_size = HALMAC_EXTRA_INFO_BUFF_SIZE_88XX;
  1594. /* pConfig_para_info->datapack_segment =0; */
  1595. pConfig_para_info->pCfg_para_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pConfig_para_info->para_buf_size);
  1596. if (NULL != pConfig_para_info->pCfg_para_buf) {
  1597. /*Reset buffer parameter*/
  1598. PLATFORM_RTL_MEMSET(pDriver_adapter, pConfig_para_info->pCfg_para_buf, 0x00, pConfig_para_info->para_buf_size);
  1599. /* pConfig_para_info->full_fifo_mode = full_fifo; */
  1600. pConfig_para_info->data_type = halmac_data_type;
  1601. pConfig_para_info->pPara_buf_w = pConfig_para_info->pCfg_para_buf;
  1602. pConfig_para_info->para_num = 0;
  1603. pConfig_para_info->avai_para_buf_size = pConfig_para_info->para_buf_size;
  1604. } else {
  1605. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Allocate pCfg_para_buf fail!!\n");
  1606. return HALMAC_RET_MALLOC_FAIL;
  1607. }
  1608. }
  1609. pCurr_buf_w = pConfig_para_info->pPara_buf_w;
  1610. /*Start fill buffer content*/
  1611. PHY_PARAMETER_INFO_SET_LENGTH(pCurr_buf_w, HALMAC_FW_OFFLOAD_CMD_SIZE_88XX);/* Each element is 12 Byte */
  1612. PHY_PARAMETER_INFO_SET_IO_CMD(pCurr_buf_w, para_info->cmd_id);
  1613. switch (para_info->cmd_id) {
  1614. case HALMAC_PARAMETER_CMD_BB_W8:
  1615. case HALMAC_PARAMETER_CMD_BB_W16:
  1616. case HALMAC_PARAMETER_CMD_BB_W32:
  1617. case HALMAC_PARAMETER_CMD_MAC_W8:
  1618. case HALMAC_PARAMETER_CMD_MAC_W16:
  1619. case HALMAC_PARAMETER_CMD_MAC_W32:
  1620. PHY_PARAMETER_INFO_SET_IO_ADDR(pCurr_buf_w, para_info->content.MAC_REG_W.offset);
  1621. PHY_PARAMETER_INFO_SET_DATA(pCurr_buf_w, para_info->content.MAC_REG_W.value);
  1622. PHY_PARAMETER_INFO_SET_MASK(pCurr_buf_w, para_info->content.MAC_REG_W.msk);
  1623. PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buf_w, para_info->content.MAC_REG_W.msk_en);
  1624. break;
  1625. case HALMAC_PARAMETER_CMD_RF_W:
  1626. PHY_PARAMETER_INFO_SET_RF_ADDR(pCurr_buf_w, para_info->content.RF_REG_W.offset); /* In rf register, the address is only 1 byte */
  1627. PHY_PARAMETER_INFO_SET_RF_PATH(pCurr_buf_w, para_info->content.RF_REG_W.rf_path);
  1628. PHY_PARAMETER_INFO_SET_DATA(pCurr_buf_w, para_info->content.RF_REG_W.value);
  1629. PHY_PARAMETER_INFO_SET_MASK(pCurr_buf_w, para_info->content.RF_REG_W.msk);
  1630. PHY_PARAMETER_INFO_SET_MSK_EN(pCurr_buf_w, para_info->content.MAC_REG_W.msk_en);
  1631. break;
  1632. case HALMAC_PARAMETER_CMD_DELAY_US:
  1633. case HALMAC_PARAMETER_CMD_DELAY_MS:
  1634. PHY_PARAMETER_INFO_SET_DELAY_VALUE(pCurr_buf_w, para_info->content.DELAY_TIME.delay_time);
  1635. break;
  1636. case HALMAC_PARAMETER_CMD_END:
  1637. /* PHY_PARAMETER_INFO_SET_MSK_EN(pHalmac_adapter->pPara_buf_w, 1); */
  1638. drv_trigger_send = _TRUE;
  1639. break;
  1640. default:
  1641. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "illegal cmd_id!!\n");
  1642. /* return _FALSE; */
  1643. break;
  1644. }
  1645. /*Update parameter buffer variable*/
  1646. if (HALMAC_PARAMETER_CMD_END != para_info->cmd_id) {
  1647. pConfig_para_info->para_num++;
  1648. pConfig_para_info->pPara_buf_w += HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1649. pConfig_para_info->avai_para_buf_size = pConfig_para_info->avai_para_buf_size - HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1650. }
  1651. if (((pConfig_para_info->avai_para_buf_size - pHalmac_adapter->hw_config_info.txdesc_size) > HALMAC_FW_OFFLOAD_CMD_SIZE_88XX) && (_FALSE == drv_trigger_send)) {
  1652. /*There are still space for parameter cmd, and driver does not trigger it to send, so keep it in buffer temporarily*/
  1653. return HALMAC_RET_SUCCESS_ENQUEUE;
  1654. } else {
  1655. /*There is no space or driver trigger it to send*/
  1656. /*Update the bcn head(dma)*/
  1657. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->h2c_extra_info_boundary & BIT_MASK_BCN_HEAD_1_V1));
  1658. /* Download to reserved page */
  1659. info_size = pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX;
  1660. status = halmac_download_rsvd_page_88xx(pHalmac_adapter, (u8 *)pConfig_para_info->pCfg_para_buf, info_size);
  1661. if (HALMAC_RET_SUCCESS != status) {
  1662. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail!!\n");
  1663. } else {/*download rsvd page ok, send h2c packet to fw*/
  1664. /* Construct H2C Content */
  1665. UPDATE_DATAPACK_SET_SIZE(pH2c_buff, pConfig_para_info->para_num * HALMAC_FW_OFFLOAD_CMD_SIZE_88XX);
  1666. UPDATE_DATAPACK_SET_DATAPACK_ID(pH2c_buff, pConfig_para_info->data_type);
  1667. UPDATE_DATAPACK_SET_DATAPACK_LOC(pH2c_buff, pHalmac_adapter->h2c_extra_info_boundary - pHalmac_adapter->Tx_boundary);
  1668. UPDATE_DATAPACK_SET_DATAPACK_SEGMENT(pH2c_buff, pConfig_para_info->datapack_segment);
  1669. UPDATE_DATAPACK_SET_END_SEGMENT(pH2c_buff, drv_trigger_send);
  1670. /* Fill in H2C Header */
  1671. h2c_header_info.sub_cmd_id = SUB_CMD_ID_UPDATE_DATAPACK;
  1672. h2c_header_info.content_size = 8;
  1673. h2c_header_info.ack = _TRUE;
  1674. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1675. /* Send H2C Cmd Packet */
  1676. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1677. if (HALMAC_RET_SUCCESS != status)
  1678. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail!!\n");
  1679. }
  1680. PLATFORM_RTL_FREE(pDriver_adapter, pConfig_para_info->pCfg_para_buf, pConfig_para_info->para_buf_size);
  1681. if (_TRUE == drv_trigger_send)
  1682. pConfig_para_info->datapack_segment = 0;
  1683. else
  1684. pConfig_para_info->datapack_segment++;
  1685. pConfig_para_info->pCfg_para_buf = NULL;
  1686. pConfig_para_info->pPara_buf_w = NULL;
  1687. pConfig_para_info->para_num = 0;
  1688. pConfig_para_info->avai_para_buf_size = 0;
  1689. /*Restore Register after FW handle the H2C packet*/
  1690. /*only set bcn head back*/
  1691. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->Tx_boundary & BIT_MASK_BCN_HEAD_1_V1));
  1692. }
  1693. return status;
  1694. }
  1695. #endif
  1696. HALMAC_RET_STATUS
  1697. halmac_send_h2c_run_datapack_88xx(
  1698. IN PHALMAC_ADAPTER pHalmac_adapter,
  1699. IN HALMAC_DATA_TYPE halmac_data_type
  1700. )
  1701. {
  1702. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1703. u16 h2c_seq_mum = 0;
  1704. VOID *pDriver_adapter = NULL;
  1705. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1706. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1707. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1708. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_run_datapack_88xx!!\n");
  1709. RUN_DATAPACK_SET_DATAPACK_ID(pH2c_buff, halmac_data_type);
  1710. h2c_header_info.sub_cmd_id = SUB_CMD_ID_RUN_DATAPACK;
  1711. h2c_header_info.content_size = 4;
  1712. h2c_header_info.ack = _TRUE;
  1713. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1714. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1715. if (HALMAC_RET_SUCCESS != status) {
  1716. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
  1717. return status;
  1718. }
  1719. return HALMAC_RET_SUCCESS;
  1720. }
  1721. HALMAC_RET_STATUS
  1722. halmac_send_bt_coex_cmd_88xx(
  1723. IN PHALMAC_ADAPTER pHalmac_adapter,
  1724. IN u8 *pBt_buf,
  1725. IN u32 bt_size,
  1726. IN u8 ack
  1727. )
  1728. {
  1729. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1730. u16 h2c_seq_mum = 0;
  1731. VOID *pDriver_adapter = NULL;
  1732. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1733. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1734. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1735. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_bt_coex_cmd_88xx!!\n");
  1736. PLATFORM_RTL_MEMCPY(pDriver_adapter, pH2c_buff + 8, pBt_buf, bt_size);
  1737. h2c_header_info.sub_cmd_id = SUB_CMD_ID_BT_COEX;
  1738. h2c_header_info.content_size = (u16)bt_size;
  1739. h2c_header_info.ack = ack;
  1740. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1741. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, ack);
  1742. if (HALMAC_RET_SUCCESS != status) {
  1743. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
  1744. return status;
  1745. }
  1746. return HALMAC_RET_SUCCESS;
  1747. }
  1748. HALMAC_RET_STATUS
  1749. halmac_func_ctrl_ch_switch_88xx(
  1750. IN PHALMAC_ADAPTER pHalmac_adapter,
  1751. IN PHALMAC_CH_SWITCH_OPTION pCs_option
  1752. )
  1753. {
  1754. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1755. u16 h2c_seq_mum = 0;
  1756. VOID *pDriver_adapter = NULL;
  1757. PHALMAC_API pHalmac_api;
  1758. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1759. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1760. HALMAC_CMD_PROCESS_STATUS *pProcess_status = &(pHalmac_adapter->halmac_state.scan_state_set.process_status);
  1761. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_ctrl_ch_switch!!\n");
  1762. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1763. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  1764. if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT))
  1765. return HALMAC_RET_ERROR_STATE;
  1766. *pProcess_status = HALMAC_CMD_PROCESS_SENDING;
  1767. if (0 != pCs_option->switch_en) {
  1768. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1769. status = halmac_download_rsvd_page_88xx(pHalmac_adapter, pHalmac_adapter->ch_sw_info.ch_info_buf, pHalmac_adapter->ch_sw_info.total_size);
  1770. if (HALMAC_RET_SUCCESS != status) {
  1771. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "halmac_download_rsvd_page_88xx Fail = %x!!\n", status);
  1772. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1773. return status;
  1774. }
  1775. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_FIFOPAGE_CTRL_2, (u16)(pHalmac_adapter->txff_allocation.rsvd_pg_bndy & BIT_MASK_BCN_HEAD_1_V1));
  1776. }
  1777. CHANNEL_SWITCH_SET_SWITCH_START(pH2c_buff, pCs_option->switch_en);
  1778. CHANNEL_SWITCH_SET_CHANNEL_NUM(pH2c_buff, pHalmac_adapter->ch_sw_info.ch_num);
  1779. CHANNEL_SWITCH_SET_CHANNEL_INFO_LOC(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_h2c_extra_info_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
  1780. CHANNEL_SWITCH_SET_DEST_CH_EN(pH2c_buff, pCs_option->dest_ch_en);
  1781. CHANNEL_SWITCH_SET_DEST_CH(pH2c_buff, pCs_option->dest_ch);
  1782. CHANNEL_SWITCH_SET_PRI_CH_IDX(pH2c_buff, pCs_option->dest_pri_ch_idx);
  1783. CHANNEL_SWITCH_SET_ABSOLUTE_TIME(pH2c_buff, pCs_option->absolute_time_en);
  1784. CHANNEL_SWITCH_SET_TSF_LOW(pH2c_buff, pCs_option->tsf_low);
  1785. CHANNEL_SWITCH_SET_PERIODIC_OPTION(pH2c_buff, pCs_option->periodic_option);
  1786. CHANNEL_SWITCH_SET_NORMAL_CYCLE(pH2c_buff, pCs_option->normal_cycle);
  1787. CHANNEL_SWITCH_SET_NORMAL_PERIOD(pH2c_buff, pCs_option->normal_period);
  1788. CHANNEL_SWITCH_SET_SLOW_PERIOD(pH2c_buff, pCs_option->phase_2_period);
  1789. CHANNEL_SWITCH_SET_CHANNEL_INFO_SIZE(pH2c_buff, pHalmac_adapter->ch_sw_info.total_size);
  1790. h2c_header_info.sub_cmd_id = SUB_CMD_ID_CHANNEL_SWITCH;
  1791. h2c_header_info.content_size = 20;
  1792. h2c_header_info.ack = _TRUE;
  1793. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1794. pHalmac_adapter->halmac_state.scan_state_set.seq_num = h2c_seq_mum;
  1795. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1796. if (HALMAC_RET_SUCCESS != status)
  1797. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
  1798. PLATFORM_RTL_FREE(pDriver_adapter, pHalmac_adapter->ch_sw_info.ch_info_buf, pHalmac_adapter->ch_sw_info.buf_size);
  1799. pHalmac_adapter->ch_sw_info.ch_info_buf = NULL;
  1800. pHalmac_adapter->ch_sw_info.ch_info_buf_w = NULL;
  1801. pHalmac_adapter->ch_sw_info.extra_info_en = 0;
  1802. pHalmac_adapter->ch_sw_info.buf_size = 0;
  1803. pHalmac_adapter->ch_sw_info.avai_buf_size = 0;
  1804. pHalmac_adapter->ch_sw_info.total_size = 0;
  1805. pHalmac_adapter->ch_sw_info.ch_num = 0;
  1806. if (HALMAC_RET_SUCCESS != halmac_transition_scan_state_88xx(pHalmac_adapter, HALMAC_SCAN_CMD_CONSTRUCT_IDLE))
  1807. return HALMAC_RET_ERROR_STATE;
  1808. return status;
  1809. }
  1810. HALMAC_RET_STATUS
  1811. halmac_func_send_general_info_88xx(
  1812. IN PHALMAC_ADAPTER pHalmac_adapter,
  1813. IN PHALMAC_GENERAL_INFO pGeneral_info
  1814. )
  1815. {
  1816. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1817. u16 h2c_seq_mum = 0;
  1818. VOID *pDriver_adapter = NULL;
  1819. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1820. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1821. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1822. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_general_info!!\n");
  1823. GENERAL_INFO_SET_REF_TYPE(pH2c_buff, pGeneral_info->rfe_type);
  1824. GENERAL_INFO_SET_RF_TYPE(pH2c_buff, pGeneral_info->rf_type);
  1825. GENERAL_INFO_SET_FW_TX_BOUNDARY(pH2c_buff, pHalmac_adapter->txff_allocation.rsvd_fw_txbuff_pg_bndy - pHalmac_adapter->txff_allocation.rsvd_pg_bndy);
  1826. h2c_header_info.sub_cmd_id = SUB_CMD_ID_GENERAL_INFO;
  1827. h2c_header_info.content_size = 4;
  1828. h2c_header_info.ack = _FALSE;
  1829. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1830. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1831. if (HALMAC_RET_SUCCESS != status)
  1832. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
  1833. return status;
  1834. }
  1835. HALMAC_RET_STATUS
  1836. halmac_send_h2c_update_bcn_parse_info_88xx(
  1837. IN PHALMAC_ADAPTER pHalmac_adapter,
  1838. IN PHALMAC_BCN_IE_INFO pBcn_ie_info
  1839. )
  1840. {
  1841. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1842. u16 h2c_seq_mum = 0;
  1843. VOID *pDriver_adapter = NULL;
  1844. HALMAC_H2C_HEADER_INFO h2c_header_info;
  1845. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1846. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_update_bcn_parse_info_88xx!!\n");
  1847. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1848. UPDATE_BEACON_PARSING_INFO_SET_FUNC_EN(pH2c_buff, pBcn_ie_info->func_en);
  1849. UPDATE_BEACON_PARSING_INFO_SET_SIZE_TH(pH2c_buff, pBcn_ie_info->size_th);
  1850. UPDATE_BEACON_PARSING_INFO_SET_TIMEOUT(pH2c_buff, pBcn_ie_info->timeout);
  1851. UPDATE_BEACON_PARSING_INFO_SET_IE_ID_BMP_0(pH2c_buff, (u32)(pBcn_ie_info->ie_bmp[0]));
  1852. UPDATE_BEACON_PARSING_INFO_SET_IE_ID_BMP_1(pH2c_buff, (u32)(pBcn_ie_info->ie_bmp[1]));
  1853. UPDATE_BEACON_PARSING_INFO_SET_IE_ID_BMP_2(pH2c_buff, (u32)(pBcn_ie_info->ie_bmp[2]));
  1854. UPDATE_BEACON_PARSING_INFO_SET_IE_ID_BMP_3(pH2c_buff, (u32)(pBcn_ie_info->ie_bmp[3]));
  1855. UPDATE_BEACON_PARSING_INFO_SET_IE_ID_BMP_4(pH2c_buff, (u32)(pBcn_ie_info->ie_bmp[4]));
  1856. h2c_header_info.sub_cmd_id = SUB_CMD_ID_UPDATE_BEACON_PARSING_INFO;
  1857. h2c_header_info.content_size = 24;
  1858. h2c_header_info.ack = _TRUE;
  1859. halmac_set_fw_offload_h2c_header_88xx(pHalmac_adapter, pH2c_buff, &h2c_header_info, &h2c_seq_mum);
  1860. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _TRUE);
  1861. if (HALMAC_RET_SUCCESS != status) {
  1862. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail =%x !!\n", status);
  1863. return status;
  1864. }
  1865. return status;
  1866. }
  1867. HALMAC_RET_STATUS
  1868. halmac_send_h2c_ps_tuning_para_88xx(
  1869. IN PHALMAC_ADAPTER pHalmac_adapter
  1870. )
  1871. {
  1872. u8 pH2c_buff[HALMAC_H2C_CMD_SIZE_88XX] = { 0 };
  1873. u8 *pH2c_header, *pH2c_cmd;
  1874. u16 seq = 0;
  1875. VOID *pDriver_adapter = NULL;
  1876. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1877. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1878. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_send_h2c_ps_tuning_para_88xx!!\n");
  1879. pH2c_header = pH2c_buff;
  1880. pH2c_cmd = pH2c_header + HALMAC_H2C_CMD_HDR_SIZE_88XX;
  1881. halmac_set_h2c_header_88xx(pHalmac_adapter, pH2c_header, &seq, _FALSE);
  1882. status = halmac_send_h2c_pkt_88xx(pHalmac_adapter, pH2c_buff, HALMAC_H2C_CMD_SIZE_88XX, _FALSE);
  1883. if (HALMAC_RET_SUCCESS != status) {
  1884. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "halmac_send_h2c_pkt_88xx Fail = %x!!\n", status);
  1885. return status;
  1886. }
  1887. return status;
  1888. }
  1889. HALMAC_RET_STATUS
  1890. halmac_parse_c2h_packet_88xx(
  1891. IN PHALMAC_ADAPTER pHalmac_adapter,
  1892. IN u8 *halmac_buf,
  1893. IN u32 halmac_size
  1894. )
  1895. {
  1896. u8 c2h_cmd, c2h_sub_cmd_id;
  1897. u8 *pC2h_buf = halmac_buf + pHalmac_adapter->hw_config_info.rxdesc_size;
  1898. u32 c2h_size = halmac_size - pHalmac_adapter->hw_config_info.rxdesc_size;
  1899. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1900. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  1901. /* PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "halmac_parse_c2h_packet_88xx!!\n"); */
  1902. c2h_cmd = (u8)C2H_HDR_GET_CMD_ID(pC2h_buf);
  1903. /* FW offload C2H cmd is 0xFF */
  1904. if (0xFF != c2h_cmd) {
  1905. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "C2H_PKT not for FwOffloadC2HFormat!!\n");
  1906. return HALMAC_RET_C2H_NOT_HANDLED;
  1907. }
  1908. /* Get C2H sub cmd ID */
  1909. c2h_sub_cmd_id = (u8)C2H_HDR_GET_C2H_SUB_CMD_ID(pC2h_buf);
  1910. switch (c2h_sub_cmd_id) {
  1911. case C2H_SUB_CMD_ID_C2H_DBG:
  1912. status = halmac_parse_c2h_debug_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  1913. break;
  1914. case C2H_SUB_CMD_ID_H2C_ACK_HDR:
  1915. status = halmac_parse_h2c_ack_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  1916. break;
  1917. case C2H_SUB_CMD_ID_BT_COEX_INFO:
  1918. status = HALMAC_RET_C2H_NOT_HANDLED;
  1919. break;
  1920. case C2H_SUB_CMD_ID_SCAN_STATUS_RPT:
  1921. status = halmac_parse_scan_status_rpt_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  1922. break;
  1923. case C2H_SUB_CMD_ID_PSD_DATA:
  1924. status = halmac_parse_psd_data_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  1925. break;
  1926. case C2H_SUB_CMD_ID_EFUSE_DATA:
  1927. status = halmac_parse_efuse_data_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  1928. break;
  1929. default:
  1930. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "c2h_sub_cmd_id switch case out of boundary!!\n");
  1931. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "[ERR]c2h pkt : %.8X %.8X!!\n", *(u32 *)pC2h_buf, *(u32 *)(pC2h_buf + 4));
  1932. status = HALMAC_RET_C2H_NOT_HANDLED;
  1933. break;
  1934. }
  1935. return status;
  1936. }
  1937. HALMAC_RET_STATUS
  1938. halmac_parse_c2h_debug_88xx(
  1939. IN PHALMAC_ADAPTER pHalmac_adapter,
  1940. IN u8 *pC2h_buf,
  1941. IN u32 c2h_size
  1942. )
  1943. {
  1944. VOID *pDriver_adapter = NULL;
  1945. u8 *pC2h_buf_local = (u8 *)NULL;
  1946. u32 c2h_size_local = 0;
  1947. u8 dbg_content_length = 0;
  1948. u8 dbg_seq_num = 0;
  1949. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1950. pC2h_buf_local = pC2h_buf;
  1951. c2h_size_local = c2h_size;
  1952. dbg_content_length = (u8)C2H_HDR_GET_LEN((u8 *)pC2h_buf_local);
  1953. if (dbg_content_length > C2H_DBG_CONTENT_MAX_LENGTH) {
  1954. return HALMAC_RET_SUCCESS;
  1955. } else {
  1956. *(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + dbg_content_length - 2) = '\n';
  1957. dbg_seq_num = (u8)(*(pC2h_buf_local + C2H_DBG_HEADER_LENGTH));
  1958. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[RTKFW, SEQ=%d]: %s", dbg_seq_num, (char *)(pC2h_buf_local + C2H_DBG_HEADER_LENGTH + 1));
  1959. }
  1960. return HALMAC_RET_SUCCESS;
  1961. }
  1962. HALMAC_RET_STATUS
  1963. halmac_parse_scan_status_rpt_88xx(
  1964. IN PHALMAC_ADAPTER pHalmac_adapter,
  1965. IN u8 *pC2h_buf,
  1966. IN u32 c2h_size
  1967. )
  1968. {
  1969. u8 h2c_return_code;
  1970. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1971. HALMAC_CMD_PROCESS_STATUS process_status;
  1972. h2c_return_code = (u8)SCAN_STATUS_RPT_GET_H2C_RETURN_CODE(pC2h_buf);
  1973. process_status = (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) ? HALMAC_CMD_PROCESS_DONE : HALMAC_CMD_PROCESS_ERROR;
  1974. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, NULL, 0);
  1975. pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
  1976. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]scan status : %X\n", process_status);
  1977. return HALMAC_RET_SUCCESS;
  1978. }
  1979. HALMAC_RET_STATUS
  1980. halmac_parse_psd_data_88xx(
  1981. IN PHALMAC_ADAPTER pHalmac_adapter,
  1982. IN u8 *pC2h_buf,
  1983. IN u32 c2h_size
  1984. )
  1985. {
  1986. u8 segment_id = 0, segment_size = 0, h2c_seq = 0;
  1987. u16 total_size;
  1988. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  1989. HALMAC_CMD_PROCESS_STATUS process_status;
  1990. PHALMAC_PSD_STATE_SET pPsd_set = &(pHalmac_adapter->halmac_state.psd_set);
  1991. h2c_seq = (u8)PSD_DATA_GET_H2C_SEQ(pC2h_buf);
  1992. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
  1993. if (h2c_seq != pPsd_set->seq_num) {
  1994. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pPsd_set->seq_num, h2c_seq);
  1995. return HALMAC_RET_SUCCESS;
  1996. }
  1997. if (HALMAC_CMD_PROCESS_SENDING != pPsd_set->process_status) {
  1998. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  1999. return HALMAC_RET_SUCCESS;
  2000. }
  2001. total_size = (u16)PSD_DATA_GET_TOTAL_SIZE(pC2h_buf);
  2002. segment_id = (u8)PSD_DATA_GET_SEGMENT_ID(pC2h_buf);
  2003. segment_size = (u8)PSD_DATA_GET_SEGMENT_SIZE(pC2h_buf);
  2004. pPsd_set->data_size = total_size;
  2005. if (NULL == pPsd_set->pData)
  2006. pPsd_set->pData = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, pPsd_set->data_size);
  2007. if (0 == segment_id)
  2008. pPsd_set->segment_size = segment_size;
  2009. PLATFORM_RTL_MEMCPY(pDriver_adapter, pPsd_set->pData + segment_id * pPsd_set->segment_size, pC2h_buf + HALMAC_C2H_DATA_OFFSET_88XX, segment_size);
  2010. if (_FALSE == PSD_DATA_GET_END_SEGMENT(pC2h_buf))
  2011. return HALMAC_RET_SUCCESS;
  2012. process_status = HALMAC_CMD_PROCESS_DONE;
  2013. pPsd_set->process_status = process_status;
  2014. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_PSD, process_status, pPsd_set->pData, pPsd_set->data_size);
  2015. return HALMAC_RET_SUCCESS;
  2016. }
  2017. HALMAC_RET_STATUS
  2018. halmac_parse_efuse_data_88xx(
  2019. IN PHALMAC_ADAPTER pHalmac_adapter,
  2020. IN u8 *pC2h_buf,
  2021. IN u32 c2h_size
  2022. )
  2023. {
  2024. u8 segment_id = 0, segment_size = 0, h2c_seq = 0;
  2025. u8 *pEeprom_map = NULL;
  2026. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  2027. u8 h2c_return_code = 0;
  2028. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2029. HALMAC_CMD_PROCESS_STATUS process_status;
  2030. h2c_seq = (u8)EFUSE_DATA_GET_H2C_SEQ(pC2h_buf);
  2031. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
  2032. if (h2c_seq != pHalmac_adapter->halmac_state.efuse_state_set.seq_num) {
  2033. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
  2034. return HALMAC_RET_SUCCESS;
  2035. }
  2036. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.efuse_state_set.process_status) {
  2037. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2038. return HALMAC_RET_SUCCESS;
  2039. }
  2040. segment_id = (u8)EFUSE_DATA_GET_SEGMENT_ID(pC2h_buf);
  2041. segment_size = (u8)EFUSE_DATA_GET_SEGMENT_SIZE(pC2h_buf);
  2042. if (0 == segment_id)
  2043. pHalmac_adapter->efuse_segment_size = segment_size;
  2044. pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
  2045. if (NULL == pEeprom_map) {
  2046. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
  2047. return HALMAC_RET_MALLOC_FAIL;
  2048. }
  2049. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
  2050. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  2051. PLATFORM_RTL_MEMCPY(pDriver_adapter, pHalmac_adapter->pHalEfuse_map + segment_id * pHalmac_adapter->efuse_segment_size,
  2052. pC2h_buf + HALMAC_C2H_DATA_OFFSET_88XX, segment_size);
  2053. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  2054. if (_FALSE == EFUSE_DATA_GET_END_SEGMENT(pC2h_buf)) {
  2055. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2056. return HALMAC_RET_SUCCESS;
  2057. }
  2058. h2c_return_code = pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code;
  2059. if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
  2060. process_status = HALMAC_CMD_PROCESS_DONE;
  2061. pHalmac_adapter->halmac_state.efuse_state_set.process_status = process_status;
  2062. PLATFORM_MUTEX_LOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  2063. pHalmac_adapter->hal_efuse_map_valid = _TRUE;
  2064. PLATFORM_MUTEX_UNLOCK(pDriver_adapter, &(pHalmac_adapter->EfuseMutex));
  2065. if (1 == pHalmac_adapter->event_trigger.physical_efuse_map) {
  2066. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, process_status, pHalmac_adapter->pHalEfuse_map, pHalmac_adapter->hw_config_info.efuse_size);
  2067. pHalmac_adapter->event_trigger.physical_efuse_map = 0;
  2068. }
  2069. if (1 == pHalmac_adapter->event_trigger.logical_efuse_map) {
  2070. if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map)) {
  2071. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2072. return HALMAC_RET_EEPROM_PARSING_FAIL;
  2073. }
  2074. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, process_status, pEeprom_map, eeprom_size);
  2075. pHalmac_adapter->event_trigger.logical_efuse_map = 0;
  2076. }
  2077. } else {
  2078. process_status = HALMAC_CMD_PROCESS_ERROR;
  2079. pHalmac_adapter->halmac_state.efuse_state_set.process_status = process_status;
  2080. if (1 == pHalmac_adapter->event_trigger.physical_efuse_map) {
  2081. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_PHYSICAL_EFUSE, process_status, &(pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code), 1);
  2082. pHalmac_adapter->event_trigger.physical_efuse_map = 0;
  2083. }
  2084. if (1 == pHalmac_adapter->event_trigger.logical_efuse_map) {
  2085. if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map)) {
  2086. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2087. return HALMAC_RET_EEPROM_PARSING_FAIL;
  2088. }
  2089. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_DUMP_LOGICAL_EFUSE, process_status, &(pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code), 1);
  2090. pHalmac_adapter->event_trigger.logical_efuse_map = 0;
  2091. }
  2092. }
  2093. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2094. return HALMAC_RET_SUCCESS;
  2095. }
  2096. HALMAC_RET_STATUS
  2097. halmac_parse_h2c_ack_88xx(
  2098. IN PHALMAC_ADAPTER pHalmac_adapter,
  2099. IN u8 *pC2h_buf,
  2100. IN u32 c2h_size
  2101. )
  2102. {
  2103. u8 h2c_cmd_id, h2c_sub_cmd_id;
  2104. u8 h2c_seq = 0, offset = 0, shift = 0;
  2105. u8 h2c_return_code;
  2106. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2107. HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
  2108. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  2109. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Ack for C2H!!\n");
  2110. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2111. if (HALMAC_H2C_RETURN_SUCCESS != (HALMAC_H2C_RETURN_CODE)h2c_return_code)
  2112. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "C2H_PKT Status Error!! Status = %d\n", h2c_return_code);
  2113. h2c_cmd_id = (u8)H2C_ACK_HDR_GET_H2C_CMD_ID(pC2h_buf);
  2114. if (0xFF != h2c_cmd_id) {
  2115. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "original h2c ack is not handled!!\n");
  2116. status = HALMAC_RET_C2H_NOT_HANDLED;
  2117. } else {
  2118. h2c_sub_cmd_id = (u8)H2C_ACK_HDR_GET_H2C_SUB_CMD_ID(pC2h_buf);
  2119. switch (h2c_sub_cmd_id) {
  2120. case H2C_SUB_CMD_ID_DUMP_PHYSICAL_EFUSE_ACK:
  2121. status = halmac_parse_h2c_ack_phy_efuse_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2122. break;
  2123. case H2C_SUB_CMD_ID_CFG_PARAMETER_ACK:
  2124. status = halmac_parse_h2c_ack_cfg_para_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2125. break;
  2126. case H2C_SUB_CMD_ID_UPDATE_PACKET_ACK:
  2127. status = halmac_parse_h2c_ack_update_packet_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2128. break;
  2129. case H2C_SUB_CMD_ID_UPDATE_DATAPACK_ACK:
  2130. status = halmac_parse_h2c_ack_update_datapack_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2131. break;
  2132. case H2C_SUB_CMD_ID_RUN_DATAPACK_ACK:
  2133. status = halmac_parse_h2c_ack_run_datapack_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2134. break;
  2135. case H2C_SUB_CMD_ID_CHANNEL_SWITCH_ACK:
  2136. status = halmac_parse_h2c_ack_channel_switch_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2137. break;
  2138. case H2C_SUB_CMD_ID_IQK_ACK:
  2139. status = halmac_parse_h2c_ack_iqk_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2140. break;
  2141. case H2C_SUB_CMD_ID_POWER_TRACKING_ACK:
  2142. status = halmac_parse_h2c_ack_power_tracking_88xx(pHalmac_adapter, pC2h_buf, c2h_size);
  2143. break;
  2144. case H2C_SUB_CMD_ID_PSD_ACK:
  2145. break;
  2146. default:
  2147. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_WARN, "h2c_sub_cmd_id switch case out of boundary!!\n");
  2148. status = HALMAC_RET_C2H_NOT_HANDLED;
  2149. break;
  2150. }
  2151. }
  2152. return status;
  2153. }
  2154. HALMAC_RET_STATUS
  2155. halmac_parse_h2c_ack_phy_efuse_88xx(
  2156. IN PHALMAC_ADAPTER pHalmac_adapter,
  2157. IN u8 *pC2h_buf,
  2158. IN u32 c2h_size
  2159. )
  2160. {
  2161. u8 h2c_seq = 0;
  2162. u8 h2c_return_code;
  2163. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2164. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2165. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
  2166. if (h2c_seq != pHalmac_adapter->halmac_state.efuse_state_set.seq_num) {
  2167. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.efuse_state_set.seq_num, h2c_seq);
  2168. return HALMAC_RET_SUCCESS;
  2169. }
  2170. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.efuse_state_set.process_status) {
  2171. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2172. return HALMAC_RET_SUCCESS;
  2173. }
  2174. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2175. pHalmac_adapter->halmac_state.efuse_state_set.fw_return_code = h2c_return_code;
  2176. return HALMAC_RET_SUCCESS;
  2177. }
  2178. HALMAC_RET_STATUS
  2179. halmac_parse_h2c_ack_cfg_para_88xx(
  2180. IN PHALMAC_ADAPTER pHalmac_adapter,
  2181. IN u8 *pC2h_buf,
  2182. IN u32 c2h_size
  2183. )
  2184. {
  2185. u8 h2c_seq = 0;
  2186. u8 h2c_return_code;
  2187. u32 offset_accu = 0, value_accu = 0;
  2188. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2189. HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
  2190. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2191. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num, h2c_seq);
  2192. if (h2c_seq != pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num) {
  2193. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.cfg_para_state_set.seq_num, h2c_seq);
  2194. return HALMAC_RET_SUCCESS;
  2195. }
  2196. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.cfg_para_state_set.process_status) {
  2197. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "Not in HALMAC_CMD_PROCESS_SENDING\n");
  2198. return HALMAC_RET_SUCCESS;
  2199. }
  2200. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2201. pHalmac_adapter->halmac_state.cfg_para_state_set.fw_return_code = h2c_return_code;
  2202. offset_accu = CFG_PARAMETER_ACK_GET_OFFSET_ACCUMULATION(pC2h_buf);
  2203. value_accu = CFG_PARAMETER_ACK_GET_VALUE_ACCUMULATION(pC2h_buf);
  2204. if ((offset_accu != pHalmac_adapter->config_para_info.offset_accumulation) || (value_accu != pHalmac_adapter->config_para_info.value_accumulation)) {
  2205. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[C2H]offset_accu : %x, value_accu : %x!!\n", offset_accu, value_accu);
  2206. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[Adapter]offset_accu : %x, value_accu : %x!!\n", pHalmac_adapter->config_para_info.offset_accumulation, pHalmac_adapter->config_para_info.value_accumulation);
  2207. process_status = HALMAC_CMD_PROCESS_ERROR;
  2208. }
  2209. if ((HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) && (HALMAC_CMD_PROCESS_ERROR != process_status)) {
  2210. process_status = HALMAC_CMD_PROCESS_DONE;
  2211. pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = process_status;
  2212. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CFG_PARA, process_status, NULL, 0);
  2213. } else {
  2214. process_status = HALMAC_CMD_PROCESS_ERROR;
  2215. pHalmac_adapter->halmac_state.cfg_para_state_set.process_status = process_status;
  2216. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CFG_PARA, process_status, &(pHalmac_adapter->halmac_state.cfg_para_state_set.fw_return_code), 1);
  2217. }
  2218. return HALMAC_RET_SUCCESS;
  2219. }
  2220. HALMAC_RET_STATUS
  2221. halmac_parse_h2c_ack_update_packet_88xx(
  2222. IN PHALMAC_ADAPTER pHalmac_adapter,
  2223. IN u8 *pC2h_buf,
  2224. IN u32 c2h_size
  2225. )
  2226. {
  2227. u8 h2c_seq = 0;
  2228. u8 h2c_return_code;
  2229. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2230. HALMAC_CMD_PROCESS_STATUS process_status;
  2231. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2232. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
  2233. if (h2c_seq != pHalmac_adapter->halmac_state.update_packet_set.seq_num) {
  2234. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.update_packet_set.seq_num, h2c_seq);
  2235. return HALMAC_RET_SUCCESS;
  2236. }
  2237. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.update_packet_set.process_status) {
  2238. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2239. return HALMAC_RET_SUCCESS;
  2240. }
  2241. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2242. pHalmac_adapter->halmac_state.update_packet_set.fw_return_code = h2c_return_code;
  2243. if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
  2244. process_status = HALMAC_CMD_PROCESS_DONE;
  2245. pHalmac_adapter->halmac_state.update_packet_set.process_status = process_status;
  2246. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_UPDATE_PACKET, process_status, NULL, 0);
  2247. } else {
  2248. process_status = HALMAC_CMD_PROCESS_ERROR;
  2249. pHalmac_adapter->halmac_state.update_packet_set.process_status = process_status;
  2250. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_UPDATE_PACKET, process_status, &(pHalmac_adapter->halmac_state.update_packet_set.fw_return_code), 1);
  2251. }
  2252. return HALMAC_RET_SUCCESS;
  2253. }
  2254. HALMAC_RET_STATUS
  2255. halmac_parse_h2c_ack_update_datapack_88xx(
  2256. IN PHALMAC_ADAPTER pHalmac_adapter,
  2257. IN u8 *pC2h_buf,
  2258. IN u32 c2h_size
  2259. )
  2260. {
  2261. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2262. HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
  2263. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_UPDATE_DATAPACK, process_status, NULL, 0);
  2264. return HALMAC_RET_SUCCESS;
  2265. }
  2266. HALMAC_RET_STATUS
  2267. halmac_parse_h2c_ack_run_datapack_88xx(
  2268. IN PHALMAC_ADAPTER pHalmac_adapter,
  2269. IN u8 *pC2h_buf,
  2270. IN u32 c2h_size
  2271. )
  2272. {
  2273. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2274. HALMAC_CMD_PROCESS_STATUS process_status = HALMAC_CMD_PROCESS_UNDEFINE;
  2275. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_RUN_DATAPACK, process_status, NULL, 0);
  2276. return HALMAC_RET_SUCCESS;
  2277. }
  2278. HALMAC_RET_STATUS
  2279. halmac_parse_h2c_ack_channel_switch_88xx(
  2280. IN PHALMAC_ADAPTER pHalmac_adapter,
  2281. IN u8 *pC2h_buf,
  2282. IN u32 c2h_size
  2283. )
  2284. {
  2285. u8 h2c_seq = 0;
  2286. u8 h2c_return_code;
  2287. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2288. HALMAC_CMD_PROCESS_STATUS process_status;
  2289. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2290. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
  2291. if (h2c_seq != pHalmac_adapter->halmac_state.scan_state_set.seq_num) {
  2292. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.scan_state_set.seq_num, h2c_seq);
  2293. return HALMAC_RET_SUCCESS;
  2294. }
  2295. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.scan_state_set.process_status) {
  2296. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2297. return HALMAC_RET_SUCCESS;
  2298. }
  2299. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2300. pHalmac_adapter->halmac_state.scan_state_set.fw_return_code = h2c_return_code;
  2301. if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
  2302. process_status = HALMAC_CMD_PROCESS_RCVD;
  2303. pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
  2304. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, NULL, 0);
  2305. } else {
  2306. process_status = HALMAC_CMD_PROCESS_ERROR;
  2307. pHalmac_adapter->halmac_state.scan_state_set.process_status = process_status;
  2308. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_CHANNEL_SWITCH, process_status, &(pHalmac_adapter->halmac_state.scan_state_set.fw_return_code), 1);
  2309. }
  2310. return HALMAC_RET_SUCCESS;
  2311. }
  2312. HALMAC_RET_STATUS
  2313. halmac_parse_h2c_ack_iqk_88xx(
  2314. IN PHALMAC_ADAPTER pHalmac_adapter,
  2315. IN u8 *pC2h_buf,
  2316. IN u32 c2h_size
  2317. )
  2318. {
  2319. u8 h2c_seq = 0;
  2320. u8 h2c_return_code;
  2321. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2322. HALMAC_CMD_PROCESS_STATUS process_status;
  2323. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2324. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
  2325. if (h2c_seq != pHalmac_adapter->halmac_state.iqk_set.seq_num) {
  2326. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.iqk_set.seq_num, h2c_seq);
  2327. return HALMAC_RET_SUCCESS;
  2328. }
  2329. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.iqk_set.process_status) {
  2330. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2331. return HALMAC_RET_SUCCESS;
  2332. }
  2333. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2334. pHalmac_adapter->halmac_state.iqk_set.fw_return_code = h2c_return_code;
  2335. if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
  2336. process_status = HALMAC_CMD_PROCESS_DONE;
  2337. pHalmac_adapter->halmac_state.iqk_set.process_status = process_status;
  2338. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_IQK, process_status, NULL, 0);
  2339. } else {
  2340. process_status = HALMAC_CMD_PROCESS_ERROR;
  2341. pHalmac_adapter->halmac_state.iqk_set.process_status = process_status;
  2342. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_IQK, process_status, &(pHalmac_adapter->halmac_state.iqk_set.fw_return_code), 1);
  2343. }
  2344. return HALMAC_RET_SUCCESS;
  2345. }
  2346. HALMAC_RET_STATUS
  2347. halmac_parse_h2c_ack_power_tracking_88xx(
  2348. IN PHALMAC_ADAPTER pHalmac_adapter,
  2349. IN u8 *pC2h_buf,
  2350. IN u32 c2h_size
  2351. )
  2352. {
  2353. u8 h2c_seq = 0;
  2354. u8 h2c_return_code;
  2355. VOID *pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2356. HALMAC_CMD_PROCESS_STATUS process_status;
  2357. h2c_seq = (u8)H2C_ACK_HDR_GET_H2C_SEQ(pC2h_buf);
  2358. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_TRACE, "[TRACE]Seq num : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
  2359. if (h2c_seq != pHalmac_adapter->halmac_state.power_tracking_set.seq_num) {
  2360. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Seq num mismactch : h2c -> %d c2h -> %d\n", pHalmac_adapter->halmac_state.power_tracking_set.seq_num, h2c_seq);
  2361. return HALMAC_RET_SUCCESS;
  2362. }
  2363. if (HALMAC_CMD_PROCESS_SENDING != pHalmac_adapter->halmac_state.power_tracking_set.process_status) {
  2364. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "[ERR]Not in HALMAC_CMD_PROCESS_SENDING\n");
  2365. return HALMAC_RET_SUCCESS;
  2366. }
  2367. h2c_return_code = (u8)H2C_ACK_HDR_GET_H2C_RETURN_CODE(pC2h_buf);
  2368. pHalmac_adapter->halmac_state.power_tracking_set.fw_return_code = h2c_return_code;
  2369. if (HALMAC_H2C_RETURN_SUCCESS == (HALMAC_H2C_RETURN_CODE)h2c_return_code) {
  2370. process_status = HALMAC_CMD_PROCESS_DONE;
  2371. pHalmac_adapter->halmac_state.power_tracking_set.process_status = process_status;
  2372. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_POWER_TRACKING, process_status, NULL, 0);
  2373. } else {
  2374. process_status = HALMAC_CMD_PROCESS_ERROR;
  2375. pHalmac_adapter->halmac_state.power_tracking_set.process_status = process_status;
  2376. PLATFORM_EVENT_INDICATION(pDriver_adapter, HALMAC_FEATURE_POWER_TRACKING, process_status, &(pHalmac_adapter->halmac_state.power_tracking_set.fw_return_code), 1);
  2377. }
  2378. return HALMAC_RET_SUCCESS;
  2379. }
  2380. HALMAC_RET_STATUS
  2381. halmac_convert_to_sdio_bus_offset_88xx(
  2382. IN PHALMAC_ADAPTER pHalmac_adapter,
  2383. INOUT u32 *halmac_offset
  2384. )
  2385. {
  2386. VOID *pDriver_adapter = NULL;
  2387. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2388. switch ((*halmac_offset) & 0xFFFF0000) {
  2389. case WLAN_IOREG_OFFSET:
  2390. *halmac_offset = (HALMAC_SDIO_CMD_ADDR_MAC_REG << 13) | (*halmac_offset & HALMAC_WLAN_MAC_REG_MSK);
  2391. break;
  2392. case SDIO_LOCAL_OFFSET:
  2393. *halmac_offset = (HALMAC_SDIO_CMD_ADDR_SDIO_REG << 13) | (*halmac_offset & HALMAC_SDIO_LOCAL_MSK);
  2394. break;
  2395. default:
  2396. *halmac_offset = 0xFFFFFFFF;
  2397. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "Unknown base address!!\n");
  2398. return HALMAC_RET_CONVERT_SDIO_OFFSET_FAIL;
  2399. }
  2400. return HALMAC_RET_SUCCESS;
  2401. }
  2402. HALMAC_RET_STATUS
  2403. halmac_update_sdio_free_page_88xx(
  2404. IN PHALMAC_ADAPTER pHalmac_adapter
  2405. )
  2406. {
  2407. u32 free_page = 0, free_page2 = 0, free_page3 = 0;
  2408. VOID *pDriver_adapter = NULL;
  2409. PHALMAC_API pHalmac_api;
  2410. PHALMAC_SDIO_FREE_SPACE pSdio_free_space;
  2411. u8 data[12] = {0};
  2412. HALMAC_RET_STATUS status = HALMAC_RET_SUCCESS;
  2413. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2414. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2415. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_sdio_free_page_88xx ==========>\n");
  2416. pSdio_free_space = &(pHalmac_adapter->sdio_free_space);
  2417. /*need to use HALMAC_REG_READ_N, 20160316, Soar*/
  2418. HALMAC_REG_SDIO_CMD53_READ_N(pHalmac_adapter, REG_SDIO_FREE_TXPG, 12, data);
  2419. /*
  2420. free_page = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG);
  2421. free_page2 = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_FREE_TXPG2);
  2422. free_page3 = HALMAC_REG_READ_32(pHalmac_adapter, REG_SDIO_OQT_FREE_TXPG_V1);
  2423. */
  2424. free_page = data[0] | (data[1] << 8) | (data[2] << 16) | (data[3] << 24);
  2425. free_page2 = data[4] | (data[5] << 8) | (data[6] << 16) | (data[7] << 24);
  2426. free_page3 = data[8] | (data[9] << 8) | (data[10] << 16) | (data[11] << 24);
  2427. pSdio_free_space->high_queue_number = (u16)BIT_GET_HIQ_FREEPG_V1(free_page);
  2428. pSdio_free_space->normal_queue_number = (u16)BIT_GET_MID_FREEPG_V1(free_page);
  2429. pSdio_free_space->low_queue_number = (u16)BIT_GET_LOW_FREEPG_V1(free_page2);
  2430. pSdio_free_space->public_queue_number = (u16)BIT_GET_PUB_FREEPG_V1(free_page2);
  2431. pSdio_free_space->extra_queue_number = (u16)BIT_GET_EXQ_FREEPG_V1(free_page3);
  2432. pSdio_free_space->ac_oqt_number = (u8)((free_page3 >> 16) & 0xFF);
  2433. pSdio_free_space->non_ac_oqt_number = (u8)((free_page3 >> 24) & 0xFF);
  2434. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_sdio_free_page_88xx <==========\n");
  2435. return HALMAC_RET_SUCCESS;
  2436. }
  2437. HALMAC_RET_STATUS
  2438. halmac_update_oqt_free_space_88xx(
  2439. IN PHALMAC_ADAPTER pHalmac_adapter
  2440. )
  2441. {
  2442. VOID *pDriver_adapter = NULL;
  2443. PHALMAC_API pHalmac_api;
  2444. PHALMAC_SDIO_FREE_SPACE pSdio_free_space;
  2445. u8 value;
  2446. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2447. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2448. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx ==========>\n");
  2449. pSdio_free_space = &(pHalmac_adapter->sdio_free_space);
  2450. pSdio_free_space->ac_oqt_number = HALMAC_REG_READ_8(pHalmac_adapter, REG_SDIO_OQT_FREE_TXPG_V1 + 2);
  2451. /* pSdio_free_space->non_ac_oqt_number = (u8)BIT_GET_NOAC_OQT_FREEPG_V1(oqt_free_page); */
  2452. pSdio_free_space->ac_empty = 0;
  2453. value = HALMAC_REG_READ_8(pHalmac_adapter, REG_TXPKT_EMPTY);
  2454. while (value > 0) {
  2455. value = value & (value - 1);
  2456. pSdio_free_space->ac_empty++;
  2457. };
  2458. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_update_oqt_free_space_88xx <==========\n");
  2459. return HALMAC_RET_SUCCESS;
  2460. }
  2461. HALMAC_EFUSE_CMD_CONSTRUCT_STATE
  2462. halmac_query_efuse_curr_state_88xx(
  2463. IN PHALMAC_ADAPTER pHalmac_adapter
  2464. )
  2465. {
  2466. return pHalmac_adapter->halmac_state.efuse_state_set.efuse_cmd_construct_state;
  2467. }
  2468. HALMAC_RET_STATUS
  2469. halmac_transition_efuse_state_88xx(
  2470. IN PHALMAC_ADAPTER pHalmac_adapter,
  2471. IN HALMAC_EFUSE_CMD_CONSTRUCT_STATE dest_state
  2472. )
  2473. {
  2474. PHALMAC_EFUSE_STATE_SET pEfuse_state = &(pHalmac_adapter->halmac_state.efuse_state_set);
  2475. if ((HALMAC_EFUSE_CMD_CONSTRUCT_IDLE != pEfuse_state->efuse_cmd_construct_state)
  2476. && (HALMAC_EFUSE_CMD_CONSTRUCT_BUSY != pEfuse_state->efuse_cmd_construct_state)
  2477. && (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT != pEfuse_state->efuse_cmd_construct_state))
  2478. return HALMAC_RET_ERROR_STATE;
  2479. if (pEfuse_state->efuse_cmd_construct_state == dest_state)
  2480. return HALMAC_RET_ERROR_STATE;
  2481. if (HALMAC_EFUSE_CMD_CONSTRUCT_BUSY == dest_state) {
  2482. if (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT == pEfuse_state->efuse_cmd_construct_state)
  2483. return HALMAC_RET_ERROR_STATE;
  2484. } else if (HALMAC_EFUSE_CMD_CONSTRUCT_H2C_SENT == dest_state) {
  2485. if (HALMAC_EFUSE_CMD_CONSTRUCT_IDLE == pEfuse_state->efuse_cmd_construct_state)
  2486. return HALMAC_RET_ERROR_STATE;
  2487. }
  2488. pEfuse_state->efuse_cmd_construct_state = dest_state;
  2489. return HALMAC_RET_SUCCESS;
  2490. }
  2491. HALMAC_CFG_PARA_CMD_CONSTRUCT_STATE
  2492. halmac_query_cfg_para_curr_state_88xx(
  2493. IN PHALMAC_ADAPTER pHalmac_adapter
  2494. )
  2495. {
  2496. return pHalmac_adapter->halmac_state.cfg_para_state_set.cfg_para_cmd_construct_state;
  2497. }
  2498. HALMAC_RET_STATUS
  2499. halmac_transition_cfg_para_state_88xx(
  2500. IN PHALMAC_ADAPTER pHalmac_adapter,
  2501. IN HALMAC_CFG_PARA_CMD_CONSTRUCT_STATE dest_state
  2502. )
  2503. {
  2504. PHALMAC_CFG_PARA_STATE_SET pCfg_para = &(pHalmac_adapter->halmac_state.cfg_para_state_set);
  2505. if ((HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE != pCfg_para->cfg_para_cmd_construct_state) &&
  2506. (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING != pCfg_para->cfg_para_cmd_construct_state) &&
  2507. (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT != pCfg_para->cfg_para_cmd_construct_state))
  2508. return HALMAC_RET_ERROR_STATE;
  2509. if (HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE == dest_state) {
  2510. if (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING == pCfg_para->cfg_para_cmd_construct_state)
  2511. return HALMAC_RET_ERROR_STATE;
  2512. } else if (HALMAC_CFG_PARA_CMD_CONSTRUCT_CONSTRUCTING == dest_state) {
  2513. if (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == pCfg_para->cfg_para_cmd_construct_state)
  2514. return HALMAC_RET_ERROR_STATE;
  2515. } else if (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == dest_state) {
  2516. if ((HALMAC_CFG_PARA_CMD_CONSTRUCT_IDLE == pCfg_para->cfg_para_cmd_construct_state)
  2517. || (HALMAC_CFG_PARA_CMD_CONSTRUCT_H2C_SENT == pCfg_para->cfg_para_cmd_construct_state))
  2518. return HALMAC_RET_ERROR_STATE;
  2519. }
  2520. pCfg_para->cfg_para_cmd_construct_state = dest_state;
  2521. return HALMAC_RET_SUCCESS;
  2522. }
  2523. HALMAC_SCAN_CMD_CONSTRUCT_STATE
  2524. halmac_query_scan_curr_state_88xx(
  2525. IN PHALMAC_ADAPTER pHalmac_adapter
  2526. )
  2527. {
  2528. return pHalmac_adapter->halmac_state.scan_state_set.scan_cmd_construct_state;
  2529. }
  2530. HALMAC_RET_STATUS
  2531. halmac_transition_scan_state_88xx(
  2532. IN PHALMAC_ADAPTER pHalmac_adapter,
  2533. IN HALMAC_SCAN_CMD_CONSTRUCT_STATE dest_state
  2534. )
  2535. {
  2536. PHALMAC_SCAN_STATE_SET pScan = &(pHalmac_adapter->halmac_state.scan_state_set);
  2537. if (pScan->scan_cmd_construct_state > HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT)
  2538. return HALMAC_RET_ERROR_STATE;
  2539. if (HALMAC_SCAN_CMD_CONSTRUCT_IDLE == dest_state) {
  2540. if ((HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED == pScan->scan_cmd_construct_state) ||
  2541. (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING == pScan->scan_cmd_construct_state))
  2542. return HALMAC_RET_ERROR_STATE;
  2543. } else if (HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED == dest_state) {
  2544. if (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == pScan->scan_cmd_construct_state)
  2545. return HALMAC_RET_ERROR_STATE;
  2546. } else if (HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING == dest_state) {
  2547. if ((HALMAC_SCAN_CMD_CONSTRUCT_IDLE == pScan->scan_cmd_construct_state) ||
  2548. (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == pScan->scan_cmd_construct_state))
  2549. return HALMAC_RET_ERROR_STATE;
  2550. } else if (HALMAC_SCAN_CMD_CONSTRUCT_H2C_SENT == dest_state) {
  2551. if ((HALMAC_SCAN_CMD_CONSTRUCT_CONSTRUCTING != pScan->scan_cmd_construct_state) &&
  2552. (HALMAC_SCAN_CMD_CONSTRUCT_BUFFER_CLEARED != pScan->scan_cmd_construct_state))
  2553. return HALMAC_RET_ERROR_STATE;
  2554. }
  2555. pScan->scan_cmd_construct_state = dest_state;
  2556. return HALMAC_RET_SUCCESS;
  2557. }
  2558. HALMAC_RET_STATUS
  2559. halmac_query_cfg_para_status_88xx(
  2560. IN PHALMAC_ADAPTER pHalmac_adapter,
  2561. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2562. INOUT u8 *data,
  2563. INOUT u32 *size
  2564. )
  2565. {
  2566. PHALMAC_CFG_PARA_STATE_SET pCfg_para_state_set = &(pHalmac_adapter->halmac_state.cfg_para_state_set);
  2567. *pProcess_status = pCfg_para_state_set->process_status;
  2568. return HALMAC_RET_SUCCESS;
  2569. }
  2570. HALMAC_RET_STATUS
  2571. halmac_query_dump_physical_efuse_status_88xx(
  2572. IN PHALMAC_ADAPTER pHalmac_adapter,
  2573. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2574. INOUT u8 *data,
  2575. INOUT u32 *size
  2576. )
  2577. {
  2578. VOID *pDriver_adapter = NULL;
  2579. PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &(pHalmac_adapter->halmac_state.efuse_state_set);
  2580. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2581. *pProcess_status = pEfuse_state_set->process_status;
  2582. if (NULL == data)
  2583. return HALMAC_RET_NULL_POINTER;
  2584. if (NULL == size)
  2585. return HALMAC_RET_NULL_POINTER;
  2586. if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
  2587. if (*size < pHalmac_adapter->hw_config_info.efuse_size) {
  2588. *size = pHalmac_adapter->hw_config_info.efuse_size;
  2589. return HALMAC_RET_BUFFER_TOO_SMALL;
  2590. }
  2591. *size = pHalmac_adapter->hw_config_info.efuse_size;
  2592. PLATFORM_RTL_MEMCPY(pDriver_adapter, data, pHalmac_adapter->pHalEfuse_map, *size);
  2593. }
  2594. return HALMAC_RET_SUCCESS;
  2595. }
  2596. HALMAC_RET_STATUS
  2597. halmac_query_dump_logical_efuse_status_88xx(
  2598. IN PHALMAC_ADAPTER pHalmac_adapter,
  2599. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2600. INOUT u8 *data,
  2601. INOUT u32 *size
  2602. )
  2603. {
  2604. u8 *pEeprom_map = NULL;
  2605. u32 eeprom_size = pHalmac_adapter->hw_config_info.eeprom_size;
  2606. VOID *pDriver_adapter = NULL;
  2607. PHALMAC_EFUSE_STATE_SET pEfuse_state_set = &(pHalmac_adapter->halmac_state.efuse_state_set);
  2608. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2609. *pProcess_status = pEfuse_state_set->process_status;
  2610. if (NULL == data)
  2611. return HALMAC_RET_NULL_POINTER;
  2612. if (NULL == size)
  2613. return HALMAC_RET_NULL_POINTER;
  2614. if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
  2615. if (*size < eeprom_size) {
  2616. *size = eeprom_size;
  2617. return HALMAC_RET_BUFFER_TOO_SMALL;
  2618. }
  2619. *size = eeprom_size;
  2620. pEeprom_map = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, eeprom_size);
  2621. if (NULL == pEeprom_map) {
  2622. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_EFUSE, HALMAC_DBG_ERR, "[ERR]halmac allocate local eeprom map Fail!!\n");
  2623. return HALMAC_RET_MALLOC_FAIL;
  2624. }
  2625. PLATFORM_RTL_MEMSET(pDriver_adapter, pEeprom_map, 0xFF, eeprom_size);
  2626. if (HALMAC_RET_SUCCESS != halmac_eeprom_parser_88xx(pHalmac_adapter, pHalmac_adapter->pHalEfuse_map, pEeprom_map)) {
  2627. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2628. return HALMAC_RET_EEPROM_PARSING_FAIL;
  2629. }
  2630. PLATFORM_RTL_MEMCPY(pDriver_adapter, data, pEeprom_map, *size);
  2631. PLATFORM_RTL_FREE(pDriver_adapter, pEeprom_map, eeprom_size);
  2632. }
  2633. return HALMAC_RET_SUCCESS;
  2634. }
  2635. HALMAC_RET_STATUS
  2636. halmac_query_channel_switch_status_88xx(
  2637. IN PHALMAC_ADAPTER pHalmac_adapter,
  2638. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2639. INOUT u8 *data,
  2640. INOUT u32 *size
  2641. )
  2642. {
  2643. PHALMAC_SCAN_STATE_SET pScan_state_set = &(pHalmac_adapter->halmac_state.scan_state_set);
  2644. *pProcess_status = pScan_state_set->process_status;
  2645. return HALMAC_RET_SUCCESS;
  2646. }
  2647. HALMAC_RET_STATUS
  2648. halmac_query_update_packet_status_88xx(
  2649. IN PHALMAC_ADAPTER pHalmac_adapter,
  2650. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2651. INOUT u8 *data,
  2652. INOUT u32 *size
  2653. )
  2654. {
  2655. PHALMAC_UPDATE_PACKET_STATE_SET pUpdate_packet_set = &(pHalmac_adapter->halmac_state.update_packet_set);
  2656. *pProcess_status = pUpdate_packet_set->process_status;
  2657. return HALMAC_RET_SUCCESS;
  2658. }
  2659. HALMAC_RET_STATUS
  2660. halmac_query_iqk_status_88xx(
  2661. IN PHALMAC_ADAPTER pHalmac_adapter,
  2662. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2663. INOUT u8 *data,
  2664. INOUT u32 *size
  2665. )
  2666. {
  2667. PHALMAC_IQK_STATE_SET pIqk_set = &(pHalmac_adapter->halmac_state.iqk_set);
  2668. *pProcess_status = pIqk_set->process_status;
  2669. return HALMAC_RET_SUCCESS;
  2670. }
  2671. HALMAC_RET_STATUS
  2672. halmac_query_power_tracking_status_88xx(
  2673. IN PHALMAC_ADAPTER pHalmac_adapter,
  2674. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2675. INOUT u8 *data,
  2676. INOUT u32 *size
  2677. )
  2678. {
  2679. PHALMAC_POWER_TRACKING_STATE_SET pPower_tracking_state_set = &(pHalmac_adapter->halmac_state.power_tracking_set);;
  2680. *pProcess_status = pPower_tracking_state_set->process_status;
  2681. return HALMAC_RET_SUCCESS;
  2682. }
  2683. HALMAC_RET_STATUS
  2684. halmac_query_psd_status_88xx(
  2685. IN PHALMAC_ADAPTER pHalmac_adapter,
  2686. OUT HALMAC_CMD_PROCESS_STATUS *pProcess_status,
  2687. INOUT u8 *data,
  2688. INOUT u32 *size
  2689. )
  2690. {
  2691. VOID *pDriver_adapter = NULL;
  2692. PHALMAC_PSD_STATE_SET pPsd_set = &(pHalmac_adapter->halmac_state.psd_set);
  2693. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2694. *pProcess_status = pPsd_set->process_status;
  2695. if (NULL == data)
  2696. return HALMAC_RET_NULL_POINTER;
  2697. if (NULL == size)
  2698. return HALMAC_RET_NULL_POINTER;
  2699. if (HALMAC_CMD_PROCESS_DONE == *pProcess_status) {
  2700. if (*size < pPsd_set->data_size) {
  2701. *size = pPsd_set->data_size;
  2702. return HALMAC_RET_BUFFER_TOO_SMALL;
  2703. }
  2704. *size = pPsd_set->data_size;
  2705. PLATFORM_RTL_MEMCPY(pDriver_adapter, data, pPsd_set->pData, *size);
  2706. }
  2707. return HALMAC_RET_SUCCESS;
  2708. }
  2709. HALMAC_RET_STATUS
  2710. halmac_verify_io_88xx(
  2711. IN PHALMAC_ADAPTER pHalmac_adapter
  2712. )
  2713. {
  2714. u8 value8, wvalue8;
  2715. u32 value32, value32_2, wvalue32;
  2716. u32 halmac_offset;
  2717. VOID *pDriver_adapter = NULL;
  2718. HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
  2719. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2720. if (HALMAC_INTERFACE_SDIO == pHalmac_adapter->halmac_interface) {
  2721. halmac_offset = REG_PAGE5_DUMMY;
  2722. if (0 == (halmac_offset & 0xFFFF0000))
  2723. halmac_offset |= WLAN_IOREG_OFFSET;
  2724. ret_status = halmac_convert_to_sdio_bus_offset_88xx(pHalmac_adapter, &halmac_offset);
  2725. /* Verify CMD52 R/W */
  2726. wvalue8 = 0xab;
  2727. PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset, wvalue8);
  2728. value8 = PLATFORM_SDIO_CMD52_READ(pDriver_adapter, halmac_offset);
  2729. if (value8 != wvalue8) {
  2730. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "cmd52 r/w fail write = %X read = %X\n", wvalue8, value8);
  2731. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2732. } else {
  2733. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "cmd52 r/w ok\n");
  2734. }
  2735. /* Verify CMD53 R/W */
  2736. PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset, 0xaa);
  2737. PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 1, 0xbb);
  2738. PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 2, 0xcc);
  2739. PLATFORM_SDIO_CMD52_WRITE(pDriver_adapter, halmac_offset + 3, 0xdd);
  2740. value32 = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
  2741. if (0xddccbbaa != value32) {
  2742. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "cmd53 r fail : read = %X\n");
  2743. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2744. } else {
  2745. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "cmd53 r ok\n");
  2746. }
  2747. wvalue32 = 0x11223344;
  2748. PLATFORM_SDIO_CMD53_WRITE_32(pDriver_adapter, halmac_offset, wvalue32);
  2749. value32 = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset);
  2750. if (value32 != wvalue32) {
  2751. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "cmd53 w fail\n");
  2752. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2753. } else {
  2754. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "cmd53 w ok\n");
  2755. }
  2756. value32 = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset + 2); /* value32 should be 0x33441122 */
  2757. wvalue32 = 0x11225566;
  2758. PLATFORM_SDIO_CMD53_WRITE_32(pDriver_adapter, halmac_offset, wvalue32);
  2759. value32_2 = PLATFORM_SDIO_CMD53_READ_32(pDriver_adapter, halmac_offset + 2); /* value32 should be 0x55661122 */
  2760. if (value32_2 == value32) {
  2761. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "cmd52 is used for HAL_SDIO_CMD53_READ_32\n");
  2762. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2763. } else {
  2764. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "cmd53 is correctly used\n");
  2765. }
  2766. } else {
  2767. wvalue32 = 0x77665511;
  2768. PLATFORM_REG_WRITE_32(pDriver_adapter, REG_PAGE5_DUMMY, wvalue32);
  2769. value32 = PLATFORM_REG_READ_32(pDriver_adapter, REG_PAGE5_DUMMY);
  2770. if (value32 != wvalue32) {
  2771. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "reg rw\n");
  2772. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2773. } else {
  2774. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "reg rw ok\n");
  2775. }
  2776. }
  2777. return ret_status;
  2778. }
  2779. HALMAC_RET_STATUS
  2780. halmac_verify_send_rsvd_page_88xx(
  2781. IN PHALMAC_ADAPTER pHalmac_adapter
  2782. )
  2783. {
  2784. u8 *rsvd_buf = NULL;
  2785. u8 *rsvd_page = NULL;
  2786. u32 i;
  2787. u32 h2c_pkt_verify_size = 64, h2c_pkt_verify_payload = 0xab;
  2788. VOID *pDriver_adapter = NULL;
  2789. HALMAC_RET_STATUS ret_status = HALMAC_RET_SUCCESS;
  2790. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2791. rsvd_buf = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, h2c_pkt_verify_size);
  2792. if (NULL == rsvd_buf) {
  2793. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]rsvd buffer malloc fail!!\n");
  2794. return HALMAC_RET_MALLOC_FAIL;
  2795. }
  2796. PLATFORM_RTL_MEMSET(pDriver_adapter, rsvd_buf, (u8)h2c_pkt_verify_payload, h2c_pkt_verify_size);
  2797. ret_status = halmac_download_rsvd_page_88xx(pHalmac_adapter, rsvd_buf, h2c_pkt_verify_size);
  2798. if (HALMAC_RET_SUCCESS != ret_status) {
  2799. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
  2800. return ret_status;
  2801. }
  2802. rsvd_page = (u8 *)PLATFORM_RTL_MALLOC(pDriver_adapter, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
  2803. if (NULL == rsvd_page) {
  2804. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]rsvd page malloc fail!!\n");
  2805. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
  2806. return HALMAC_RET_MALLOC_FAIL;
  2807. }
  2808. PLATFORM_RTL_MEMSET(pDriver_adapter, rsvd_page, 0x00, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
  2809. ret_status = halmac_dump_fifo_88xx(pHalmac_adapter, HAL_FIFO_SEL_RSVD_PAGE, 0, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size, rsvd_page);
  2810. if (HALMAC_RET_SUCCESS != ret_status) {
  2811. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
  2812. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_page, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
  2813. return ret_status;
  2814. }
  2815. for (i = 0; i < h2c_pkt_verify_size; i++) {
  2816. if (*(rsvd_buf + i) != *(rsvd_page + (i + pHalmac_adapter->hw_config_info.txdesc_size))) {
  2817. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "[ERR]Compare RSVD page Fail\n");
  2818. ret_status = HALMAC_RET_PLATFORM_API_INCORRECT;
  2819. }
  2820. }
  2821. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_buf, h2c_pkt_verify_size);
  2822. PLATFORM_RTL_FREE(pDriver_adapter, rsvd_page, h2c_pkt_verify_size + pHalmac_adapter->hw_config_info.txdesc_size);
  2823. return ret_status;
  2824. }
  2825. VOID
  2826. halmac_power_save_cb_88xx(
  2827. IN VOID *CbData
  2828. )
  2829. {
  2830. VOID *pDriver_adapter = NULL;
  2831. PHALMAC_ADAPTER pHalmac_adapter = (PHALMAC_ADAPTER)NULL;
  2832. pHalmac_adapter = (PHALMAC_ADAPTER)CbData;
  2833. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2834. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_PWR, HALMAC_DBG_TRACE, "halmac_power_save_cb_88xx\n");
  2835. }
  2836. HALMAC_RET_STATUS
  2837. halmac_buffer_read_88xx(
  2838. IN PHALMAC_ADAPTER pHalmac_adapter,
  2839. IN u32 offset,
  2840. IN u32 size,
  2841. IN HAL_FIFO_SEL halmac_fifo_sel,
  2842. OUT u8 *pFifo_map
  2843. )
  2844. {
  2845. u32 start_page, value_read;
  2846. u32 i, counter = 0, residue;
  2847. PHALMAC_API pHalmac_api;
  2848. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2849. if (HAL_FIFO_SEL_RSVD_PAGE == halmac_fifo_sel)
  2850. offset = offset + (pHalmac_adapter->txff_allocation.rsvd_pg_bndy << HALMAC_TX_PAGE_SIZE_2_POWER_88XX);
  2851. start_page = offset >> 12;
  2852. residue = offset & (4096 - 1);
  2853. if ((HAL_FIFO_SEL_TX == halmac_fifo_sel) || (HAL_FIFO_SEL_RSVD_PAGE == halmac_fifo_sel))
  2854. start_page += 0x780;
  2855. else if (HAL_FIFO_SEL_RX == halmac_fifo_sel)
  2856. start_page += 0x700;
  2857. else if (HAL_FIFO_SEL_REPORT == halmac_fifo_sel)
  2858. start_page += 0x660;
  2859. else if (HAL_FIFO_SEL_LLT == halmac_fifo_sel)
  2860. start_page += 0x650;
  2861. else
  2862. return HALMAC_RET_NOT_SUPPORT;
  2863. value_read = HALMAC_REG_READ_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL);
  2864. do {
  2865. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL, (u16)(start_page | (value_read & 0xF000)));
  2866. for (i = 0x8000 + residue; i <= 0x8FFF; i += 4) {
  2867. *(u32 *)(pFifo_map + counter) = HALMAC_REG_READ_32(pHalmac_adapter, i);
  2868. *(u32 *)(pFifo_map + counter) = rtk_le32_to_cpu(*(u32 *)(pFifo_map + counter));
  2869. counter += 4;
  2870. if (size == counter)
  2871. goto HALMAC_BUF_READ_OK;
  2872. }
  2873. residue = 0;
  2874. start_page++;
  2875. } while (1);
  2876. HALMAC_BUF_READ_OK:
  2877. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_PKTBUF_DBG_CTRL, (u16)value_read);
  2878. return HALMAC_RET_SUCCESS;
  2879. }
  2880. VOID
  2881. halmac_restore_mac_register_88xx(
  2882. IN PHALMAC_ADAPTER pHalmac_adapter,
  2883. IN PHALMAC_RESTORE_INFO pRestore_info,
  2884. IN u32 restore_num
  2885. )
  2886. {
  2887. u8 value_length;
  2888. u32 i;
  2889. u32 mac_register;
  2890. u32 mac_value;
  2891. PHALMAC_API pHalmac_api;
  2892. PHALMAC_RESTORE_INFO pCurr_restore_info = pRestore_info;
  2893. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2894. for (i = 0; i < restore_num; i++) {
  2895. mac_register = pCurr_restore_info->mac_register;
  2896. mac_value = pCurr_restore_info->value;
  2897. value_length = pCurr_restore_info->length;
  2898. if (1 == value_length)
  2899. HALMAC_REG_WRITE_8(pHalmac_adapter, mac_register, (u8)mac_value);
  2900. else if (2 == value_length)
  2901. HALMAC_REG_WRITE_16(pHalmac_adapter, mac_register, (u16)mac_value);
  2902. else if (4 == value_length)
  2903. HALMAC_REG_WRITE_32(pHalmac_adapter, mac_register, mac_value);
  2904. pCurr_restore_info++;
  2905. }
  2906. }
  2907. VOID
  2908. halmac_api_record_id_88xx(
  2909. IN PHALMAC_ADAPTER pHalmac_adapter,
  2910. IN HALMAC_API_ID api_id
  2911. )
  2912. {
  2913. }
  2914. HALMAC_RET_STATUS
  2915. halmac_set_usb_mode_88xx(
  2916. IN PHALMAC_ADAPTER pHalmac_adapter,
  2917. IN HALMAC_USB_MODE usb_mode
  2918. )
  2919. {
  2920. u32 usb_temp;
  2921. VOID *pDriver_adapter = NULL;
  2922. PHALMAC_API pHalmac_api;
  2923. HALMAC_USB_MODE current_usb_mode;
  2924. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  2925. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2926. current_usb_mode = (HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_CFG2 + 3) == 0x20) ? HALMAC_USB_MODE_U3 : HALMAC_USB_MODE_U2;
  2927. /*check if HW supports usb2_usb3 swtich*/
  2928. usb_temp = HALMAC_REG_READ_32(pHalmac_adapter, REG_PAD_CTRL2);
  2929. if (_FALSE == (BIT_GET_USB23_SW_MODE_V1(usb_temp) | (usb_temp & BIT_USB3_USB2_TRANSITION))) {
  2930. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "HALMAC_HW_USB_MODE usb mode HW unsupport\n");
  2931. return HALMAC_RET_USB2_3_SWITCH_UNSUPPORT;
  2932. }
  2933. if (usb_mode == current_usb_mode) {
  2934. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_H2C, HALMAC_DBG_ERR, "HALMAC_HW_USB_MODE usb mode unchange\n");
  2935. return HALMAC_RET_USB_MODE_UNCHANGE;
  2936. }
  2937. usb_temp &= ~(BIT_USB23_SW_MODE_V1(0x3));
  2938. if (HALMAC_USB_MODE_U2 == usb_mode) {
  2939. /* usb3 to usb2 */
  2940. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_PAD_CTRL2, usb_temp | BIT_USB23_SW_MODE_V1(HALMAC_USB_MODE_U2) | BIT_RSM_EN_V1);
  2941. } else {
  2942. /* usb2 to usb3 */
  2943. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_PAD_CTRL2, usb_temp | BIT_USB23_SW_MODE_V1(HALMAC_USB_MODE_U3) | BIT_RSM_EN_V1);
  2944. }
  2945. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PAD_CTRL2 + 1, 4); /* set counter down timer 4x64 ms */
  2946. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_SYS_PW_CTRL, HALMAC_REG_READ_16(pHalmac_adapter, REG_SYS_PW_CTRL) | BIT_APFM_OFFMAC);
  2947. PLATFORM_RTL_DELAY_US(pDriver_adapter, 1000);
  2948. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_PAD_CTRL2, HALMAC_REG_READ_32(pHalmac_adapter, REG_PAD_CTRL2) | BIT_NO_PDN_CHIPOFF_V1);
  2949. return HALMAC_RET_SUCCESS;
  2950. }
  2951. VOID
  2952. halmac_enable_bb_rf_88xx(
  2953. IN PHALMAC_ADAPTER pHalmac_adapter,
  2954. IN u8 enable
  2955. )
  2956. {
  2957. u8 value8;
  2958. u32 value32;
  2959. PHALMAC_API pHalmac_api;
  2960. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2961. if (1 == enable) {
  2962. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_FUNC_EN);
  2963. value8 = value8 | BIT(0) | BIT(1);
  2964. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN, value8);
  2965. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_RF_CTRL);
  2966. value8 = value8 | BIT(0) | BIT(1) | BIT(2);
  2967. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RF_CTRL, value8);
  2968. value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_WLRF1);
  2969. value32 = value32 | BIT(24) | BIT(25) | BIT(26);
  2970. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WLRF1, value32);
  2971. } else {
  2972. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_SYS_FUNC_EN);
  2973. value8 = value8 & (~(BIT(0) | BIT(1)));
  2974. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_SYS_FUNC_EN, value8);
  2975. value8 = HALMAC_REG_READ_8(pHalmac_adapter, REG_RF_CTRL);
  2976. value8 = value8 & (~(BIT(0) | BIT(1) | BIT(2)));
  2977. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_RF_CTRL, value8);
  2978. value32 = HALMAC_REG_READ_32(pHalmac_adapter, REG_WLRF1);
  2979. value32 = value32 & (~(BIT(24) | BIT(25) | BIT(26)));
  2980. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_WLRF1, value32);
  2981. }
  2982. }
  2983. VOID
  2984. halmac_config_sdio_tx_page_threshold_88xx(
  2985. IN PHALMAC_ADAPTER pHalmac_adapter,
  2986. IN PHALMAC_TX_PAGE_THRESHOLD_INFO pThreshold_info
  2987. )
  2988. {
  2989. PHALMAC_API pHalmac_api;
  2990. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  2991. switch (pThreshold_info->dma_queue_sel) {
  2992. case HALMAC_MAP2_HQ:
  2993. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT1, pThreshold_info->threshold);
  2994. break;
  2995. case HALMAC_MAP2_NQ:
  2996. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT2, pThreshold_info->threshold);
  2997. break;
  2998. case HALMAC_MAP2_LQ:
  2999. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT3, pThreshold_info->threshold);
  3000. break;
  3001. case HALMAC_MAP2_EXQ:
  3002. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_TQPNT4, pThreshold_info->threshold);
  3003. break;
  3004. default:
  3005. break;
  3006. }
  3007. }
  3008. VOID
  3009. halmac_config_ampdu_88xx(
  3010. IN PHALMAC_ADAPTER pHalmac_adapter,
  3011. IN PHALMAC_AMPDU_CONFIG pAmpdu_config
  3012. )
  3013. {
  3014. PHALMAC_API pHalmac_api;
  3015. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3016. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PROT_MODE_CTRL + 2, pAmpdu_config->max_agg_num);
  3017. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PROT_MODE_CTRL + 3, pAmpdu_config->max_agg_num);
  3018. };
  3019. HALMAC_RET_STATUS
  3020. halmac_check_oqt_88xx(
  3021. IN PHALMAC_ADAPTER pHalmac_adapter,
  3022. IN u32 tx_agg_num,
  3023. IN u8 *pHalmac_buf
  3024. )
  3025. {
  3026. u32 counter = 10;
  3027. /*S0, S1 are not allowed to use, 0x4E4[0] should be 0. Soar 20160323*/
  3028. /*no need to check non_ac_oqt_number. HI and MGQ blocked will cause protocal issue before H_OQT being full*/
  3029. switch ((HALMAC_QUEUE_SELECT)GET_TX_DESC_QSEL(pHalmac_buf)) {
  3030. case HALMAC_QUEUE_SELECT_VO:
  3031. case HALMAC_QUEUE_SELECT_VO_V2:
  3032. case HALMAC_QUEUE_SELECT_VI:
  3033. case HALMAC_QUEUE_SELECT_VI_V2:
  3034. case HALMAC_QUEUE_SELECT_BE:
  3035. case HALMAC_QUEUE_SELECT_BE_V2:
  3036. case HALMAC_QUEUE_SELECT_BK:
  3037. case HALMAC_QUEUE_SELECT_BK_V2:
  3038. counter = 10;
  3039. do {
  3040. if (pHalmac_adapter->sdio_free_space.ac_empty > 0) {
  3041. pHalmac_adapter->sdio_free_space.ac_empty -= 1;
  3042. break;
  3043. }
  3044. if (pHalmac_adapter->sdio_free_space.ac_oqt_number >= tx_agg_num) {
  3045. pHalmac_adapter->sdio_free_space.ac_oqt_number -= (u8)tx_agg_num;
  3046. break;
  3047. }
  3048. halmac_update_oqt_free_space_88xx(pHalmac_adapter);
  3049. counter--;
  3050. if (0 == counter)
  3051. return HALMAC_RET_OQT_NOT_ENOUGH;
  3052. } while (1);
  3053. break;
  3054. default:
  3055. break;
  3056. }
  3057. return HALMAC_RET_SUCCESS;
  3058. }
  3059. HALMAC_RET_STATUS
  3060. halmac_rqpn_parser_88xx(
  3061. IN PHALMAC_ADAPTER pHalmac_adapter,
  3062. IN HALMAC_TRX_MODE halmac_trx_mode,
  3063. IN PHALMAC_RQPN pRqpn_table
  3064. )
  3065. {
  3066. u8 search_flag;
  3067. u32 i;
  3068. VOID *pDriver_adapter = NULL;
  3069. PHALMAC_API pHalmac_api;
  3070. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3071. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3072. search_flag = 0;
  3073. for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
  3074. if (halmac_trx_mode == pRqpn_table[i].mode) {
  3075. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VO] = pRqpn_table[i].dma_map_vo;
  3076. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_VI] = pRqpn_table[i].dma_map_vi;
  3077. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BE] = pRqpn_table[i].dma_map_be;
  3078. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_BK] = pRqpn_table[i].dma_map_bk;
  3079. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_MG] = pRqpn_table[i].dma_map_mg;
  3080. pHalmac_adapter->halmac_ptcl_queue[HALMAC_PTCL_QUEUE_HI] = pRqpn_table[i].dma_map_hi;
  3081. search_flag = 1;
  3082. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_rqpn_parser_88xx done\n");
  3083. break;
  3084. }
  3085. }
  3086. if (0 == search_flag) {
  3087. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_RET_TRX_MODE_NOT_SUPPORT 1 switch case not support\n");
  3088. return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
  3089. }
  3090. return HALMAC_RET_SUCCESS;
  3091. }
  3092. HALMAC_RET_STATUS
  3093. halmac_pg_num_parser_88xx(
  3094. IN PHALMAC_ADAPTER pHalmac_adapter,
  3095. IN HALMAC_TRX_MODE halmac_trx_mode,
  3096. IN PHALMAC_PG_NUM pPg_num_table
  3097. )
  3098. {
  3099. u8 search_flag;
  3100. u16 HPQ_num = 0, LPQ_Nnum = 0, NPQ_num = 0, GAPQ_num = 0;
  3101. u16 EXPQ_num = 0, PUBQ_num = 0;
  3102. u32 i = 0;
  3103. VOID *pDriver_adapter = NULL;
  3104. PHALMAC_API pHalmac_api;
  3105. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3106. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3107. search_flag = 0;
  3108. for (i = 0; i < HALMAC_TRX_MODE_MAX; i++) {
  3109. if (halmac_trx_mode == pPg_num_table[i].mode) {
  3110. HPQ_num = pPg_num_table[i].hq_num;
  3111. LPQ_Nnum = pPg_num_table[i].lq_num;
  3112. NPQ_num = pPg_num_table[i].nq_num;
  3113. EXPQ_num = pPg_num_table[i].exq_num;
  3114. GAPQ_num = pPg_num_table[i].gap_num;
  3115. PUBQ_num = pHalmac_adapter->txff_allocation.ac_q_pg_num - HPQ_num - LPQ_Nnum - NPQ_num - EXPQ_num - GAPQ_num;
  3116. search_flag = 1;
  3117. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_TRACE, "halmac_pg_num_parser_88xx done\n");
  3118. break;
  3119. }
  3120. }
  3121. if (0 == search_flag) {
  3122. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_INIT, HALMAC_DBG_ERR, "HALMAC_RET_TRX_MODE_NOT_SUPPORT 1 switch case not support\n");
  3123. return HALMAC_RET_TRX_MODE_NOT_SUPPORT;
  3124. }
  3125. if (pHalmac_adapter->txff_allocation.ac_q_pg_num < HPQ_num + LPQ_Nnum + NPQ_num + EXPQ_num + GAPQ_num)
  3126. return HALMAC_RET_CFG_TXFIFO_PAGE_FAIL;
  3127. pHalmac_adapter->txff_allocation.high_queue_pg_num = HPQ_num;
  3128. pHalmac_adapter->txff_allocation.low_queue_pg_num = LPQ_Nnum;
  3129. pHalmac_adapter->txff_allocation.normal_queue_pg_num = NPQ_num;
  3130. pHalmac_adapter->txff_allocation.extra_queue_pg_num = EXPQ_num;
  3131. pHalmac_adapter->txff_allocation.pub_queue_pg_num = PUBQ_num;
  3132. return HALMAC_RET_SUCCESS;
  3133. }
  3134. HALMAC_RET_STATUS
  3135. halmac_parse_intf_phy_88xx(
  3136. IN PHALMAC_ADAPTER pHalmac_adapter,
  3137. IN PHALMAC_INTF_PHY_PARA pIntf_phy_para,
  3138. IN HALMAC_INTF_PHY_PLATFORM platform,
  3139. IN HAL_INTF_PHY intf_phy
  3140. )
  3141. {
  3142. u16 value;
  3143. u16 curr_cut;
  3144. u16 offset;
  3145. u16 ip_sel;
  3146. PHALMAC_INTF_PHY_PARA pCurr_phy_para;
  3147. PHALMAC_API pHalmac_api;
  3148. VOID *pDriver_adapter = NULL;
  3149. u8 result = HALMAC_RET_SUCCESS;
  3150. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3151. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3152. switch (pHalmac_adapter->chip_version) {
  3153. case HALMAC_CHIP_VER_A_CUT:
  3154. curr_cut = (u16)HALMAC_INTF_PHY_CUT_A;
  3155. break;
  3156. case HALMAC_CHIP_VER_B_CUT:
  3157. curr_cut = (u16)HALMAC_INTF_PHY_CUT_B;
  3158. break;
  3159. case HALMAC_CHIP_VER_C_CUT:
  3160. curr_cut = (u16)HALMAC_INTF_PHY_CUT_C;
  3161. break;
  3162. case HALMAC_CHIP_VER_D_CUT:
  3163. curr_cut = (u16)HALMAC_INTF_PHY_CUT_D;
  3164. break;
  3165. case HALMAC_CHIP_VER_E_CUT:
  3166. curr_cut = (u16)HALMAC_INTF_PHY_CUT_E;
  3167. break;
  3168. case HALMAC_CHIP_VER_F_CUT:
  3169. curr_cut = (u16)HALMAC_INTF_PHY_CUT_F;
  3170. break;
  3171. case HALMAC_CHIP_VER_TEST:
  3172. curr_cut = (u16)HALMAC_INTF_PHY_CUT_TESTCHIP;
  3173. break;
  3174. default:
  3175. return HALMAC_RET_FAIL;
  3176. }
  3177. pCurr_phy_para = pIntf_phy_para;
  3178. do {
  3179. if ((pCurr_phy_para->cut & curr_cut) && (pCurr_phy_para->plaform & (u16)platform)) {
  3180. offset = pCurr_phy_para->offset;
  3181. value = pCurr_phy_para->value;
  3182. ip_sel = pCurr_phy_para->ip_sel;
  3183. if (0xFFFF == offset)
  3184. break;
  3185. if (HALMAC_IP_SEL_MAC == ip_sel) {
  3186. HALMAC_REG_WRITE_8(pHalmac_adapter, (u32)offset, (u8)value);
  3187. } else if (HAL_INTF_PHY_USB2 == intf_phy) {
  3188. result = halmac_usbphy_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_USB2);
  3189. if (HALMAC_RET_SUCCESS != result)
  3190. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Write USB2PHY fail!\n");
  3191. } else if (HAL_INTF_PHY_USB3 == intf_phy) {
  3192. result = halmac_usbphy_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_USB3);
  3193. if (HALMAC_RET_SUCCESS != result)
  3194. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Write USB3PHY fail!\n");
  3195. } else if (HAL_INTF_PHY_PCIE_GEN1 == intf_phy) {
  3196. if (HALMAC_IP_SEL_INTF_PHY == ip_sel)
  3197. result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN1);
  3198. else
  3199. result = halmac_dbi_write8_88xx(pHalmac_adapter, offset, (u8)value);
  3200. if (HALMAC_RET_SUCCESS != result)
  3201. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "[ERR]MDIO write GEN1 fail!\n");
  3202. } else if (HAL_INTF_PHY_PCIE_GEN2 == intf_phy) {
  3203. if (HALMAC_IP_SEL_INTF_PHY == ip_sel)
  3204. result = halmac_mdio_write_88xx(pHalmac_adapter, (u8)offset, value, HAL_INTF_PHY_PCIE_GEN2);
  3205. else
  3206. result = halmac_dbi_write8_88xx(pHalmac_adapter, offset, (u8)value);
  3207. if (HALMAC_RET_SUCCESS != result)
  3208. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "[ERR]MDIO write GEN2 fail!\n");
  3209. } else {
  3210. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_COMMON, HALMAC_DBG_ERR, "[ERR]Parse intf phy cfg error!\n");
  3211. }
  3212. }
  3213. pCurr_phy_para++;
  3214. } while (1);
  3215. return HALMAC_RET_SUCCESS;
  3216. }
  3217. HALMAC_RET_STATUS
  3218. halmac_dbi_write32_88xx(
  3219. IN PHALMAC_ADAPTER pHalmac_adapter,
  3220. IN u16 addr,
  3221. IN u32 data
  3222. )
  3223. {
  3224. u8 tmp_u1b = 0;
  3225. u32 count = 0;
  3226. u16 write_addr = 0;
  3227. VOID *pDriver_adapter = NULL;
  3228. PHALMAC_API pHalmac_api;
  3229. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3230. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3231. HALMAC_REG_WRITE_32(pHalmac_adapter, REG_DBI_WDATA_V1, data);
  3232. write_addr = ((addr & 0x0ffc) | (0x000F << 12));
  3233. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, write_addr);
  3234. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "WriteAddr = %x\n", write_addr);
  3235. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x01);
  3236. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3237. count = 20;
  3238. while (tmp_u1b && (count != 0)) {
  3239. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3240. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3241. count--;
  3242. }
  3243. if (tmp_u1b) {
  3244. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI write fail!\n");
  3245. return HALMAC_RET_FAIL;
  3246. } else {
  3247. return HALMAC_RET_SUCCESS;
  3248. }
  3249. }
  3250. u32
  3251. halmac_dbi_read32_88xx(
  3252. IN PHALMAC_ADAPTER pHalmac_adapter,
  3253. IN u16 addr
  3254. )
  3255. {
  3256. u16 read_addr = addr & 0x0ffc;
  3257. u8 tmp_u1b = 0;
  3258. u32 count = 0;
  3259. u32 ret = 0;
  3260. VOID *pDriver_adapter = NULL;
  3261. PHALMAC_API pHalmac_api; ;
  3262. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3263. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3264. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, read_addr);
  3265. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x2);
  3266. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3267. count = 20;
  3268. while (tmp_u1b && (count != 0)) {
  3269. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3270. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3271. count--;
  3272. }
  3273. if (tmp_u1b) {
  3274. ret = 0xFFFF;
  3275. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI read fail!\n");
  3276. } else {
  3277. ret = HALMAC_REG_READ_32(pHalmac_adapter, REG_DBI_RDATA_V1);
  3278. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
  3279. }
  3280. return ret;
  3281. }
  3282. HALMAC_RET_STATUS
  3283. halmac_dbi_write8_88xx(
  3284. IN PHALMAC_ADAPTER pHalmac_adapter,
  3285. IN u16 addr,
  3286. IN u8 data
  3287. )
  3288. {
  3289. u8 tmp_u1b = 0;
  3290. u32 count = 0;
  3291. u16 write_addr = 0;
  3292. u16 remainder = addr & (4 - 1);
  3293. VOID *pDriver_adapter = NULL;
  3294. PHALMAC_API pHalmac_api; ;
  3295. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3296. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3297. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_WDATA_V1 + remainder, data);
  3298. write_addr = ((addr & 0x0ffc) | (BIT(0) << (remainder + 12)));
  3299. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, write_addr);
  3300. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "WriteAddr = %x\n", write_addr);
  3301. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x01);
  3302. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3303. count = 20;
  3304. while (tmp_u1b && (count != 0)) {
  3305. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3306. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1+2);
  3307. count--;
  3308. }
  3309. if (tmp_u1b) {
  3310. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI write fail!\n");
  3311. return HALMAC_RET_FAIL;
  3312. } else {
  3313. return HALMAC_RET_SUCCESS;
  3314. }
  3315. }
  3316. u8
  3317. halmac_dbi_read8_88xx(
  3318. IN PHALMAC_ADAPTER pHalmac_adapter,
  3319. IN u16 addr
  3320. )
  3321. {
  3322. u16 read_addr = addr & 0x0ffc;
  3323. u8 tmp_u1b = 0;
  3324. u32 count = 0;
  3325. u8 ret = 0;
  3326. VOID *pDriver_adapter = NULL;
  3327. PHALMAC_API pHalmac_api; ;
  3328. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3329. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3330. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_DBI_FLAG_V1, read_addr);
  3331. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2, 0x2);
  3332. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3333. count = 20;
  3334. while (tmp_u1b && (count != 0)) {
  3335. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3336. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_FLAG_V1 + 2);
  3337. count--;
  3338. }
  3339. if (tmp_u1b) {
  3340. ret = 0xFF;
  3341. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_ERR, "DBI read fail!\n");
  3342. } else {
  3343. ret = HALMAC_REG_READ_8(pHalmac_adapter, REG_DBI_RDATA_V1 + (addr & (4 - 1)));
  3344. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_DBI, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
  3345. }
  3346. return ret;
  3347. }
  3348. HALMAC_RET_STATUS
  3349. halmac_mdio_write_88xx(
  3350. IN PHALMAC_ADAPTER pHalmac_adapter,
  3351. IN u8 addr,
  3352. IN u16 data,
  3353. IN u8 speed
  3354. )
  3355. {
  3356. u8 tmp_u1b = 0;
  3357. u32 count = 0;
  3358. VOID *pDriver_adapter = NULL;
  3359. PHALMAC_API pHalmac_api;
  3360. u8 real_addr = 0;
  3361. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3362. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3363. HALMAC_REG_WRITE_16(pHalmac_adapter, REG_MDIO_V1, data);
  3364. /* address : 5bit */
  3365. real_addr = (addr & 0x1F);
  3366. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, real_addr);
  3367. if (HAL_INTF_PHY_PCIE_GEN1 == speed) {
  3368. /* GEN1 page 0 */
  3369. if (addr < 0x20) {
  3370. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b00 */
  3371. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x00);
  3372. /* GEN1 page 1 */
  3373. } else {
  3374. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b01 */
  3375. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x01);
  3376. }
  3377. } else if (HAL_INTF_PHY_PCIE_GEN2 == speed) {
  3378. /* GEN2 page 0 */
  3379. if (addr < 0x20) {
  3380. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b10 */
  3381. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x02);
  3382. /* GEN2 page 1 */
  3383. } else {
  3384. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b11 */
  3385. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x03);
  3386. }
  3387. } else {
  3388. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "Error Speed !\n");
  3389. }
  3390. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) | BIT_MDIO_WFLAG_V1);
  3391. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1 ;
  3392. count = 20;
  3393. while (tmp_u1b && (count != 0)) {
  3394. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3395. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_WFLAG_V1;
  3396. count--;
  3397. }
  3398. if (tmp_u1b) {
  3399. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO write fail!\n");
  3400. return HALMAC_RET_FAIL;
  3401. } else {
  3402. return HALMAC_RET_SUCCESS;
  3403. }
  3404. }
  3405. u16
  3406. halmac_mdio_read_88xx(
  3407. IN PHALMAC_ADAPTER pHalmac_adapter,
  3408. IN u8 addr,
  3409. IN u8 speed
  3410. )
  3411. {
  3412. u16 ret = 0;
  3413. u8 tmp_u1b = 0;
  3414. u32 count = 0;
  3415. VOID *pDriver_adapter = NULL;
  3416. PHALMAC_API pHalmac_api;
  3417. u8 real_addr = 0;
  3418. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3419. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3420. /* address : 5bit */
  3421. real_addr = (addr & 0x1F);
  3422. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, real_addr);
  3423. if (HAL_INTF_PHY_PCIE_GEN1 == speed) {
  3424. /* GEN1 page 0 */
  3425. if (addr < 0x20) {
  3426. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b00 */
  3427. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x00);
  3428. /* GEN1 page 1 */
  3429. } else {
  3430. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b01 */
  3431. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x01);
  3432. }
  3433. } else if (HAL_INTF_PHY_PCIE_GEN2 == speed) {
  3434. /* GEN2 page 0 */
  3435. if (addr < 0x20) {
  3436. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b10 */
  3437. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x02);
  3438. /* GEN2 page 1 */
  3439. } else {
  3440. /* select MDIO PHY Addr : reg 0x3F8[28:24]=5'b11 */
  3441. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG + 3, 0x03);
  3442. }
  3443. } else {
  3444. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "Error Speed !\n");
  3445. }
  3446. HALMAC_REG_WRITE_8(pHalmac_adapter, REG_PCIE_MIX_CFG, HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) | BIT_MDIO_RFLAG_V1);
  3447. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1 ;
  3448. count = 20;
  3449. while (tmp_u1b && (count != 0)) {
  3450. PLATFORM_RTL_DELAY_US(pDriver_adapter, 10);
  3451. tmp_u1b = HALMAC_REG_READ_8(pHalmac_adapter, REG_PCIE_MIX_CFG) & BIT_MDIO_RFLAG_V1;
  3452. count--;
  3453. }
  3454. if (tmp_u1b) {
  3455. ret = 0xFFFF;
  3456. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_ERR, "MDIO read fail!\n");
  3457. } else {
  3458. ret = HALMAC_REG_READ_16(pHalmac_adapter, REG_MDIO_V1+2);
  3459. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_MDIO, HALMAC_DBG_TRACE, "Read Value = %x\n", ret);
  3460. }
  3461. return ret;
  3462. }
  3463. HALMAC_RET_STATUS
  3464. halmac_usbphy_write_88xx(
  3465. IN PHALMAC_ADAPTER pHalmac_adapter,
  3466. IN u8 addr,
  3467. IN u16 data,
  3468. IN u8 speed
  3469. )
  3470. {
  3471. VOID *pDriver_adapter = NULL;
  3472. PHALMAC_API pHalmac_api;
  3473. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3474. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3475. if (HAL_INTF_PHY_USB3 == speed) {
  3476. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0d, (u8)data);
  3477. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0e, (u8)(data>>8));
  3478. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0c, addr|BIT(7));
  3479. } else if (HAL_INTF_PHY_USB2 == speed) {
  3480. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe41, (u8)data);
  3481. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe40, addr);
  3482. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe42, 0x81);
  3483. } else {
  3484. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB Speed !\n");
  3485. return HALMAC_RET_NOT_SUPPORT;
  3486. }
  3487. return HALMAC_RET_SUCCESS;
  3488. }
  3489. u16
  3490. halmac_usbphy_read_88xx(
  3491. IN PHALMAC_ADAPTER pHalmac_adapter,
  3492. IN u8 addr,
  3493. IN u8 speed
  3494. )
  3495. {
  3496. VOID *pDriver_adapter = NULL;
  3497. PHALMAC_API pHalmac_api;
  3498. u16 value = 0;
  3499. pDriver_adapter = pHalmac_adapter->pDriver_adapter;
  3500. pHalmac_api = (PHALMAC_API)pHalmac_adapter->pHalmac_api;
  3501. if (HAL_INTF_PHY_USB3 == speed) {
  3502. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xff0c, addr|BIT(6));
  3503. value = (u16)(HALMAC_REG_READ_32(pHalmac_adapter, 0xff0c)>>8);
  3504. } else if (HAL_INTF_PHY_USB2 == speed) {
  3505. if ((addr >= 0xE0) && (addr <= 0xFF))
  3506. addr -= 0x20;
  3507. if ((addr >= 0xC0) && (addr <= 0xDF)) {
  3508. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe40, addr);
  3509. HALMAC_REG_WRITE_8(pHalmac_adapter, 0xfe42, 0x81);
  3510. value = HALMAC_REG_READ_8(pHalmac_adapter, 0xfe43);
  3511. } else {
  3512. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB2PHY offset!\n");
  3513. return HALMAC_RET_NOT_SUPPORT;
  3514. }
  3515. } else {
  3516. PLATFORM_MSG_PRINT(pDriver_adapter, HALMAC_MSG_USB, HALMAC_DBG_ERR, "[ERR]Error USB Speed !\n");
  3517. return HALMAC_RET_NOT_SUPPORT;
  3518. }
  3519. return value;
  3520. }