halrf.h 16 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #ifndef __HALRF_H__
  26. #define __HALRF_H__
  27. /*============================================================*/
  28. /*include files*/
  29. /*============================================================*/
  30. #include "halrf/halrf_psd.h"
  31. #if (RTL8822B_SUPPORT == 1)
  32. #include "halrf/rtl8822b/halrf_rfk_init_8822b.h"
  33. #endif
  34. #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
  35. #if (RTL8198F_SUPPORT == 1)
  36. #include "halrf/rtl8198f/halrf_rfk_init_8198f.h"
  37. #endif
  38. #endif
  39. /*============================================================*/
  40. /*Definition */
  41. /*============================================================*/
  42. /*IQK version*/
  43. #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
  44. #define IQK_VER_8188E "0x14"
  45. #define IQK_VER_8192E "0x01"
  46. #define IQK_VER_8192F "0x01"
  47. #define IQK_VER_8723B "0x1e"
  48. #define IQK_VER_8812A "0x01"
  49. #define IQK_VER_8821A "0x01"
  50. #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
  51. #define IQK_VER_8188E "0x01"
  52. #define IQK_VER_8192E "0x01"
  53. #define IQK_VER_8192F "0x01"
  54. #define IQK_VER_8723B "0x1e"
  55. #define IQK_VER_8812A "0x01"
  56. #define IQK_VER_8821A "0x01"
  57. #elif (DM_ODM_SUPPORT_TYPE & (ODM_AP))
  58. #define IQK_VER_8188E "0x01"
  59. #define IQK_VER_8192E "0x01"
  60. #define IQK_VER_8192F "0x01"
  61. #define IQK_VER_8723B "0x1e"
  62. #define IQK_VER_8812A "0x01"
  63. #define IQK_VER_8821A "0x01"
  64. #elif (DM_ODM_SUPPORT_TYPE & (ODM_IOT))
  65. #define IQK_VER_8188E "0x01"
  66. #define IQK_VER_8192E "0x01"
  67. #define IQK_VER_8192F "0x01"
  68. #define IQK_VER_8723B "0x1e"
  69. #define IQK_VER_8812A "0x01"
  70. #define IQK_VER_8821A "0x01"
  71. #endif
  72. #define IQK_VER_8814A "0x0f"
  73. #define IQK_VER_8188F "0x01"
  74. #define IQK_VER_8197F "0x1c"
  75. #define IQK_VER_8703B "0x05"
  76. #define IQK_VER_8710B "0x01"
  77. #define IQK_VER_8723D "0x02"
  78. #define IQK_VER_8822B "0x2f"
  79. #define IQK_VER_8821C "0x23"
  80. #define IQK_VER_8198F "0x06"
  81. /*LCK version*/
  82. #define LCK_VER_8188E "0x01"
  83. #define LCK_VER_8192E "0x01"
  84. #define LCK_VER_8192F "0x01"
  85. #define LCK_VER_8723B "0x01"
  86. #define LCK_VER_8812A "0x01"
  87. #define LCK_VER_8821A "0x01"
  88. #define LCK_VER_8814A "0x01"
  89. #define LCK_VER_8188F "0x01"
  90. #define LCK_VER_8197F "0x01"
  91. #define LCK_VER_8703B "0x01"
  92. #define LCK_VER_8710B "0x01"
  93. #define LCK_VER_8723D "0x01"
  94. #define LCK_VER_8822B "0x01"
  95. #define LCK_VER_8821C "0x02"
  96. /*power tracking version*/
  97. #define PWRTRK_VER_8188E "0x01"
  98. #define PWRTRK_VER_8192E "0x01"
  99. #define PWRTRK_VER_8192F "0x01"
  100. #define PWRTRK_VER_8723B "0x01"
  101. #define PWRTRK_VER_8812A "0x01"
  102. #define PWRTRK_VER_8821A "0x01"
  103. #define PWRTRK_VER_8814A "0x01"
  104. #define PWRTRK_VER_8188F "0x01"
  105. #define PWRTRK_VER_8197F "0x01"
  106. #define PWRTRK_VER_8703B "0x01"
  107. #define PWRTRK_VER_8710B "0x01"
  108. #define PWRTRK_VER_8723D "0x01"
  109. #define PWRTRK_VER_8822B "0x01"
  110. #define PWRTRK_VER_8821C "0x01"
  111. /*DPK tracking version*/
  112. #define DPK_VER_8188E "NONE"
  113. #define DPK_VER_8192E "NONE"
  114. #define DPK_VER_8723B "NONE"
  115. #define DPK_VER_8812A "NONE"
  116. #define DPK_VER_8821A "NONE"
  117. #define DPK_VER_8814A "NONE"
  118. #define DPK_VER_8188F "NONE"
  119. #define DPK_VER_8197F "0x07"
  120. #define DPK_VER_8703B "NONE"
  121. #define DPK_VER_8710B "NONE"
  122. #define DPK_VER_8723D "NONE"
  123. #define DPK_VER_8822B "NONE"
  124. #define DPK_VER_8821C "NONE"
  125. #define DPK_VER_8192F "0x0a"
  126. #define DPK_VER_8198F "0x06"
  127. /*RFK_INIT version*/
  128. #define RFK_INIT_VER_8822B "0x8"
  129. #define RFK_INIT_VER_8195B "0x1"
  130. #define RFK_INIT_VER_8198F "0x5"
  131. /*Kfree tracking version*/
  132. #define KFREE_VER_8188E \
  133. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  134. #define KFREE_VER_8192E \
  135. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  136. #define KFREE_VER_8192F \
  137. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  138. #define KFREE_VER_8723B \
  139. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  140. #define KFREE_VER_8812A \
  141. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  142. #define KFREE_VER_8821A \
  143. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  144. #define KFREE_VER_8814A \
  145. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  146. #define KFREE_VER_8188F \
  147. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  148. #define KFREE_VER_8197F \
  149. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  150. #define KFREE_VER_8703B \
  151. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  152. #define KFREE_VER_8710B \
  153. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  154. #define KFREE_VER_8723D \
  155. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  156. #define KFREE_VER_8822B \
  157. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  158. #define KFREE_VER_8821C \
  159. (dm->power_trim_data.flag & KFREE_FLAG_ON) ? "0x01" : "NONE"
  160. /*PA Bias Calibration version*/
  161. #define PABIASK_VER_8188E \
  162. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  163. #define PABIASK_VER_8192E \
  164. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  165. #define PABIASK_VER_8192F \
  166. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  167. #define PABIASK_VER_8723B \
  168. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  169. #define PABIASK_VER_8812A \
  170. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  171. #define PABIASK_VER_8821A \
  172. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  173. #define PABIASK_VER_8814A \
  174. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  175. #define PABIASK_VER_8188F \
  176. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  177. #define PABIASK_VER_8197F \
  178. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  179. #define PABIASK_VER_8703B \
  180. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  181. #define PABIASK_VER_8710B \
  182. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  183. #define PABIASK_VER_8723D \
  184. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  185. #define PABIASK_VER_8822B \
  186. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  187. #define PABIASK_VER_8821C \
  188. (dm->power_trim_data.pa_bias_flag & PA_BIAS_FLAG_ON) ? "0x01" : "NONE"
  189. #define HALRF_IQK_VER \
  190. (dm->support_ic_type == ODM_RTL8188E) ? IQK_VER_8188E : \
  191. (dm->support_ic_type == ODM_RTL8192E) ? IQK_VER_8192E : \
  192. (dm->support_ic_type == ODM_RTL8192F) ? IQK_VER_8192F : \
  193. (dm->support_ic_type == ODM_RTL8723B) ? IQK_VER_8723B : \
  194. (dm->support_ic_type == ODM_RTL8812) ? IQK_VER_8812A : \
  195. (dm->support_ic_type == ODM_RTL8821) ? IQK_VER_8821A : \
  196. (dm->support_ic_type == ODM_RTL8814A) ? IQK_VER_8814A : \
  197. (dm->support_ic_type == ODM_RTL8188F) ? IQK_VER_8188F : \
  198. (dm->support_ic_type == ODM_RTL8197F) ? IQK_VER_8197F : \
  199. (dm->support_ic_type == ODM_RTL8703B) ? IQK_VER_8703B : \
  200. (dm->support_ic_type == ODM_RTL8710B) ? IQK_VER_8710B : \
  201. (dm->support_ic_type == ODM_RTL8723D) ? IQK_VER_8723D : \
  202. (dm->support_ic_type == ODM_RTL8822B) ? IQK_VER_8822B : \
  203. (dm->support_ic_type == ODM_RTL8821C) ? IQK_VER_8821C : "unknown"
  204. #define HALRF_LCK_VER \
  205. (dm->support_ic_type == ODM_RTL8188E) ? LCK_VER_8188E : \
  206. (dm->support_ic_type == ODM_RTL8192E) ? LCK_VER_8192E : \
  207. (dm->support_ic_type == ODM_RTL8192F) ? LCK_VER_8192F : \
  208. (dm->support_ic_type == ODM_RTL8723B) ? LCK_VER_8723B : \
  209. (dm->support_ic_type == ODM_RTL8812) ? LCK_VER_8812A : \
  210. (dm->support_ic_type == ODM_RTL8821) ? LCK_VER_8821A : \
  211. (dm->support_ic_type == ODM_RTL8814A) ? LCK_VER_8814A : \
  212. (dm->support_ic_type == ODM_RTL8188F) ? LCK_VER_8188F : \
  213. (dm->support_ic_type == ODM_RTL8197F) ? LCK_VER_8197F : \
  214. (dm->support_ic_type == ODM_RTL8703B) ? LCK_VER_8703B : \
  215. (dm->support_ic_type == ODM_RTL8710B) ? LCK_VER_8710B : \
  216. (dm->support_ic_type == ODM_RTL8723D) ? LCK_VER_8723D : \
  217. (dm->support_ic_type == ODM_RTL8822B) ? LCK_VER_8822B : \
  218. (dm->support_ic_type == ODM_RTL8821C) ? LCK_VER_8821C : "unknown"
  219. #define HALRF_POWRTRACKING_VER \
  220. (dm->support_ic_type == ODM_RTL8188E) ? PWRTRK_VER_8188E : \
  221. (dm->support_ic_type == ODM_RTL8192E) ? PWRTRK_VER_8192E : \
  222. (dm->support_ic_type == ODM_RTL8192F) ? PWRTRK_VER_8192F : \
  223. (dm->support_ic_type == ODM_RTL8723B) ? PWRTRK_VER_8723B : \
  224. (dm->support_ic_type == ODM_RTL8812) ? PWRTRK_VER_8812A : \
  225. (dm->support_ic_type == ODM_RTL8821) ? PWRTRK_VER_8821A : \
  226. (dm->support_ic_type == ODM_RTL8814A) ? PWRTRK_VER_8814A : \
  227. (dm->support_ic_type == ODM_RTL8188F) ? PWRTRK_VER_8188F : \
  228. (dm->support_ic_type == ODM_RTL8197F) ? PWRTRK_VER_8197F : \
  229. (dm->support_ic_type == ODM_RTL8703B) ? PWRTRK_VER_8703B : \
  230. (dm->support_ic_type == ODM_RTL8710B) ? PWRTRK_VER_8710B : \
  231. (dm->support_ic_type == ODM_RTL8723D) ? PWRTRK_VER_8723D : \
  232. (dm->support_ic_type == ODM_RTL8822B) ? PWRTRK_VER_8822B : \
  233. (dm->support_ic_type == ODM_RTL8821C) ? PWRTRK_VER_8821C : "unknown"
  234. #define HALRF_DPK_VER \
  235. (dm->support_ic_type == ODM_RTL8188E) ? DPK_VER_8188E : \
  236. (dm->support_ic_type == ODM_RTL8192E) ? DPK_VER_8192E : \
  237. (dm->support_ic_type == ODM_RTL8192F) ? DPK_VER_8192F : \
  238. (dm->support_ic_type == ODM_RTL8723B) ? DPK_VER_8723B : \
  239. (dm->support_ic_type == ODM_RTL8812) ? DPK_VER_8812A : \
  240. (dm->support_ic_type == ODM_RTL8821) ? DPK_VER_8821A : \
  241. (dm->support_ic_type == ODM_RTL8814A) ? DPK_VER_8814A : \
  242. (dm->support_ic_type == ODM_RTL8188F) ? DPK_VER_8188F : \
  243. (dm->support_ic_type == ODM_RTL8197F) ? DPK_VER_8197F : \
  244. (dm->support_ic_type == ODM_RTL8198F) ? DPK_VER_8198F : \
  245. (dm->support_ic_type == ODM_RTL8703B) ? DPK_VER_8703B : \
  246. (dm->support_ic_type == ODM_RTL8710B) ? DPK_VER_8710B : \
  247. (dm->support_ic_type == ODM_RTL8723D) ? DPK_VER_8723D : \
  248. (dm->support_ic_type == ODM_RTL8822B) ? DPK_VER_8822B : \
  249. (dm->support_ic_type == ODM_RTL8821C) ? DPK_VER_8821C : "unknown"
  250. #define HALRF_KFREE_VER \
  251. (dm->support_ic_type == ODM_RTL8188E) ? KFREE_VER_8188E : \
  252. (dm->support_ic_type == ODM_RTL8192E) ? KFREE_VER_8192E : \
  253. (dm->support_ic_type == ODM_RTL8192F) ? KFREE_VER_8192F : \
  254. (dm->support_ic_type == ODM_RTL8723B) ? KFREE_VER_8723B : \
  255. (dm->support_ic_type == ODM_RTL8812) ? KFREE_VER_8812A : \
  256. (dm->support_ic_type == ODM_RTL8821) ? KFREE_VER_8821A : \
  257. (dm->support_ic_type == ODM_RTL8814A) ? KFREE_VER_8814A : \
  258. (dm->support_ic_type == ODM_RTL8188F) ? KFREE_VER_8188F : \
  259. (dm->support_ic_type == ODM_RTL8197F) ? KFREE_VER_8197F : \
  260. (dm->support_ic_type == ODM_RTL8703B) ? KFREE_VER_8703B : \
  261. (dm->support_ic_type == ODM_RTL8710B) ? KFREE_VER_8710B : \
  262. (dm->support_ic_type == ODM_RTL8723D) ? KFREE_VER_8723D : \
  263. (dm->support_ic_type == ODM_RTL8822B) ? KFREE_VER_8822B : \
  264. (dm->support_ic_type == ODM_RTL8821C) ? KFREE_VER_8821C : "unknown"
  265. #define HALRF_PABIASK_VER \
  266. (dm->support_ic_type == ODM_RTL8188E) ? PABIASK_VER_8188E : \
  267. (dm->support_ic_type == ODM_RTL8192E) ? PABIASK_VER_8192E : \
  268. (dm->support_ic_type == ODM_RTL8192F) ? PABIASK_VER_8192F : \
  269. (dm->support_ic_type == ODM_RTL8723B) ? PABIASK_VER_8723B : \
  270. (dm->support_ic_type == ODM_RTL8812) ? PABIASK_VER_8812A : \
  271. (dm->support_ic_type == ODM_RTL8821) ? PABIASK_VER_8821A : \
  272. (dm->support_ic_type == ODM_RTL8814A) ? PABIASK_VER_8814A : \
  273. (dm->support_ic_type == ODM_RTL8188F) ? PABIASK_VER_8188F : \
  274. (dm->support_ic_type == ODM_RTL8197F) ? PABIASK_VER_8197F : \
  275. (dm->support_ic_type == ODM_RTL8703B) ? PABIASK_VER_8703B : \
  276. (dm->support_ic_type == ODM_RTL8710B) ? PABIASK_VER_8710B : \
  277. (dm->support_ic_type == ODM_RTL8723D) ? PABIASK_VER_8723D : \
  278. (dm->support_ic_type == ODM_RTL8822B) ? PABIASK_VER_8822B : \
  279. (dm->support_ic_type == ODM_RTL8821C) ? PABIASK_VER_8821C : "unknown"
  280. #define HALRF_RFK_INIT_VER \
  281. (dm->support_ic_type == ODM_RTL8822B) ? RFK_INIT_VER_8822B : "unknown"
  282. #define IQK_THRESHOLD 8
  283. #define DPK_THRESHOLD 4
  284. /*===========================================================*/
  285. /*AGC RX High Power mode*/
  286. /*===========================================================*/
  287. #define lna_low_gain_1 0x64
  288. #define lna_low_gain_2 0x5A
  289. #define lna_low_gain_3 0x58
  290. /*============================================================*/
  291. /* enumeration */
  292. /*============================================================*/
  293. enum halrf_func_idx { /*F_XXX = PHYDM XXX function*/
  294. RF00_PWR_TRK = 0,
  295. RF01_IQK = 1,
  296. RF02_LCK = 2,
  297. RF03_DPK = 3,
  298. RF04_TXGAPK = 4,
  299. };
  300. enum halrf_ability {
  301. HAL_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
  302. HAL_RF_IQK = BIT(RF01_IQK),
  303. HAL_RF_LCK = BIT(RF02_LCK),
  304. HAL_RF_DPK = BIT(RF03_DPK),
  305. HAL_RF_TXGAPK = BIT(RF04_TXGAPK)
  306. };
  307. enum halrf_dbg_comp {
  308. DBG_RF_TX_PWR_TRACK = BIT(RF00_PWR_TRK),
  309. DBG_RF_IQK = BIT(RF01_IQK),
  310. DBG_RF_LCK = BIT(RF02_LCK),
  311. DBG_RF_DPK = BIT(RF03_DPK),
  312. DBG_RF_TXGAPK = BIT(RF04_TXGAPK),
  313. DBG_RF_MP = BIT(29),
  314. DBG_RF_TMP = BIT(30),
  315. DBG_RF_INIT = BIT(31)
  316. };
  317. enum halrf_cmninfo_init {
  318. HALRF_CMNINFO_ABILITY = 0,
  319. HALRF_CMNINFO_DPK_EN = 1,
  320. HALRF_CMNINFO_EEPROM_THERMAL_VALUE,
  321. HALRF_CMNINFO_RFK_FORBIDDEN,
  322. HALRF_CMNINFO_IQK_SEGMENT,
  323. HALRF_CMNINFO_RATE_INDEX,
  324. HALRF_CMNINFO_PWT_TYPE,
  325. HALRF_CMNINFO_MP_PSD_POINT,
  326. HALRF_CMNINFO_MP_PSD_START_POINT,
  327. HALRF_CMNINFO_MP_PSD_STOP_POINT,
  328. HALRF_CMNINFO_MP_PSD_AVERAGE
  329. };
  330. enum halrf_cmninfo_hook {
  331. HALRF_CMNINFO_CON_TX,
  332. HALRF_CMNINFO_SINGLE_TONE,
  333. HALRF_CMNINFO_CARRIER_SUPPRESSION,
  334. HALRF_CMNINFO_MP_RATE_INDEX
  335. };
  336. enum halrf_lna_set {
  337. HALRF_LNA_DISABLE = 0,
  338. HALRF_LNA_ENABLE = 1,
  339. };
  340. /*============================================================*/
  341. /* structure */
  342. /*============================================================*/
  343. struct _hal_rf_ {
  344. /*hook*/
  345. u8 *test1;
  346. /*update*/
  347. u32 rf_supportability;
  348. u8 eeprom_thermal;
  349. u8 dpk_en; /*Enable Function DPK OFF/ON = 0/1*/
  350. boolean dpk_done;
  351. u64 dpk_progressing_time;
  352. u32 fw_ver;
  353. boolean *is_con_tx;
  354. boolean *is_single_tone;
  355. boolean *is_carrier_suppresion;
  356. boolean aac_checked;
  357. u8 *mp_rate_index;
  358. u32 p_rate_index;
  359. u8 pwt_type;
  360. u32 rf_dbg_comp;
  361. #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
  362. struct _halrf_psd_data halrf_psd_data;
  363. #endif
  364. };
  365. /*============================================================*/
  366. /* function prototype */
  367. /*============================================================*/
  368. #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
  369. RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
  370. void halrf_iqk_info_dump(void *dm_void, u32 *_used, char *output,
  371. u32 *_out_len);
  372. void halrf_iqk_hwtx_check(void *dm_void, boolean is_check);
  373. #endif
  374. u8 halrf_match_iqk_version(void *dm_void);
  375. void halrf_support_ability_debug(void *dm_void, char input[][16], u32 *_used,
  376. char *output, u32 *_out_len);
  377. void halrf_cmn_info_init(void *dm_void, enum halrf_cmninfo_init cmn_info,
  378. u32 value);
  379. void halrf_cmn_info_hook(void *dm_void, enum halrf_cmninfo_hook cmn_info,
  380. void *value);
  381. void halrf_cmn_info_set(void *dm_void, u32 cmn_info, u64 value);
  382. u64 halrf_cmn_info_get(void *dm_void, u32 cmn_info);
  383. void halrf_watchdog(void *dm_void);
  384. void halrf_supportability_init(void *dm_void);
  385. void halrf_init(void *dm_void);
  386. void halrf_iqk_trigger(void *dm_void, boolean is_recovery);
  387. void halrf_segment_iqk_trigger(void *dm_void, boolean clear,
  388. boolean segment_iqk);
  389. void halrf_lck_trigger(void *dm_void);
  390. void halrf_iqk_debug(void *dm_void, u32 *const dm_value, u32 *_used,
  391. char *output, u32 *_out_len);
  392. void phydm_get_iqk_cfir(void *dm_void, u8 idx, u8 path, boolean debug);
  393. void halrf_iqk_xym_read(void *dm_void, u8 path, u8 xym_type);
  394. void halrf_rf_lna_setting(void *dm_void, enum halrf_lna_set type);
  395. void halrf_do_imr_test(void *dm_void, u8 data);
  396. u32 halrf_psd_log2base(u32 val);
  397. void halrf_dpk_trigger(void *dm_void);
  398. u8 halrf_dpk_result_check(void *dm_void);
  399. void halrf_dpk_sram_read(void *dm_void);
  400. void halrf_dpk_enable_disable(void *dm_void);
  401. void halrf_dpk_track(void *dm_void);
  402. void halrf_dpk_reload(void *dm_void);
  403. enum hal_status
  404. halrf_config_rfk_with_header_file(void *dm_void, u32 config_type);
  405. #if (RTL8822B_SUPPORT == 1 || RTL8821C_SUPPORT == 1 ||\
  406. RTL8195B_SUPPORT == 1 || RTL8198F_SUPPORT == 1)
  407. void halrf_iqk_dbg(void *dm_void);
  408. #endif
  409. #endif /*#ifndef __HALRF_H__*/