phydm_debug.h 10 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. *
  19. ******************************************************************************/
  20. #ifndef __ODM_DBG_H__
  21. #define __ODM_DBG_H__
  22. /*#define DEBUG_VERSION "1.1"*/ /*2015.07.29 YuChen*/
  23. /*#define DEBUG_VERSION "1.2"*/ /*2015.08.28 Dino*/
  24. #define DEBUG_VERSION "1.3" /*2016.04.28 YuChen*/
  25. /* -----------------------------------------------------------------------------
  26. * Define the debug levels
  27. *
  28. * 1. DBG_TRACE and DBG_LOUD are used for normal cases.
  29. * So that, they can help SW engineer to develope or trace states changed
  30. * and also help HW enginner to trace every operation to and from HW,
  31. * e.g IO, Tx, Rx.
  32. *
  33. * 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases,
  34. * which help us to debug SW or HW.
  35. *
  36. * -----------------------------------------------------------------------------
  37. *
  38. * Never used in a call to ODM_RT_TRACE()!
  39. * */
  40. #define ODM_DBG_OFF 1
  41. /*
  42. * Fatal bug.
  43. * For example, Tx/Rx/IO locked up, OS hangs, memory access violation,
  44. * resource allocation failed, unexpected HW behavior, HW BUG and so on.
  45. * */
  46. #define ODM_DBG_SERIOUS 2
  47. /*
  48. * Abnormal, rare, or unexpeted cases.
  49. * For example, IRP/Packet/OID canceled, device suprisely unremoved and so on.
  50. * */
  51. #define ODM_DBG_WARNING 3
  52. /*
  53. * Normal case with useful information about current SW or HW state.
  54. * For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status,
  55. * SW protocol state change, dynamic mechanism state change and so on.
  56. * */
  57. #define ODM_DBG_LOUD 4
  58. /*
  59. * Normal case with detail execution flow or information.
  60. * */
  61. #define ODM_DBG_TRACE 5
  62. /*FW DBG MSG*/
  63. #define RATE_DECISION BIT(0)
  64. #define INIT_RA_TABLE BIT(1)
  65. #define RATE_UP BIT(2)
  66. #define RATE_DOWN BIT(3)
  67. #define TRY_DONE BIT(4)
  68. #define RA_H2C BIT(5)
  69. #define F_RATE_AP_RPT BIT(7)
  70. /* -----------------------------------------------------------------------------
  71. * Define the tracing components
  72. *
  73. * -----------------------------------------------------------------------------
  74. *BB FW Functions*/
  75. #define PHYDM_FW_COMP_RA BIT(0)
  76. #define PHYDM_FW_COMP_MU BIT(1)
  77. #define PHYDM_FW_COMP_PATH_DIV BIT(2)
  78. #define PHYDM_FW_COMP_PHY_CONFIG BIT(3)
  79. /*BB Driver Functions*/
  80. #define ODM_COMP_DIG BIT(0)
  81. #define ODM_COMP_RA_MASK BIT(1)
  82. #define ODM_COMP_DYNAMIC_TXPWR BIT(2)
  83. #define ODM_COMP_FA_CNT BIT(3)
  84. #define ODM_COMP_RSSI_MONITOR BIT(4)
  85. #define ODM_COMP_SNIFFER BIT(5)
  86. #define ODM_COMP_ANT_DIV BIT(6)
  87. #define ODM_COMP_DFS BIT(7)
  88. #define ODM_COMP_NOISY_DETECT BIT(8)
  89. #define ODM_COMP_RATE_ADAPTIVE BIT(9)
  90. #define ODM_COMP_PATH_DIV BIT(10)
  91. #define ODM_COMP_CCX BIT(11)
  92. #define ODM_COMP_DYNAMIC_PRICCA BIT(12)
  93. /*BIT13 TBD*/
  94. #define ODM_COMP_MP BIT(14)
  95. #define ODM_COMP_CFO_TRACKING BIT(15)
  96. #define ODM_COMP_ACS BIT(16)
  97. #define PHYDM_COMP_ADAPTIVITY BIT(17)
  98. #define PHYDM_COMP_RA_DBG BIT(18)
  99. #define PHYDM_COMP_TXBF BIT(19)
  100. /* MAC Functions */
  101. #define ODM_COMP_EDCA_TURBO BIT(20)
  102. #define ODM_COMP_DYNAMIC_RX_PATH BIT(21)
  103. #define ODM_FW_DEBUG_TRACE BIT(22)
  104. /* RF Functions */
  105. /*BIT23 TBD*/
  106. #define ODM_COMP_TX_PWR_TRACK BIT(24)
  107. /*BIT25 TBD*/
  108. #define ODM_COMP_CALIBRATION BIT(26)
  109. /* Common Functions */
  110. /*BIT27 TBD*/
  111. #define ODM_PHY_CONFIG BIT(28)
  112. #define ODM_COMP_INIT BIT(29)
  113. #define ODM_COMP_COMMON BIT(30)
  114. #define ODM_COMP_API BIT(31)
  115. /*------------------------Export Marco Definition---------------------------*/
  116. #define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA)
  117. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  118. #define dbg_print DbgPrint
  119. #define dcmd_printf DCMD_Printf
  120. #define dcmd_scanf DCMD_Scanf
  121. #define RT_PRINTK dbg_print
  122. #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
  123. #define dbg_print printk
  124. #define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args);
  125. #define RT_DISP(dbgtype, dbgflag, printstr)
  126. #else
  127. #define dbg_print panic_printk
  128. /*#define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args);*/
  129. #define RT_PRINTK(fmt, args...) dbg_print(fmt, ## args);
  130. #endif
  131. #ifndef ASSERT
  132. #define ASSERT(expr)
  133. #endif
  134. #if DBG
  135. #define ODM_RT_TRACE(p_dm_odm, comp, level, fmt) \
  136. do { \
  137. if (((comp) & p_dm_odm->debug_components) && (level <= p_dm_odm->debug_level || level == ODM_DBG_SERIOUS)) { \
  138. \
  139. if (p_dm_odm->support_ic_type == ODM_RTL8188E) \
  140. dbg_print("[PhyDM-8188E] "); \
  141. else if (p_dm_odm->support_ic_type == ODM_RTL8192E) \
  142. dbg_print("[PhyDM-8192E] "); \
  143. else if (p_dm_odm->support_ic_type == ODM_RTL8812) \
  144. dbg_print("[PhyDM-8812A] "); \
  145. else if (p_dm_odm->support_ic_type == ODM_RTL8821) \
  146. dbg_print("[PhyDM-8821A] "); \
  147. else if (p_dm_odm->support_ic_type == ODM_RTL8814A) \
  148. dbg_print("[PhyDM-8814A] "); \
  149. else if (p_dm_odm->support_ic_type == ODM_RTL8703B) \
  150. dbg_print("[PhyDM-8703B] "); \
  151. else if (p_dm_odm->support_ic_type == ODM_RTL8822B) \
  152. dbg_print("[PhyDM-8822B] "); \
  153. else if (p_dm_odm->support_ic_type == ODM_RTL8188F) \
  154. dbg_print("[PhyDM-8188F] "); \
  155. RT_PRINTK fmt; \
  156. } \
  157. } while (0)
  158. #define ODM_RT_TRACE_F(p_dm_odm, comp, level, fmt) do {\
  159. if (((comp) & p_dm_odm->debug_components) && (level <= p_dm_odm->debug_level)) { \
  160. \
  161. RT_PRINTK fmt; \
  162. } \
  163. } while (0)
  164. #define ODM_RT_ASSERT(p_dm_odm, expr, fmt) do {\
  165. if (!(expr)) { \
  166. dbg_print("Assertion failed! %s at ......\n", #expr); \
  167. dbg_print(" ......%s,%s, line=%d\n", __FILE__, __FUNCTION__, __LINE__); \
  168. RT_PRINTK fmt; \
  169. ASSERT(false); \
  170. } \
  171. } while (0)
  172. #define ODM_dbg_enter() { dbg_print(" == > %s\n", __FUNCTION__); }
  173. #define ODM_dbg_exit() { dbg_print("< == %s\n", __FUNCTION__); }
  174. #define ODM_dbg_trace(str) { dbg_print("%s:%s\n", __FUNCTION__, str); }
  175. #define ODM_PRINT_ADDR(p_dm_odm, comp, level, title_str, ptr) do {\
  176. if (((comp) & p_dm_odm->debug_components) && (level <= p_dm_odm->debug_level)) { \
  177. \
  178. int __i; \
  179. u8 *__ptr = (u8 *)ptr; \
  180. dbg_print("[ODM] "); \
  181. dbg_print(title_str); \
  182. dbg_print(" "); \
  183. for (__i = 0; __i < 6; __i++) \
  184. dbg_print("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \
  185. dbg_print("\n"); \
  186. } \
  187. } while (0)
  188. #else
  189. #define ODM_RT_TRACE(p_dm_odm, comp, level, fmt)
  190. #define ODM_RT_TRACE_F(p_dm_odm, comp, level, fmt)
  191. #define ODM_RT_ASSERT(p_dm_odm, expr, fmt)
  192. #define ODM_dbg_enter()
  193. #define ODM_dbg_exit()
  194. #define ODM_dbg_trace(str)
  195. #define ODM_PRINT_ADDR(p_dm_odm, comp, level, title_str, ptr)
  196. #endif
  197. #define BB_DBGPORT_PRIORITY_3 3 /*Debug function (the highest priority)*/
  198. #define BB_DBGPORT_PRIORITY_2 2 /*Check hang function & Strong function*/
  199. #define BB_DBGPORT_PRIORITY_1 1 /*Watch dog function*/
  200. #define BB_DBGPORT_RELEASE 0 /*Init value (the lowest priority)*/
  201. void
  202. phydm_init_debug_setting(struct PHY_DM_STRUCT *p_dm_odm);
  203. void
  204. phydm_bb_dbg_port_header_sel(
  205. void *p_dm_void,
  206. u32 header_idx
  207. );
  208. u8
  209. phydm_set_bb_dbg_port(
  210. void *p_dm_void,
  211. u8 curr_dbg_priority,
  212. u32 debug_port
  213. );
  214. void
  215. phydm_release_bb_dbg_port(
  216. void *p_dm_void
  217. );
  218. u32
  219. phydm_get_bb_dbg_port_value(
  220. void *p_dm_void
  221. );
  222. void phydm_basic_dbg_message(void *p_dm_void);
  223. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  224. #define PHYDM_DBGPRINT 0
  225. #define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z)
  226. #define PHYDM_VAST_INFO_SNPRINTF PHYDM_SNPRINTF
  227. #if (PHYDM_DBGPRINT == 1)
  228. #define PHYDM_SNPRINTF(msg) \
  229. do {\
  230. rsprintf msg;\
  231. dbg_print(output);\
  232. } while (0)
  233. #else
  234. #define PHYDM_SNPRINTF(msg) \
  235. do {\
  236. rsprintf msg;\
  237. dcmd_printf(output);\
  238. } while (0)
  239. #endif
  240. #else
  241. #if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
  242. #define PHYDM_DBGPRINT 0
  243. #else
  244. #define PHYDM_DBGPRINT 1
  245. #endif
  246. #define MAX_ARGC 20
  247. #define MAX_ARGV 16
  248. #define DCMD_DECIMAL "%d"
  249. #define DCMD_CHAR "%c"
  250. #define DCMD_HEX "%x"
  251. #define PHYDM_SSCANF(x, y, z) sscanf(x, y, z)
  252. #define PHYDM_VAST_INFO_SNPRINTF(msg)\
  253. do {\
  254. snprintf msg;\
  255. dbg_print(output);\
  256. } while (0)
  257. #if (PHYDM_DBGPRINT == 1)
  258. #define PHYDM_SNPRINTF(msg)\
  259. do {\
  260. snprintf msg;\
  261. dbg_print(output);\
  262. } while (0)
  263. #else
  264. #define PHYDM_SNPRINTF(msg)\
  265. do {\
  266. if (out_len > used)\
  267. used += snprintf msg;\
  268. } while (0)
  269. #endif
  270. #endif
  271. void phydm_basic_profile(
  272. void *p_dm_void,
  273. u32 *_used,
  274. char *output,
  275. u32 *_out_len
  276. );
  277. #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP))
  278. s32
  279. phydm_cmd(
  280. struct PHY_DM_STRUCT *p_dm_odm,
  281. char *input,
  282. u32 in_len,
  283. u8 flag,
  284. char *output,
  285. u32 out_len
  286. );
  287. #endif
  288. void
  289. phydm_cmd_parser(
  290. struct PHY_DM_STRUCT *p_dm_odm,
  291. char input[][16],
  292. u32 input_num,
  293. u8 flag,
  294. char *output,
  295. u32 out_len
  296. );
  297. boolean
  298. phydm_api_trx_mode(
  299. struct PHY_DM_STRUCT *p_dm_odm,
  300. enum odm_rf_path_e tx_path,
  301. enum odm_rf_path_e rx_path,
  302. boolean is_tx2_path
  303. );
  304. #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
  305. void phydm_sbd_check(
  306. struct PHY_DM_STRUCT *p_dm_odm
  307. );
  308. void phydm_sbd_callback(
  309. struct timer_list *p_timer
  310. );
  311. void phydm_sbd_workitem_callback(
  312. void *p_context
  313. );
  314. #endif
  315. void
  316. phydm_fw_trace_en_h2c(
  317. void *p_dm_void,
  318. boolean enable,
  319. u32 fw_debug_component,
  320. u32 monitor_mode,
  321. u32 macid
  322. );
  323. void
  324. phydm_fw_trace_handler(
  325. void *p_dm_void,
  326. u8 *cmd_buf,
  327. u8 cmd_len
  328. );
  329. void
  330. phydm_fw_trace_handler_code(
  331. void *p_dm_void,
  332. u8 *buffer,
  333. u8 cmd_len
  334. );
  335. void
  336. phydm_fw_trace_handler_8051(
  337. void *p_dm_void,
  338. u8 *cmd_buf,
  339. u8 cmd_len
  340. );
  341. #endif /* __ODM_DBG_H__ */