halbtc8723b2ant.c 152 KB

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  1. /* ************************************************************
  2. * Description:
  3. *
  4. * This file is for RTL8723B Co-exist mechanism
  5. *
  6. * History
  7. * 2012/11/15 Cosa first check in.
  8. *
  9. * ************************************************************ */
  10. /* ************************************************************
  11. * include files
  12. * ************************************************************ */
  13. #include "mp_precomp.h"
  14. #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  15. #if (RTL8723B_SUPPORT == 1)
  16. /* ************************************************************
  17. * Global variables, these are static variables
  18. * ************************************************************ */
  19. static u8 *trace_buf = &gl_btc_trace_buf[0];
  20. static struct coex_dm_8723b_2ant glcoex_dm_8723b_2ant;
  21. static struct coex_dm_8723b_2ant *coex_dm = &glcoex_dm_8723b_2ant;
  22. static struct coex_sta_8723b_2ant glcoex_sta_8723b_2ant;
  23. static struct coex_sta_8723b_2ant *coex_sta = &glcoex_sta_8723b_2ant;
  24. const char *const glbt_info_src_8723b_2ant[] = {
  25. "BT Info[wifi fw]",
  26. "BT Info[bt rsp]",
  27. "BT Info[bt auto report]",
  28. };
  29. u32 glcoex_ver_date_8723b_2ant = 20161007;
  30. u32 glcoex_ver_8723b_2ant = 0x4c;
  31. u32 glcoex_ver_btdesired_8723b_2ant = 0x4c;
  32. /* ************************************************************
  33. * local function proto type if needed
  34. * ************************************************************
  35. * ************************************************************
  36. * local function start with halbtc8723b2ant_
  37. * ************************************************************ */
  38. u8 halbtc8723b2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
  39. u8 rssi_thresh, u8 rssi_thresh1)
  40. {
  41. s32 bt_rssi = 0;
  42. u8 bt_rssi_state = *ppre_bt_rssi_state;
  43. bt_rssi = coex_sta->bt_rssi;
  44. if (level_num == 2) {
  45. if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  46. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  47. if (bt_rssi >= (rssi_thresh +
  48. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  49. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  50. else
  51. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  52. } else {
  53. if (bt_rssi < rssi_thresh)
  54. bt_rssi_state = BTC_RSSI_STATE_LOW;
  55. else
  56. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  57. }
  58. } else if (level_num == 3) {
  59. if (rssi_thresh > rssi_thresh1) {
  60. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  61. "[BTCoex], BT Rssi thresh error!!\n");
  62. BTC_TRACE(trace_buf);
  63. return *ppre_bt_rssi_state;
  64. }
  65. if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  66. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  67. if (bt_rssi >= (rssi_thresh +
  68. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  69. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  70. else
  71. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  72. } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  73. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  74. if (bt_rssi >= (rssi_thresh1 +
  75. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  76. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  77. else if (bt_rssi < rssi_thresh)
  78. bt_rssi_state = BTC_RSSI_STATE_LOW;
  79. else
  80. bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  81. } else {
  82. if (bt_rssi < rssi_thresh1)
  83. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  84. else
  85. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  86. }
  87. }
  88. *ppre_bt_rssi_state = bt_rssi_state;
  89. return bt_rssi_state;
  90. }
  91. u8 halbtc8723b2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
  92. IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
  93. IN u8 rssi_thresh1)
  94. {
  95. s32 wifi_rssi = 0;
  96. u8 wifi_rssi_state = *pprewifi_rssi_state;
  97. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  98. if (level_num == 2) {
  99. if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
  100. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  101. if (wifi_rssi >= (rssi_thresh +
  102. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  103. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  104. else
  105. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  106. } else {
  107. if (wifi_rssi < rssi_thresh)
  108. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  109. else
  110. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  111. }
  112. } else if (level_num == 3) {
  113. if (rssi_thresh > rssi_thresh1) {
  114. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  115. "[BTCoex], wifi RSSI thresh error!!\n");
  116. BTC_TRACE(trace_buf);
  117. return *pprewifi_rssi_state;
  118. }
  119. if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
  120. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  121. if (wifi_rssi >= (rssi_thresh +
  122. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  123. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  124. else
  125. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  126. } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  127. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  128. if (wifi_rssi >= (rssi_thresh1 +
  129. BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT))
  130. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  131. else if (wifi_rssi < rssi_thresh)
  132. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  133. else
  134. wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  135. } else {
  136. if (wifi_rssi < rssi_thresh1)
  137. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  138. else
  139. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  140. }
  141. }
  142. *pprewifi_rssi_state = wifi_rssi_state;
  143. return wifi_rssi_state;
  144. }
  145. void halbtc8723b2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  146. {
  147. static u32 bt_disable_cnt = 0;
  148. boolean bt_active = true, bt_disabled = false;
  149. /* This function check if bt is disabled */
  150. if (coex_sta->high_priority_tx == 0 &&
  151. coex_sta->high_priority_rx == 0 &&
  152. coex_sta->low_priority_tx == 0 &&
  153. coex_sta->low_priority_rx == 0)
  154. bt_active = false;
  155. if (coex_sta->high_priority_tx == 0xffff &&
  156. coex_sta->high_priority_rx == 0xffff &&
  157. coex_sta->low_priority_tx == 0xffff &&
  158. coex_sta->low_priority_rx == 0xffff)
  159. bt_active = false;
  160. if (bt_active) {
  161. bt_disable_cnt = 0;
  162. bt_disabled = false;
  163. } else {
  164. bt_disable_cnt++;
  165. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  166. "[BTCoex], bt all counters=0, %d times!!\n",
  167. bt_disable_cnt);
  168. BTC_TRACE(trace_buf);
  169. if (bt_disable_cnt >= 10)
  170. bt_disabled = true;
  171. }
  172. if (coex_sta->bt_disabled != bt_disabled) {
  173. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  174. "[BTCoex], BT is from %s to %s!!\n",
  175. (coex_sta->bt_disabled ? "disabled" : "enabled"),
  176. (bt_disabled ? "disabled" : "enabled"));
  177. BTC_TRACE(trace_buf);
  178. coex_sta->bt_disabled = bt_disabled;
  179. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  180. &bt_disabled);
  181. if (bt_disabled) {
  182. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
  183. NULL);
  184. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
  185. NULL);
  186. }
  187. }
  188. }
  189. void halbtc8723b2ant_limited_rx(IN struct btc_coexist *btcoexist,
  190. IN boolean force_exec, IN boolean rej_ap_agg_pkt,
  191. IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
  192. {
  193. boolean reject_rx_agg = rej_ap_agg_pkt;
  194. boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  195. u8 rx_agg_size = agg_buf_size;
  196. /* ============================================ */
  197. /* Rx Aggregation related setting */
  198. /* ============================================ */
  199. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  200. &reject_rx_agg);
  201. /* decide BT control aggregation buf size or not */
  202. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  203. &bt_ctrl_rx_agg_size);
  204. /* aggregation buf size, only work when BT control Rx aggregation size. */
  205. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  206. /* real update aggregation setting */
  207. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  208. }
  209. void halbtc8723b2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
  210. {
  211. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  212. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  213. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  214. reg_hp_txrx = 0x770;
  215. reg_lp_txrx = 0x774;
  216. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  217. reg_hp_tx = u32tmp & MASKLWORD;
  218. reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
  219. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  220. reg_lp_tx = u32tmp & MASKLWORD;
  221. reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
  222. coex_sta->high_priority_tx = reg_hp_tx;
  223. coex_sta->high_priority_rx = reg_hp_rx;
  224. coex_sta->low_priority_tx = reg_lp_tx;
  225. coex_sta->low_priority_rx = reg_lp_rx;
  226. if ((coex_sta->low_priority_tx > 1050) &&
  227. (!coex_sta->c2h_bt_inquiry_page))
  228. coex_sta->pop_event_cnt++;
  229. if ((coex_sta->low_priority_rx >= 950) &&
  230. (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) &&
  231. (!coex_sta->under_ips))
  232. bt_link_info->slave_role = true;
  233. else
  234. bt_link_info->slave_role = false;
  235. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  236. "[BTCoex], High Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
  237. reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
  238. BTC_TRACE(trace_buf);
  239. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  240. "[BTCoex], Low Priority Tx/Rx (reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
  241. reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
  242. BTC_TRACE(trace_buf);
  243. /* reset counter */
  244. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  245. }
  246. void halbtc8723b2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
  247. {
  248. #if 1
  249. coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
  250. btcoexist,
  251. PHYDM_INFO_CRC32_OK_CCK);
  252. coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
  253. btcoexist,
  254. PHYDM_INFO_CRC32_OK_LEGACY);
  255. coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
  256. btcoexist,
  257. PHYDM_INFO_CRC32_OK_HT);
  258. coex_sta->crc_ok_11n_vht =
  259. btcoexist->btc_phydm_query_PHY_counter(
  260. btcoexist,
  261. PHYDM_INFO_CRC32_OK_VHT);
  262. coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
  263. btcoexist,
  264. PHYDM_INFO_CRC32_ERROR_CCK);
  265. coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter(
  266. btcoexist,
  267. PHYDM_INFO_CRC32_ERROR_LEGACY);
  268. coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
  269. btcoexist,
  270. PHYDM_INFO_CRC32_ERROR_HT);
  271. coex_sta->crc_err_11n_vht =
  272. btcoexist->btc_phydm_query_PHY_counter(
  273. btcoexist,
  274. PHYDM_INFO_CRC32_ERROR_VHT);
  275. #endif
  276. }
  277. void halbtc8723b2ant_query_bt_info(IN struct btc_coexist *btcoexist)
  278. {
  279. u8 h2c_parameter[1] = {0};
  280. coex_sta->c2h_bt_info_req_sent = true;
  281. h2c_parameter[0] |= BIT(0); /* trigger */
  282. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  283. }
  284. boolean halbtc8723b2ant_is_wifi_status_changed(IN struct btc_coexist *btcoexist)
  285. {
  286. static boolean pre_wifi_busy = false, pre_under_4way = false,
  287. pre_bt_hs_on = false;
  288. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  289. boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
  290. boolean wifi_connected = false;
  291. u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  292. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  293. &wifi_connected);
  294. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  295. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  296. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  297. &under_4way);
  298. if (wifi_connected) {
  299. if (wifi_busy != pre_wifi_busy) {
  300. pre_wifi_busy = wifi_busy;
  301. return true;
  302. }
  303. if (under_4way != pre_under_4way) {
  304. pre_under_4way = under_4way;
  305. return true;
  306. }
  307. if (bt_hs_on != pre_bt_hs_on) {
  308. pre_bt_hs_on = bt_hs_on;
  309. return true;
  310. }
  311. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  312. &prewifi_rssi_state, 2,
  313. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  314. coex_dm->switch_thres_offset, 0);
  315. if ((BTC_RSSI_STATE_HIGH == wifi_rssi_state) ||
  316. (BTC_RSSI_STATE_LOW == wifi_rssi_state))
  317. return true;
  318. }
  319. return false;
  320. }
  321. void halbtc8723b2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
  322. {
  323. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  324. boolean bt_hs_on = false;
  325. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  326. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  327. bt_link_info->sco_exist = coex_sta->sco_exist;
  328. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  329. bt_link_info->pan_exist = coex_sta->pan_exist;
  330. bt_link_info->hid_exist = coex_sta->hid_exist;
  331. /* work around for HS mode. */
  332. if (bt_hs_on) {
  333. bt_link_info->pan_exist = true;
  334. bt_link_info->bt_link_exist = true;
  335. }
  336. /* check if Sco only */
  337. if (bt_link_info->sco_exist &&
  338. !bt_link_info->a2dp_exist &&
  339. !bt_link_info->pan_exist &&
  340. !bt_link_info->hid_exist)
  341. bt_link_info->sco_only = true;
  342. else
  343. bt_link_info->sco_only = false;
  344. /* check if A2dp only */
  345. if (!bt_link_info->sco_exist &&
  346. bt_link_info->a2dp_exist &&
  347. !bt_link_info->pan_exist &&
  348. !bt_link_info->hid_exist)
  349. bt_link_info->a2dp_only = true;
  350. else
  351. bt_link_info->a2dp_only = false;
  352. /* check if Pan only */
  353. if (!bt_link_info->sco_exist &&
  354. !bt_link_info->a2dp_exist &&
  355. bt_link_info->pan_exist &&
  356. !bt_link_info->hid_exist)
  357. bt_link_info->pan_only = true;
  358. else
  359. bt_link_info->pan_only = false;
  360. /* check if Hid only */
  361. if (!bt_link_info->sco_exist &&
  362. !bt_link_info->a2dp_exist &&
  363. !bt_link_info->pan_exist &&
  364. bt_link_info->hid_exist)
  365. bt_link_info->hid_only = true;
  366. else
  367. bt_link_info->hid_only = false;
  368. }
  369. u8 halbtc8723b2ant_action_algorithm(IN struct btc_coexist *btcoexist)
  370. {
  371. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  372. boolean bt_hs_on = false;
  373. u8 algorithm = BT_8723B_2ANT_COEX_ALGO_UNDEFINED;
  374. u8 num_of_diff_profile = 0;
  375. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  376. if (!bt_link_info->bt_link_exist) {
  377. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  378. "[BTCoex], No BT link exists!!!\n");
  379. BTC_TRACE(trace_buf);
  380. return algorithm;
  381. }
  382. if (bt_link_info->sco_exist)
  383. num_of_diff_profile++;
  384. if (bt_link_info->hid_exist)
  385. num_of_diff_profile++;
  386. if (bt_link_info->pan_exist)
  387. num_of_diff_profile++;
  388. if (bt_link_info->a2dp_exist)
  389. num_of_diff_profile++;
  390. if (num_of_diff_profile == 1) {
  391. if (bt_link_info->sco_exist) {
  392. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  393. "[BTCoex], SCO only\n");
  394. BTC_TRACE(trace_buf);
  395. algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
  396. } else {
  397. if (bt_link_info->hid_exist) {
  398. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  399. "[BTCoex], HID only\n");
  400. BTC_TRACE(trace_buf);
  401. algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
  402. } else if (bt_link_info->a2dp_exist) {
  403. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  404. "[BTCoex], A2DP only\n");
  405. BTC_TRACE(trace_buf);
  406. algorithm = BT_8723B_2ANT_COEX_ALGO_A2DP;
  407. } else if (bt_link_info->pan_exist) {
  408. if (bt_hs_on) {
  409. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  410. "[BTCoex], PAN(HS) only\n");
  411. BTC_TRACE(trace_buf);
  412. algorithm =
  413. BT_8723B_2ANT_COEX_ALGO_PANHS;
  414. } else {
  415. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  416. "[BTCoex], PAN(EDR) only\n");
  417. BTC_TRACE(trace_buf);
  418. algorithm =
  419. BT_8723B_2ANT_COEX_ALGO_PANEDR;
  420. }
  421. }
  422. }
  423. } else if (num_of_diff_profile == 2) {
  424. if (bt_link_info->sco_exist) {
  425. if (bt_link_info->hid_exist) {
  426. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  427. "[BTCoex], SCO + HID\n");
  428. BTC_TRACE(trace_buf);
  429. algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  430. } else if (bt_link_info->a2dp_exist) {
  431. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  432. "[BTCoex], SCO + A2DP ==> SCO\n");
  433. BTC_TRACE(trace_buf);
  434. algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  435. } else if (bt_link_info->pan_exist) {
  436. if (bt_hs_on) {
  437. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  438. "[BTCoex], SCO + PAN(HS)\n");
  439. BTC_TRACE(trace_buf);
  440. algorithm = BT_8723B_2ANT_COEX_ALGO_SCO;
  441. } else {
  442. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  443. "[BTCoex], SCO + PAN(EDR)\n");
  444. BTC_TRACE(trace_buf);
  445. algorithm =
  446. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  447. }
  448. }
  449. } else {
  450. if (bt_link_info->hid_exist &&
  451. bt_link_info->a2dp_exist) {
  452. {
  453. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  454. "[BTCoex], HID + A2DP\n");
  455. BTC_TRACE(trace_buf);
  456. algorithm =
  457. BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
  458. }
  459. } else if (bt_link_info->hid_exist &&
  460. bt_link_info->pan_exist) {
  461. if (bt_hs_on) {
  462. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  463. "[BTCoex], HID + PAN(HS)\n");
  464. BTC_TRACE(trace_buf);
  465. algorithm = BT_8723B_2ANT_COEX_ALGO_HID;
  466. } else {
  467. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  468. "[BTCoex], HID + PAN(EDR)\n");
  469. BTC_TRACE(trace_buf);
  470. algorithm =
  471. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  472. }
  473. } else if (bt_link_info->pan_exist &&
  474. bt_link_info->a2dp_exist) {
  475. if (bt_hs_on) {
  476. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  477. "[BTCoex], A2DP + PAN(HS)\n");
  478. BTC_TRACE(trace_buf);
  479. algorithm =
  480. BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS;
  481. } else {
  482. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  483. "[BTCoex], A2DP + PAN(EDR)\n");
  484. BTC_TRACE(trace_buf);
  485. algorithm =
  486. BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP;
  487. }
  488. }
  489. }
  490. } else if (num_of_diff_profile == 3) {
  491. if (bt_link_info->sco_exist) {
  492. if (bt_link_info->hid_exist &&
  493. bt_link_info->a2dp_exist) {
  494. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  495. "[BTCoex], SCO + HID + A2DP ==> HID\n");
  496. BTC_TRACE(trace_buf);
  497. algorithm = BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  498. } else if (bt_link_info->hid_exist &&
  499. bt_link_info->pan_exist) {
  500. if (bt_hs_on) {
  501. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  502. "[BTCoex], SCO + HID + PAN(HS)\n");
  503. BTC_TRACE(trace_buf);
  504. algorithm =
  505. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  506. } else {
  507. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  508. "[BTCoex], SCO + HID + PAN(EDR)\n");
  509. BTC_TRACE(trace_buf);
  510. algorithm =
  511. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  512. }
  513. } else if (bt_link_info->pan_exist &&
  514. bt_link_info->a2dp_exist) {
  515. if (bt_hs_on) {
  516. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  517. "[BTCoex], SCO + A2DP + PAN(HS)\n");
  518. BTC_TRACE(trace_buf);
  519. algorithm =
  520. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  521. } else {
  522. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  523. "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
  524. BTC_TRACE(trace_buf);
  525. algorithm =
  526. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  527. }
  528. }
  529. } else {
  530. if (bt_link_info->hid_exist &&
  531. bt_link_info->pan_exist &&
  532. bt_link_info->a2dp_exist) {
  533. if (bt_hs_on) {
  534. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  535. "[BTCoex], HID + A2DP + PAN(HS)\n");
  536. BTC_TRACE(trace_buf);
  537. algorithm =
  538. BT_8723B_2ANT_COEX_ALGO_HID_A2DP;
  539. } else {
  540. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  541. "[BTCoex], HID + A2DP + PAN(EDR)\n");
  542. BTC_TRACE(trace_buf);
  543. algorithm =
  544. BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  545. }
  546. }
  547. }
  548. } else if (num_of_diff_profile >= 3) {
  549. if (bt_link_info->sco_exist) {
  550. if (bt_link_info->hid_exist &&
  551. bt_link_info->pan_exist &&
  552. bt_link_info->a2dp_exist) {
  553. if (bt_hs_on) {
  554. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  555. "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
  556. BTC_TRACE(trace_buf);
  557. } else {
  558. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  559. "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
  560. BTC_TRACE(trace_buf);
  561. algorithm =
  562. BT_8723B_2ANT_COEX_ALGO_PANEDR_HID;
  563. }
  564. }
  565. }
  566. }
  567. return algorithm;
  568. }
  569. void halbtc8723b2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
  570. IN u8 dac_swing_lvl)
  571. {
  572. u8 h2c_parameter[1] = {0};
  573. /* There are several type of dacswing */
  574. /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
  575. h2c_parameter[0] = dac_swing_lvl;
  576. btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
  577. }
  578. void halbtc8723b2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  579. IN u8 dec_bt_pwr_lvl)
  580. {
  581. u8 h2c_parameter[1] = {0};
  582. h2c_parameter[0] = dec_bt_pwr_lvl;
  583. btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
  584. }
  585. void halbtc8723b2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  586. IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
  587. {
  588. coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
  589. if (!force_exec) {
  590. if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
  591. return;
  592. }
  593. halbtc8723b2ant_set_fw_dec_bt_pwr(btcoexist,
  594. coex_dm->cur_bt_dec_pwr_lvl);
  595. coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
  596. }
  597. void halbtc8723b2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
  598. IN boolean enable_auto_report)
  599. {
  600. u8 h2c_parameter[1] = {0};
  601. h2c_parameter[0] = 0;
  602. if (enable_auto_report)
  603. h2c_parameter[0] |= BIT(0);
  604. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  605. }
  606. void halbtc8723b2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
  607. IN boolean force_exec, IN boolean enable_auto_report)
  608. {
  609. coex_dm->cur_bt_auto_report = enable_auto_report;
  610. if (!force_exec) {
  611. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  612. return;
  613. }
  614. halbtc8723b2ant_set_bt_auto_report(btcoexist,
  615. coex_dm->cur_bt_auto_report);
  616. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  617. }
  618. void halbtc8723b2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
  619. IN boolean force_exec, IN u8 fw_dac_swing_lvl)
  620. {
  621. coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
  622. if (!force_exec) {
  623. if (coex_dm->pre_fw_dac_swing_lvl ==
  624. coex_dm->cur_fw_dac_swing_lvl)
  625. return;
  626. }
  627. halbtc8723b2ant_set_fw_dac_swing_level(btcoexist,
  628. coex_dm->cur_fw_dac_swing_lvl);
  629. coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
  630. }
  631. void halbtc8723b2ant_set_sw_rf_rx_lpf_corner(IN struct btc_coexist *btcoexist,
  632. IN boolean rx_rf_shrink_on)
  633. {
  634. if (rx_rf_shrink_on) {
  635. /* Shrink RF Rx LPF corner */
  636. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  637. "[BTCoex], Shrink RF Rx LPF corner!!\n");
  638. BTC_TRACE(trace_buf);
  639. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff,
  640. 0xffffc);
  641. } else {
  642. /* Resume RF Rx LPF corner */
  643. /* After initialized, we can use coex_dm->bt_rf_0x1e_backup */
  644. if (btcoexist->initilized) {
  645. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  646. "[BTCoex], Resume RF Rx LPF corner!!\n");
  647. BTC_TRACE(trace_buf);
  648. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  649. 0xfffff, coex_dm->bt_rf_0x1e_backup);
  650. }
  651. }
  652. }
  653. void halbtc8723b2ant_rf_shrink(IN struct btc_coexist *btcoexist,
  654. IN boolean force_exec, IN boolean rx_rf_shrink_on)
  655. {
  656. coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
  657. if (!force_exec) {
  658. if (coex_dm->pre_rf_rx_lpf_shrink ==
  659. coex_dm->cur_rf_rx_lpf_shrink)
  660. return;
  661. }
  662. halbtc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
  663. coex_dm->cur_rf_rx_lpf_shrink);
  664. coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
  665. }
  666. void halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(IN struct btc_coexist
  667. *btcoexist, IN boolean low_penalty_ra)
  668. {
  669. u8 h2c_parameter[6] = {0};
  670. h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
  671. if (low_penalty_ra) {
  672. h2c_parameter[1] |= BIT(0);
  673. h2c_parameter[2] =
  674. 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
  675. h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */
  676. h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */
  677. h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */
  678. }
  679. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
  680. }
  681. void halbtc8723b2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
  682. IN boolean force_exec, IN boolean low_penalty_ra)
  683. {
  684. coex_dm->cur_low_penalty_ra = low_penalty_ra;
  685. if (!force_exec) {
  686. if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
  687. return;
  688. }
  689. halbtc8723b2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
  690. coex_dm->cur_low_penalty_ra);
  691. coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
  692. }
  693. void halbtc8723b2ant_set_dac_swing_reg(IN struct btc_coexist *btcoexist,
  694. IN u32 level)
  695. {
  696. u8 val = (u8)level;
  697. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  698. "[BTCoex], Write SwDacSwing = 0x%x\n", level);
  699. BTC_TRACE(trace_buf);
  700. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
  701. }
  702. void halbtc8723b2ant_set_sw_full_time_dac_swing(IN struct btc_coexist
  703. *btcoexist, IN boolean sw_dac_swing_on, IN u32 sw_dac_swing_lvl)
  704. {
  705. if (sw_dac_swing_on)
  706. halbtc8723b2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
  707. else
  708. halbtc8723b2ant_set_dac_swing_reg(btcoexist, 0x18);
  709. }
  710. void halbtc8723b2ant_dac_swing(IN struct btc_coexist *btcoexist,
  711. IN boolean force_exec, IN boolean dac_swing_on, IN u32 dac_swing_lvl)
  712. {
  713. coex_dm->cur_dac_swing_on = dac_swing_on;
  714. coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
  715. if (!force_exec) {
  716. if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
  717. (coex_dm->pre_dac_swing_lvl ==
  718. coex_dm->cur_dac_swing_lvl))
  719. return;
  720. }
  721. delay_ms(30);
  722. halbtc8723b2ant_set_sw_full_time_dac_swing(btcoexist, dac_swing_on,
  723. dac_swing_lvl);
  724. coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
  725. coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
  726. }
  727. void halbtc8723b2ant_set_adc_back_off(IN struct btc_coexist *btcoexist,
  728. IN boolean adc_back_off)
  729. {
  730. if (adc_back_off) {
  731. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  732. "[BTCoex], BB BackOff Level On!\n");
  733. BTC_TRACE(trace_buf);
  734. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x3);
  735. } else {
  736. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  737. "[BTCoex], BB BackOff Level Off!\n");
  738. BTC_TRACE(trace_buf);
  739. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xc05, 0x30, 0x1);
  740. }
  741. }
  742. void halbtc8723b2ant_adc_back_off(IN struct btc_coexist *btcoexist,
  743. IN boolean force_exec, IN boolean adc_back_off)
  744. {
  745. coex_dm->cur_adc_back_off = adc_back_off;
  746. if (!force_exec) {
  747. if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
  748. return;
  749. }
  750. halbtc8723b2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
  751. coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
  752. }
  753. void halbtc8723b2ant_set_agc_table(IN struct btc_coexist *btcoexist,
  754. IN boolean agc_table_en)
  755. {
  756. u8 rssi_adjust_val = 0;
  757. /* =================BB AGC Gain Table */
  758. if (agc_table_en) {
  759. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  760. "[BTCoex], BB Agc Table On!\n");
  761. BTC_TRACE(trace_buf);
  762. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
  763. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
  764. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
  765. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
  766. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
  767. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
  768. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
  769. } else {
  770. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  771. "[BTCoex], BB Agc Table Off!\n");
  772. BTC_TRACE(trace_buf);
  773. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
  774. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
  775. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
  776. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
  777. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
  778. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
  779. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
  780. }
  781. /* =================RF Gain */
  782. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
  783. if (agc_table_en) {
  784. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  785. "[BTCoex], Agc Table On!\n");
  786. BTC_TRACE(trace_buf);
  787. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
  788. 0x38fff);
  789. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
  790. 0x38ffe);
  791. } else {
  792. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  793. "[BTCoex], Agc Table Off!\n");
  794. BTC_TRACE(trace_buf);
  795. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
  796. 0x380c3);
  797. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b, 0xfffff,
  798. 0x28ce6);
  799. }
  800. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
  801. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
  802. if (agc_table_en) {
  803. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  804. "[BTCoex], Agc Table On!\n");
  805. BTC_TRACE(trace_buf);
  806. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
  807. 0x38fff);
  808. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
  809. 0x38ffe);
  810. } else {
  811. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  812. "[BTCoex], Agc Table Off!\n");
  813. BTC_TRACE(trace_buf);
  814. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
  815. 0x380c3);
  816. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40, 0xfffff,
  817. 0x28ce6);
  818. }
  819. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
  820. /* set rssi_adjust_val for wifi module. */
  821. if (agc_table_en)
  822. rssi_adjust_val = 8;
  823. btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
  824. &rssi_adjust_val);
  825. }
  826. void halbtc8723b2ant_agc_table(IN struct btc_coexist *btcoexist,
  827. IN boolean force_exec, IN boolean agc_table_en)
  828. {
  829. coex_dm->cur_agc_table_en = agc_table_en;
  830. if (!force_exec) {
  831. if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
  832. return;
  833. }
  834. halbtc8723b2ant_set_agc_table(btcoexist, agc_table_en);
  835. coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
  836. }
  837. void halbtc8723b2ant_sw_mechanism1(IN struct btc_coexist *btcoexist,
  838. IN boolean shrink_rx_lpf, IN boolean low_penalty_ra,
  839. IN boolean limited_dig, IN boolean bt_lna_constrain)
  840. {
  841. /*
  842. u32 wifi_bw;
  843. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  844. if(BTC_WIFI_BW_HT40 != wifi_bw)
  845. {
  846. if (shrink_rx_lpf)
  847. shrink_rx_lpf = false;
  848. }
  849. */
  850. /* halbtc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf); */
  851. halbtc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
  852. }
  853. void halbtc8723b2ant_sw_mechanism2(IN struct btc_coexist *btcoexist,
  854. IN boolean agc_table_shift, IN boolean adc_back_off,
  855. IN boolean sw_dac_swing, IN u32 dac_swing_lvl)
  856. {
  857. /* halbtc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift); */
  858. /* halbtc8723b2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off); */
  859. /* halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing, dac_swing_lvl); */
  860. }
  861. void halbtc8723b2ant_set_coex_table(IN struct btc_coexist *btcoexist,
  862. IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
  863. {
  864. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  865. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  866. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  867. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  868. }
  869. void halbtc8723b2ant_coex_table(IN struct btc_coexist *btcoexist,
  870. IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
  871. IN u32 val0x6c8, IN u8 val0x6cc)
  872. {
  873. coex_dm->cur_val0x6c0 = val0x6c0;
  874. coex_dm->cur_val0x6c4 = val0x6c4;
  875. coex_dm->cur_val0x6c8 = val0x6c8;
  876. coex_dm->cur_val0x6cc = val0x6cc;
  877. if (!force_exec) {
  878. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  879. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  880. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  881. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  882. return;
  883. }
  884. halbtc8723b2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
  885. val0x6cc);
  886. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  887. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  888. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  889. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  890. }
  891. void halbtc8723b2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
  892. IN boolean force_exec, IN u8 type)
  893. {
  894. coex_sta->coex_table_type = type;
  895. switch (type) {
  896. case 0:
  897. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  898. 0x55555555, 0x55555555, 0xffffff, 0x3);
  899. break;
  900. case 1:
  901. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  902. 0x55555555, 0x5afa5afa, 0xffffff, 0x3);
  903. break;
  904. case 2:
  905. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  906. 0x5ada5ada, 0x5ada5ada, 0xffffff, 0x3);
  907. break;
  908. case 3:
  909. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  910. 0xaaaaaaaa, 0xaaaaaaaa, 0xffffff, 0x3);
  911. break;
  912. case 4:
  913. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  914. 0xffffffff, 0xffffffff, 0xffffff, 0x3);
  915. break;
  916. case 5:
  917. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  918. 0x5fff5fff, 0x5fff5fff, 0xffffff, 0x3);
  919. break;
  920. case 6:
  921. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  922. 0x55ff55ff, 0x5a5a5a5a, 0xffffff, 0x3);
  923. break;
  924. case 7:
  925. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  926. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  927. break;
  928. case 8:
  929. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  930. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  931. break;
  932. case 9:
  933. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  934. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  935. break;
  936. case 10:
  937. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  938. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  939. break;
  940. case 11:
  941. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  942. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  943. break;
  944. case 12:
  945. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  946. 0x55dd55dd, 0x5ada5ada, 0xffffff, 0x3);
  947. break;
  948. case 13:
  949. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  950. 0x5fff5fff, 0xaaaaaaaa, 0xffffff, 0x3);
  951. break;
  952. case 14:
  953. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  954. 0x5fff5fff, 0x5ada5ada, 0xffffff, 0x3);
  955. break;
  956. case 15:
  957. halbtc8723b2ant_coex_table(btcoexist, force_exec,
  958. 0x55dd55dd, 0xaaaaaaaa, 0xffffff, 0x3);
  959. break;
  960. default:
  961. break;
  962. }
  963. }
  964. void halbtc8723b2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  965. IN boolean enable)
  966. {
  967. u8 h2c_parameter[1] = {0};
  968. if (enable)
  969. h2c_parameter[0] |= BIT(0); /* function enable */
  970. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  971. }
  972. void halbtc8723b2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  973. IN boolean force_exec, IN boolean enable)
  974. {
  975. coex_dm->cur_ignore_wlan_act = enable;
  976. if (!force_exec) {
  977. if (coex_dm->pre_ignore_wlan_act ==
  978. coex_dm->cur_ignore_wlan_act)
  979. return;
  980. }
  981. halbtc8723b2ant_set_fw_ignore_wlan_act(btcoexist, enable);
  982. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  983. }
  984. void halbtc8723b2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
  985. IN u8 lps_val, IN u8 rpwm_val)
  986. {
  987. u8 lps = lps_val;
  988. u8 rpwm = rpwm_val;
  989. btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
  990. btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
  991. }
  992. void halbtc8723b2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
  993. IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
  994. {
  995. coex_dm->cur_lps = lps_val;
  996. coex_dm->cur_rpwm = rpwm_val;
  997. if (!force_exec) {
  998. if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
  999. (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
  1000. return;
  1001. }
  1002. halbtc8723b2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
  1003. coex_dm->pre_lps = coex_dm->cur_lps;
  1004. coex_dm->pre_rpwm = coex_dm->cur_rpwm;
  1005. }
  1006. void halbtc8723b2ant_ps_tdma_check_for_power_save_state(
  1007. IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
  1008. {
  1009. u8 lps_mode = 0x0;
  1010. u8 h2c_parameter[5] = {0x0, 0, 0, 48, 0};
  1011. btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
  1012. if (lps_mode) { /* already under LPS state */
  1013. if (new_ps_state) {
  1014. /* keep state under LPS, do nothing. */
  1015. } else {
  1016. /* will leave LPS state, turn off psTdma first */
  1017. /* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1018. 1); */
  1019. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1020. h2c_parameter);
  1021. }
  1022. } else { /* NO PS state */
  1023. if (new_ps_state) {
  1024. /* will enter LPS state, turn off psTdma first */
  1025. /* halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1026. 1); */
  1027. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1028. h2c_parameter);
  1029. } else {
  1030. /* keep state under NO PS state, do nothing. */
  1031. }
  1032. }
  1033. }
  1034. void halbtc8723b2ant_power_save_state(IN struct btc_coexist *btcoexist,
  1035. IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
  1036. {
  1037. boolean low_pwr_disable = false;
  1038. switch (ps_type) {
  1039. case BTC_PS_WIFI_NATIVE:
  1040. /* recover to original 32k low power setting */
  1041. low_pwr_disable = false;
  1042. btcoexist->btc_set(btcoexist,
  1043. BTC_SET_ACT_DISABLE_LOW_POWER,
  1044. &low_pwr_disable);
  1045. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
  1046. NULL);
  1047. coex_sta->force_lps_on = false;
  1048. break;
  1049. case BTC_PS_LPS_ON:
  1050. halbtc8723b2ant_ps_tdma_check_for_power_save_state(
  1051. btcoexist, true);
  1052. halbtc8723b2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
  1053. lps_val, rpwm_val);
  1054. /* when coex force to enter LPS, do not enter 32k low power. */
  1055. low_pwr_disable = true;
  1056. btcoexist->btc_set(btcoexist,
  1057. BTC_SET_ACT_DISABLE_LOW_POWER,
  1058. &low_pwr_disable);
  1059. /* power save must executed before psTdma. */
  1060. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
  1061. NULL);
  1062. coex_sta->force_lps_on = true;
  1063. break;
  1064. case BTC_PS_LPS_OFF:
  1065. halbtc8723b2ant_ps_tdma_check_for_power_save_state(
  1066. btcoexist, false);
  1067. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
  1068. NULL);
  1069. coex_sta->force_lps_on = false;
  1070. break;
  1071. default:
  1072. break;
  1073. }
  1074. }
  1075. void halbtc8723b2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
  1076. IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
  1077. {
  1078. u8 h2c_parameter[5] = {0};
  1079. u8 real_byte1 = byte1, real_byte5 = byte5;
  1080. boolean ap_enable = false;
  1081. if ((coex_sta->a2dp_exist) && (coex_sta->hid_exist))
  1082. byte5 = byte5 | 0x1;
  1083. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1084. &ap_enable);
  1085. if (ap_enable) {
  1086. if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1087. real_byte1 &= ~BIT(4);
  1088. real_byte1 |= BIT(5);
  1089. real_byte5 |= BIT(5);
  1090. real_byte5 &= ~BIT(6);
  1091. halbtc8723b2ant_power_save_state(btcoexist,
  1092. BTC_PS_WIFI_NATIVE, 0x0, 0x0);
  1093. }
  1094. } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1095. halbtc8723b2ant_power_save_state(btcoexist,
  1096. BTC_PS_LPS_ON, 0x50, 0x4);
  1097. } else {
  1098. halbtc8723b2ant_power_save_state(btcoexist,
  1099. BTC_PS_WIFI_NATIVE, 0x0, 0x0);
  1100. }
  1101. h2c_parameter[0] = byte1;
  1102. h2c_parameter[1] = byte2;
  1103. h2c_parameter[2] = byte3;
  1104. h2c_parameter[3] = byte4;
  1105. h2c_parameter[4] = byte5;
  1106. coex_dm->ps_tdma_para[0] = byte1;
  1107. coex_dm->ps_tdma_para[1] = byte2;
  1108. coex_dm->ps_tdma_para[2] = byte3;
  1109. coex_dm->ps_tdma_para[3] = byte4;
  1110. coex_dm->ps_tdma_para[4] = byte5;
  1111. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1112. }
  1113. void halbtc8723b2ant_ps_tdma(IN struct btc_coexist *btcoexist,
  1114. IN boolean force_exec, IN boolean turn_on, IN u8 type)
  1115. {
  1116. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  1117. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  1118. u8 wifi_rssi_state1, bt_rssi_state;
  1119. s8 wifi_duration_adjust = 0x0;
  1120. u8 psTdmaByte4Modify = 0x0;
  1121. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1122. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1123. &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
  1124. - coex_dm->switch_thres_offset, 0);
  1125. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  1126. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  1127. coex_dm->switch_thres_offset, 0);
  1128. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1129. "[BTCoex], %s turn %s PS TDMA, type=%d\n",
  1130. (force_exec ? "force to" : ""), (turn_on ? "ON" : "OFF"), type);
  1131. BTC_TRACE(trace_buf);
  1132. coex_dm->cur_ps_tdma_on = turn_on;
  1133. coex_dm->cur_ps_tdma = type;
  1134. if (!(BTC_RSSI_HIGH(wifi_rssi_state1) &&
  1135. BTC_RSSI_HIGH(bt_rssi_state)) && turn_on)
  1136. /* if (halbtc8723b2ant_CoexSwitchThresCheck(btcoexist) && turn_on) */
  1137. {
  1138. type = type + 100; /* for WiFi RSSI low or BT RSSI low */
  1139. coex_dm->is_switch_to_1dot5_ant = true;
  1140. } else
  1141. coex_dm->is_switch_to_1dot5_ant = false;
  1142. if (!force_exec) {
  1143. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1144. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1145. return;
  1146. }
  1147. if (coex_sta->scan_ap_num <= 5) {
  1148. if (coex_sta->a2dp_bit_pool >= 45)
  1149. wifi_duration_adjust = -15;
  1150. else if (coex_sta->a2dp_bit_pool >= 35)
  1151. wifi_duration_adjust = -10;
  1152. else
  1153. wifi_duration_adjust = 5;
  1154. } else if (coex_sta->scan_ap_num <= 20) {
  1155. if (coex_sta->a2dp_bit_pool >= 45)
  1156. wifi_duration_adjust = -15;
  1157. else if (coex_sta->a2dp_bit_pool >= 35)
  1158. wifi_duration_adjust = -10;
  1159. else
  1160. wifi_duration_adjust = 0;
  1161. } else if (coex_sta->scan_ap_num <= 40) {
  1162. if (coex_sta->a2dp_bit_pool >= 45)
  1163. wifi_duration_adjust = -15;
  1164. else if (coex_sta->a2dp_bit_pool >= 35)
  1165. wifi_duration_adjust = -10;
  1166. else
  1167. wifi_duration_adjust = -5;
  1168. } else {
  1169. if (coex_sta->a2dp_bit_pool >= 45)
  1170. wifi_duration_adjust = -15;
  1171. else if (coex_sta->a2dp_bit_pool >= 35)
  1172. wifi_duration_adjust = -10;
  1173. else
  1174. wifi_duration_adjust = -10;
  1175. }
  1176. if ((bt_link_info->slave_role == true) && (bt_link_info->a2dp_exist))
  1177. psTdmaByte4Modify =
  1178. 0x1; /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
  1179. if (turn_on) {
  1180. switch (type) {
  1181. case 1:
  1182. default:
  1183. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1184. 0x3c + wifi_duration_adjust, 0x03, 0xf1,
  1185. 0x90 | psTdmaByte4Modify);
  1186. break;
  1187. case 2:
  1188. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1189. 0x2d + wifi_duration_adjust, 0x03, 0xf1,
  1190. 0x90 | psTdmaByte4Modify);
  1191. break;
  1192. case 3:
  1193. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1194. 0x1c, 0x3, 0xf1, 0x90 |
  1195. psTdmaByte4Modify);
  1196. break;
  1197. case 4:
  1198. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1199. 0x10, 0x03, 0xf1, 0x90 |
  1200. psTdmaByte4Modify);
  1201. break;
  1202. case 5:
  1203. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1204. 0x3c + wifi_duration_adjust, 0x3, 0x70,
  1205. 0x90 | psTdmaByte4Modify);
  1206. break;
  1207. case 6:
  1208. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1209. 0x2d + wifi_duration_adjust, 0x3, 0x70,
  1210. 0x90 | psTdmaByte4Modify);
  1211. break;
  1212. case 7:
  1213. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1214. 0x1c, 0x3, 0x70, 0x90 |
  1215. psTdmaByte4Modify);
  1216. break;
  1217. case 8:
  1218. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
  1219. 0x10, 0x3, 0x70, 0x90 |
  1220. psTdmaByte4Modify);
  1221. break;
  1222. case 9:
  1223. /*
  1224. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1225. 0x3c + wifi_duration_adjust, 0x03, 0xf1,
  1226. 0x90 | psTdmaByte4Modify);
  1227. */
  1228. /* Bryant Modify for BT no-profile busy case */
  1229. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1230. 0x3c + wifi_duration_adjust, 0x03, 0xf1,
  1231. 0x91);
  1232. break;
  1233. case 10:
  1234. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1235. 0x2d + wifi_duration_adjust, 0x03, 0xf1,
  1236. 0x90 | psTdmaByte4Modify);
  1237. break;
  1238. case 11:
  1239. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1240. 0x1c, 0x3, 0xf1, 0x90 |
  1241. psTdmaByte4Modify);
  1242. break;
  1243. case 12:
  1244. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1245. 0x10, 0x3, 0xf1, 0x90 |
  1246. psTdmaByte4Modify);
  1247. break;
  1248. case 13:
  1249. /*
  1250. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1251. 0x3c + wifi_duration_adjust, 0x3, 0x70,
  1252. 0x90 | psTdmaByte4Modify);
  1253. */
  1254. /* Bryant Modify for BT no-profile busy case */
  1255. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1256. 0x3c + wifi_duration_adjust, 0x3, 0x70,
  1257. 0x91);
  1258. break;
  1259. case 14:
  1260. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1261. 0x2d + wifi_duration_adjust, 0x3, 0x70,
  1262. 0x90 | psTdmaByte4Modify);
  1263. break;
  1264. case 15:
  1265. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1266. 0x1c, 0x3, 0x70, 0x90 |
  1267. psTdmaByte4Modify);
  1268. break;
  1269. case 16:
  1270. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1271. 0x10, 0x3, 0x70, 0x90 |
  1272. psTdmaByte4Modify);
  1273. break;
  1274. case 17:
  1275. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xa3,
  1276. 0x2f, 0x2f, 0x60, 0x90);
  1277. break;
  1278. case 18:
  1279. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1280. 0x5, 0x5, 0xe1, 0x90);
  1281. break;
  1282. case 19:
  1283. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1284. 0x25, 0x25, 0xe1, 0x90);
  1285. break;
  1286. case 20:
  1287. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1288. 0x25, 0x25, 0x60, 0x90);
  1289. break;
  1290. case 21:
  1291. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1292. 0x15, 0x03, 0x70, 0x90);
  1293. break;
  1294. case 22:
  1295. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1296. 0x35, 0x03, 0xf1, 0x90);
  1297. break;
  1298. case 23:
  1299. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1300. 0x35, 0x03, 0x71, 0x10);
  1301. break;
  1302. case 25:
  1303. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1304. 0x30, 0x03, 0x71, 0x10);
  1305. break;
  1306. case 33:
  1307. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1308. 0x1c, 0x3, 0xf1, 0x91);
  1309. break;
  1310. case 71:
  1311. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1312. 0x3c + wifi_duration_adjust, 0x03, 0xf1,
  1313. 0x90);
  1314. break;
  1315. case 101:
  1316. case 105:
  1317. case 113:
  1318. case 171:
  1319. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1320. 0x3a + wifi_duration_adjust, 0x03, 0x70,
  1321. 0x50 | psTdmaByte4Modify);
  1322. break;
  1323. case 102:
  1324. case 106:
  1325. case 110:
  1326. case 114:
  1327. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1328. 0x2d + wifi_duration_adjust, 0x03, 0x70,
  1329. 0x50 | psTdmaByte4Modify);
  1330. break;
  1331. case 103:
  1332. case 107:
  1333. case 111:
  1334. case 115:
  1335. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1336. 0x1c, 0x03, 0x70, 0x50 |
  1337. psTdmaByte4Modify);
  1338. break;
  1339. case 104:
  1340. case 108:
  1341. case 112:
  1342. case 116:
  1343. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1344. 0x10, 0x03, 0x70, 0x50 |
  1345. psTdmaByte4Modify);
  1346. break;
  1347. case 109:
  1348. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1349. 0x3c, 0x03, 0xf1, 0x90 |
  1350. psTdmaByte4Modify);
  1351. break;
  1352. /* case 113:
  1353. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1354. 0x3c, 0x03, 0x70, 0x90 |
  1355. psTdmaByte4Modify);
  1356. break; */
  1357. case 121:
  1358. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1359. 0x15, 0x03, 0x70, 0x90 |
  1360. psTdmaByte4Modify);
  1361. break;
  1362. case 122:
  1363. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1364. 0x35, 0x03, 0x71, 0x11);
  1365. break;
  1366. case 123:
  1367. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xe3,
  1368. 0x35, 0x03, 0x71, 0x10);
  1369. break;
  1370. case 125:
  1371. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1372. 0x30, 0x03, 0x70, 0x51);
  1373. break;
  1374. case 133:
  1375. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0xd3,
  1376. 0x1c, 0x3, 0x70, 0x51);
  1377. break;
  1378. }
  1379. } else {
  1380. /* disable PS tdma */
  1381. switch (type) {
  1382. case 0:
  1383. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
  1384. 0x0, 0x0, 0x40, 0x0);
  1385. break;
  1386. case 1:
  1387. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
  1388. 0x0, 0x0, 0x48, 0x0);
  1389. break;
  1390. default:
  1391. halbtc8723b2ant_set_fw_pstdma(btcoexist, 0x0,
  1392. 0x0, 0x0, 0x40, 0x0);
  1393. break;
  1394. }
  1395. }
  1396. /* update pre state */
  1397. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1398. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1399. }
  1400. void halbtc8723b2ant_set_ant_path(IN struct btc_coexist *btcoexist,
  1401. IN u8 ant_pos_type, IN boolean init_hwcfg, IN boolean wifi_off)
  1402. {
  1403. struct btc_board_info *board_info = &btcoexist->board_info;
  1404. u32 fw_ver = 0, u32tmp = 0, cnt_bt_cal_chk = 0;
  1405. boolean pg_ext_switch = false;
  1406. boolean use_ext_switch = false;
  1407. u8 h2c_parameter[2] = {0};
  1408. u32 u32tmp_1[4];
  1409. boolean is_fw_ready;
  1410. btcoexist->btc_get(btcoexist, BTC_GET_BL_EXT_SWITCH, &pg_ext_switch);
  1411. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER,
  1412. &fw_ver); /* [31:16]=fw ver, [15:0]=fw sub ver */
  1413. if ((fw_ver > 0 && fw_ver < 0xc0000) || pg_ext_switch)
  1414. use_ext_switch = true;
  1415. if (init_hwcfg) {
  1416. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x39, 0x8, 0x1);
  1417. btcoexist->btc_write_1byte(btcoexist, 0x974, 0xff);
  1418. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x944, 0x3, 0x3);
  1419. btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
  1420. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
  1421. if (fw_ver >= 0x180000) {
  1422. /* Use H2C to set GNT_BT to High to avoid A2DP click */
  1423. h2c_parameter[0] = 1;
  1424. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
  1425. h2c_parameter);
  1426. cnt_bt_cal_chk = 0;
  1427. while (1) {
  1428. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
  1429. if (is_fw_ready == false)
  1430. break;
  1431. if (btcoexist->btc_read_1byte(btcoexist,
  1432. 0x765) == 0x18)
  1433. break;
  1434. cnt_bt_cal_chk++;
  1435. if (cnt_bt_cal_chk > 20)
  1436. break;
  1437. }
  1438. } else
  1439. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
  1440. u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
  1441. if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
  1442. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1443. u32tmp_1[0]);
  1444. else
  1445. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
  1446. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  1447. 0x0); /* WiFi TRx Mask off */
  1448. /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
  1449. /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x01); */ /*BT TRx Mask off */
  1450. if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
  1451. /* tell firmware "no antenna inverse" */
  1452. h2c_parameter[0] = 0;
  1453. } else {
  1454. /* tell firmware "antenna inverse" */
  1455. h2c_parameter[0] = 1;
  1456. }
  1457. if (use_ext_switch) {
  1458. /* ext switch type */
  1459. h2c_parameter[1] = 1;
  1460. } else {
  1461. /* int switch type */
  1462. h2c_parameter[1] = 0;
  1463. }
  1464. btcoexist->btc_fill_h2c(btcoexist, 0x65, 2, h2c_parameter);
  1465. } else {
  1466. if (fw_ver >= 0x180000) {
  1467. /* Use H2C to set GNT_BT to "Control by PTA"*/
  1468. h2c_parameter[0] = 0;
  1469. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
  1470. h2c_parameter);
  1471. cnt_bt_cal_chk = 0;
  1472. while (1) {
  1473. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_FW_READY, &is_fw_ready);
  1474. if (is_fw_ready == false)
  1475. break;
  1476. if (btcoexist->btc_read_1byte(btcoexist,
  1477. 0x765) == 0x0)
  1478. break;
  1479. cnt_bt_cal_chk++;
  1480. if (cnt_bt_cal_chk > 20)
  1481. break;
  1482. }
  1483. } else
  1484. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x0);
  1485. }
  1486. /* ext switch setting */
  1487. if (use_ext_switch) {
  1488. if (init_hwcfg) {
  1489. /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
  1490. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  1491. u32tmp &= ~BIT(23);
  1492. u32tmp |= BIT(24);
  1493. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  1494. }
  1495. u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
  1496. if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
  1497. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1498. u32tmp_1[0]);
  1499. else
  1500. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
  1501. switch (ant_pos_type) {
  1502. case BTC_ANT_WIFI_AT_MAIN:
  1503. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1504. 0x92c, 0x3,
  1505. 0x1); /* ext switch main at wifi */
  1506. break;
  1507. case BTC_ANT_WIFI_AT_AUX:
  1508. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1509. 0x92c, 0x3,
  1510. 0x2); /* ext switch aux at wifi */
  1511. break;
  1512. }
  1513. } else { /* internal switch */
  1514. if (init_hwcfg) {
  1515. /* 0x4c[23]=0, 0x4c[24]=1 Antenna control by WL/BT */
  1516. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  1517. u32tmp |= BIT(23);
  1518. u32tmp &= ~BIT(24);
  1519. btcoexist->btc_write_4byte(btcoexist, 0x4c, u32tmp);
  1520. }
  1521. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64, 0x1,
  1522. 0x0); /* fixed external switch S1->Main, S0->Aux */
  1523. switch (ant_pos_type) {
  1524. case BTC_ANT_WIFI_AT_MAIN:
  1525. u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
  1526. 0x948);
  1527. if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
  1528. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1529. u32tmp_1[0]);
  1530. else
  1531. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1532. 0x0);
  1533. break;
  1534. case BTC_ANT_WIFI_AT_AUX:
  1535. u32tmp_1[0] = btcoexist->btc_read_4byte(btcoexist,
  1536. 0x948);
  1537. if ((u32tmp_1[0] == 0x40) || (u32tmp_1[0] == 0x240))
  1538. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1539. u32tmp_1[0]);
  1540. else
  1541. btcoexist->btc_write_4byte(btcoexist, 0x948,
  1542. 0x280);
  1543. break;
  1544. }
  1545. }
  1546. }
  1547. #if 0
  1548. boolean halbtc8723b2ant_CoexSwitchThresCheck(IN struct btc_coexist *btcoexist)
  1549. {
  1550. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  1551. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  1552. u8 wifi_rssi_state1, bt_rssi_state;
  1553. u32 vendor;
  1554. u8 offset = 0;
  1555. btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
  1556. /* if (vendor == BTC_VENDOR_LENOVO) */
  1557. /* offset = 20; */
  1558. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1559. &prewifi_rssi_state, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES
  1560. - coex_dm->switch_thres_offset, 0);
  1561. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  1562. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  1563. coex_dm->switch_thres_offset, 0);
  1564. if (BTC_RSSI_LOW(wifi_rssi_state1) || BTC_RSSI_LOW(bt_rssi_state))
  1565. return true;
  1566. return false;
  1567. }
  1568. #endif
  1569. void halbtc8723b2ant_coex_all_off(IN struct btc_coexist *btcoexist)
  1570. {
  1571. /* fw all off */
  1572. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1573. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1574. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1575. /* sw all off */
  1576. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1577. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1578. /* hw all off */
  1579. /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
  1580. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1581. }
  1582. void halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  1583. {
  1584. /* force to reset coex mechanism */
  1585. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1586. halbtc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
  1587. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
  1588. halbtc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
  1589. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1590. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1591. coex_sta->pop_event_cnt = 0;
  1592. }
  1593. void halbtc8723b2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
  1594. {
  1595. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  1596. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  1597. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  1598. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  1599. boolean wifi_connected = false;
  1600. boolean low_pwr_disable = true;
  1601. boolean scan = false, link = false, roam = false;
  1602. boolean wifi_busy = false;
  1603. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1604. &prewifi_rssi_state, 2, 15, 0);
  1605. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1606. &prewifi_rssi_state1, 2,
  1607. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  1608. coex_dm->switch_thres_offset, 0);
  1609. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  1610. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  1611. coex_dm->switch_thres_offset, 0);
  1612. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
  1613. &low_pwr_disable);
  1614. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1615. &wifi_connected);
  1616. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  1617. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  1618. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  1619. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1620. if (coex_sta->bt_abnormal_scan) {
  1621. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1622. 23);
  1623. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
  1624. } else if (scan || link || roam) {
  1625. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1626. "[BTCoex], Wifi link process + BT Inq/Page!!\n");
  1627. BTC_TRACE(trace_buf);
  1628. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  1629. 7);
  1630. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
  1631. } else if (wifi_connected) {
  1632. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1633. "[BTCoex], Wifi connected + BT Inq/Page!!\n");
  1634. BTC_TRACE(trace_buf);
  1635. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  1636. 7);
  1637. if (wifi_busy)
  1638. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  1639. 3);
  1640. else
  1641. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 33);
  1642. } else {
  1643. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1644. "[BTCoex], Wifi no-link + BT Inq/Page!!\n");
  1645. BTC_TRACE(trace_buf);
  1646. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1647. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1648. }
  1649. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
  1650. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1651. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1652. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1653. /*
  1654. coex_dm->need_recover0x948 = true;
  1655. coex_dm->backup0x948 = btcoexist->btc_read_4byte(btcoexist, 0x948);
  1656. halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX, false, false);
  1657. */
  1658. }
  1659. void halbtc8723b2ant_action_wifi_link_process(IN struct btc_coexist *btcoexist)
  1660. {
  1661. u32 u32tmp;
  1662. u8 u8tmpa, u8tmpb;
  1663. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 15);
  1664. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  1665. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  1666. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  1667. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
  1668. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  1669. u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
  1670. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1671. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
  1672. u32tmp, u8tmpa, u8tmpb);
  1673. BTC_TRACE(trace_buf);
  1674. }
  1675. boolean halbtc8723b2ant_action_wifi_idle_process(IN struct btc_coexist
  1676. *btcoexist)
  1677. {
  1678. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  1679. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  1680. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  1681. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  1682. u8 ap_num = 0;
  1683. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1684. &prewifi_rssi_state, 2, 15, 0);
  1685. /* wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist, 1, 2, BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES-coex_dm->switch_thres_offset-coex_dm->switch_thres_offset, 0); */
  1686. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  1687. &prewifi_rssi_state1, 2,
  1688. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  1689. coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
  1690. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  1691. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  1692. coex_dm->switch_thres_offset - coex_dm->switch_thres_offset, 0);
  1693. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
  1694. /* define the office environment */
  1695. if (BTC_RSSI_HIGH(wifi_rssi_state1) &&
  1696. (coex_sta->hid_exist == true) &&
  1697. (coex_sta->a2dp_exist == true)) {
  1698. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1699. "[BTCoex], Wifi idle process for BT HID+A2DP exist!!\n");
  1700. BTC_TRACE(trace_buf);
  1701. halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x6);
  1702. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1703. /* sw all off */
  1704. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
  1705. false);
  1706. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
  1707. 0x18);
  1708. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1709. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1710. return true;
  1711. }
  1712. halbtc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, true, 0x18);
  1713. return false;
  1714. }
  1715. boolean halbtc8723b2ant_is_common_action(IN struct btc_coexist *btcoexist)
  1716. {
  1717. boolean common = false, wifi_connected = false, wifi_busy = false;
  1718. boolean bt_hs_on = false, low_pwr_disable = false;
  1719. boolean asus_8723b = false;
  1720. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  1721. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1722. &wifi_connected);
  1723. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1724. if (!wifi_connected) {
  1725. low_pwr_disable = false;
  1726. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
  1727. &low_pwr_disable);
  1728. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
  1729. 0x8);
  1730. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1731. "[BTCoex], Wifi non-connected idle!!\n");
  1732. BTC_TRACE(trace_buf);
  1733. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  1734. 0x0);
  1735. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  1736. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1737. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  1738. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1739. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
  1740. false);
  1741. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
  1742. 0x18);
  1743. common = true;
  1744. } else {
  1745. if (BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  1746. coex_dm->bt_status) {
  1747. low_pwr_disable = false;
  1748. btcoexist->btc_set(btcoexist,
  1749. BTC_SET_ACT_DISABLE_LOW_POWER,
  1750. &low_pwr_disable);
  1751. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
  1752. false, false, 0x8);
  1753. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1754. "[BTCoex], Wifi connected + BT non connected-idle!!\n");
  1755. BTC_TRACE(trace_buf);
  1756. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  1757. 0xfffff, 0x0);
  1758. halbtc8723b2ant_coex_table_with_type(btcoexist,
  1759. NORMAL_EXEC, 0);
  1760. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1761. 1);
  1762. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
  1763. 0xb);
  1764. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1765. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  1766. false,
  1767. false);
  1768. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  1769. false, 0x18);
  1770. common = true;
  1771. } else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
  1772. coex_dm->bt_status) {
  1773. low_pwr_disable = true;
  1774. btcoexist->btc_set(btcoexist,
  1775. BTC_SET_ACT_DISABLE_LOW_POWER,
  1776. &low_pwr_disable);
  1777. if (bt_hs_on)
  1778. return false;
  1779. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1780. "[BTCoex], Wifi connected + BT connected-idle!!\n");
  1781. BTC_TRACE(trace_buf);
  1782. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
  1783. false, false, 0x8);
  1784. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  1785. 0xfffff, 0x0);
  1786. halbtc8723b2ant_coex_table_with_type(btcoexist,
  1787. NORMAL_EXEC, 0);
  1788. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1789. 1);
  1790. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
  1791. 0xb);
  1792. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  1793. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  1794. false, false);
  1795. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  1796. false, 0x18);
  1797. common = true;
  1798. } else {
  1799. low_pwr_disable = true;
  1800. btcoexist->btc_set(btcoexist,
  1801. BTC_SET_ACT_DISABLE_LOW_POWER,
  1802. &low_pwr_disable);
  1803. if (wifi_busy) {
  1804. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1805. "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
  1806. BTC_TRACE(trace_buf);
  1807. /* btcoexist->btc_get(btcoexist,
  1808. BTC_GET_BL_IS_ASUS_8723B, &asus_8723b);
  1809. if (!asus_8723b)
  1810. common = false;
  1811. else
  1812. common = halbtc8723b2ant_action_wifi_idle_process(
  1813. btcoexist); */
  1814. common = false;
  1815. } else {
  1816. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1817. "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
  1818. BTC_TRACE(trace_buf);
  1819. /* common = false; */
  1820. common = halbtc8723b2ant_action_wifi_idle_process(
  1821. btcoexist);
  1822. }
  1823. }
  1824. }
  1825. return common;
  1826. }
  1827. void halbtc8723b2ant_tdma_duration_adjust(IN struct btc_coexist *btcoexist,
  1828. IN boolean sco_hid, IN boolean tx_pause, IN u8 max_interval)
  1829. {
  1830. static s32 up, dn, m, n, wait_count;
  1831. s32 result; /* 0: no change, +1: increase WiFi duration, -1: decrease WiFi duration */
  1832. u8 retry_count = 0;
  1833. if (!coex_dm->auto_tdma_adjust) {
  1834. coex_dm->auto_tdma_adjust = true;
  1835. {
  1836. if (sco_hid) {
  1837. if (tx_pause) {
  1838. if (max_interval == 1) {
  1839. halbtc8723b2ant_ps_tdma(
  1840. btcoexist, NORMAL_EXEC,
  1841. true, 13);
  1842. coex_dm->ps_tdma_du_adj_type =
  1843. 13;
  1844. } else if (max_interval == 2) {
  1845. halbtc8723b2ant_ps_tdma(
  1846. btcoexist, NORMAL_EXEC,
  1847. true, 14);
  1848. coex_dm->ps_tdma_du_adj_type =
  1849. 14;
  1850. } else if (max_interval == 3) {
  1851. halbtc8723b2ant_ps_tdma(
  1852. btcoexist, NORMAL_EXEC,
  1853. true, 15);
  1854. coex_dm->ps_tdma_du_adj_type =
  1855. 15;
  1856. } else {
  1857. halbtc8723b2ant_ps_tdma(
  1858. btcoexist, NORMAL_EXEC,
  1859. true, 15);
  1860. coex_dm->ps_tdma_du_adj_type =
  1861. 15;
  1862. }
  1863. } else {
  1864. if (max_interval == 1) {
  1865. halbtc8723b2ant_ps_tdma(
  1866. btcoexist, NORMAL_EXEC,
  1867. true, 9);
  1868. coex_dm->ps_tdma_du_adj_type =
  1869. 9;
  1870. } else if (max_interval == 2) {
  1871. halbtc8723b2ant_ps_tdma(
  1872. btcoexist, NORMAL_EXEC,
  1873. true, 10);
  1874. coex_dm->ps_tdma_du_adj_type =
  1875. 10;
  1876. } else if (max_interval == 3) {
  1877. halbtc8723b2ant_ps_tdma(
  1878. btcoexist, NORMAL_EXEC,
  1879. true, 11);
  1880. coex_dm->ps_tdma_du_adj_type =
  1881. 11;
  1882. } else {
  1883. halbtc8723b2ant_ps_tdma(
  1884. btcoexist, NORMAL_EXEC,
  1885. true, 11);
  1886. coex_dm->ps_tdma_du_adj_type =
  1887. 11;
  1888. }
  1889. }
  1890. } else {
  1891. if (tx_pause) {
  1892. if (max_interval == 1) {
  1893. halbtc8723b2ant_ps_tdma(
  1894. btcoexist, NORMAL_EXEC,
  1895. true, 5);
  1896. coex_dm->ps_tdma_du_adj_type =
  1897. 5;
  1898. } else if (max_interval == 2) {
  1899. halbtc8723b2ant_ps_tdma(
  1900. btcoexist, NORMAL_EXEC,
  1901. true, 6);
  1902. coex_dm->ps_tdma_du_adj_type =
  1903. 6;
  1904. } else if (max_interval == 3) {
  1905. halbtc8723b2ant_ps_tdma(
  1906. btcoexist, NORMAL_EXEC,
  1907. true, 7);
  1908. coex_dm->ps_tdma_du_adj_type =
  1909. 7;
  1910. } else {
  1911. halbtc8723b2ant_ps_tdma(
  1912. btcoexist, NORMAL_EXEC,
  1913. true, 7);
  1914. coex_dm->ps_tdma_du_adj_type =
  1915. 7;
  1916. }
  1917. } else {
  1918. if (max_interval == 1) {
  1919. halbtc8723b2ant_ps_tdma(
  1920. btcoexist, NORMAL_EXEC,
  1921. true, 1);
  1922. coex_dm->ps_tdma_du_adj_type =
  1923. 1;
  1924. } else if (max_interval == 2) {
  1925. halbtc8723b2ant_ps_tdma(
  1926. btcoexist, NORMAL_EXEC,
  1927. true, 2);
  1928. coex_dm->ps_tdma_du_adj_type =
  1929. 2;
  1930. } else if (max_interval == 3) {
  1931. halbtc8723b2ant_ps_tdma(
  1932. btcoexist, NORMAL_EXEC,
  1933. true, 3);
  1934. coex_dm->ps_tdma_du_adj_type =
  1935. 3;
  1936. } else {
  1937. halbtc8723b2ant_ps_tdma(
  1938. btcoexist, NORMAL_EXEC,
  1939. true, 3);
  1940. coex_dm->ps_tdma_du_adj_type =
  1941. 3;
  1942. }
  1943. }
  1944. }
  1945. }
  1946. /* ============ */
  1947. up = 0;
  1948. dn = 0;
  1949. m = 1;
  1950. n = 3;
  1951. result = 0;
  1952. wait_count = 0;
  1953. } else {
  1954. /* acquire the BT TRx retry count from BT_Info byte2 */
  1955. retry_count = coex_sta->bt_retry_cnt;
  1956. if ((coex_sta->low_priority_tx) > 1050 ||
  1957. (coex_sta->low_priority_rx) > 1250)
  1958. retry_count++;
  1959. result = 0;
  1960. wait_count++;
  1961. if (retry_count ==
  1962. 0) { /* no retry in the last 2-second duration */
  1963. up++;
  1964. dn--;
  1965. if (dn <= 0)
  1966. dn = 0;
  1967. if (up >= n) { /* if retry count during continuous n*2 seconds is 0, enlarge WiFi duration */
  1968. wait_count = 0;
  1969. n = 3;
  1970. up = 0;
  1971. dn = 0;
  1972. result = 1;
  1973. }
  1974. } else if (retry_count <=
  1975. 3) { /* <=3 retry in the last 2-second duration */
  1976. up--;
  1977. dn++;
  1978. if (up <= 0)
  1979. up = 0;
  1980. if (dn == 2) {/* if continuous 2 retry count(every 2 seconds) >0 and < 3, reduce WiFi duration */
  1981. if (wait_count <= 2)
  1982. m++; /* to avoid loop between the two levels */
  1983. else
  1984. m = 1;
  1985. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1986. m = 20;
  1987. n = 3 * m;
  1988. up = 0;
  1989. dn = 0;
  1990. wait_count = 0;
  1991. result = -1;
  1992. }
  1993. } else { /* retry count > 3, once retry count > 3, to reduce WiFi duration */
  1994. if (wait_count == 1)
  1995. m++; /* to avoid loop between the two levels */
  1996. else
  1997. m = 1;
  1998. if (m >= 20) /* maximum of m = 20 ' will recheck if need to adjust wifi duration in maximum time interval 120 seconds */
  1999. m = 20;
  2000. n = 3 * m;
  2001. up = 0;
  2002. dn = 0;
  2003. wait_count = 0;
  2004. result = -1;
  2005. }
  2006. if (max_interval == 1) {
  2007. if (tx_pause) {
  2008. if (coex_dm->cur_ps_tdma == 71) {
  2009. halbtc8723b2ant_ps_tdma(btcoexist,
  2010. NORMAL_EXEC, true, 5);
  2011. coex_dm->ps_tdma_du_adj_type = 5;
  2012. } else if (coex_dm->cur_ps_tdma == 1) {
  2013. halbtc8723b2ant_ps_tdma(btcoexist,
  2014. NORMAL_EXEC, true, 5);
  2015. coex_dm->ps_tdma_du_adj_type = 5;
  2016. } else if (coex_dm->cur_ps_tdma == 2) {
  2017. halbtc8723b2ant_ps_tdma(btcoexist,
  2018. NORMAL_EXEC, true, 6);
  2019. coex_dm->ps_tdma_du_adj_type = 6;
  2020. } else if (coex_dm->cur_ps_tdma == 3) {
  2021. halbtc8723b2ant_ps_tdma(btcoexist,
  2022. NORMAL_EXEC, true, 7);
  2023. coex_dm->ps_tdma_du_adj_type = 7;
  2024. } else if (coex_dm->cur_ps_tdma == 4) {
  2025. halbtc8723b2ant_ps_tdma(btcoexist,
  2026. NORMAL_EXEC, true, 8);
  2027. coex_dm->ps_tdma_du_adj_type = 8;
  2028. }
  2029. if (coex_dm->cur_ps_tdma == 9) {
  2030. halbtc8723b2ant_ps_tdma(btcoexist,
  2031. NORMAL_EXEC, true, 13);
  2032. coex_dm->ps_tdma_du_adj_type = 13;
  2033. } else if (coex_dm->cur_ps_tdma == 10) {
  2034. halbtc8723b2ant_ps_tdma(btcoexist,
  2035. NORMAL_EXEC, true, 14);
  2036. coex_dm->ps_tdma_du_adj_type = 14;
  2037. } else if (coex_dm->cur_ps_tdma == 11) {
  2038. halbtc8723b2ant_ps_tdma(btcoexist,
  2039. NORMAL_EXEC, true, 15);
  2040. coex_dm->ps_tdma_du_adj_type = 15;
  2041. } else if (coex_dm->cur_ps_tdma == 12) {
  2042. halbtc8723b2ant_ps_tdma(btcoexist,
  2043. NORMAL_EXEC, true, 16);
  2044. coex_dm->ps_tdma_du_adj_type = 16;
  2045. }
  2046. if (result == -1) {
  2047. if (coex_dm->cur_ps_tdma == 5) {
  2048. halbtc8723b2ant_ps_tdma(
  2049. btcoexist, NORMAL_EXEC,
  2050. true, 6);
  2051. coex_dm->ps_tdma_du_adj_type =
  2052. 6;
  2053. } else if (coex_dm->cur_ps_tdma == 6) {
  2054. halbtc8723b2ant_ps_tdma(
  2055. btcoexist, NORMAL_EXEC,
  2056. true, 7);
  2057. coex_dm->ps_tdma_du_adj_type =
  2058. 7;
  2059. } else if (coex_dm->cur_ps_tdma == 7) {
  2060. halbtc8723b2ant_ps_tdma(
  2061. btcoexist, NORMAL_EXEC,
  2062. true, 8);
  2063. coex_dm->ps_tdma_du_adj_type =
  2064. 8;
  2065. } else if (coex_dm->cur_ps_tdma == 13) {
  2066. halbtc8723b2ant_ps_tdma(
  2067. btcoexist, NORMAL_EXEC,
  2068. true, 14);
  2069. coex_dm->ps_tdma_du_adj_type =
  2070. 14;
  2071. } else if (coex_dm->cur_ps_tdma == 14) {
  2072. halbtc8723b2ant_ps_tdma(
  2073. btcoexist, NORMAL_EXEC,
  2074. true, 15);
  2075. coex_dm->ps_tdma_du_adj_type =
  2076. 15;
  2077. } else if (coex_dm->cur_ps_tdma == 15) {
  2078. halbtc8723b2ant_ps_tdma(
  2079. btcoexist, NORMAL_EXEC,
  2080. true, 16);
  2081. coex_dm->ps_tdma_du_adj_type =
  2082. 16;
  2083. }
  2084. } else if (result == 1) {
  2085. if (coex_dm->cur_ps_tdma == 8) {
  2086. halbtc8723b2ant_ps_tdma(
  2087. btcoexist, NORMAL_EXEC,
  2088. true, 7);
  2089. coex_dm->ps_tdma_du_adj_type =
  2090. 7;
  2091. } else if (coex_dm->cur_ps_tdma == 7) {
  2092. halbtc8723b2ant_ps_tdma(
  2093. btcoexist, NORMAL_EXEC,
  2094. true, 6);
  2095. coex_dm->ps_tdma_du_adj_type =
  2096. 6;
  2097. } else if (coex_dm->cur_ps_tdma == 6) {
  2098. halbtc8723b2ant_ps_tdma(
  2099. btcoexist, NORMAL_EXEC,
  2100. true, 5);
  2101. coex_dm->ps_tdma_du_adj_type =
  2102. 5;
  2103. } else if (coex_dm->cur_ps_tdma == 16) {
  2104. halbtc8723b2ant_ps_tdma(
  2105. btcoexist, NORMAL_EXEC,
  2106. true, 15);
  2107. coex_dm->ps_tdma_du_adj_type =
  2108. 15;
  2109. } else if (coex_dm->cur_ps_tdma == 15) {
  2110. halbtc8723b2ant_ps_tdma(
  2111. btcoexist, NORMAL_EXEC,
  2112. true, 14);
  2113. coex_dm->ps_tdma_du_adj_type =
  2114. 14;
  2115. } else if (coex_dm->cur_ps_tdma == 14) {
  2116. halbtc8723b2ant_ps_tdma(
  2117. btcoexist, NORMAL_EXEC,
  2118. true, 13);
  2119. coex_dm->ps_tdma_du_adj_type =
  2120. 13;
  2121. }
  2122. }
  2123. } else {
  2124. if (coex_dm->cur_ps_tdma == 5) {
  2125. halbtc8723b2ant_ps_tdma(btcoexist,
  2126. NORMAL_EXEC, true, 71);
  2127. coex_dm->ps_tdma_du_adj_type = 71;
  2128. } else if (coex_dm->cur_ps_tdma == 6) {
  2129. halbtc8723b2ant_ps_tdma(btcoexist,
  2130. NORMAL_EXEC, true, 2);
  2131. coex_dm->ps_tdma_du_adj_type = 2;
  2132. } else if (coex_dm->cur_ps_tdma == 7) {
  2133. halbtc8723b2ant_ps_tdma(btcoexist,
  2134. NORMAL_EXEC, true, 3);
  2135. coex_dm->ps_tdma_du_adj_type = 3;
  2136. } else if (coex_dm->cur_ps_tdma == 8) {
  2137. halbtc8723b2ant_ps_tdma(btcoexist,
  2138. NORMAL_EXEC, true, 4);
  2139. coex_dm->ps_tdma_du_adj_type = 4;
  2140. }
  2141. if (coex_dm->cur_ps_tdma == 13) {
  2142. halbtc8723b2ant_ps_tdma(btcoexist,
  2143. NORMAL_EXEC, true, 9);
  2144. coex_dm->ps_tdma_du_adj_type = 9;
  2145. } else if (coex_dm->cur_ps_tdma == 14) {
  2146. halbtc8723b2ant_ps_tdma(btcoexist,
  2147. NORMAL_EXEC, true, 10);
  2148. coex_dm->ps_tdma_du_adj_type = 10;
  2149. } else if (coex_dm->cur_ps_tdma == 15) {
  2150. halbtc8723b2ant_ps_tdma(btcoexist,
  2151. NORMAL_EXEC, true, 11);
  2152. coex_dm->ps_tdma_du_adj_type = 11;
  2153. } else if (coex_dm->cur_ps_tdma == 16) {
  2154. halbtc8723b2ant_ps_tdma(btcoexist,
  2155. NORMAL_EXEC, true, 12);
  2156. coex_dm->ps_tdma_du_adj_type = 12;
  2157. }
  2158. if (result == -1) {
  2159. if (coex_dm->cur_ps_tdma == 71) {
  2160. halbtc8723b2ant_ps_tdma(
  2161. btcoexist, NORMAL_EXEC,
  2162. true, 1);
  2163. coex_dm->ps_tdma_du_adj_type =
  2164. 1;
  2165. } else if (coex_dm->cur_ps_tdma == 1) {
  2166. halbtc8723b2ant_ps_tdma(
  2167. btcoexist, NORMAL_EXEC,
  2168. true, 2);
  2169. coex_dm->ps_tdma_du_adj_type =
  2170. 2;
  2171. } else if (coex_dm->cur_ps_tdma == 2) {
  2172. halbtc8723b2ant_ps_tdma(
  2173. btcoexist, NORMAL_EXEC,
  2174. true, 3);
  2175. coex_dm->ps_tdma_du_adj_type =
  2176. 3;
  2177. } else if (coex_dm->cur_ps_tdma == 3) {
  2178. halbtc8723b2ant_ps_tdma(
  2179. btcoexist, NORMAL_EXEC,
  2180. true, 4);
  2181. coex_dm->ps_tdma_du_adj_type =
  2182. 4;
  2183. } else if (coex_dm->cur_ps_tdma == 9) {
  2184. halbtc8723b2ant_ps_tdma(
  2185. btcoexist, NORMAL_EXEC,
  2186. true, 10);
  2187. coex_dm->ps_tdma_du_adj_type =
  2188. 10;
  2189. } else if (coex_dm->cur_ps_tdma == 10) {
  2190. halbtc8723b2ant_ps_tdma(
  2191. btcoexist, NORMAL_EXEC,
  2192. true, 11);
  2193. coex_dm->ps_tdma_du_adj_type =
  2194. 11;
  2195. } else if (coex_dm->cur_ps_tdma == 11) {
  2196. halbtc8723b2ant_ps_tdma(
  2197. btcoexist, NORMAL_EXEC,
  2198. true, 12);
  2199. coex_dm->ps_tdma_du_adj_type =
  2200. 12;
  2201. }
  2202. } else if (result == 1) {
  2203. if (coex_dm->cur_ps_tdma == 4) {
  2204. halbtc8723b2ant_ps_tdma(
  2205. btcoexist, NORMAL_EXEC,
  2206. true, 3);
  2207. coex_dm->ps_tdma_du_adj_type =
  2208. 3;
  2209. } else if (coex_dm->cur_ps_tdma == 3) {
  2210. halbtc8723b2ant_ps_tdma(
  2211. btcoexist, NORMAL_EXEC,
  2212. true, 2);
  2213. coex_dm->ps_tdma_du_adj_type =
  2214. 2;
  2215. } else if (coex_dm->cur_ps_tdma == 2) {
  2216. halbtc8723b2ant_ps_tdma(
  2217. btcoexist, NORMAL_EXEC,
  2218. true, 1);
  2219. coex_dm->ps_tdma_du_adj_type =
  2220. 1;
  2221. } else if (coex_dm->cur_ps_tdma == 1) {
  2222. halbtc8723b2ant_ps_tdma(
  2223. btcoexist, NORMAL_EXEC,
  2224. true, 71);
  2225. coex_dm->ps_tdma_du_adj_type =
  2226. 71;
  2227. } else if (coex_dm->cur_ps_tdma == 12) {
  2228. halbtc8723b2ant_ps_tdma(
  2229. btcoexist, NORMAL_EXEC,
  2230. true, 11);
  2231. coex_dm->ps_tdma_du_adj_type =
  2232. 11;
  2233. } else if (coex_dm->cur_ps_tdma == 11) {
  2234. halbtc8723b2ant_ps_tdma(
  2235. btcoexist, NORMAL_EXEC,
  2236. true, 10);
  2237. coex_dm->ps_tdma_du_adj_type =
  2238. 10;
  2239. } else if (coex_dm->cur_ps_tdma == 10) {
  2240. halbtc8723b2ant_ps_tdma(
  2241. btcoexist, NORMAL_EXEC,
  2242. true, 9);
  2243. coex_dm->ps_tdma_du_adj_type =
  2244. 9;
  2245. }
  2246. }
  2247. }
  2248. } else if (max_interval == 2) {
  2249. if (tx_pause) {
  2250. if (coex_dm->cur_ps_tdma == 1) {
  2251. halbtc8723b2ant_ps_tdma(btcoexist,
  2252. NORMAL_EXEC, true, 6);
  2253. coex_dm->ps_tdma_du_adj_type = 6;
  2254. } else if (coex_dm->cur_ps_tdma == 2) {
  2255. halbtc8723b2ant_ps_tdma(btcoexist,
  2256. NORMAL_EXEC, true, 6);
  2257. coex_dm->ps_tdma_du_adj_type = 6;
  2258. } else if (coex_dm->cur_ps_tdma == 3) {
  2259. halbtc8723b2ant_ps_tdma(btcoexist,
  2260. NORMAL_EXEC, true, 7);
  2261. coex_dm->ps_tdma_du_adj_type = 7;
  2262. } else if (coex_dm->cur_ps_tdma == 4) {
  2263. halbtc8723b2ant_ps_tdma(btcoexist,
  2264. NORMAL_EXEC, true, 8);
  2265. coex_dm->ps_tdma_du_adj_type = 8;
  2266. }
  2267. if (coex_dm->cur_ps_tdma == 9) {
  2268. halbtc8723b2ant_ps_tdma(btcoexist,
  2269. NORMAL_EXEC, true, 14);
  2270. coex_dm->ps_tdma_du_adj_type = 14;
  2271. } else if (coex_dm->cur_ps_tdma == 10) {
  2272. halbtc8723b2ant_ps_tdma(btcoexist,
  2273. NORMAL_EXEC, true, 14);
  2274. coex_dm->ps_tdma_du_adj_type = 14;
  2275. } else if (coex_dm->cur_ps_tdma == 11) {
  2276. halbtc8723b2ant_ps_tdma(btcoexist,
  2277. NORMAL_EXEC, true, 15);
  2278. coex_dm->ps_tdma_du_adj_type = 15;
  2279. } else if (coex_dm->cur_ps_tdma == 12) {
  2280. halbtc8723b2ant_ps_tdma(btcoexist,
  2281. NORMAL_EXEC, true, 16);
  2282. coex_dm->ps_tdma_du_adj_type = 16;
  2283. }
  2284. if (result == -1) {
  2285. if (coex_dm->cur_ps_tdma == 5) {
  2286. halbtc8723b2ant_ps_tdma(
  2287. btcoexist, NORMAL_EXEC,
  2288. true, 6);
  2289. coex_dm->ps_tdma_du_adj_type =
  2290. 6;
  2291. } else if (coex_dm->cur_ps_tdma == 6) {
  2292. halbtc8723b2ant_ps_tdma(
  2293. btcoexist, NORMAL_EXEC,
  2294. true, 7);
  2295. coex_dm->ps_tdma_du_adj_type =
  2296. 7;
  2297. } else if (coex_dm->cur_ps_tdma == 7) {
  2298. halbtc8723b2ant_ps_tdma(
  2299. btcoexist, NORMAL_EXEC,
  2300. true, 8);
  2301. coex_dm->ps_tdma_du_adj_type =
  2302. 8;
  2303. } else if (coex_dm->cur_ps_tdma == 13) {
  2304. halbtc8723b2ant_ps_tdma(
  2305. btcoexist, NORMAL_EXEC,
  2306. true, 14);
  2307. coex_dm->ps_tdma_du_adj_type =
  2308. 14;
  2309. } else if (coex_dm->cur_ps_tdma == 14) {
  2310. halbtc8723b2ant_ps_tdma(
  2311. btcoexist, NORMAL_EXEC,
  2312. true, 15);
  2313. coex_dm->ps_tdma_du_adj_type =
  2314. 15;
  2315. } else if (coex_dm->cur_ps_tdma == 15) {
  2316. halbtc8723b2ant_ps_tdma(
  2317. btcoexist, NORMAL_EXEC,
  2318. true, 16);
  2319. coex_dm->ps_tdma_du_adj_type =
  2320. 16;
  2321. }
  2322. } else if (result == 1) {
  2323. if (coex_dm->cur_ps_tdma == 8) {
  2324. halbtc8723b2ant_ps_tdma(
  2325. btcoexist, NORMAL_EXEC,
  2326. true, 7);
  2327. coex_dm->ps_tdma_du_adj_type =
  2328. 7;
  2329. } else if (coex_dm->cur_ps_tdma == 7) {
  2330. halbtc8723b2ant_ps_tdma(
  2331. btcoexist, NORMAL_EXEC,
  2332. true, 6);
  2333. coex_dm->ps_tdma_du_adj_type =
  2334. 6;
  2335. } else if (coex_dm->cur_ps_tdma == 6) {
  2336. halbtc8723b2ant_ps_tdma(
  2337. btcoexist, NORMAL_EXEC,
  2338. true, 6);
  2339. coex_dm->ps_tdma_du_adj_type =
  2340. 6;
  2341. } else if (coex_dm->cur_ps_tdma == 16) {
  2342. halbtc8723b2ant_ps_tdma(
  2343. btcoexist, NORMAL_EXEC,
  2344. true, 15);
  2345. coex_dm->ps_tdma_du_adj_type =
  2346. 15;
  2347. } else if (coex_dm->cur_ps_tdma == 15) {
  2348. halbtc8723b2ant_ps_tdma(
  2349. btcoexist, NORMAL_EXEC,
  2350. true, 14);
  2351. coex_dm->ps_tdma_du_adj_type =
  2352. 14;
  2353. } else if (coex_dm->cur_ps_tdma == 14) {
  2354. halbtc8723b2ant_ps_tdma(
  2355. btcoexist, NORMAL_EXEC,
  2356. true, 14);
  2357. coex_dm->ps_tdma_du_adj_type =
  2358. 14;
  2359. }
  2360. }
  2361. } else {
  2362. if (coex_dm->cur_ps_tdma == 5) {
  2363. halbtc8723b2ant_ps_tdma(btcoexist,
  2364. NORMAL_EXEC, true, 2);
  2365. coex_dm->ps_tdma_du_adj_type = 2;
  2366. } else if (coex_dm->cur_ps_tdma == 6) {
  2367. halbtc8723b2ant_ps_tdma(btcoexist,
  2368. NORMAL_EXEC, true, 2);
  2369. coex_dm->ps_tdma_du_adj_type = 2;
  2370. } else if (coex_dm->cur_ps_tdma == 7) {
  2371. halbtc8723b2ant_ps_tdma(btcoexist,
  2372. NORMAL_EXEC, true, 3);
  2373. coex_dm->ps_tdma_du_adj_type = 3;
  2374. } else if (coex_dm->cur_ps_tdma == 8) {
  2375. halbtc8723b2ant_ps_tdma(btcoexist,
  2376. NORMAL_EXEC, true, 4);
  2377. coex_dm->ps_tdma_du_adj_type = 4;
  2378. }
  2379. if (coex_dm->cur_ps_tdma == 13) {
  2380. halbtc8723b2ant_ps_tdma(btcoexist,
  2381. NORMAL_EXEC, true, 10);
  2382. coex_dm->ps_tdma_du_adj_type = 10;
  2383. } else if (coex_dm->cur_ps_tdma == 14) {
  2384. halbtc8723b2ant_ps_tdma(btcoexist,
  2385. NORMAL_EXEC, true, 10);
  2386. coex_dm->ps_tdma_du_adj_type = 10;
  2387. } else if (coex_dm->cur_ps_tdma == 15) {
  2388. halbtc8723b2ant_ps_tdma(btcoexist,
  2389. NORMAL_EXEC, true, 11);
  2390. coex_dm->ps_tdma_du_adj_type = 11;
  2391. } else if (coex_dm->cur_ps_tdma == 16) {
  2392. halbtc8723b2ant_ps_tdma(btcoexist,
  2393. NORMAL_EXEC, true, 12);
  2394. coex_dm->ps_tdma_du_adj_type = 12;
  2395. }
  2396. if (result == -1) {
  2397. if (coex_dm->cur_ps_tdma == 1) {
  2398. halbtc8723b2ant_ps_tdma(
  2399. btcoexist, NORMAL_EXEC,
  2400. true, 2);
  2401. coex_dm->ps_tdma_du_adj_type =
  2402. 2;
  2403. } else if (coex_dm->cur_ps_tdma == 2) {
  2404. halbtc8723b2ant_ps_tdma(
  2405. btcoexist, NORMAL_EXEC,
  2406. true, 3);
  2407. coex_dm->ps_tdma_du_adj_type =
  2408. 3;
  2409. } else if (coex_dm->cur_ps_tdma == 3) {
  2410. halbtc8723b2ant_ps_tdma(
  2411. btcoexist, NORMAL_EXEC,
  2412. true, 4);
  2413. coex_dm->ps_tdma_du_adj_type =
  2414. 4;
  2415. } else if (coex_dm->cur_ps_tdma == 9) {
  2416. halbtc8723b2ant_ps_tdma(
  2417. btcoexist, NORMAL_EXEC,
  2418. true, 10);
  2419. coex_dm->ps_tdma_du_adj_type =
  2420. 10;
  2421. } else if (coex_dm->cur_ps_tdma == 10) {
  2422. halbtc8723b2ant_ps_tdma(
  2423. btcoexist, NORMAL_EXEC,
  2424. true, 11);
  2425. coex_dm->ps_tdma_du_adj_type =
  2426. 11;
  2427. } else if (coex_dm->cur_ps_tdma == 11) {
  2428. halbtc8723b2ant_ps_tdma(
  2429. btcoexist, NORMAL_EXEC,
  2430. true, 12);
  2431. coex_dm->ps_tdma_du_adj_type =
  2432. 12;
  2433. }
  2434. } else if (result == 1) {
  2435. if (coex_dm->cur_ps_tdma == 4) {
  2436. halbtc8723b2ant_ps_tdma(
  2437. btcoexist, NORMAL_EXEC,
  2438. true, 3);
  2439. coex_dm->ps_tdma_du_adj_type =
  2440. 3;
  2441. } else if (coex_dm->cur_ps_tdma == 3) {
  2442. halbtc8723b2ant_ps_tdma(
  2443. btcoexist, NORMAL_EXEC,
  2444. true, 2);
  2445. coex_dm->ps_tdma_du_adj_type =
  2446. 2;
  2447. } else if (coex_dm->cur_ps_tdma == 2) {
  2448. halbtc8723b2ant_ps_tdma(
  2449. btcoexist, NORMAL_EXEC,
  2450. true, 2);
  2451. coex_dm->ps_tdma_du_adj_type =
  2452. 2;
  2453. } else if (coex_dm->cur_ps_tdma == 12) {
  2454. halbtc8723b2ant_ps_tdma(
  2455. btcoexist, NORMAL_EXEC,
  2456. true, 11);
  2457. coex_dm->ps_tdma_du_adj_type =
  2458. 11;
  2459. } else if (coex_dm->cur_ps_tdma == 11) {
  2460. halbtc8723b2ant_ps_tdma(
  2461. btcoexist, NORMAL_EXEC,
  2462. true, 10);
  2463. coex_dm->ps_tdma_du_adj_type =
  2464. 10;
  2465. } else if (coex_dm->cur_ps_tdma == 10) {
  2466. halbtc8723b2ant_ps_tdma(
  2467. btcoexist, NORMAL_EXEC,
  2468. true, 10);
  2469. coex_dm->ps_tdma_du_adj_type =
  2470. 10;
  2471. }
  2472. }
  2473. }
  2474. } else if (max_interval == 3) {
  2475. if (tx_pause) {
  2476. if (coex_dm->cur_ps_tdma == 1) {
  2477. halbtc8723b2ant_ps_tdma(btcoexist,
  2478. NORMAL_EXEC, true, 7);
  2479. coex_dm->ps_tdma_du_adj_type = 7;
  2480. } else if (coex_dm->cur_ps_tdma == 2) {
  2481. halbtc8723b2ant_ps_tdma(btcoexist,
  2482. NORMAL_EXEC, true, 7);
  2483. coex_dm->ps_tdma_du_adj_type = 7;
  2484. } else if (coex_dm->cur_ps_tdma == 3) {
  2485. halbtc8723b2ant_ps_tdma(btcoexist,
  2486. NORMAL_EXEC, true, 7);
  2487. coex_dm->ps_tdma_du_adj_type = 7;
  2488. } else if (coex_dm->cur_ps_tdma == 4) {
  2489. halbtc8723b2ant_ps_tdma(btcoexist,
  2490. NORMAL_EXEC, true, 8);
  2491. coex_dm->ps_tdma_du_adj_type = 8;
  2492. }
  2493. if (coex_dm->cur_ps_tdma == 9) {
  2494. halbtc8723b2ant_ps_tdma(btcoexist,
  2495. NORMAL_EXEC, true, 15);
  2496. coex_dm->ps_tdma_du_adj_type = 15;
  2497. } else if (coex_dm->cur_ps_tdma == 10) {
  2498. halbtc8723b2ant_ps_tdma(btcoexist,
  2499. NORMAL_EXEC, true, 15);
  2500. coex_dm->ps_tdma_du_adj_type = 15;
  2501. } else if (coex_dm->cur_ps_tdma == 11) {
  2502. halbtc8723b2ant_ps_tdma(btcoexist,
  2503. NORMAL_EXEC, true, 15);
  2504. coex_dm->ps_tdma_du_adj_type = 15;
  2505. } else if (coex_dm->cur_ps_tdma == 12) {
  2506. halbtc8723b2ant_ps_tdma(btcoexist,
  2507. NORMAL_EXEC, true, 16);
  2508. coex_dm->ps_tdma_du_adj_type = 16;
  2509. }
  2510. if (result == -1) {
  2511. if (coex_dm->cur_ps_tdma == 5) {
  2512. halbtc8723b2ant_ps_tdma(
  2513. btcoexist, NORMAL_EXEC,
  2514. true, 7);
  2515. coex_dm->ps_tdma_du_adj_type =
  2516. 7;
  2517. } else if (coex_dm->cur_ps_tdma == 6) {
  2518. halbtc8723b2ant_ps_tdma(
  2519. btcoexist, NORMAL_EXEC,
  2520. true, 7);
  2521. coex_dm->ps_tdma_du_adj_type =
  2522. 7;
  2523. } else if (coex_dm->cur_ps_tdma == 7) {
  2524. halbtc8723b2ant_ps_tdma(
  2525. btcoexist, NORMAL_EXEC,
  2526. true, 8);
  2527. coex_dm->ps_tdma_du_adj_type =
  2528. 8;
  2529. } else if (coex_dm->cur_ps_tdma == 13) {
  2530. halbtc8723b2ant_ps_tdma(
  2531. btcoexist, NORMAL_EXEC,
  2532. true, 15);
  2533. coex_dm->ps_tdma_du_adj_type =
  2534. 15;
  2535. } else if (coex_dm->cur_ps_tdma == 14) {
  2536. halbtc8723b2ant_ps_tdma(
  2537. btcoexist, NORMAL_EXEC,
  2538. true, 15);
  2539. coex_dm->ps_tdma_du_adj_type =
  2540. 15;
  2541. } else if (coex_dm->cur_ps_tdma == 15) {
  2542. halbtc8723b2ant_ps_tdma(
  2543. btcoexist, NORMAL_EXEC,
  2544. true, 16);
  2545. coex_dm->ps_tdma_du_adj_type =
  2546. 16;
  2547. }
  2548. } else if (result == 1) {
  2549. if (coex_dm->cur_ps_tdma == 8) {
  2550. halbtc8723b2ant_ps_tdma(
  2551. btcoexist, NORMAL_EXEC,
  2552. true, 7);
  2553. coex_dm->ps_tdma_du_adj_type =
  2554. 7;
  2555. } else if (coex_dm->cur_ps_tdma == 7) {
  2556. halbtc8723b2ant_ps_tdma(
  2557. btcoexist, NORMAL_EXEC,
  2558. true, 7);
  2559. coex_dm->ps_tdma_du_adj_type =
  2560. 7;
  2561. } else if (coex_dm->cur_ps_tdma == 6) {
  2562. halbtc8723b2ant_ps_tdma(
  2563. btcoexist, NORMAL_EXEC,
  2564. true, 7);
  2565. coex_dm->ps_tdma_du_adj_type =
  2566. 7;
  2567. } else if (coex_dm->cur_ps_tdma == 16) {
  2568. halbtc8723b2ant_ps_tdma(
  2569. btcoexist, NORMAL_EXEC,
  2570. true, 15);
  2571. coex_dm->ps_tdma_du_adj_type =
  2572. 15;
  2573. } else if (coex_dm->cur_ps_tdma == 15) {
  2574. halbtc8723b2ant_ps_tdma(
  2575. btcoexist, NORMAL_EXEC,
  2576. true, 15);
  2577. coex_dm->ps_tdma_du_adj_type =
  2578. 15;
  2579. } else if (coex_dm->cur_ps_tdma == 14) {
  2580. halbtc8723b2ant_ps_tdma(
  2581. btcoexist, NORMAL_EXEC,
  2582. true, 15);
  2583. coex_dm->ps_tdma_du_adj_type =
  2584. 15;
  2585. }
  2586. }
  2587. } else {
  2588. if (coex_dm->cur_ps_tdma == 5) {
  2589. halbtc8723b2ant_ps_tdma(btcoexist,
  2590. NORMAL_EXEC, true, 3);
  2591. coex_dm->ps_tdma_du_adj_type = 3;
  2592. } else if (coex_dm->cur_ps_tdma == 6) {
  2593. halbtc8723b2ant_ps_tdma(btcoexist,
  2594. NORMAL_EXEC, true, 3);
  2595. coex_dm->ps_tdma_du_adj_type = 3;
  2596. } else if (coex_dm->cur_ps_tdma == 7) {
  2597. halbtc8723b2ant_ps_tdma(btcoexist,
  2598. NORMAL_EXEC, true, 3);
  2599. coex_dm->ps_tdma_du_adj_type = 3;
  2600. } else if (coex_dm->cur_ps_tdma == 8) {
  2601. halbtc8723b2ant_ps_tdma(btcoexist,
  2602. NORMAL_EXEC, true, 4);
  2603. coex_dm->ps_tdma_du_adj_type = 4;
  2604. }
  2605. if (coex_dm->cur_ps_tdma == 13) {
  2606. halbtc8723b2ant_ps_tdma(btcoexist,
  2607. NORMAL_EXEC, true, 11);
  2608. coex_dm->ps_tdma_du_adj_type = 11;
  2609. } else if (coex_dm->cur_ps_tdma == 14) {
  2610. halbtc8723b2ant_ps_tdma(btcoexist,
  2611. NORMAL_EXEC, true, 11);
  2612. coex_dm->ps_tdma_du_adj_type = 11;
  2613. } else if (coex_dm->cur_ps_tdma == 15) {
  2614. halbtc8723b2ant_ps_tdma(btcoexist,
  2615. NORMAL_EXEC, true, 11);
  2616. coex_dm->ps_tdma_du_adj_type = 11;
  2617. } else if (coex_dm->cur_ps_tdma == 16) {
  2618. halbtc8723b2ant_ps_tdma(btcoexist,
  2619. NORMAL_EXEC, true, 12);
  2620. coex_dm->ps_tdma_du_adj_type = 12;
  2621. }
  2622. if (result == -1) {
  2623. if (coex_dm->cur_ps_tdma == 1) {
  2624. halbtc8723b2ant_ps_tdma(
  2625. btcoexist, NORMAL_EXEC,
  2626. true, 3);
  2627. coex_dm->ps_tdma_du_adj_type =
  2628. 3;
  2629. } else if (coex_dm->cur_ps_tdma == 2) {
  2630. halbtc8723b2ant_ps_tdma(
  2631. btcoexist, NORMAL_EXEC,
  2632. true, 3);
  2633. coex_dm->ps_tdma_du_adj_type =
  2634. 3;
  2635. } else if (coex_dm->cur_ps_tdma == 3) {
  2636. halbtc8723b2ant_ps_tdma(
  2637. btcoexist, NORMAL_EXEC,
  2638. true, 4);
  2639. coex_dm->ps_tdma_du_adj_type =
  2640. 4;
  2641. } else if (coex_dm->cur_ps_tdma == 9) {
  2642. halbtc8723b2ant_ps_tdma(
  2643. btcoexist, NORMAL_EXEC,
  2644. true, 11);
  2645. coex_dm->ps_tdma_du_adj_type =
  2646. 11;
  2647. } else if (coex_dm->cur_ps_tdma == 10) {
  2648. halbtc8723b2ant_ps_tdma(
  2649. btcoexist, NORMAL_EXEC,
  2650. true, 11);
  2651. coex_dm->ps_tdma_du_adj_type =
  2652. 11;
  2653. } else if (coex_dm->cur_ps_tdma == 11) {
  2654. halbtc8723b2ant_ps_tdma(
  2655. btcoexist, NORMAL_EXEC,
  2656. true, 12);
  2657. coex_dm->ps_tdma_du_adj_type =
  2658. 12;
  2659. }
  2660. } else if (result == 1) {
  2661. if (coex_dm->cur_ps_tdma == 4) {
  2662. halbtc8723b2ant_ps_tdma(
  2663. btcoexist, NORMAL_EXEC,
  2664. true, 3);
  2665. coex_dm->ps_tdma_du_adj_type =
  2666. 3;
  2667. } else if (coex_dm->cur_ps_tdma == 3) {
  2668. halbtc8723b2ant_ps_tdma(
  2669. btcoexist, NORMAL_EXEC,
  2670. true, 3);
  2671. coex_dm->ps_tdma_du_adj_type =
  2672. 3;
  2673. } else if (coex_dm->cur_ps_tdma == 2) {
  2674. halbtc8723b2ant_ps_tdma(
  2675. btcoexist, NORMAL_EXEC,
  2676. true, 3);
  2677. coex_dm->ps_tdma_du_adj_type =
  2678. 3;
  2679. } else if (coex_dm->cur_ps_tdma == 12) {
  2680. halbtc8723b2ant_ps_tdma(
  2681. btcoexist, NORMAL_EXEC,
  2682. true, 11);
  2683. coex_dm->ps_tdma_du_adj_type =
  2684. 11;
  2685. } else if (coex_dm->cur_ps_tdma == 11) {
  2686. halbtc8723b2ant_ps_tdma(
  2687. btcoexist, NORMAL_EXEC,
  2688. true, 11);
  2689. coex_dm->ps_tdma_du_adj_type =
  2690. 11;
  2691. } else if (coex_dm->cur_ps_tdma == 10) {
  2692. halbtc8723b2ant_ps_tdma(
  2693. btcoexist, NORMAL_EXEC,
  2694. true, 11);
  2695. coex_dm->ps_tdma_du_adj_type =
  2696. 11;
  2697. }
  2698. }
  2699. }
  2700. }
  2701. }
  2702. /* if current PsTdma not match with the recorded one (when scan, dhcp...), */
  2703. /* then we have to adjust it back to the previous record one. */
  2704. if (coex_dm->cur_ps_tdma != coex_dm->ps_tdma_du_adj_type) {
  2705. boolean scan = false, link = false, roam = false;
  2706. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2707. "[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma=%d, recordPsTdma=%d\n",
  2708. coex_dm->cur_ps_tdma, coex_dm->ps_tdma_du_adj_type);
  2709. BTC_TRACE(trace_buf);
  2710. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2711. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2712. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2713. if (!scan && !link && !roam)
  2714. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2715. coex_dm->ps_tdma_du_adj_type);
  2716. else {
  2717. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2718. "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
  2719. BTC_TRACE(trace_buf);
  2720. }
  2721. }
  2722. }
  2723. /* SCO only or SCO+PAN(HS) */
  2724. void halbtc8723b2ant_action_sco(IN struct btc_coexist *btcoexist)
  2725. {
  2726. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2727. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2728. u8 wifi_rssi_state, bt_rssi_state;
  2729. u32 wifi_bw;
  2730. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2731. &prewifi_rssi_state, 2, 15, 0);
  2732. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2733. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  2734. coex_dm->switch_thres_offset, 0);
  2735. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  2736. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2737. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
  2738. if (BTC_RSSI_HIGH(bt_rssi_state))
  2739. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2740. else
  2741. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2742. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2743. if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for SCO quality at 11b/g mode */
  2744. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
  2745. else /* for SCO quality & wifi performance balance at 11n mode */
  2746. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2747. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  2748. 0); /* for voice quality */
  2749. /* sw mechanism */
  2750. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2751. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2752. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2753. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  2754. false, false);
  2755. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2756. true, 0x4);
  2757. } else {
  2758. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  2759. false, false);
  2760. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2761. true, 0x4);
  2762. }
  2763. } else {
  2764. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2765. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2766. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  2767. false, false);
  2768. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2769. true, 0x4);
  2770. } else {
  2771. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  2772. false, false);
  2773. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2774. true, 0x4);
  2775. }
  2776. }
  2777. }
  2778. void halbtc8723b2ant_action_hid(IN struct btc_coexist *btcoexist)
  2779. {
  2780. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2781. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2782. u8 wifi_rssi_state, bt_rssi_state;
  2783. u32 wifi_bw;
  2784. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
  2785. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2786. &prewifi_rssi_state, 2, 15, 0);
  2787. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2788. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  2789. coex_dm->switch_thres_offset, 0);
  2790. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  2791. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2792. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2793. if (BTC_RSSI_HIGH(bt_rssi_state))
  2794. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2795. else
  2796. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2797. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2798. if (BTC_WIFI_BW_LEGACY == wifi_bw) /* for HID at 11b/g mode */
  2799. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2800. else /* for HID quality & wifi performance balance at 11n mode */
  2801. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
  2802. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2803. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
  2804. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2805. else
  2806. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
  2807. /* sw mechanism */
  2808. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2809. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2810. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2811. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  2812. false, false);
  2813. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2814. false, 0x18);
  2815. } else {
  2816. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  2817. false, false);
  2818. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2819. false, 0x18);
  2820. }
  2821. } else {
  2822. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2823. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2824. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  2825. false, false);
  2826. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2827. false, 0x18);
  2828. } else {
  2829. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  2830. false, false);
  2831. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2832. false, 0x18);
  2833. }
  2834. }
  2835. }
  2836. /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
  2837. void halbtc8723b2ant_action_a2dp(IN struct btc_coexist *btcoexist)
  2838. {
  2839. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  2840. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  2841. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2842. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  2843. u32 wifi_bw;
  2844. u8 ap_num = 0;
  2845. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2846. &prewifi_rssi_state, 2, 15, 0);
  2847. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2848. &prewifi_rssi_state1, 2,
  2849. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  2850. coex_dm->switch_thres_offset, 0);
  2851. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2852. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  2853. coex_dm->switch_thres_offset, 0);
  2854. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM, &ap_num);
  2855. /* define the office environment */
  2856. if ((ap_num >= 10) && BTC_RSSI_HIGH(wifi_rssi_state1) &&
  2857. BTC_RSSI_HIGH(bt_rssi_state)) {
  2858. /* dbg_print(" AP#>10(%d)\n", ap_num); */
  2859. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  2860. 0x0);
  2861. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
  2862. 0x8);
  2863. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2864. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2865. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2866. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2867. /* sw mechanism */
  2868. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2869. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2870. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  2871. false, false);
  2872. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2873. true, 0x18);
  2874. } else {
  2875. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  2876. false, false);
  2877. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2878. true, 0x18);
  2879. }
  2880. return;
  2881. }
  2882. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  2883. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2884. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2885. if (BTC_RSSI_HIGH(bt_rssi_state))
  2886. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2887. else
  2888. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2889. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  2890. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2891. } else {
  2892. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2893. 13);
  2894. }
  2895. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2896. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
  2897. halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, false,
  2898. 1);
  2899. else
  2900. halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 1);
  2901. /* sw mechanism */
  2902. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2903. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2904. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2905. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2906. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  2907. false, false);
  2908. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2909. false, 0x18);
  2910. } else {
  2911. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  2912. false, false);
  2913. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2914. false, 0x18);
  2915. }
  2916. } else {
  2917. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2918. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2919. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  2920. false, false);
  2921. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2922. false, 0x18);
  2923. } else {
  2924. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  2925. false, false);
  2926. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2927. false, 0x18);
  2928. }
  2929. }
  2930. }
  2931. void halbtc8723b2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
  2932. {
  2933. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  2934. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  2935. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2936. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  2937. u32 wifi_bw;
  2938. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2939. &prewifi_rssi_state, 2, 15, 0);
  2940. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2941. &prewifi_rssi_state1, 2,
  2942. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  2943. coex_dm->switch_thres_offset, 0);
  2944. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2945. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  2946. coex_dm->switch_thres_offset, 0);
  2947. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  2948. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2949. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  2950. if (BTC_RSSI_HIGH(bt_rssi_state))
  2951. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2952. else
  2953. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2954. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  2955. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  2956. } else {
  2957. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2958. 13);
  2959. }
  2960. halbtc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
  2961. /* sw mechanism */
  2962. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2963. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2964. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2965. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2966. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  2967. false, false);
  2968. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2969. false, 0x18);
  2970. } else {
  2971. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  2972. false, false);
  2973. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2974. false, 0x18);
  2975. }
  2976. } else {
  2977. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  2978. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2979. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  2980. false, false);
  2981. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  2982. false, 0x18);
  2983. } else {
  2984. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  2985. false, false);
  2986. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  2987. false, 0x18);
  2988. }
  2989. }
  2990. }
  2991. void halbtc8723b2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
  2992. {
  2993. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  2994. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  2995. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2996. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  2997. u32 wifi_bw;
  2998. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  2999. &prewifi_rssi_state, 2, 15, 0);
  3000. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3001. &prewifi_rssi_state1, 2,
  3002. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3003. coex_dm->switch_thres_offset, 0);
  3004. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  3005. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3006. coex_dm->switch_thres_offset, 0);
  3007. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  3008. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3009. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3010. if (BTC_RSSI_HIGH(bt_rssi_state))
  3011. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3012. else
  3013. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3014. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  3015. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3016. 10);
  3017. } else {
  3018. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3019. 13);
  3020. }
  3021. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3022. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
  3023. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
  3024. else
  3025. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  3026. /* sw mechanism */
  3027. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3028. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3029. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3030. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3031. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3032. false, false);
  3033. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3034. false, 0x18);
  3035. } else {
  3036. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3037. false, false);
  3038. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3039. false, 0x18);
  3040. }
  3041. } else {
  3042. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3043. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3044. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3045. false, false);
  3046. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3047. false, 0x18);
  3048. } else {
  3049. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3050. false, false);
  3051. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3052. false, 0x18);
  3053. }
  3054. }
  3055. }
  3056. /* PAN(HS) only */
  3057. void halbtc8723b2ant_action_pan_hs(IN struct btc_coexist *btcoexist)
  3058. {
  3059. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  3060. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  3061. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  3062. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  3063. u32 wifi_bw;
  3064. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3065. &prewifi_rssi_state, 2, 15, 0);
  3066. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3067. &prewifi_rssi_state1, 2,
  3068. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3069. coex_dm->switch_thres_offset, 0);
  3070. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  3071. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3072. coex_dm->switch_thres_offset, 0);
  3073. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  3074. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3075. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3076. if (BTC_RSSI_HIGH(bt_rssi_state))
  3077. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3078. else
  3079. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3080. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  3081. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  3082. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3083. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3084. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3085. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3086. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3087. false, false);
  3088. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3089. false, 0x18);
  3090. } else {
  3091. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3092. false, false);
  3093. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3094. false, 0x18);
  3095. }
  3096. } else {
  3097. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3098. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3099. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3100. false, false);
  3101. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3102. false, 0x18);
  3103. } else {
  3104. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3105. false, false);
  3106. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3107. false, 0x18);
  3108. }
  3109. }
  3110. }
  3111. /* PAN(EDR)+A2DP */
  3112. void halbtc8723b2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
  3113. {
  3114. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  3115. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  3116. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  3117. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  3118. u8 ap_num = 0;
  3119. u32 wifi_bw;
  3120. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3121. &prewifi_rssi_state, 2, 15, 0);
  3122. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3123. &prewifi_rssi_state1, 2,
  3124. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3125. coex_dm->switch_thres_offset, 0);
  3126. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  3127. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3128. coex_dm->switch_thres_offset, 0);
  3129. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  3130. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3131. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3132. if (BTC_RSSI_HIGH(bt_rssi_state))
  3133. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3134. else
  3135. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3136. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3137. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  3138. &ap_num);
  3139. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3140. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3141. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3142. 12);
  3143. if (ap_num < 10)
  3144. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3145. false, 1);
  3146. else
  3147. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3148. false, 3);
  3149. } else {
  3150. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3151. 13);
  3152. if (ap_num < 10)
  3153. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3154. true, 1);
  3155. else
  3156. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3157. true, 3);
  3158. }
  3159. /* sw mechanism */
  3160. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3161. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3162. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3163. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3164. false, false);
  3165. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3166. false, 0x18);
  3167. } else {
  3168. halbtc8723b2ant_sw_mechanism1(btcoexist, true, false,
  3169. false, false);
  3170. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3171. false, 0x18);
  3172. }
  3173. } else {
  3174. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3175. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3176. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3177. false, false);
  3178. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3179. false, 0x18);
  3180. } else {
  3181. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false,
  3182. false, false);
  3183. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3184. false, 0x18);
  3185. }
  3186. }
  3187. }
  3188. void halbtc8723b2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
  3189. {
  3190. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  3191. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  3192. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  3193. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  3194. u32 wifi_bw;
  3195. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
  3196. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3197. &prewifi_rssi_state, 2, 15, 0);
  3198. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3199. &prewifi_rssi_state1, 2,
  3200. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3201. coex_dm->switch_thres_offset, 0);
  3202. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  3203. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3204. coex_dm->switch_thres_offset, 0);
  3205. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3206. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3207. if (BTC_RSSI_HIGH(bt_rssi_state))
  3208. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3209. else
  3210. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3211. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  3212. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  3213. } else {
  3214. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3215. 14);
  3216. }
  3217. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3218. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3219. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3220. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
  3221. 3);
  3222. /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11); */
  3223. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  3224. 0xfffff, 0x780);
  3225. } else {
  3226. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
  3227. 6);
  3228. /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7); */
  3229. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
  3230. 0xfffff, 0x0);
  3231. }
  3232. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
  3233. } else {
  3234. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3235. /* halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 14); */
  3236. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  3237. 0x0);
  3238. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
  3239. }
  3240. /* sw mechanism */
  3241. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3242. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3243. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3244. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3245. false, false);
  3246. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3247. false, 0x18);
  3248. } else {
  3249. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3250. false, false);
  3251. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3252. false, 0x18);
  3253. }
  3254. } else {
  3255. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3256. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3257. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3258. false, false);
  3259. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3260. false, 0x18);
  3261. } else {
  3262. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3263. false, false);
  3264. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3265. false, 0x18);
  3266. }
  3267. }
  3268. }
  3269. /* HID+A2DP+PAN(EDR) */
  3270. void halbtc8723b2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
  3271. {
  3272. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  3273. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  3274. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  3275. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  3276. u32 wifi_bw;
  3277. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 25);
  3278. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3279. &prewifi_rssi_state, 2, 15, 0);
  3280. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3281. &prewifi_rssi_state1, 2,
  3282. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3283. coex_dm->switch_thres_offset, 0);
  3284. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  3285. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3286. coex_dm->switch_thres_offset, 0);
  3287. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  3288. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  3289. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3290. if (BTC_RSSI_HIGH(bt_rssi_state))
  3291. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3292. else
  3293. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3294. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  3295. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  3296. } else {
  3297. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3298. 14);
  3299. }
  3300. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3301. if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3302. (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3303. if (BTC_WIFI_BW_HT40 == wifi_bw)
  3304. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3305. true, 3);
  3306. else
  3307. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3308. false, 3);
  3309. } else
  3310. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 3);
  3311. /* sw mechanism */
  3312. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3313. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3314. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3315. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3316. false, false);
  3317. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3318. false, 0x18);
  3319. } else {
  3320. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3321. false, false);
  3322. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3323. false, 0x18);
  3324. }
  3325. } else {
  3326. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3327. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3328. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3329. false, false);
  3330. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3331. false, 0x18);
  3332. } else {
  3333. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3334. false, false);
  3335. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3336. false, 0x18);
  3337. }
  3338. }
  3339. }
  3340. void halbtc8723b2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
  3341. {
  3342. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW,
  3343. prewifi_rssi_state1 = BTC_RSSI_STATE_LOW;
  3344. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  3345. u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
  3346. u32 wifi_bw;
  3347. u8 ap_num = 0;
  3348. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 35);
  3349. wifi_rssi_state = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3350. &prewifi_rssi_state, 2, 15, 0);
  3351. /* bt_rssi_state = halbtc8723b2ant_bt_rssi_state(2, 29, 0); */
  3352. wifi_rssi_state1 = halbtc8723b2ant_wifi_rssi_state(btcoexist,
  3353. &prewifi_rssi_state1, 2,
  3354. BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES -
  3355. coex_dm->switch_thres_offset, 0);
  3356. bt_rssi_state = halbtc8723b2ant_bt_rssi_state(&pre_bt_rssi_state, 3,
  3357. BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES -
  3358. coex_dm->switch_thres_offset, 37);
  3359. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  3360. &ap_num);
  3361. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
  3362. halbtc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5);
  3363. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3364. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3365. if (BTC_WIFI_BW_LEGACY == wifi_bw) {
  3366. if (BTC_RSSI_HIGH(bt_rssi_state))
  3367. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3368. else if (BTC_RSSI_MEDIUM(bt_rssi_state))
  3369. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3370. else
  3371. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3372. } else {
  3373. /* only 802.11N mode we have to dec bt power to 4 degree */
  3374. if (BTC_RSSI_HIGH(bt_rssi_state)) {
  3375. /* need to check ap Number of Not */
  3376. if (ap_num < 10)
  3377. halbtc8723b2ant_dec_bt_pwr(btcoexist,
  3378. NORMAL_EXEC, 4);
  3379. else
  3380. halbtc8723b2ant_dec_bt_pwr(btcoexist,
  3381. NORMAL_EXEC, 2);
  3382. } else if (BTC_RSSI_MEDIUM(bt_rssi_state))
  3383. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  3384. else
  3385. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3386. }
  3387. if (BTC_RSSI_HIGH(wifi_rssi_state1) && BTC_RSSI_HIGH(bt_rssi_state)) {
  3388. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
  3389. } else {
  3390. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  3391. 14);
  3392. }
  3393. if (BTC_RSSI_HIGH(bt_rssi_state)) {
  3394. if (ap_num < 10)
  3395. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3396. false, 2);
  3397. else
  3398. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3399. false, 3);
  3400. } else {
  3401. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 18);
  3402. btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
  3403. btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
  3404. btcoexist->btc_write_4byte(btcoexist, 0x430, 0x0);
  3405. btcoexist->btc_write_4byte(btcoexist, 0x434, 0x01010000);
  3406. if (ap_num < 10)
  3407. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3408. true, 2);
  3409. else
  3410. halbtc8723b2ant_tdma_duration_adjust(btcoexist, true,
  3411. true, 3);
  3412. }
  3413. /* sw mechanism */
  3414. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  3415. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3416. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3417. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3418. false, false);
  3419. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3420. false, 0x18);
  3421. } else {
  3422. halbtc8723b2ant_sw_mechanism1(btcoexist, true, true,
  3423. false, false);
  3424. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3425. false, 0x18);
  3426. }
  3427. } else {
  3428. if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
  3429. (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  3430. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3431. false, false);
  3432. halbtc8723b2ant_sw_mechanism2(btcoexist, true, false,
  3433. false, 0x18);
  3434. } else {
  3435. halbtc8723b2ant_sw_mechanism1(btcoexist, false, true,
  3436. false, false);
  3437. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false,
  3438. false, 0x18);
  3439. }
  3440. }
  3441. }
  3442. void halbtc8723b2ant_action_bt_whck_test(IN struct btc_coexist *btcoexist)
  3443. {
  3444. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3445. /* sw all off */
  3446. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  3447. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  3448. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  3449. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  3450. }
  3451. void halbtc8723b2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
  3452. {
  3453. halbtc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
  3454. halbtc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3455. /* sw all off */
  3456. halbtc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
  3457. halbtc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
  3458. /* hw all off */
  3459. /* btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0); */
  3460. halbtc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  3461. halbtc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  3462. }
  3463. void halbtc8723b2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
  3464. {
  3465. u8 algorithm = 0;
  3466. u32 num_of_wifi_link = 0;
  3467. u32 wifi_link_status = 0;
  3468. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  3469. boolean miracast_plus_bt = false;
  3470. boolean scan = false, link = false, roam = false;
  3471. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3472. "[BTCoex], RunCoexistMechanism()===>\n");
  3473. BTC_TRACE(trace_buf);
  3474. if (btcoexist->manual_control) {
  3475. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3476. "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
  3477. BTC_TRACE(trace_buf);
  3478. return;
  3479. }
  3480. if (coex_sta->under_ips) {
  3481. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3482. "[BTCoex], wifi is under IPS !!!\n");
  3483. BTC_TRACE(trace_buf);
  3484. return;
  3485. }
  3486. if (coex_sta->bt_whck_test) {
  3487. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3488. "[BTCoex], BT is under WHCK TEST!!!\n");
  3489. BTC_TRACE(trace_buf);
  3490. halbtc8723b2ant_action_bt_whck_test(btcoexist);
  3491. return;
  3492. }
  3493. algorithm = halbtc8723b2ant_action_algorithm(btcoexist);
  3494. if (coex_sta->c2h_bt_inquiry_page &&
  3495. (BT_8723B_2ANT_COEX_ALGO_PANHS != algorithm)) {
  3496. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3497. "[BTCoex], BT is under inquiry/page scan !!\n");
  3498. BTC_TRACE(trace_buf);
  3499. halbtc8723b2ant_action_bt_inquiry(btcoexist);
  3500. return;
  3501. }
  3502. /*
  3503. if(coex_dm->need_recover0x948)
  3504. {
  3505. coex_dm->need_recover0x948 = false;
  3506. btcoexist->btc_write_4byte(btcoexist, 0x948, coex_dm->backup0x948);
  3507. }
  3508. */
  3509. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  3510. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  3511. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  3512. if (scan || link || roam) {
  3513. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3514. "[BTCoex], WiFi is under Link Process !!\n");
  3515. BTC_TRACE(trace_buf);
  3516. halbtc8723b2ant_action_wifi_link_process(btcoexist);
  3517. return;
  3518. }
  3519. /* for P2P */
  3520. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  3521. &wifi_link_status);
  3522. num_of_wifi_link = wifi_link_status >> 16;
  3523. if ((num_of_wifi_link >= 2) ||
  3524. (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
  3525. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3526. "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
  3527. num_of_wifi_link, wifi_link_status);
  3528. BTC_TRACE(trace_buf);
  3529. if (bt_link_info->bt_link_exist)
  3530. miracast_plus_bt = true;
  3531. else
  3532. miracast_plus_bt = false;
  3533. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  3534. &miracast_plus_bt);
  3535. halbtc8723b2ant_action_wifi_multi_port(btcoexist);
  3536. return;
  3537. }
  3538. miracast_plus_bt = false;
  3539. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  3540. &miracast_plus_bt);
  3541. coex_dm->cur_algorithm = algorithm;
  3542. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
  3543. coex_dm->cur_algorithm);
  3544. BTC_TRACE(trace_buf);
  3545. if (halbtc8723b2ant_is_common_action(btcoexist)) {
  3546. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3547. "[BTCoex], Action 2-Ant common.\n");
  3548. BTC_TRACE(trace_buf);
  3549. coex_dm->auto_tdma_adjust = false;
  3550. } else {
  3551. if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
  3552. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3553. "[BTCoex], pre_algorithm=%d, cur_algorithm=%d\n",
  3554. coex_dm->pre_algorithm, coex_dm->cur_algorithm);
  3555. BTC_TRACE(trace_buf);
  3556. coex_dm->auto_tdma_adjust = false;
  3557. }
  3558. switch (coex_dm->cur_algorithm) {
  3559. case BT_8723B_2ANT_COEX_ALGO_SCO:
  3560. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3561. "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
  3562. BTC_TRACE(trace_buf);
  3563. halbtc8723b2ant_action_sco(btcoexist);
  3564. break;
  3565. case BT_8723B_2ANT_COEX_ALGO_HID:
  3566. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3567. "[BTCoex], Action 2-Ant, algorithm = HID.\n");
  3568. BTC_TRACE(trace_buf);
  3569. halbtc8723b2ant_action_hid(btcoexist);
  3570. break;
  3571. case BT_8723B_2ANT_COEX_ALGO_A2DP:
  3572. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3573. "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
  3574. BTC_TRACE(trace_buf);
  3575. halbtc8723b2ant_action_a2dp(btcoexist);
  3576. break;
  3577. case BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS:
  3578. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3579. "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
  3580. BTC_TRACE(trace_buf);
  3581. halbtc8723b2ant_action_a2dp_pan_hs(btcoexist);
  3582. break;
  3583. case BT_8723B_2ANT_COEX_ALGO_PANEDR:
  3584. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3585. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
  3586. BTC_TRACE(trace_buf);
  3587. halbtc8723b2ant_action_pan_edr(btcoexist);
  3588. break;
  3589. case BT_8723B_2ANT_COEX_ALGO_PANHS:
  3590. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3591. "[BTCoex], Action 2-Ant, algorithm = HS mode.\n");
  3592. BTC_TRACE(trace_buf);
  3593. halbtc8723b2ant_action_pan_hs(btcoexist);
  3594. break;
  3595. case BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP:
  3596. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3597. "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
  3598. BTC_TRACE(trace_buf);
  3599. halbtc8723b2ant_action_pan_edr_a2dp(btcoexist);
  3600. break;
  3601. case BT_8723B_2ANT_COEX_ALGO_PANEDR_HID:
  3602. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3603. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
  3604. BTC_TRACE(trace_buf);
  3605. halbtc8723b2ant_action_pan_edr_hid(btcoexist);
  3606. break;
  3607. case BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
  3608. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3609. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
  3610. BTC_TRACE(trace_buf);
  3611. halbtc8723b2ant_action_hid_a2dp_pan_edr(
  3612. btcoexist);
  3613. break;
  3614. case BT_8723B_2ANT_COEX_ALGO_HID_A2DP:
  3615. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3616. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
  3617. BTC_TRACE(trace_buf);
  3618. halbtc8723b2ant_action_hid_a2dp(btcoexist);
  3619. break;
  3620. default:
  3621. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3622. "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
  3623. BTC_TRACE(trace_buf);
  3624. halbtc8723b2ant_coex_all_off(btcoexist);
  3625. break;
  3626. }
  3627. coex_dm->pre_algorithm = coex_dm->cur_algorithm;
  3628. }
  3629. }
  3630. void halbtc8723b2ant_wifi_off_hw_cfg(IN struct btc_coexist *btcoexist)
  3631. {
  3632. boolean is_in_mp_mode = false;
  3633. u8 h2c_parameter[2] = {0};
  3634. u32 fw_ver = 0;
  3635. /* set wlan_act to low */
  3636. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  3637. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
  3638. 0x780); /* WiFi goto standby while GNT_BT 0-->1 */
  3639. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3640. if (fw_ver >= 0x180000) {
  3641. /* Use H2C to set GNT_BT to HIGH */
  3642. h2c_parameter[0] = 1;
  3643. btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter);
  3644. } else
  3645. btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
  3646. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_IS_IN_MP_MODE,
  3647. &is_in_mp_mode);
  3648. if (!is_in_mp_mode)
  3649. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
  3650. 0x0); /* BT select s0/s1 is controlled by BT */
  3651. else
  3652. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20,
  3653. 0x1); /* BT select s0/s1 is controlled by WiFi */
  3654. }
  3655. void halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3656. IN boolean back_up)
  3657. {
  3658. u8 u8tmp = 0;
  3659. u32 vendor;
  3660. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3661. "[BTCoex], 2Ant Init HW Config!!\n");
  3662. BTC_TRACE(trace_buf);
  3663. btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
  3664. if (vendor == BTC_VENDOR_LENOVO)
  3665. coex_dm->switch_thres_offset = 0;
  3666. else if (vendor == BTC_VENDOR_ASUS)
  3667. coex_dm->switch_thres_offset = 0;
  3668. else
  3669. coex_dm->switch_thres_offset = 20;
  3670. /* 0xf0[15:12] --> Chip Cut information */
  3671. coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
  3672. 0xf1) & 0xf0) >> 4;
  3673. /* backup rf 0x1e value */
  3674. coex_dm->bt_rf_0x1e_backup =
  3675. btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A, 0x1e, 0xfffff);
  3676. /* 0x790[5:0]=0x5 */
  3677. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
  3678. u8tmp &= 0xc0;
  3679. u8tmp |= 0x5;
  3680. btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
  3681. /* Antenna config */
  3682. halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true,
  3683. false);
  3684. coex_sta->dis_ver_info_cnt = 0;
  3685. /* PTA parameter */
  3686. halbtc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  3687. /* Enable counter statistics */
  3688. btcoexist->btc_write_1byte(btcoexist, 0x76e,
  3689. 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
  3690. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
  3691. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
  3692. /* Give bt_coex_supported_version the default value */
  3693. coex_sta->bt_coex_supported_version = 0;
  3694. }
  3695. /* ************************************************************
  3696. * work around function start with wa_halbtc8723b2ant_
  3697. * ************************************************************
  3698. * ************************************************************
  3699. * extern function start with ex_halbtc8723b2ant_
  3700. * ************************************************************ */
  3701. void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist)
  3702. {
  3703. struct btc_board_info *board_info = &btcoexist->board_info;
  3704. u16 u16tmp = 0x0;
  3705. u32 value = 0;
  3706. u32 u32tmp_1[4];
  3707. btcoexist->btc_write_1byte(btcoexist, 0x67, 0x20);
  3708. /* enable BB, REG_SYS_FUNC_EN such that we can write 0x948 correctly. */
  3709. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
  3710. btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
  3711. btcoexist->btc_write_4byte(btcoexist, 0x948, 0x0);
  3712. if (btcoexist->chip_interface == BTC_INTF_USB) {
  3713. /* fixed at S0 for USB interface */
  3714. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  3715. } else {
  3716. /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
  3717. if (board_info->single_ant_path == 0) {
  3718. /* set to S1 */
  3719. board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
  3720. } else if (board_info->single_ant_path == 1) {
  3721. /* set to S0 */
  3722. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  3723. }
  3724. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
  3725. &value);
  3726. }
  3727. }
  3728. void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
  3729. {
  3730. struct btc_board_info *board_info = &btcoexist->board_info;
  3731. u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
  3732. /* */
  3733. /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
  3734. /* Local setting bit define */
  3735. /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
  3736. /* BIT1: "0" for internal switch; "1" for external switch */
  3737. /* BIT2: "0" for one antenna; "1" for two antenna */
  3738. /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
  3739. if (btcoexist->chip_interface == BTC_INTF_USB) {
  3740. /* fixed at S0 for USB interface */
  3741. u8tmp |= 0x1; /* antenna inverse */
  3742. btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
  3743. } else {
  3744. if (board_info->single_ant_path == 1) {
  3745. /* set to S0 */
  3746. u8tmp |= 0x1; /* antenna inverse */
  3747. }
  3748. if (btcoexist->chip_interface == BTC_INTF_PCI)
  3749. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x384,
  3750. u8tmp);
  3751. else if (btcoexist->chip_interface == BTC_INTF_SDIO)
  3752. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
  3753. u8tmp);
  3754. }
  3755. }
  3756. void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3757. IN boolean wifi_only)
  3758. {
  3759. halbtc8723b2ant_init_hw_config(btcoexist, true);
  3760. }
  3761. void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  3762. {
  3763. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3764. "[BTCoex], Coex Mechanism Init!!\n");
  3765. BTC_TRACE(trace_buf);
  3766. halbtc8723b2ant_init_coex_dm(btcoexist);
  3767. }
  3768. void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist)
  3769. {
  3770. struct btc_board_info *board_info = &btcoexist->board_info;
  3771. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  3772. u8 *cli_buf = btcoexist->cli_buf;
  3773. u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
  3774. u32 u32tmp[4];
  3775. u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck;
  3776. u32 fw_ver = 0, bt_patch_ver = 0;
  3777. u32 bt_coex_ver = 0;
  3778. static u8 pop_report_in_10s = 0;
  3779. u32 phyver = 0;
  3780. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3781. "\r\n ============[BT Coexist info]============");
  3782. CL_PRINTF(cli_buf);
  3783. if (btcoexist->manual_control) {
  3784. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3785. "\r\n ============[Under Manual Control]============");
  3786. CL_PRINTF(cli_buf);
  3787. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3788. "\r\n ==========================================");
  3789. CL_PRINTF(cli_buf);
  3790. }
  3791. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
  3792. "Ant PG number/ Ant mechanism:",
  3793. board_info->pg_ant_num, board_info->btdm_ant_num);
  3794. CL_PRINTF(cli_buf);
  3795. /* btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver); */
  3796. bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
  3797. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3798. phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
  3799. bt_coex_ver = coex_sta->bt_coex_supported_version & 0xff;
  3800. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3801. "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
  3802. "CoexVer WL/ BT_Desired/ BT_Report",
  3803. glcoex_ver_date_8723b_2ant, glcoex_ver_8723b_2ant,
  3804. glcoex_ver_btdesired_8723b_2ant,
  3805. bt_coex_ver,
  3806. (bt_coex_ver == 0xff ? "Unknown" :
  3807. (bt_coex_ver >= glcoex_ver_btdesired_8723b_2ant ?
  3808. "Match" : "Mis-Match")));
  3809. CL_PRINTF(cli_buf);
  3810. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3811. "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
  3812. "W_FW/ B_FW/ Phy/ Kt",
  3813. fw_ver, bt_patch_ver, phyver,
  3814. coex_sta->cut_version + 65);
  3815. CL_PRINTF(cli_buf);
  3816. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
  3817. "Wifi channel informed to BT",
  3818. coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
  3819. coex_dm->wifi_chnl_info[2]);
  3820. CL_PRINTF(cli_buf);
  3821. /* wifi status */
  3822. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3823. "============[Wifi Status]============");
  3824. CL_PRINTF(cli_buf);
  3825. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
  3826. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3827. "============[BT Status]============");
  3828. CL_PRINTF(cli_buf);
  3829. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3830. "BT Abnormal scan",
  3831. (coex_sta->bt_abnormal_scan) ? "Yes" : "No");
  3832. CL_PRINTF(cli_buf);
  3833. pop_report_in_10s++;
  3834. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = [%s/ %d/ %d/ %d] ",
  3835. "BT [status/ rssi/ retryCnt/ popCnt]",
  3836. ((coex_sta->bt_disabled) ? ("disabled") : ((
  3837. coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page scan")
  3838. : ((BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  3839. coex_dm->bt_status) ? "non-connected idle" :
  3840. ((BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
  3841. ? "connected-idle" : "busy")))),
  3842. coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
  3843. coex_sta->pop_event_cnt);
  3844. CL_PRINTF(cli_buf);
  3845. if (pop_report_in_10s >= 5) {
  3846. coex_sta->pop_event_cnt = 0;
  3847. pop_report_in_10s = 0;
  3848. }
  3849. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3850. "\r\n %-35s = %d / %d / %d / %d / %d / %d",
  3851. "SCO/HID/PAN/A2DP/NameReq/WHQL",
  3852. bt_link_info->sco_exist, bt_link_info->hid_exist,
  3853. bt_link_info->pan_exist, bt_link_info->a2dp_exist,
  3854. coex_sta->c2h_bt_remote_name_req,
  3855. coex_sta->bt_whck_test);
  3856. CL_PRINTF(cli_buf);
  3857. {
  3858. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s",
  3859. "BT Role",
  3860. (bt_link_info->slave_role) ? "Slave" : "Master");
  3861. CL_PRINTF(cli_buf);
  3862. }
  3863. bt_info_ext = coex_sta->bt_info_ext;
  3864. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %d",
  3865. "A2DP Rate/Bitpool",
  3866. (bt_info_ext & BIT(0)) ? "BR" : "EDR", coex_sta->a2dp_bit_pool);
  3867. CL_PRINTF(cli_buf);
  3868. for (i = 0; i < BT_INFO_SRC_8723B_2ANT_MAX; i++) {
  3869. if (coex_sta->bt_info_c2h_cnt[i]) {
  3870. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3871. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x(%d)",
  3872. glbt_info_src_8723b_2ant[i],
  3873. coex_sta->bt_info_c2h[i][0],
  3874. coex_sta->bt_info_c2h[i][1],
  3875. coex_sta->bt_info_c2h[i][2],
  3876. coex_sta->bt_info_c2h[i][3],
  3877. coex_sta->bt_info_c2h[i][4],
  3878. coex_sta->bt_info_c2h[i][5],
  3879. coex_sta->bt_info_c2h[i][6],
  3880. coex_sta->bt_info_c2h_cnt[i]);
  3881. CL_PRINTF(cli_buf);
  3882. }
  3883. }
  3884. /* Sw mechanism */
  3885. if (btcoexist->manual_control)
  3886. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3887. "============[Sw mechanism] (before Manual)============");
  3888. else
  3889. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3890. "============[Sw mechanism]============");
  3891. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d ",
  3892. "SM1[ShRf/ LpRA/ LimDig]",
  3893. coex_dm->cur_rf_rx_lpf_shrink, coex_dm->cur_low_penalty_ra,
  3894. coex_dm->limited_dig);
  3895. CL_PRINTF(cli_buf);
  3896. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
  3897. "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
  3898. coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
  3899. coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
  3900. CL_PRINTF(cli_buf);
  3901. /* Fw mechanism */
  3902. if (btcoexist->manual_control)
  3903. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3904. "============[Fw mechanism] (before Manual) ============");
  3905. else
  3906. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3907. "============[Fw mechanism]============");
  3908. ps_tdma_case = coex_dm->cur_ps_tdma;
  3909. if (coex_dm->is_switch_to_1dot5_ant)
  3910. ps_tdma_case = ps_tdma_case + 100;
  3911. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3912. "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (%s,%s)",
  3913. "PS TDMA",
  3914. coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
  3915. coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
  3916. coex_dm->ps_tdma_para[4], ps_tdma_case,
  3917. (coex_dm->cur_ps_tdma_on ? "On" : "Off"),
  3918. (coex_dm->auto_tdma_adjust ? "Adj" : "Fix"));
  3919. CL_PRINTF(cli_buf);
  3920. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3921. "Coex Table Type",
  3922. coex_sta->coex_table_type);
  3923. CL_PRINTF(cli_buf);
  3924. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d ",
  3925. "DecBtPwr/ IgnWlanAct",
  3926. coex_dm->cur_bt_dec_pwr_lvl, coex_dm->cur_ignore_wlan_act);
  3927. CL_PRINTF(cli_buf);
  3928. /* Hw setting */
  3929. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  3930. "============[Hw setting]============");
  3931. CL_PRINTF(cli_buf);
  3932. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x",
  3933. "RF-A, 0x1e initVal",
  3934. coex_dm->bt_rf_0x1e_backup);
  3935. CL_PRINTF(cli_buf);
  3936. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  3937. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x880);
  3938. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3939. "0x778/0x880[29:25]",
  3940. u8tmp[0], (u32tmp[0] & 0x3e000000) >> 25);
  3941. CL_PRINTF(cli_buf);
  3942. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x948);
  3943. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
  3944. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x765);
  3945. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3946. "0x948/ 0x67[5] / 0x765",
  3947. u32tmp[0], ((u8tmp[0] & 0x20) >> 5), u8tmp[1]);
  3948. CL_PRINTF(cli_buf);
  3949. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x92c);
  3950. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x930);
  3951. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x944);
  3952. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3953. "0x92c[1:0]/ 0x930[7:0]/0x944[1:0]",
  3954. u32tmp[0] & 0x3, u32tmp[1] & 0xff, u32tmp[2] & 0x3);
  3955. CL_PRINTF(cli_buf);
  3956. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x39);
  3957. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  3958. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x4c);
  3959. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x64);
  3960. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3961. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3962. "0x38[11]/0x40/0x4c[24:23]/0x64[0]",
  3963. ((u8tmp[0] & 0x8) >> 3), u8tmp[1],
  3964. ((u32tmp[0] & 0x01800000) >> 23), u8tmp[2] & 0x1);
  3965. CL_PRINTF(cli_buf);
  3966. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  3967. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  3968. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3969. "0x550(bcn ctrl)/0x522",
  3970. u32tmp[0], u8tmp[0]);
  3971. CL_PRINTF(cli_buf);
  3972. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
  3973. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x49c);
  3974. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  3975. "0xc50(dig)/0x49c(null-drop)",
  3976. u32tmp[0] & 0xff, u8tmp[0]);
  3977. CL_PRINTF(cli_buf);
  3978. fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3979. PHYDM_INFO_FA_OFDM);
  3980. fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3981. PHYDM_INFO_FA_CCK);
  3982. cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3983. PHYDM_INFO_CCA_OFDM);
  3984. cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist,
  3985. PHYDM_INFO_CCA_CCK);
  3986. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3987. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3988. "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
  3989. cca_cck, fa_cck, cca_ofdm, fa_ofdm);
  3990. CL_PRINTF(cli_buf);
  3991. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3992. "CRC_OK CCK/11g/11n/11n-agg",
  3993. coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
  3994. coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
  3995. CL_PRINTF(cli_buf);
  3996. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  3997. "CRC_Err CCK/11g/11n/11n-agg",
  3998. coex_sta->crc_err_cck, coex_sta->crc_err_11g,
  3999. coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
  4000. CL_PRINTF(cli_buf);
  4001. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  4002. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  4003. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  4004. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
  4005. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4006. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4007. "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
  4008. u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
  4009. CL_PRINTF(cli_buf);
  4010. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4011. "0x770(high-pri rx/tx)",
  4012. coex_sta->high_priority_rx, coex_sta->high_priority_tx);
  4013. CL_PRINTF(cli_buf);
  4014. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4015. "0x774(low-pri rx/tx)",
  4016. coex_sta->low_priority_rx, coex_sta->low_priority_tx);
  4017. CL_PRINTF(cli_buf);
  4018. #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1)
  4019. /* halbtc8723b2ant_monitor_bt_ctr(btcoexist); */
  4020. #endif
  4021. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  4022. }
  4023. void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4024. {
  4025. if (BTC_IPS_ENTER == type) {
  4026. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4027. "[BTCoex], IPS ENTER notify\n");
  4028. BTC_TRACE(trace_buf);
  4029. coex_sta->under_ips = true;
  4030. halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
  4031. halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  4032. halbtc8723b2ant_coex_all_off(btcoexist);
  4033. } else if (BTC_IPS_LEAVE == type) {
  4034. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4035. "[BTCoex], IPS LEAVE notify\n");
  4036. BTC_TRACE(trace_buf);
  4037. coex_sta->under_ips = false;
  4038. halbtc8723b2ant_init_hw_config(btcoexist, false);
  4039. halbtc8723b2ant_init_coex_dm(btcoexist);
  4040. halbtc8723b2ant_query_bt_info(btcoexist);
  4041. }
  4042. }
  4043. void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4044. {
  4045. if (BTC_LPS_ENABLE == type) {
  4046. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4047. "[BTCoex], LPS ENABLE notify\n");
  4048. BTC_TRACE(trace_buf);
  4049. coex_sta->under_lps = true;
  4050. } else if (BTC_LPS_DISABLE == type) {
  4051. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4052. "[BTCoex], LPS DISABLE notify\n");
  4053. BTC_TRACE(trace_buf);
  4054. coex_sta->under_lps = false;
  4055. }
  4056. }
  4057. void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
  4058. IN u8 type)
  4059. {
  4060. u32 u32tmp;
  4061. u8 u8tmpa, u8tmpb;
  4062. u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x948);
  4063. u8tmpa = btcoexist->btc_read_1byte(btcoexist, 0x765);
  4064. u8tmpb = btcoexist->btc_read_1byte(btcoexist, 0x76e);
  4065. if (BTC_SCAN_START == type) {
  4066. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4067. "[BTCoex], SCAN START notify\n");
  4068. BTC_TRACE(trace_buf);
  4069. halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
  4070. false, false);
  4071. } else if (BTC_SCAN_FINISH == type) {
  4072. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4073. "[BTCoex], SCAN FINISH notify\n");
  4074. BTC_TRACE(trace_buf);
  4075. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  4076. &coex_sta->scan_ap_num);
  4077. }
  4078. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4079. "############# [BTCoex], 0x948=0x%x, 0x765=0x%x, 0x76e=0x%x\n",
  4080. u32tmp, u8tmpa, u8tmpb);
  4081. BTC_TRACE(trace_buf);
  4082. }
  4083. void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
  4084. IN u8 type)
  4085. {
  4086. if (BTC_ASSOCIATE_START == type) {
  4087. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4088. "[BTCoex], CONNECT START notify\n");
  4089. BTC_TRACE(trace_buf);
  4090. halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
  4091. false, false);
  4092. } else if (BTC_ASSOCIATE_FINISH == type) {
  4093. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4094. "[BTCoex], CONNECT FINISH notify\n");
  4095. BTC_TRACE(trace_buf);
  4096. }
  4097. }
  4098. void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
  4099. IN u8 type)
  4100. {
  4101. u8 h2c_parameter[3] = {0};
  4102. u32 wifi_bw;
  4103. u8 wifi_central_chnl;
  4104. u8 ap_num = 0;
  4105. if (BTC_MEDIA_CONNECT == type) {
  4106. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4107. "[BTCoex], MEDIA connect notify\n");
  4108. BTC_TRACE(trace_buf);
  4109. halbtc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
  4110. false, false);
  4111. } else {
  4112. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4113. "[BTCoex], MEDIA disconnect notify\n");
  4114. BTC_TRACE(trace_buf);
  4115. }
  4116. /* only 2.4G we need to inform bt the chnl mask */
  4117. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  4118. &wifi_central_chnl);
  4119. if ((BTC_MEDIA_CONNECT == type) &&
  4120. (wifi_central_chnl <= 14)) {
  4121. h2c_parameter[0] = 0x1;
  4122. h2c_parameter[1] = wifi_central_chnl;
  4123. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  4124. if (BTC_WIFI_BW_HT40 == wifi_bw)
  4125. h2c_parameter[2] = 0x30;
  4126. else {
  4127. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  4128. &ap_num);
  4129. if (ap_num < 10)
  4130. h2c_parameter[2] = 0x30;
  4131. else
  4132. h2c_parameter[2] = 0x20;
  4133. }
  4134. }
  4135. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  4136. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  4137. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  4138. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  4139. }
  4140. void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
  4141. IN u8 type)
  4142. {
  4143. if (type == BTC_PACKET_DHCP) {
  4144. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4145. "[BTCoex], DHCP Packet notify\n");
  4146. BTC_TRACE(trace_buf);
  4147. }
  4148. }
  4149. void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
  4150. IN u8 *tmp_buf, IN u8 length)
  4151. {
  4152. u8 bt_info = 0;
  4153. u8 i, rsp_source = 0;
  4154. boolean bt_busy = false, limited_dig = false;
  4155. boolean wifi_connected = false;
  4156. coex_sta->c2h_bt_info_req_sent = false;
  4157. rsp_source = tmp_buf[0] & 0xf;
  4158. if (rsp_source >= BT_INFO_SRC_8723B_2ANT_MAX)
  4159. rsp_source = BT_INFO_SRC_8723B_2ANT_WIFI_FW;
  4160. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  4161. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4162. "[BTCoex], Bt info[%d], length=%d, hex data=[", rsp_source,
  4163. length);
  4164. BTC_TRACE(trace_buf);
  4165. for (i = 0; i < length; i++) {
  4166. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  4167. if (i == 1)
  4168. bt_info = tmp_buf[i];
  4169. if (i == length - 1) {
  4170. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
  4171. tmp_buf[i]);
  4172. BTC_TRACE(trace_buf);
  4173. } else {
  4174. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
  4175. tmp_buf[i]);
  4176. BTC_TRACE(trace_buf);
  4177. }
  4178. }
  4179. if (btcoexist->manual_control) {
  4180. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4181. "[BTCoex], BtInfoNotify(), return for Manual CTRL<===\n");
  4182. BTC_TRACE(trace_buf);
  4183. return;
  4184. }
  4185. /* if 0xff, it means BT is under WHCK test */
  4186. if (bt_info == 0xff)
  4187. coex_sta->bt_whck_test = true;
  4188. else
  4189. coex_sta->bt_whck_test = false;
  4190. if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
  4191. coex_sta->bt_retry_cnt = /* [3:0] */
  4192. coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
  4193. if (coex_sta->bt_retry_cnt >= 1)
  4194. coex_sta->pop_event_cnt++;
  4195. coex_sta->bt_rssi =
  4196. coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
  4197. coex_sta->bt_info_ext =
  4198. coex_sta->bt_info_c2h[rsp_source][4];
  4199. if (coex_sta->bt_info_c2h[rsp_source][2] & 0x20)
  4200. coex_sta->c2h_bt_remote_name_req = true;
  4201. else
  4202. coex_sta->c2h_bt_remote_name_req = false;
  4203. if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49) {
  4204. coex_sta->a2dp_bit_pool =
  4205. coex_sta->bt_info_c2h[rsp_source][6];
  4206. } else
  4207. coex_sta->a2dp_bit_pool = 0;
  4208. coex_sta->bt_tx_rx_mask = (coex_sta->bt_info_c2h[rsp_source][2]
  4209. & 0x40);
  4210. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TX_RX_MASK,
  4211. &coex_sta->bt_tx_rx_mask);
  4212. if (coex_sta->bt_tx_rx_mask) {
  4213. /* BT into is responded by BT FW and BT RF REG 0x3C != 0x01 => Need to switch BT TRx Mask */
  4214. /* BT TRx mask off */
  4215. btcoexist->btc_set_bt_trx_mask(btcoexist, 0);
  4216. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4217. "############# [BTCoex], BT TRx Mask off for BT Info Notify\n");
  4218. BTC_TRACE(trace_buf);
  4219. #if 0
  4220. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4221. "[BTCoex], Switch BT TRx Mask since BT RF REG 0x3C != 0x01\n");
  4222. BTC_TRACE(trace_buf);
  4223. btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF,
  4224. 0x3c, 0x01);
  4225. #endif
  4226. }
  4227. /* Here we need to resend some wifi info to BT */
  4228. /* because bt is reset and loss of the info. */
  4229. if ((coex_sta->bt_info_ext & BIT(1))) {
  4230. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4231. "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
  4232. BTC_TRACE(trace_buf);
  4233. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4234. &wifi_connected);
  4235. if (wifi_connected)
  4236. ex_halbtc8723b2ant_media_status_notify(
  4237. btcoexist, BTC_MEDIA_CONNECT);
  4238. else
  4239. ex_halbtc8723b2ant_media_status_notify(
  4240. btcoexist, BTC_MEDIA_DISCONNECT);
  4241. }
  4242. if ((coex_sta->bt_info_ext & BIT(3))) {
  4243. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4244. "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
  4245. BTC_TRACE(trace_buf);
  4246. halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC,
  4247. false);
  4248. } else {
  4249. /* BT already NOT ignore Wlan active, do nothing here. */
  4250. }
  4251. #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
  4252. if ((coex_sta->bt_info_ext & BIT(4))) {
  4253. /* BT auto report already enabled, do nothing */
  4254. } else
  4255. halbtc8723b2ant_bt_auto_report(btcoexist, FORCE_EXEC,
  4256. true);
  4257. #endif
  4258. }
  4259. /* check BIT2 first ==> check if bt is under inquiry or page scan */
  4260. if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
  4261. coex_sta->c2h_bt_inquiry_page = true;
  4262. else
  4263. coex_sta->c2h_bt_inquiry_page = false;
  4264. /* set link exist status */
  4265. if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
  4266. coex_sta->bt_link_exist = false;
  4267. coex_sta->pan_exist = false;
  4268. coex_sta->a2dp_exist = false;
  4269. coex_sta->hid_exist = false;
  4270. coex_sta->sco_exist = false;
  4271. } else { /* connection exists */
  4272. coex_sta->bt_link_exist = true;
  4273. if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
  4274. coex_sta->pan_exist = true;
  4275. else
  4276. coex_sta->pan_exist = false;
  4277. if (bt_info & BT_INFO_8723B_2ANT_B_A2DP)
  4278. coex_sta->a2dp_exist = true;
  4279. else
  4280. coex_sta->a2dp_exist = false;
  4281. if (bt_info & BT_INFO_8723B_2ANT_B_HID)
  4282. coex_sta->hid_exist = true;
  4283. else
  4284. coex_sta->hid_exist = false;
  4285. if (bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO)
  4286. coex_sta->sco_exist = true;
  4287. else
  4288. coex_sta->sco_exist = false;
  4289. if ((coex_sta->hid_exist == false) &&
  4290. (coex_sta->c2h_bt_inquiry_page == false) &&
  4291. (coex_sta->sco_exist == false)) {
  4292. if (coex_sta->high_priority_tx +
  4293. coex_sta->high_priority_rx >= 160) {
  4294. coex_sta->hid_exist = true;
  4295. bt_info = bt_info | 0x28;
  4296. }
  4297. }
  4298. }
  4299. halbtc8723b2ant_update_bt_link_info(btcoexist);
  4300. if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
  4301. coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
  4302. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4303. "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
  4304. BTC_TRACE(trace_buf);
  4305. } else if (bt_info ==
  4306. BT_INFO_8723B_2ANT_B_CONNECTION) { /* connection exists but no busy */
  4307. coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE;
  4308. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4309. "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
  4310. BTC_TRACE(trace_buf);
  4311. } else if ((bt_info & BT_INFO_8723B_2ANT_B_SCO_ESCO) ||
  4312. (bt_info & BT_INFO_8723B_2ANT_B_SCO_BUSY)) {
  4313. coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_SCO_BUSY;
  4314. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4315. "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
  4316. BTC_TRACE(trace_buf);
  4317. } else if (bt_info & BT_INFO_8723B_2ANT_B_ACL_BUSY) {
  4318. coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_ACL_BUSY;
  4319. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4320. "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
  4321. BTC_TRACE(trace_buf);
  4322. } else {
  4323. coex_dm->bt_status = BT_8723B_2ANT_BT_STATUS_MAX;
  4324. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4325. "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
  4326. BTC_TRACE(trace_buf);
  4327. }
  4328. if ((BT_8723B_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  4329. (BT_8723B_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  4330. (BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
  4331. bt_busy = true;
  4332. limited_dig = true;
  4333. } else {
  4334. bt_busy = false;
  4335. limited_dig = false;
  4336. }
  4337. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  4338. coex_dm->limited_dig = limited_dig;
  4339. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
  4340. halbtc8723b2ant_run_coexist_mechanism(btcoexist);
  4341. }
  4342. void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist)
  4343. {
  4344. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
  4345. BTC_TRACE(trace_buf);
  4346. halbtc8723b2ant_wifi_off_hw_cfg(btcoexist);
  4347. /* remove due to interrupt is disabled that polling c2h will fail and delay 100ms. */
  4348. /* btcoexist->btc_set_bt_reg(btcoexist, BTC_BT_REG_RF, 0x3c, 0x15); */ /*BT goto standby while GNT_BT 1-->0 */
  4349. halbtc8723b2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
  4350. ex_halbtc8723b2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  4351. }
  4352. void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
  4353. IN u8 pnp_state)
  4354. {
  4355. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
  4356. BTC_TRACE(trace_buf);
  4357. if (BTC_WIFI_PNP_SLEEP == pnp_state) {
  4358. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4359. "[BTCoex], Pnp notify to SLEEP\n");
  4360. BTC_TRACE(trace_buf);
  4361. /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
  4362. /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
  4363. /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
  4364. coex_sta->under_ips = false;
  4365. coex_sta->under_lps = false;
  4366. } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
  4367. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4368. "[BTCoex], Pnp notify to WAKE UP\n");
  4369. BTC_TRACE(trace_buf);
  4370. halbtc8723b2ant_init_hw_config(btcoexist, false);
  4371. halbtc8723b2ant_init_coex_dm(btcoexist);
  4372. halbtc8723b2ant_query_bt_info(btcoexist);
  4373. }
  4374. }
  4375. void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist)
  4376. {
  4377. u32 bt_patch_ver;
  4378. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  4379. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4380. "[BTCoex], ==========================Periodical===========================\n");
  4381. BTC_TRACE(trace_buf);
  4382. if (coex_sta->dis_ver_info_cnt <= 5) {
  4383. coex_sta->dis_ver_info_cnt += 1;
  4384. if (coex_sta->dis_ver_info_cnt == 3) {
  4385. /* Antenna config to set 0x765 = 0x0 (GNT_BT control by PTA) after initial */
  4386. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4387. "[BTCoex], Set GNT_BT control by PTA\n");
  4388. BTC_TRACE(trace_buf);
  4389. halbtc8723b2ant_set_ant_path(btcoexist,
  4390. BTC_ANT_WIFI_AT_MAIN, false, false);
  4391. }
  4392. }
  4393. if (((coex_sta->bt_coex_supported_version == 0) ||
  4394. (coex_sta->bt_coex_supported_version == 0xffff)) && (!coex_sta->bt_disabled))
  4395. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION, &coex_sta->bt_coex_supported_version);
  4396. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
  4397. btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
  4398. #if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
  4399. halbtc8723b2ant_query_bt_info(btcoexist);
  4400. halbtc8723b2ant_monitor_bt_enable_disable(btcoexist);
  4401. #else
  4402. halbtc8723b2ant_monitor_bt_ctr(btcoexist);
  4403. halbtc8723b2ant_monitor_wifi_ctr(btcoexist);
  4404. /* for some BT speaker that Hi-Pri pkt appear begore start play, this will cause HID exist */
  4405. if ((coex_sta->high_priority_tx + coex_sta->high_priority_rx < 50) &&
  4406. (bt_link_info->hid_exist == true))
  4407. bt_link_info->hid_exist = false;
  4408. if (halbtc8723b2ant_is_wifi_status_changed(btcoexist) ||
  4409. coex_dm->auto_tdma_adjust)
  4410. halbtc8723b2ant_run_coexist_mechanism(btcoexist);
  4411. #endif
  4412. }
  4413. #endif
  4414. #endif /* #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1) */