halbtc8723d2ant.c 192 KB

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  1. /* ************************************************************
  2. * Description:
  3. *
  4. * This file is for RTL8723D Co-exist mechanism
  5. *
  6. * History
  7. * 2012/11/15 Cosa first check in.
  8. *
  9. * ************************************************************ */
  10. /* ************************************************************
  11. * include files
  12. * ************************************************************ */
  13. #include "mp_precomp.h"
  14. #if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
  15. #if (RTL8723D_SUPPORT == 1)
  16. /* ************************************************************
  17. * Global variables, these are static variables
  18. * ************************************************************ */
  19. static u8 *trace_buf = &gl_btc_trace_buf[0];
  20. static struct coex_dm_8723d_2ant glcoex_dm_8723d_2ant;
  21. static struct coex_dm_8723d_2ant *coex_dm = &glcoex_dm_8723d_2ant;
  22. static struct coex_sta_8723d_2ant glcoex_sta_8723d_2ant;
  23. static struct coex_sta_8723d_2ant *coex_sta = &glcoex_sta_8723d_2ant;
  24. static struct psdscan_sta_8723d_2ant gl_psd_scan_8723d_2ant;
  25. static struct psdscan_sta_8723d_2ant *psd_scan = &gl_psd_scan_8723d_2ant;
  26. const char *const glbt_info_src_8723d_2ant[] = {
  27. "BT Info[wifi fw]",
  28. "BT Info[bt rsp]",
  29. "BT Info[bt auto report]",
  30. };
  31. /* ************************************************************
  32. * BtCoex Version Format:
  33. * 1. date : glcoex_ver_date_XXXXX_1ant
  34. * 2. WifiCoexVersion : glcoex_ver_XXXX_1ant
  35. * 3. BtCoexVersion : glcoex_ver_btdesired_XXXXX_1ant
  36. * 4. others : glcoex_ver_XXXXXX_XXXXX_1ant
  37. *
  38. * Variable should be indicated IC and Antenna numbers !!!
  39. * Please strictly follow this order and naming style !!!
  40. *
  41. * ************************************************************ */
  42. u32 glcoex_ver_date_8723d_2ant = 20161220;
  43. u32 glcoex_ver_8723d_2ant = 0x13;
  44. u32 glcoex_ver_btdesired_8723d_2ant = 0x10;
  45. /* ************************************************************
  46. * local function proto type if needed
  47. * ************************************************************
  48. * ************************************************************
  49. * local function start with halbtc8723d2ant_
  50. * ************************************************************ */
  51. u8 halbtc8723d2ant_bt_rssi_state(u8 *ppre_bt_rssi_state, u8 level_num,
  52. u8 rssi_thresh, u8 rssi_thresh1)
  53. {
  54. s32 bt_rssi = 0;
  55. u8 bt_rssi_state = *ppre_bt_rssi_state;
  56. bt_rssi = coex_sta->bt_rssi;
  57. if (level_num == 2) {
  58. if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  59. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  60. if (bt_rssi >= (rssi_thresh +
  61. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  62. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  63. else
  64. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  65. } else {
  66. if (bt_rssi < rssi_thresh)
  67. bt_rssi_state = BTC_RSSI_STATE_LOW;
  68. else
  69. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  70. }
  71. } else if (level_num == 3) {
  72. if (rssi_thresh > rssi_thresh1) {
  73. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  74. "[BTCoex], BT Rssi thresh error!!\n");
  75. BTC_TRACE(trace_buf);
  76. return *ppre_bt_rssi_state;
  77. }
  78. if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  79. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  80. if (bt_rssi >= (rssi_thresh +
  81. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  82. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  83. else
  84. bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  85. } else if ((*ppre_bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  86. (*ppre_bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  87. if (bt_rssi >= (rssi_thresh1 +
  88. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  89. bt_rssi_state = BTC_RSSI_STATE_HIGH;
  90. else if (bt_rssi < rssi_thresh)
  91. bt_rssi_state = BTC_RSSI_STATE_LOW;
  92. else
  93. bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  94. } else {
  95. if (bt_rssi < rssi_thresh1)
  96. bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
  97. else
  98. bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  99. }
  100. }
  101. *ppre_bt_rssi_state = bt_rssi_state;
  102. return bt_rssi_state;
  103. }
  104. u8 halbtc8723d2ant_wifi_rssi_state(IN struct btc_coexist *btcoexist,
  105. IN u8 *pprewifi_rssi_state, IN u8 level_num, IN u8 rssi_thresh,
  106. IN u8 rssi_thresh1)
  107. {
  108. s32 wifi_rssi = 0;
  109. u8 wifi_rssi_state = *pprewifi_rssi_state;
  110. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  111. if (level_num == 2) {
  112. if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
  113. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  114. if (wifi_rssi >= (rssi_thresh +
  115. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  116. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  117. else
  118. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  119. } else {
  120. if (wifi_rssi < rssi_thresh)
  121. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  122. else
  123. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  124. }
  125. } else if (level_num == 3) {
  126. if (rssi_thresh > rssi_thresh1) {
  127. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  128. "[BTCoex], wifi RSSI thresh error!!\n");
  129. BTC_TRACE(trace_buf);
  130. return *pprewifi_rssi_state;
  131. }
  132. if ((*pprewifi_rssi_state == BTC_RSSI_STATE_LOW) ||
  133. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  134. if (wifi_rssi >= (rssi_thresh +
  135. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  136. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  137. else
  138. wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
  139. } else if ((*pprewifi_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
  140. (*pprewifi_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  141. if (wifi_rssi >= (rssi_thresh1 +
  142. BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT))
  143. wifi_rssi_state = BTC_RSSI_STATE_HIGH;
  144. else if (wifi_rssi < rssi_thresh)
  145. wifi_rssi_state = BTC_RSSI_STATE_LOW;
  146. else
  147. wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  148. } else {
  149. if (wifi_rssi < rssi_thresh1)
  150. wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
  151. else
  152. wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
  153. }
  154. }
  155. *pprewifi_rssi_state = wifi_rssi_state;
  156. return wifi_rssi_state;
  157. }
  158. void halbtc8723d2ant_coex_switch_threshold(IN struct btc_coexist *btcoexist,
  159. IN u8 isolation_measuared)
  160. {
  161. s8 interference_wl_tx = 0, interference_bt_tx = 0;
  162. interference_wl_tx = BT_8723D_2ANT_WIFI_MAX_TX_POWER -
  163. isolation_measuared;
  164. interference_bt_tx = BT_8723D_2ANT_BT_MAX_TX_POWER -
  165. isolation_measuared;
  166. coex_sta->wifi_coex_thres = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
  167. coex_sta->wifi_coex_thres2 = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2;
  168. coex_sta->bt_coex_thres = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
  169. coex_sta->bt_coex_thres2 = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2;
  170. /*
  171. coex_sta->wifi_coex_thres = interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES1;
  172. coex_sta->wifi_coex_thres2 = interference_wl_tx + BT_8723D_2ANT_WIFI_SIR_THRES2;
  173. coex_sta->bt_coex_thres = interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES1;
  174. coex_sta->bt_coex_thres2 = interference_bt_tx + BT_8723D_2ANT_BT_SIR_THRES2;
  175. */
  176. /*
  177. if ( BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
  178. BT_8723D_2ANT_DEFAULT_ISOLATION) )
  179. coex_sta->wifi_coex_thres = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1;
  180. else
  181. coex_sta->wifi_coex_thres = BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 - (isolation_measuared -
  182. BT_8723D_2ANT_DEFAULT_ISOLATION);
  183. if ( BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 < (isolation_measuared -
  184. BT_8723D_2ANT_DEFAULT_ISOLATION) )
  185. coex_sta->bt_coex_thres = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1;
  186. else
  187. coex_sta->bt_coex_thres = BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 - (isolation_measuared -
  188. BT_8723D_2ANT_DEFAULT_ISOLATION);
  189. */
  190. }
  191. void halbtc8723d2ant_limited_rx(IN struct btc_coexist *btcoexist,
  192. IN boolean force_exec, IN boolean rej_ap_agg_pkt,
  193. IN boolean bt_ctrl_agg_buf_size, IN u8 agg_buf_size)
  194. {
  195. boolean reject_rx_agg = rej_ap_agg_pkt;
  196. boolean bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  197. u8 rx_agg_size = agg_buf_size;
  198. /* ============================================ */
  199. /* Rx Aggregation related setting */
  200. /* ============================================ */
  201. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  202. &reject_rx_agg);
  203. /* decide BT control aggregation buf size or not */
  204. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  205. &bt_ctrl_rx_agg_size);
  206. /* aggregation buf size, only work when BT control Rx aggregation size. */
  207. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  208. /* real update aggregation setting */
  209. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  210. }
  211. void halbtc8723d2ant_query_bt_info(IN struct btc_coexist *btcoexist)
  212. {
  213. u8 h2c_parameter[1] = {0};
  214. h2c_parameter[0] |= BIT(0); /* trigger */
  215. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  216. }
  217. void halbtc8723d2ant_monitor_bt_ctr(IN struct btc_coexist *btcoexist)
  218. {
  219. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  220. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  221. static u8 num_of_bt_counter_chk = 0, cnt_slave = 0, cnt_overhead = 0,
  222. cnt_autoslot_hang = 0;
  223. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  224. reg_hp_txrx = 0x770;
  225. reg_lp_txrx = 0x774;
  226. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  227. reg_hp_tx = u32tmp & MASKLWORD;
  228. reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
  229. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  230. reg_lp_tx = u32tmp & MASKLWORD;
  231. reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
  232. coex_sta->high_priority_tx = reg_hp_tx;
  233. coex_sta->high_priority_rx = reg_hp_rx;
  234. coex_sta->low_priority_tx = reg_lp_tx;
  235. coex_sta->low_priority_rx = reg_lp_rx;
  236. if (BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  237. coex_dm->bt_status) {
  238. if (coex_sta->high_priority_rx >= 15) {
  239. if (cnt_overhead < 3)
  240. cnt_overhead++;
  241. if (cnt_overhead == 3)
  242. coex_sta->is_hiPri_rx_overhead = true;
  243. } else {
  244. if (cnt_overhead > 0)
  245. cnt_overhead--;
  246. if (cnt_overhead == 0)
  247. coex_sta->is_hiPri_rx_overhead = false;
  248. }
  249. } else
  250. coex_sta->is_hiPri_rx_overhead = false;
  251. /* reset counter */
  252. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  253. if ((coex_sta->low_priority_tx > 1050) &&
  254. (!coex_sta->c2h_bt_inquiry_page))
  255. coex_sta->pop_event_cnt++;
  256. if ((coex_sta->low_priority_rx >= 950) &&
  257. (coex_sta->low_priority_rx >= coex_sta->low_priority_tx)
  258. && (!coex_sta->under_ips) && (!coex_sta->c2h_bt_inquiry_page) &&
  259. (coex_sta->bt_link_exist)) {
  260. if (cnt_slave >= 2) {
  261. bt_link_info->slave_role = true;
  262. cnt_slave = 2;
  263. } else
  264. cnt_slave++;
  265. } else {
  266. if (cnt_slave == 0) {
  267. bt_link_info->slave_role = false;
  268. cnt_slave = 0;
  269. } else
  270. cnt_slave--;
  271. }
  272. if (coex_sta->is_tdma_btautoslot) {
  273. if ((coex_sta->low_priority_tx >= 1300) &&
  274. (coex_sta->low_priority_rx <= 150)) {
  275. if (cnt_autoslot_hang >= 2) {
  276. coex_sta->is_tdma_btautoslot_hang = true;
  277. cnt_autoslot_hang = 2;
  278. } else
  279. cnt_autoslot_hang++;
  280. } else {
  281. if (cnt_autoslot_hang == 0) {
  282. coex_sta->is_tdma_btautoslot_hang = false;
  283. cnt_autoslot_hang = 0;
  284. } else
  285. cnt_autoslot_hang--;
  286. }
  287. }
  288. if (coex_sta->sco_exist) {
  289. if ((coex_sta->high_priority_tx >= 400) &&
  290. (coex_sta->high_priority_rx >= 400))
  291. coex_sta->is_eSCO_mode = false;
  292. else
  293. coex_sta->is_eSCO_mode = true;
  294. }
  295. if (!coex_sta->bt_disabled) {
  296. if ((coex_sta->high_priority_tx == 0) &&
  297. (coex_sta->high_priority_rx == 0) &&
  298. (coex_sta->low_priority_tx == 0) &&
  299. (coex_sta->low_priority_rx == 0)) {
  300. num_of_bt_counter_chk++;
  301. if (num_of_bt_counter_chk >= 3) {
  302. halbtc8723d2ant_query_bt_info(btcoexist);
  303. num_of_bt_counter_chk = 0;
  304. }
  305. }
  306. }
  307. }
  308. void halbtc8723d2ant_monitor_wifi_ctr(IN struct btc_coexist *btcoexist)
  309. {
  310. #if 1
  311. s32 wifi_rssi = 0;
  312. boolean wifi_busy = false, wifi_under_b_mode = false,
  313. wifi_scan = false;
  314. boolean bt_idle = false, wl_idle = false;
  315. static u8 cck_lock_counter = 0, wl_noisy_count0 = 0,
  316. wl_noisy_count1 = 3, wl_noisy_count2 = 0;
  317. u32 total_cnt, reg_val1, reg_val2, cck_cnt;
  318. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  319. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
  320. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  321. &wifi_under_b_mode);
  322. coex_sta->crc_ok_cck = btcoexist->btc_phydm_query_PHY_counter(
  323. btcoexist, PHYDM_INFO_CRC32_OK_CCK);
  324. coex_sta->crc_ok_11g = btcoexist->btc_phydm_query_PHY_counter(
  325. btcoexist, PHYDM_INFO_CRC32_OK_LEGACY);
  326. coex_sta->crc_ok_11n = btcoexist->btc_phydm_query_PHY_counter(
  327. btcoexist, PHYDM_INFO_CRC32_OK_HT);
  328. coex_sta->crc_ok_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
  329. btcoexist, PHYDM_INFO_CRC32_OK_VHT);
  330. coex_sta->crc_err_cck = btcoexist->btc_phydm_query_PHY_counter(
  331. btcoexist, PHYDM_INFO_CRC32_ERROR_CCK);
  332. coex_sta->crc_err_11g = btcoexist->btc_phydm_query_PHY_counter(
  333. btcoexist, PHYDM_INFO_CRC32_ERROR_LEGACY);
  334. coex_sta->crc_err_11n = btcoexist->btc_phydm_query_PHY_counter(
  335. btcoexist, PHYDM_INFO_CRC32_ERROR_HT);
  336. coex_sta->crc_err_11n_vht = btcoexist->btc_phydm_query_PHY_counter(
  337. btcoexist, PHYDM_INFO_CRC32_ERROR_VHT);
  338. cck_cnt = coex_sta->crc_ok_cck + coex_sta->crc_err_cck;
  339. if (cck_cnt > 250) {
  340. if (wl_noisy_count2 < 3)
  341. wl_noisy_count2++;
  342. if (wl_noisy_count2 == 3) {
  343. wl_noisy_count0 = 0;
  344. wl_noisy_count1 = 0;
  345. }
  346. } else if (cck_cnt < 50) {
  347. if (wl_noisy_count0 < 3)
  348. wl_noisy_count0++;
  349. if (wl_noisy_count0 == 3) {
  350. wl_noisy_count1 = 0;
  351. wl_noisy_count2 = 0;
  352. }
  353. } else {
  354. if (wl_noisy_count1 < 3)
  355. wl_noisy_count1++;
  356. if (wl_noisy_count1 == 3) {
  357. wl_noisy_count0 = 0;
  358. wl_noisy_count2 = 0;
  359. }
  360. }
  361. if (wl_noisy_count2 == 3)
  362. coex_sta->wl_noisy_level = 2;
  363. else if (wl_noisy_count1 == 3)
  364. coex_sta->wl_noisy_level = 1;
  365. else
  366. coex_sta->wl_noisy_level = 0;
  367. if ((wifi_busy) && (wifi_rssi >= 30) && (!wifi_under_b_mode)) {
  368. total_cnt = coex_sta->crc_ok_cck + coex_sta->crc_ok_11g +
  369. coex_sta->crc_ok_11n + coex_sta->crc_ok_11n_vht;
  370. if ((coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_ACL_BUSY) ||
  371. (coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY) ||
  372. (coex_dm->bt_status == BT_8723D_2ANT_BT_STATUS_SCO_BUSY)) {
  373. if (coex_sta->crc_ok_cck > (total_cnt -
  374. coex_sta->crc_ok_cck)) {
  375. if (cck_lock_counter < 3)
  376. cck_lock_counter++;
  377. } else {
  378. if (cck_lock_counter > 0)
  379. cck_lock_counter--;
  380. }
  381. } else {
  382. if (cck_lock_counter > 0)
  383. cck_lock_counter--;
  384. }
  385. } else {
  386. if (cck_lock_counter > 0)
  387. cck_lock_counter--;
  388. }
  389. if (!coex_sta->pre_ccklock) {
  390. if (cck_lock_counter >= 3)
  391. coex_sta->cck_lock = true;
  392. else
  393. coex_sta->cck_lock = false;
  394. } else {
  395. if (cck_lock_counter == 0)
  396. coex_sta->cck_lock = false;
  397. else
  398. coex_sta->cck_lock = true;
  399. }
  400. if (coex_sta->cck_lock)
  401. coex_sta->cck_ever_lock = true;
  402. coex_sta->pre_ccklock = coex_sta->cck_lock;
  403. #endif
  404. }
  405. void halbtc8723d2ant_update_bt_link_info(IN struct btc_coexist *btcoexist)
  406. {
  407. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  408. boolean bt_hs_on = false;
  409. boolean bt_busy = false;
  410. coex_sta->num_of_profile = 0;
  411. /* set link exist status */
  412. if (!(coex_sta->bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
  413. coex_sta->bt_link_exist = false;
  414. coex_sta->pan_exist = false;
  415. coex_sta->a2dp_exist = false;
  416. coex_sta->hid_exist = false;
  417. coex_sta->sco_exist = false;
  418. } else { /* connection exists */
  419. coex_sta->bt_link_exist = true;
  420. if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_FTP) {
  421. coex_sta->pan_exist = true;
  422. coex_sta->num_of_profile++;
  423. } else
  424. coex_sta->pan_exist = false;
  425. if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_A2DP) {
  426. coex_sta->a2dp_exist = true;
  427. coex_sta->num_of_profile++;
  428. } else
  429. coex_sta->a2dp_exist = false;
  430. if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_HID) {
  431. coex_sta->hid_exist = true;
  432. coex_sta->num_of_profile++;
  433. } else
  434. coex_sta->hid_exist = false;
  435. if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_SCO_ESCO) {
  436. coex_sta->sco_exist = true;
  437. coex_sta->num_of_profile++;
  438. } else
  439. coex_sta->sco_exist = false;
  440. }
  441. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  442. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  443. bt_link_info->sco_exist = coex_sta->sco_exist;
  444. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  445. bt_link_info->pan_exist = coex_sta->pan_exist;
  446. bt_link_info->hid_exist = coex_sta->hid_exist;
  447. bt_link_info->acl_busy = coex_sta->acl_busy;
  448. /* work around for HS mode. */
  449. if (bt_hs_on) {
  450. bt_link_info->pan_exist = true;
  451. bt_link_info->bt_link_exist = true;
  452. }
  453. /* check if Sco only */
  454. if (bt_link_info->sco_exist &&
  455. !bt_link_info->a2dp_exist &&
  456. !bt_link_info->pan_exist &&
  457. !bt_link_info->hid_exist)
  458. bt_link_info->sco_only = true;
  459. else
  460. bt_link_info->sco_only = false;
  461. /* check if A2dp only */
  462. if (!bt_link_info->sco_exist &&
  463. bt_link_info->a2dp_exist &&
  464. !bt_link_info->pan_exist &&
  465. !bt_link_info->hid_exist)
  466. bt_link_info->a2dp_only = true;
  467. else
  468. bt_link_info->a2dp_only = false;
  469. /* check if Pan only */
  470. if (!bt_link_info->sco_exist &&
  471. !bt_link_info->a2dp_exist &&
  472. bt_link_info->pan_exist &&
  473. !bt_link_info->hid_exist)
  474. bt_link_info->pan_only = true;
  475. else
  476. bt_link_info->pan_only = false;
  477. /* check if Hid only */
  478. if (!bt_link_info->sco_exist &&
  479. !bt_link_info->a2dp_exist &&
  480. !bt_link_info->pan_exist &&
  481. bt_link_info->hid_exist)
  482. bt_link_info->hid_only = true;
  483. else
  484. bt_link_info->hid_only = false;
  485. if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_INQ_PAGE) {
  486. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_INQ_PAGE;
  487. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  488. "[BTCoex], BtInfoNotify(), BT Inq/page!!!\n");
  489. } else if (!(coex_sta->bt_info & BT_INFO_8723D_2ANT_B_CONNECTION)) {
  490. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
  491. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  492. "[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
  493. } else if (coex_sta->bt_info == BT_INFO_8723D_2ANT_B_CONNECTION) {
  494. /* connection exists but no busy */
  495. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE;
  496. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  497. "[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
  498. } else if (((coex_sta->bt_info & BT_INFO_8723D_2ANT_B_SCO_ESCO) ||
  499. (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_SCO_BUSY)) &&
  500. (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_ACL_BUSY)) {
  501. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY;
  502. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  503. "[BTCoex], BtInfoNotify(), BT ACL SCO busy!!!\n");
  504. } else if ((coex_sta->bt_info & BT_INFO_8723D_2ANT_B_SCO_ESCO) ||
  505. (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_SCO_BUSY)) {
  506. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_SCO_BUSY;
  507. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  508. "[BTCoex], BtInfoNotify(), BT SCO busy!!!\n");
  509. } else if (coex_sta->bt_info & BT_INFO_8723D_2ANT_B_ACL_BUSY) {
  510. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_ACL_BUSY;
  511. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  512. "[BTCoex], BtInfoNotify(), BT ACL busy!!!\n");
  513. } else {
  514. coex_dm->bt_status = BT_8723D_2ANT_BT_STATUS_MAX;
  515. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  516. "[BTCoex], BtInfoNotify(), BT Non-Defined state!!!\n");
  517. }
  518. BTC_TRACE(trace_buf);
  519. if ((BT_8723D_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  520. (BT_8723D_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  521. (BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status))
  522. bt_busy = true;
  523. else
  524. bt_busy = false;
  525. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  526. }
  527. void halbtc8723d2ant_update_wifi_channel_info(IN struct btc_coexist *btcoexist,
  528. IN u8 type)
  529. {
  530. u8 h2c_parameter[3] = {0};
  531. u32 wifi_bw;
  532. u8 wifi_central_chnl;
  533. /* only 2.4G we need to inform bt the chnl mask */
  534. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  535. &wifi_central_chnl);
  536. if ((BTC_MEDIA_CONNECT == type) &&
  537. (wifi_central_chnl <= 14)) {
  538. h2c_parameter[0] =
  539. 0x1; /* enable BT AFH skip WL channel for 8723d because BT Rx LO interference */
  540. /* h2c_parameter[0] = 0x0; */
  541. h2c_parameter[1] = wifi_central_chnl;
  542. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  543. if (BTC_WIFI_BW_HT40 == wifi_bw)
  544. h2c_parameter[2] = 0x30;
  545. else
  546. h2c_parameter[2] = 0x20;
  547. }
  548. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  549. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  550. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  551. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  552. }
  553. void halbtc8723d2ant_set_fw_dac_swing_level(IN struct btc_coexist *btcoexist,
  554. IN u8 dac_swing_lvl)
  555. {
  556. u8 h2c_parameter[1] = {0};
  557. /* There are several type of dacswing */
  558. /* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6 */
  559. h2c_parameter[0] = dac_swing_lvl;
  560. btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
  561. }
  562. void halbtc8723d2ant_fw_dac_swing_lvl(IN struct btc_coexist *btcoexist,
  563. IN boolean force_exec, IN u8 fw_dac_swing_lvl)
  564. {
  565. coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
  566. if (!force_exec) {
  567. if (coex_dm->pre_fw_dac_swing_lvl ==
  568. coex_dm->cur_fw_dac_swing_lvl)
  569. return;
  570. }
  571. halbtc8723d2ant_set_fw_dac_swing_level(btcoexist,
  572. coex_dm->cur_fw_dac_swing_lvl);
  573. coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
  574. }
  575. void halbtc8723d2ant_set_fw_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  576. IN u8 dec_bt_pwr_lvl)
  577. {
  578. u8 h2c_parameter[1] = {0};
  579. h2c_parameter[0] = dec_bt_pwr_lvl;
  580. btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
  581. }
  582. void halbtc8723d2ant_dec_bt_pwr(IN struct btc_coexist *btcoexist,
  583. IN boolean force_exec, IN u8 dec_bt_pwr_lvl)
  584. {
  585. coex_dm->cur_bt_dec_pwr_lvl = dec_bt_pwr_lvl;
  586. if (!force_exec) {
  587. if (coex_dm->pre_bt_dec_pwr_lvl == coex_dm->cur_bt_dec_pwr_lvl)
  588. return;
  589. }
  590. halbtc8723d2ant_set_fw_dec_bt_pwr(btcoexist,
  591. coex_dm->cur_bt_dec_pwr_lvl);
  592. coex_dm->pre_bt_dec_pwr_lvl = coex_dm->cur_bt_dec_pwr_lvl;
  593. }
  594. void halbtc8723d2ant_set_fw_low_penalty_ra(IN struct btc_coexist
  595. *btcoexist, IN boolean low_penalty_ra)
  596. {
  597. #if 1
  598. u8 h2c_parameter[6] = {0};
  599. h2c_parameter[0] = 0x6; /* op_code, 0x6= Retry_Penalty */
  600. if (low_penalty_ra) {
  601. h2c_parameter[1] |= BIT(0);
  602. h2c_parameter[2] =
  603. 0x00; /* normal rate except MCS7/6/5, OFDM54/48/36 */
  604. h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
  605. h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
  606. h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
  607. }
  608. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
  609. #endif
  610. }
  611. void halbtc8723d2ant_low_penalty_ra(IN struct btc_coexist *btcoexist,
  612. IN boolean force_exec, IN boolean low_penalty_ra)
  613. {
  614. #if 1
  615. coex_dm->cur_low_penalty_ra = low_penalty_ra;
  616. if (!force_exec) {
  617. if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
  618. return;
  619. }
  620. halbtc8723d2ant_set_fw_low_penalty_ra(btcoexist,
  621. coex_dm->cur_low_penalty_ra);
  622. #if 0
  623. if (low_penalty_ra)
  624. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 15);
  625. else
  626. btcoexist->btc_phydm_modify_RA_PCR_threshold(btcoexist, 0, 0);
  627. #endif
  628. coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
  629. #endif
  630. }
  631. void halbtc8723d2ant_set_bt_auto_report(IN struct btc_coexist *btcoexist,
  632. IN boolean enable_auto_report)
  633. {
  634. u8 h2c_parameter[1] = {0};
  635. h2c_parameter[0] = 0;
  636. if (enable_auto_report)
  637. h2c_parameter[0] |= BIT(0);
  638. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  639. }
  640. void halbtc8723d2ant_bt_auto_report(IN struct btc_coexist *btcoexist,
  641. IN boolean force_exec, IN boolean enable_auto_report)
  642. {
  643. coex_dm->cur_bt_auto_report = enable_auto_report;
  644. if (!force_exec) {
  645. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  646. return;
  647. }
  648. halbtc8723d2ant_set_bt_auto_report(btcoexist,
  649. coex_dm->cur_bt_auto_report);
  650. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  651. }
  652. void halbtc8723d2ant_write_score_board(
  653. IN struct btc_coexist *btcoexist,
  654. IN u16 bitpos,
  655. IN boolean state
  656. )
  657. {
  658. static u16 originalval = 0x8002;
  659. if (state)
  660. originalval = originalval | bitpos;
  661. else
  662. originalval = originalval & (~bitpos);
  663. btcoexist->btc_write_2byte(btcoexist, 0xaa, originalval);
  664. }
  665. void halbtc8723d2ant_read_score_board(
  666. IN struct btc_coexist *btcoexist,
  667. IN u16 *score_board_val
  668. )
  669. {
  670. *score_board_val = (btcoexist->btc_read_2byte(btcoexist,
  671. 0xaa)) & 0x7fff;
  672. }
  673. void halbtc8723d2ant_post_state_to_bt(
  674. IN struct btc_coexist *btcoexist,
  675. IN u16 type,
  676. IN boolean state
  677. )
  678. {
  679. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  680. "[BTCoex], halbtc8723d2ant_post_state_to_bt: type = %d, state =%d\n",
  681. type, state);
  682. BTC_TRACE(trace_buf);
  683. halbtc8723d2ant_write_score_board(btcoexist, (u16) type, state);
  684. }
  685. boolean halbtc8723d2ant_is_wifibt_status_changed(IN struct btc_coexist
  686. *btcoexist)
  687. {
  688. static boolean pre_wifi_busy = false, pre_under_4way = false,
  689. pre_bt_hs_on = false, pre_bt_off = false, pre_bt_slave = false;
  690. static u8 pre_hid_busy_num = 0, pre_wl_noisy_level = 0;
  691. boolean wifi_busy = false, under_4way = false, bt_hs_on = false;
  692. boolean wifi_connected = false;
  693. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  694. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  695. &wifi_connected);
  696. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  697. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  698. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  699. &under_4way);
  700. if (coex_sta->bt_disabled != pre_bt_off) {
  701. pre_bt_off = coex_sta->bt_disabled;
  702. if (coex_sta->bt_disabled)
  703. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  704. "[BTCoex], BT is disabled !!\n");
  705. else
  706. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  707. "[BTCoex], BT is enabled !!\n");
  708. BTC_TRACE(trace_buf);
  709. coex_sta->bt_coex_supported_feature = 0;
  710. coex_sta->bt_coex_supported_version = 0;
  711. coex_sta->bt_ble_scan_type = 0;
  712. coex_sta->bt_ble_scan_para[0] = 0;
  713. coex_sta->bt_ble_scan_para[1] = 0;
  714. coex_sta->bt_ble_scan_para[2] = 0;
  715. coex_sta->bt_reg_vendor_ac = 0xffff;
  716. coex_sta->bt_reg_vendor_ae = 0xffff;
  717. return true;
  718. }
  719. if (wifi_connected) {
  720. if (wifi_busy != pre_wifi_busy) {
  721. pre_wifi_busy = wifi_busy;
  722. if (wifi_busy)
  723. halbtc8723d2ant_post_state_to_bt(btcoexist,
  724. BT_8723D_2ANT_SCOREBOARD_UNDERTEST, true);
  725. else
  726. halbtc8723d2ant_post_state_to_bt(btcoexist,
  727. BT_8723D_2ANT_SCOREBOARD_UNDERTEST, false);
  728. return true;
  729. }
  730. if (under_4way != pre_under_4way) {
  731. pre_under_4way = under_4way;
  732. return true;
  733. }
  734. if (bt_hs_on != pre_bt_hs_on) {
  735. pre_bt_hs_on = bt_hs_on;
  736. return true;
  737. }
  738. if (coex_sta->wl_noisy_level != pre_wl_noisy_level) {
  739. pre_wl_noisy_level = coex_sta->wl_noisy_level;
  740. return true;
  741. }
  742. }
  743. if (!coex_sta->bt_disabled) {
  744. if (coex_sta->hid_busy_num != pre_hid_busy_num) {
  745. pre_hid_busy_num = coex_sta->hid_busy_num;
  746. return true;
  747. }
  748. }
  749. if (bt_link_info->slave_role != pre_bt_slave) {
  750. pre_bt_slave = bt_link_info->slave_role;
  751. return true;
  752. }
  753. return false;
  754. }
  755. void halbtc8723d2ant_monitor_bt_enable_disable(IN struct btc_coexist *btcoexist)
  756. {
  757. static u32 bt_disable_cnt = 0;
  758. boolean bt_active = true, bt_disabled = false;
  759. u16 u16tmp;
  760. /* This function check if bt is disabled */
  761. #if 0
  762. if (coex_sta->high_priority_tx == 0 &&
  763. coex_sta->high_priority_rx == 0 &&
  764. coex_sta->low_priority_tx == 0 &&
  765. coex_sta->low_priority_rx == 0)
  766. bt_active = false;
  767. if (coex_sta->high_priority_tx == 0xffff &&
  768. coex_sta->high_priority_rx == 0xffff &&
  769. coex_sta->low_priority_tx == 0xffff &&
  770. coex_sta->low_priority_rx == 0xffff)
  771. bt_active = false;
  772. #else
  773. /* Read BT on/off status from scoreboard[1], enable this only if BT patch support this feature */
  774. halbtc8723d2ant_read_score_board(btcoexist, &u16tmp);
  775. bt_active = u16tmp & BIT(1);
  776. #endif
  777. if (bt_active) {
  778. bt_disable_cnt = 0;
  779. bt_disabled = false;
  780. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  781. &bt_disabled);
  782. } else {
  783. bt_disable_cnt++;
  784. if (bt_disable_cnt >= 2) {
  785. bt_disabled = true;
  786. bt_disable_cnt = 2;
  787. }
  788. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  789. &bt_disabled);
  790. }
  791. if (bt_disabled)
  792. halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
  793. else
  794. halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, true);
  795. if (coex_sta->bt_disabled != bt_disabled) {
  796. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  797. "[BTCoex], BT is from %s to %s!!\n",
  798. (coex_sta->bt_disabled ? "disabled" : "enabled"),
  799. (bt_disabled ? "disabled" : "enabled"));
  800. BTC_TRACE(trace_buf);
  801. coex_sta->bt_disabled = bt_disabled;
  802. }
  803. }
  804. void halbtc8723d2ant_enable_gnt_to_gpio(IN struct btc_coexist *btcoexist,
  805. boolean isenable)
  806. {
  807. #if BT_8723D_2ANT_COEX_DBG
  808. if (isenable) {
  809. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x1);
  810. /* enable GNT_BT to GPIO debug */
  811. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x0);
  812. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x0);
  813. /* 0x48[20] = 0 for GPIO14 = GNT_WL*/
  814. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x0);
  815. /* 0x40[17] = 0 for GPIO14 = GNT_WL*/
  816. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x42, 0x02, 0x0);
  817. /* 0x66[9] = 0 for GPIO15 = GNT_BT*/
  818. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x02, 0x0);
  819. /* 0x66[7] = 0
  820. for GPIO15 = GNT_BT*/
  821. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x66, 0x80, 0x0);
  822. /* 0x8[8] = 0 for GPIO15 = GNT_BT*/
  823. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x9, 0x1, 0x0);
  824. /* BT Vendor Reg 0x76[0] = 0 for GPIO15 = GNT_BT, this is not set here*/
  825. } else {
  826. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x8, 0x0);
  827. /* Disable GNT_BT debug to GPIO, and enable chip_wakeup_host */
  828. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4e, 0x40, 0x1);
  829. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x1, 0x1);
  830. /* 0x48[20] = 0 for GPIO14 = GNT_WL*/
  831. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4a, 0x10, 0x1);
  832. }
  833. #endif
  834. }
  835. u32 halbtc8723d2ant_ltecoex_indirect_read_reg(IN struct btc_coexist *btcoexist,
  836. IN u16 reg_addr)
  837. {
  838. u32 j = 0, delay_count = 0;
  839. /* wait for ready bit before access 0x7c0 */
  840. btcoexist->btc_write_4byte(btcoexist, 0x7c0, 0x800F0000 | reg_addr);
  841. while (1) {
  842. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
  843. delay_ms(50);
  844. delay_count++;
  845. if (delay_count >= 10) {
  846. delay_count = 0;
  847. break;
  848. }
  849. } else
  850. break;
  851. }
  852. return btcoexist->btc_read_4byte(btcoexist,
  853. 0x7c8); /* get read data */
  854. }
  855. void halbtc8723d2ant_ltecoex_indirect_write_reg(IN struct btc_coexist
  856. *btcoexist,
  857. IN u16 reg_addr, IN u32 bit_mask, IN u32 reg_value)
  858. {
  859. u32 val, i = 0, j = 0, bitpos = 0, delay_count = 0;
  860. if (bit_mask == 0x0)
  861. return;
  862. if (bit_mask == 0xffffffff) {
  863. btcoexist->btc_write_4byte(btcoexist, 0x7c4,
  864. reg_value); /* put write data */
  865. /* wait for ready bit before access 0x7c0 */
  866. while (1) {
  867. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
  868. delay_ms(50);
  869. delay_count++;
  870. if (delay_count >= 10) {
  871. delay_count = 0;
  872. break;
  873. }
  874. } else
  875. break;
  876. }
  877. btcoexist->btc_write_4byte(btcoexist, 0x7c0,
  878. 0xc00F0000 | reg_addr);
  879. } else {
  880. for (i = 0; i <= 31; i++) {
  881. if (((bit_mask >> i) & 0x1) == 0x1) {
  882. bitpos = i;
  883. break;
  884. }
  885. }
  886. /* read back register value before write */
  887. val = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  888. reg_addr);
  889. val = (val & (~bit_mask)) | (reg_value << bitpos);
  890. btcoexist->btc_write_4byte(btcoexist, 0x7c4,
  891. val); /* put write data */
  892. /* wait for ready bit before access 0x7c0 */
  893. while (1) {
  894. if ((btcoexist->btc_read_1byte(btcoexist, 0x7c3)&BIT(5)) == 0) {
  895. delay_ms(50);
  896. delay_count++;
  897. if (delay_count >= 10) {
  898. delay_count = 0;
  899. break;
  900. }
  901. } else
  902. break;
  903. }
  904. btcoexist->btc_write_4byte(btcoexist, 0x7c0,
  905. 0xc00F0000 | reg_addr);
  906. }
  907. }
  908. void halbtc8723d2ant_ltecoex_enable(IN struct btc_coexist *btcoexist,
  909. IN boolean enable)
  910. {
  911. u8 val;
  912. val = (enable) ? 1 : 0;
  913. halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, 0x38, 0x80,
  914. val); /* 0x38[7] */
  915. }
  916. void halbtc8723d2ant_ltecoex_pathcontrol_owner(IN struct btc_coexist *btcoexist,
  917. IN boolean wifi_control)
  918. {
  919. u8 val;
  920. val = (wifi_control) ? 1 : 0;
  921. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x73, 0x4,
  922. val); /* 0x70[26] */
  923. }
  924. void halbtc8723d2ant_ltecoex_set_gnt_bt(IN struct btc_coexist *btcoexist,
  925. IN u8 control_block, IN boolean sw_control, IN u8 state)
  926. {
  927. u32 val = 0, val_orig = 0;
  928. if (!sw_control)
  929. val = 0x0;
  930. else if (state & 0x1)
  931. val = 0x3;
  932. else
  933. val = 0x1;
  934. val_orig = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  935. 0x38);
  936. switch (control_block) {
  937. case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
  938. default:
  939. val = ((val << 14) | (val << 10)) | (val_orig & 0xffff33ff);
  940. break;
  941. case BT_8723D_2ANT_GNT_BLOCK_RFC:
  942. val = (val << 14) | (val_orig & 0xffff3fff);
  943. break;
  944. case BT_8723D_2ANT_GNT_BLOCK_BB:
  945. val = (val << 10) | (val_orig & 0xfffff3ff);
  946. break;
  947. }
  948. halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
  949. 0x38, 0xffffffff, val);
  950. }
  951. void halbtc8723d2ant_ltecoex_set_gnt_wl(IN struct btc_coexist *btcoexist,
  952. IN u8 control_block, IN boolean sw_control, IN u8 state)
  953. {
  954. u32 val = 0, val_orig = 0;
  955. if (!sw_control)
  956. val = 0x0;
  957. else if (state & 0x1)
  958. val = 0x3;
  959. else
  960. val = 0x1;
  961. val_orig = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  962. 0x38);
  963. switch (control_block) {
  964. case BT_8723D_2ANT_GNT_BLOCK_RFC_BB:
  965. default:
  966. val = ((val << 12) | (val << 8)) | (val_orig & 0xffffccff);
  967. break;
  968. case BT_8723D_2ANT_GNT_BLOCK_RFC:
  969. val = (val << 12) | (val_orig & 0xffffcfff);
  970. break;
  971. case BT_8723D_2ANT_GNT_BLOCK_BB:
  972. val = (val << 8) | (val_orig & 0xfffffcff);
  973. break;
  974. }
  975. halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist,
  976. 0x38, 0xffffffff, val);
  977. }
  978. void halbtc8723d2ant_ltecoex_set_coex_table(IN struct btc_coexist *btcoexist,
  979. IN u8 table_type, IN u16 table_content)
  980. {
  981. u16 reg_addr = 0x0000;
  982. switch (table_type) {
  983. case BT_8723D_2ANT_CTT_WL_VS_LTE:
  984. reg_addr = 0xa0;
  985. break;
  986. case BT_8723D_2ANT_CTT_BT_VS_LTE:
  987. reg_addr = 0xa4;
  988. break;
  989. }
  990. if (reg_addr != 0x0000)
  991. halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
  992. 0xffff, table_content); /* 0xa0[15:0] or 0xa4[15:0] */
  993. }
  994. void halbtc8723d2ant_ltecoex_set_break_table(IN struct btc_coexist *btcoexist,
  995. IN u8 table_type, IN u8 table_content)
  996. {
  997. u16 reg_addr = 0x0000;
  998. switch (table_type) {
  999. case BT_8723D_2ANT_LBTT_WL_BREAK_LTE:
  1000. reg_addr = 0xa8;
  1001. break;
  1002. case BT_8723D_2ANT_LBTT_BT_BREAK_LTE:
  1003. reg_addr = 0xac;
  1004. break;
  1005. case BT_8723D_2ANT_LBTT_LTE_BREAK_WL:
  1006. reg_addr = 0xb0;
  1007. break;
  1008. case BT_8723D_2ANT_LBTT_LTE_BREAK_BT:
  1009. reg_addr = 0xb4;
  1010. break;
  1011. }
  1012. if (reg_addr != 0x0000)
  1013. halbtc8723d2ant_ltecoex_indirect_write_reg(btcoexist, reg_addr,
  1014. 0xff, table_content); /* 0xa8[15:0] or 0xb4[15:0] */
  1015. }
  1016. void halbtc8723d2ant_set_wltoggle_coex_table(IN struct btc_coexist *btcoexist,
  1017. IN boolean force_exec, IN u8 interval,
  1018. IN u8 val0x6c4_b0, IN u8 val0x6c4_b1, IN u8 val0x6c4_b2,
  1019. IN u8 val0x6c4_b3)
  1020. {
  1021. static u8 pre_h2c_parameter[6] = {0};
  1022. u8 cur_h2c_parameter[6] = {0};
  1023. u8 i, match_cnt = 0;
  1024. cur_h2c_parameter[0] = 0x7; /* op_code, 0x7= wlan toggle slot*/
  1025. cur_h2c_parameter[1] = interval;
  1026. cur_h2c_parameter[2] = val0x6c4_b0;
  1027. cur_h2c_parameter[3] = val0x6c4_b1;
  1028. cur_h2c_parameter[4] = val0x6c4_b2;
  1029. cur_h2c_parameter[5] = val0x6c4_b3;
  1030. if (!force_exec) {
  1031. for (i = 1; i <= 5; i++) {
  1032. if (cur_h2c_parameter[i] != pre_h2c_parameter[i])
  1033. break;
  1034. match_cnt++;
  1035. }
  1036. if (match_cnt == 5)
  1037. return;
  1038. }
  1039. for (i = 1; i <= 5; i++)
  1040. pre_h2c_parameter[i] = cur_h2c_parameter[i];
  1041. btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, cur_h2c_parameter);
  1042. }
  1043. void halbtc8723d2ant_set_coex_table(IN struct btc_coexist *btcoexist,
  1044. IN u32 val0x6c0, IN u32 val0x6c4, IN u32 val0x6c8, IN u8 val0x6cc)
  1045. {
  1046. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  1047. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  1048. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  1049. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  1050. }
  1051. void halbtc8723d2ant_coex_table(IN struct btc_coexist *btcoexist,
  1052. IN boolean force_exec, IN u32 val0x6c0, IN u32 val0x6c4,
  1053. IN u32 val0x6c8, IN u8 val0x6cc)
  1054. {
  1055. coex_dm->cur_val0x6c0 = val0x6c0;
  1056. coex_dm->cur_val0x6c4 = val0x6c4;
  1057. coex_dm->cur_val0x6c8 = val0x6c8;
  1058. coex_dm->cur_val0x6cc = val0x6cc;
  1059. if (!force_exec) {
  1060. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  1061. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  1062. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  1063. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  1064. return;
  1065. }
  1066. halbtc8723d2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
  1067. val0x6cc);
  1068. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  1069. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  1070. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  1071. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  1072. }
  1073. void halbtc8723d2ant_coex_table_with_type(IN struct btc_coexist *btcoexist,
  1074. IN boolean force_exec, IN u8 type)
  1075. {
  1076. u32 break_table;
  1077. u8 select_table;
  1078. coex_sta->coex_table_type = type;
  1079. if (coex_sta->concurrent_rx_mode_on == true) {
  1080. break_table = 0xf0ffffff; /* set WL hi-pri can break BT */
  1081. select_table =
  1082. 0xb; /* set Tx response = Hi-Pri (ex: Transmitting ACK,BA,CTS) */
  1083. } else {
  1084. break_table = 0xffffff;
  1085. select_table = 0x3;
  1086. }
  1087. switch (type) {
  1088. case 0:
  1089. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1090. 0xffffffff, 0xffffffff, break_table, select_table);
  1091. break;
  1092. case 1:
  1093. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1094. 0x55555555, 0x5a5a5a5a, break_table, select_table);
  1095. break;
  1096. case 2:
  1097. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1098. 0x5a5a5a5a, 0x5a5a5a5a, break_table, select_table);
  1099. break;
  1100. case 3:
  1101. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1102. 0xaa555555, 0xaa5a5a5a, break_table, select_table);
  1103. break;
  1104. case 4:
  1105. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1106. 0x55555555, 0x5a5a5a5a, break_table, select_table);
  1107. break;
  1108. case 5:
  1109. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1110. 0x55555555, 0x55555555, break_table, select_table);
  1111. break;
  1112. case 6:
  1113. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1114. 0xa5555555, 0xfafafafa, break_table, select_table);
  1115. break;
  1116. case 7:
  1117. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1118. 0xa5555555, 0xaa5a5a5a, break_table, select_table);
  1119. break;
  1120. case 8:
  1121. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1122. 0xa5555555, 0xfafafafa, break_table, select_table);
  1123. break;
  1124. case 9:
  1125. halbtc8723d2ant_coex_table(btcoexist, force_exec,
  1126. 0x5a5a5a5a, 0xaaaa5aaa, break_table, select_table);
  1127. break;
  1128. default:
  1129. break;
  1130. }
  1131. }
  1132. void halbtc8723d2ant_set_fw_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1133. IN boolean enable)
  1134. {
  1135. u8 h2c_parameter[1] = {0};
  1136. if (enable) {
  1137. h2c_parameter[0] |= BIT(0); /* function enable */
  1138. }
  1139. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  1140. }
  1141. void halbtc8723d2ant_ignore_wlan_act(IN struct btc_coexist *btcoexist,
  1142. IN boolean force_exec, IN boolean enable)
  1143. {
  1144. coex_dm->cur_ignore_wlan_act = enable;
  1145. if (!force_exec) {
  1146. if (coex_dm->pre_ignore_wlan_act ==
  1147. coex_dm->cur_ignore_wlan_act)
  1148. return;
  1149. }
  1150. halbtc8723d2ant_set_fw_ignore_wlan_act(btcoexist, enable);
  1151. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  1152. }
  1153. void halbtc8723d2ant_set_lps_rpwm(IN struct btc_coexist *btcoexist,
  1154. IN u8 lps_val, IN u8 rpwm_val)
  1155. {
  1156. u8 lps = lps_val;
  1157. u8 rpwm = rpwm_val;
  1158. btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
  1159. btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
  1160. }
  1161. void halbtc8723d2ant_lps_rpwm(IN struct btc_coexist *btcoexist,
  1162. IN boolean force_exec, IN u8 lps_val, IN u8 rpwm_val)
  1163. {
  1164. coex_dm->cur_lps = lps_val;
  1165. coex_dm->cur_rpwm = rpwm_val;
  1166. if (!force_exec) {
  1167. if ((coex_dm->pre_lps == coex_dm->cur_lps) &&
  1168. (coex_dm->pre_rpwm == coex_dm->cur_rpwm))
  1169. return;
  1170. }
  1171. halbtc8723d2ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
  1172. coex_dm->pre_lps = coex_dm->cur_lps;
  1173. coex_dm->pre_rpwm = coex_dm->cur_rpwm;
  1174. }
  1175. void halbtc8723d2ant_ps_tdma_check_for_power_save_state(
  1176. IN struct btc_coexist *btcoexist, IN boolean new_ps_state)
  1177. {
  1178. u8 lps_mode = 0x0;
  1179. u8 h2c_parameter[5] = {0, 0, 0, 0x40, 0};
  1180. btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
  1181. if (lps_mode) { /* already under LPS state */
  1182. if (new_ps_state) {
  1183. /* keep state under LPS, do nothing. */
  1184. } else {
  1185. /* will leave LPS state, turn off psTdma first */
  1186. /*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1187. 8); */
  1188. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1189. h2c_parameter);
  1190. }
  1191. } else { /* NO PS state */
  1192. if (new_ps_state) {
  1193. /* will enter LPS state, turn off psTdma first */
  1194. /*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false,
  1195. 8);*/
  1196. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5,
  1197. h2c_parameter);
  1198. } else {
  1199. /* keep state under NO PS state, do nothing. */
  1200. }
  1201. }
  1202. }
  1203. void halbtc8723d2ant_power_save_state(IN struct btc_coexist *btcoexist,
  1204. IN u8 ps_type, IN u8 lps_val, IN u8 rpwm_val)
  1205. {
  1206. boolean low_pwr_disable = false;
  1207. switch (ps_type) {
  1208. case BTC_PS_WIFI_NATIVE:
  1209. /* recover to original 32k low power setting */
  1210. low_pwr_disable = false;
  1211. btcoexist->btc_set(btcoexist,
  1212. BTC_SET_ACT_DISABLE_LOW_POWER,
  1213. &low_pwr_disable);
  1214. btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
  1215. NULL);
  1216. coex_sta->force_lps_on = false;
  1217. break;
  1218. case BTC_PS_LPS_ON:
  1219. halbtc8723d2ant_ps_tdma_check_for_power_save_state(
  1220. btcoexist, true);
  1221. halbtc8723d2ant_lps_rpwm(btcoexist, NORMAL_EXEC,
  1222. lps_val, rpwm_val);
  1223. /* when coex force to enter LPS, do not enter 32k low power. */
  1224. low_pwr_disable = true;
  1225. btcoexist->btc_set(btcoexist,
  1226. BTC_SET_ACT_DISABLE_LOW_POWER,
  1227. &low_pwr_disable);
  1228. /* power save must executed before psTdma. */
  1229. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS,
  1230. NULL);
  1231. coex_sta->force_lps_on = true;
  1232. break;
  1233. case BTC_PS_LPS_OFF:
  1234. halbtc8723d2ant_ps_tdma_check_for_power_save_state(
  1235. btcoexist, false);
  1236. btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
  1237. NULL);
  1238. coex_sta->force_lps_on = false;
  1239. break;
  1240. default:
  1241. break;
  1242. }
  1243. }
  1244. void halbtc8723d2ant_set_fw_pstdma(IN struct btc_coexist *btcoexist,
  1245. IN u8 byte1, IN u8 byte2, IN u8 byte3, IN u8 byte4, IN u8 byte5)
  1246. {
  1247. u8 h2c_parameter[5] = {0};
  1248. u8 real_byte1 = byte1, real_byte5 = byte5;
  1249. boolean ap_enable = false;
  1250. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1251. if (byte5 & BIT(2))
  1252. coex_sta->is_tdma_btautoslot = true;
  1253. else
  1254. coex_sta->is_tdma_btautoslot = false;
  1255. /* release bt-auto slot for auto-slot hang is detected!! */
  1256. if (coex_sta->is_tdma_btautoslot)
  1257. if ((coex_sta->is_tdma_btautoslot_hang) ||
  1258. (bt_link_info->slave_role))
  1259. byte5 = byte5 & 0xfb;
  1260. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_AP_MODE_ENABLE,
  1261. &ap_enable);
  1262. if (ap_enable) {
  1263. if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1264. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1265. "[BTCoex], FW for AP mode\n");
  1266. BTC_TRACE(trace_buf);
  1267. real_byte1 &= ~BIT(4);
  1268. real_byte1 |= BIT(5);
  1269. real_byte5 |= BIT(5);
  1270. real_byte5 &= ~BIT(6);
  1271. halbtc8723d2ant_power_save_state(btcoexist,
  1272. BTC_PS_WIFI_NATIVE, 0x0,
  1273. 0x0);
  1274. }
  1275. } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) {
  1276. halbtc8723d2ant_power_save_state(
  1277. btcoexist, BTC_PS_LPS_ON, 0x50,
  1278. 0x4);
  1279. } else {
  1280. halbtc8723d2ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
  1281. 0x0,
  1282. 0x0);
  1283. }
  1284. h2c_parameter[0] = real_byte1;
  1285. h2c_parameter[1] = byte2;
  1286. h2c_parameter[2] = byte3;
  1287. h2c_parameter[3] = byte4;
  1288. h2c_parameter[4] = real_byte5;
  1289. coex_dm->ps_tdma_para[0] = real_byte1;
  1290. coex_dm->ps_tdma_para[1] = byte2;
  1291. coex_dm->ps_tdma_para[2] = byte3;
  1292. coex_dm->ps_tdma_para[3] = byte4;
  1293. coex_dm->ps_tdma_para[4] = real_byte5;
  1294. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1295. }
  1296. void halbtc8723d2ant_ps_tdma(IN struct btc_coexist *btcoexist,
  1297. IN boolean force_exec, IN boolean turn_on, IN u8 type)
  1298. {
  1299. static u8 psTdmaByte4Modify = 0x0, pre_psTdmaByte4Modify = 0x0;
  1300. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1301. coex_dm->cur_ps_tdma_on = turn_on;
  1302. coex_dm->cur_ps_tdma = type;
  1303. /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
  1304. if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
  1305. psTdmaByte4Modify = 0x1;
  1306. else
  1307. psTdmaByte4Modify = 0x0;
  1308. if (pre_psTdmaByte4Modify != psTdmaByte4Modify) {
  1309. force_exec = true;
  1310. pre_psTdmaByte4Modify = psTdmaByte4Modify;
  1311. }
  1312. if (!force_exec) {
  1313. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1314. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1315. return;
  1316. }
  1317. if (coex_dm->cur_ps_tdma_on) {
  1318. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1319. "[BTCoex], ********** TDMA(on, %d) **********\n",
  1320. coex_dm->cur_ps_tdma);
  1321. BTC_TRACE(trace_buf);
  1322. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
  1323. 0x1); /* enable TBTT nterrupt */
  1324. } else {
  1325. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1326. "[BTCoex], ********** TDMA(off, %d) **********\n",
  1327. coex_dm->cur_ps_tdma);
  1328. BTC_TRACE(trace_buf);
  1329. }
  1330. if (turn_on) {
  1331. switch (type) {
  1332. case 1:
  1333. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1334. 0x10, 0x03, 0x91,
  1335. 0x54 | psTdmaByte4Modify);
  1336. break;
  1337. case 2:
  1338. default:
  1339. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1340. 0x35, 0x03, 0x11,
  1341. 0x11 | psTdmaByte4Modify);
  1342. break;
  1343. case 3:
  1344. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1345. 0x3a, 0x3, 0x91,
  1346. 0x10 | psTdmaByte4Modify);
  1347. break;
  1348. case 4:
  1349. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1350. 0x21, 0x3, 0x91,
  1351. 0x10 | psTdmaByte4Modify);
  1352. break;
  1353. case 5:
  1354. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1355. 0x25, 0x3, 0x91,
  1356. 0x10 | psTdmaByte4Modify);
  1357. break;
  1358. case 6:
  1359. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1360. 0x10, 0x3, 0x91,
  1361. 0x10 | psTdmaByte4Modify);
  1362. break;
  1363. case 7:
  1364. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1365. 0x20, 0x3, 0x91,
  1366. 0x10 | psTdmaByte4Modify);
  1367. break;
  1368. case 8:
  1369. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1370. 0x15, 0x03, 0x11,
  1371. 0x11);
  1372. break;
  1373. case 10:
  1374. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1375. 0x30, 0x03, 0x11,
  1376. 0x10);
  1377. break;
  1378. case 11:
  1379. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1380. 0x35, 0x03, 0x11,
  1381. 0x10 | psTdmaByte4Modify);
  1382. break;
  1383. case 12:
  1384. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1385. 0x35, 0x03, 0x11, 0x11);
  1386. break;
  1387. case 13:
  1388. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1389. 0x1c, 0x03, 0x11,
  1390. 0x10 | psTdmaByte4Modify);
  1391. break;
  1392. case 14:
  1393. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1394. 0x20, 0x03, 0x11,
  1395. 0x11);
  1396. break;
  1397. case 15:
  1398. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1399. 0x10, 0x03, 0x11,
  1400. 0x14);
  1401. break;
  1402. case 16:
  1403. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1404. 0x10, 0x03, 0x11,
  1405. 0x15);
  1406. break;
  1407. case 21:
  1408. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1409. 0x30, 0x03, 0x11,
  1410. 0x10);
  1411. break;
  1412. case 22:
  1413. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1414. 0x25, 0x03, 0x11,
  1415. 0x10);
  1416. break;
  1417. case 23:
  1418. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1419. 0x10, 0x03, 0x11,
  1420. 0x10);
  1421. break;
  1422. case 51:
  1423. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1424. 0x10, 0x03, 0x91,
  1425. 0x10 | psTdmaByte4Modify);
  1426. break;
  1427. case 101:
  1428. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1429. 0x10, 0x03, 0x10,
  1430. 0x54 | psTdmaByte4Modify);
  1431. break;
  1432. case 102:
  1433. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x61,
  1434. 0x35, 0x03, 0x11,
  1435. 0x11 | psTdmaByte4Modify);
  1436. break;
  1437. case 103:
  1438. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1439. 0x3a, 0x3, 0x10,
  1440. 0x50 | psTdmaByte4Modify);
  1441. break;
  1442. case 104:
  1443. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1444. 0x21, 0x3, 0x10,
  1445. 0x50 | psTdmaByte4Modify);
  1446. break;
  1447. case 105:
  1448. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1449. 0x25, 0x3, 0x10,
  1450. 0x50 | psTdmaByte4Modify);
  1451. break;
  1452. case 106:
  1453. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1454. 0x10, 0x3, 0x10,
  1455. 0x50 | psTdmaByte4Modify);
  1456. break;
  1457. case 107:
  1458. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1459. 0x20, 0x3, 0x10,
  1460. 0x50 | psTdmaByte4Modify);
  1461. break;
  1462. case 108:
  1463. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1464. 0x30, 0x3, 0x10,
  1465. 0x50 | psTdmaByte4Modify);
  1466. break;
  1467. case 109:
  1468. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x55,
  1469. 0x10, 0x03, 0x10,
  1470. 0x54 | psTdmaByte4Modify);
  1471. break;
  1472. case 110:
  1473. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x55,
  1474. 0x30, 0x03, 0x10,
  1475. 0x50 | psTdmaByte4Modify);
  1476. break;
  1477. case 111:
  1478. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x65,
  1479. 0x25, 0x03, 0x11,
  1480. 0x11 | psTdmaByte4Modify);
  1481. break;
  1482. case 151:
  1483. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x51,
  1484. 0x10, 0x03, 0x10,
  1485. 0x50 | psTdmaByte4Modify);
  1486. break;
  1487. }
  1488. } else {
  1489. /* disable PS tdma */
  1490. switch (type) {
  1491. case 0:
  1492. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
  1493. 0x0, 0x0, 0x40, 0x0);
  1494. break;
  1495. case 1:
  1496. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
  1497. 0x0, 0x0, 0x48, 0x0);
  1498. break;
  1499. default:
  1500. halbtc8723d2ant_set_fw_pstdma(btcoexist, 0x0,
  1501. 0x0, 0x0, 0x40, 0x0);
  1502. break;
  1503. }
  1504. }
  1505. /* update pre state */
  1506. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1507. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1508. }
  1509. void halbtc8723d2ant_set_ant_path(IN struct btc_coexist *btcoexist,
  1510. IN u8 ant_pos_type, IN boolean force_exec,
  1511. IN u8 phase)
  1512. {
  1513. struct btc_board_info *board_info = &btcoexist->board_info;
  1514. u32 u32tmp = 0;
  1515. boolean pg_ext_switch = false, is_hw_ant_div_on = false;
  1516. u8 h2c_parameter[2] = {0};
  1517. u32 cnt_bt_cal_chk = 0;
  1518. u8 u8tmp0 = 0, u8tmp1 = 0;
  1519. boolean is_in_mp_mode = false;
  1520. u32 u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
  1521. u16 u16tmp0 = 0, u16tmp1 = 0;
  1522. u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  1523. 0x38);
  1524. /* To avoid indirect access fail */
  1525. if (((u32tmp1 & 0xf000) >> 12) != ((u32tmp1 & 0x0f00) >> 8)) {
  1526. force_exec = true;
  1527. coex_sta->gnt_error_cnt++;
  1528. }
  1529. #if BT_8723D_2ANT_COEX_DBG
  1530. u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  1531. u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
  1532. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  1533. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  1534. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  1535. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1536. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before Set Ant Pat)\n",
  1537. u8tmp0, u16tmp1, u8tmp1);
  1538. BTC_TRACE(trace_buf);
  1539. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1540. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa = 0x%x (Before Set Ant Path)\n",
  1541. u32tmp1, u32tmp2, u16tmp0);
  1542. BTC_TRACE(trace_buf);
  1543. #endif
  1544. coex_dm->cur_ant_pos_type = ant_pos_type;
  1545. if (!force_exec) {
  1546. if (coex_dm->cur_ant_pos_type == coex_dm->pre_ant_pos_type) {
  1547. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1548. "[BTCoex], ********** Skip Antenna Path Setup because no change!!**********\n");
  1549. BTC_TRACE(trace_buf);
  1550. return;
  1551. }
  1552. }
  1553. coex_dm->pre_ant_pos_type = coex_dm->cur_ant_pos_type;
  1554. switch (phase) {
  1555. case BT_8723D_2ANT_PHASE_COEX_POWERON:
  1556. /* Set Path control to WL */
  1557. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1558. 0x80, 0x0);
  1559. /* set Path control owner to WL at initial step */
  1560. halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
  1561. BT_8723D_2ANT_PCO_BTSIDE);
  1562. /* set GNT_BT to SW high */
  1563. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1564. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1565. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1566. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1567. /* Set GNT_WL to SW low */
  1568. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1569. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1570. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1571. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1572. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1573. ant_pos_type = BTC_ANT_PATH_WIFI;
  1574. coex_sta->run_time_state = false;
  1575. break;
  1576. case BT_8723D_2ANT_PHASE_COEX_INIT:
  1577. /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
  1578. halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
  1579. /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
  1580. halbtc8723d2ant_ltecoex_set_coex_table(
  1581. btcoexist,
  1582. BT_8723D_2ANT_CTT_WL_VS_LTE,
  1583. 0xffff);
  1584. /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
  1585. halbtc8723d2ant_ltecoex_set_coex_table(
  1586. btcoexist,
  1587. BT_8723D_2ANT_CTT_BT_VS_LTE,
  1588. 0xffff);
  1589. /* Wait If BT IQK running, because Path control owner is at BT during BT IQK (setup by WiFi firmware) */
  1590. while (cnt_bt_cal_chk <= 20) {
  1591. u8tmp0 = btcoexist->btc_read_1byte(
  1592. btcoexist,
  1593. 0x49d);
  1594. cnt_bt_cal_chk++;
  1595. if (u8tmp0 & BIT(0)) {
  1596. BTC_SPRINTF(
  1597. trace_buf,
  1598. BT_TMP_BUF_SIZE,
  1599. "[BTCoex], ########### BT is calibrating (wait cnt=%d) ###########\n",
  1600. cnt_bt_cal_chk);
  1601. BTC_TRACE(
  1602. trace_buf);
  1603. delay_ms(50);
  1604. } else {
  1605. BTC_SPRINTF(
  1606. trace_buf,
  1607. BT_TMP_BUF_SIZE,
  1608. "[BTCoex], ********** BT is NOT calibrating (wait cnt=%d)**********\n",
  1609. cnt_bt_cal_chk);
  1610. BTC_TRACE(
  1611. trace_buf);
  1612. break;
  1613. }
  1614. }
  1615. /* Set Path control to WL */
  1616. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1617. 0x67, 0x80, 0x1);
  1618. /* set Path control owner to WL at initial step */
  1619. halbtc8723d2ant_ltecoex_pathcontrol_owner(
  1620. btcoexist,
  1621. BT_8723D_2ANT_PCO_WLSIDE);
  1622. /* set GNT_BT to SW high */
  1623. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1624. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1625. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1626. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1627. /* Set GNT_WL to SW high */
  1628. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1629. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1630. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1631. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1632. coex_sta->run_time_state = false;
  1633. if (BTC_ANT_PATH_AUTO == ant_pos_type) {
  1634. if (board_info->btdm_ant_pos ==
  1635. BTC_ANTENNA_AT_MAIN_PORT)
  1636. ant_pos_type =
  1637. BTC_ANT_WIFI_AT_MAIN;
  1638. else
  1639. ant_pos_type =
  1640. BTC_ANT_WIFI_AT_AUX;
  1641. }
  1642. break;
  1643. case BT_8723D_2ANT_PHASE_WLANONLY_INIT:
  1644. /* Disable LTE Coex Function in WiFi side (this should be on if LTE coex is required) */
  1645. halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
  1646. /* GNT_WL_LTE always = 1 (this should be config if LTE coex is required) */
  1647. halbtc8723d2ant_ltecoex_set_coex_table(
  1648. btcoexist,
  1649. BT_8723D_2ANT_CTT_WL_VS_LTE,
  1650. 0xffff);
  1651. /* GNT_BT_LTE always = 1 (this should be config if LTE coex is required) */
  1652. halbtc8723d2ant_ltecoex_set_coex_table(
  1653. btcoexist,
  1654. BT_8723D_2ANT_CTT_BT_VS_LTE,
  1655. 0xffff);
  1656. /* Set Path control to WL */
  1657. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1658. 0x67, 0x80, 0x1);
  1659. /* set Path control owner to WL at initial step */
  1660. halbtc8723d2ant_ltecoex_pathcontrol_owner(
  1661. btcoexist,
  1662. BT_8723D_2ANT_PCO_WLSIDE);
  1663. /* set GNT_BT to SW Low */
  1664. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1665. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1666. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1667. BT_8723D_2ANT_SIG_STA_SET_TO_LOW);
  1668. /* Set GNT_WL to SW high */
  1669. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1670. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1671. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1672. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1673. coex_sta->run_time_state = false;
  1674. if (BTC_ANT_PATH_AUTO == ant_pos_type) {
  1675. if (board_info->btdm_ant_pos ==
  1676. BTC_ANTENNA_AT_MAIN_PORT)
  1677. ant_pos_type =
  1678. BTC_ANT_WIFI_AT_MAIN;
  1679. else
  1680. ant_pos_type =
  1681. BTC_ANT_WIFI_AT_AUX;
  1682. }
  1683. break;
  1684. case BT_8723D_2ANT_PHASE_WLAN_OFF:
  1685. /* Disable LTE Coex Function in WiFi side */
  1686. halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
  1687. /* Set Path control to BT */
  1688. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1689. 0x67, 0x80, 0x0);
  1690. /* set Path control owner to BT */
  1691. halbtc8723d2ant_ltecoex_pathcontrol_owner(
  1692. btcoexist,
  1693. BT_8723D_2ANT_PCO_BTSIDE);
  1694. coex_sta->run_time_state = false;
  1695. break;
  1696. case BT_8723D_2ANT_PHASE_2G_RUNTIME:
  1697. /* wait for WL/BT IQK finish, keep 0x38 = 0xff00 for WL IQK */
  1698. while (cnt_bt_cal_chk <= 20) {
  1699. u8tmp0 = btcoexist->btc_read_1byte(
  1700. btcoexist,
  1701. 0x1e6);
  1702. u8tmp1 = btcoexist->btc_read_1byte(
  1703. btcoexist,
  1704. 0x49d);
  1705. cnt_bt_cal_chk++;
  1706. if ((u8tmp0 & BIT(0)) ||
  1707. (u8tmp1 & BIT(0))) {
  1708. BTC_SPRINTF(trace_buf,
  1709. BT_TMP_BUF_SIZE,
  1710. "[BTCoex], ########### WL or BT is IQK (wait cnt=%d)\n",
  1711. cnt_bt_cal_chk);
  1712. BTC_TRACE(trace_buf);
  1713. delay_ms(50);
  1714. } else {
  1715. BTC_SPRINTF(trace_buf,
  1716. BT_TMP_BUF_SIZE,
  1717. "[BTCoex], ********** WL and BT is NOT IQK (wait cnt=%d)\n",
  1718. cnt_bt_cal_chk);
  1719. BTC_TRACE(trace_buf);
  1720. break;
  1721. }
  1722. }
  1723. /* Set Path control to WL */
  1724. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);*/
  1725. /* set Path control owner to WL at runtime step */
  1726. halbtc8723d2ant_ltecoex_pathcontrol_owner(
  1727. btcoexist,
  1728. BT_8723D_2ANT_PCO_WLSIDE);
  1729. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1730. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1731. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA,
  1732. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1733. /* Set GNT_WL to PTA */
  1734. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1735. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1736. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA,
  1737. BT_8723D_2ANT_SIG_STA_SET_BY_HW);
  1738. coex_sta->run_time_state = true;
  1739. if (BTC_ANT_PATH_AUTO == ant_pos_type) {
  1740. if (board_info->btdm_ant_pos ==
  1741. BTC_ANTENNA_AT_MAIN_PORT)
  1742. ant_pos_type =
  1743. BTC_ANT_WIFI_AT_MAIN;
  1744. else
  1745. ant_pos_type =
  1746. BTC_ANT_WIFI_AT_AUX;
  1747. }
  1748. break;
  1749. case BT_8723D_2ANT_PHASE_BTMPMODE:
  1750. /* Disable LTE Coex Function in WiFi side */
  1751. halbtc8723d2ant_ltecoex_enable(btcoexist, 0x0);
  1752. /* Set Path control to WL */
  1753. btcoexist->btc_write_1byte_bitmask(btcoexist,
  1754. 0x67, 0x80, 0x1);
  1755. /* set Path control owner to WL */
  1756. halbtc8723d2ant_ltecoex_pathcontrol_owner(
  1757. btcoexist,
  1758. BT_8723D_2ANT_PCO_WLSIDE);
  1759. /* set GNT_BT to SW Hi */
  1760. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1761. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1762. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1763. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1764. /* Set GNT_WL to SW Lo */
  1765. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1766. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1767. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1768. BT_8723D_2ANT_SIG_STA_SET_TO_LOW);
  1769. coex_sta->run_time_state = false;
  1770. if (BTC_ANT_PATH_AUTO == ant_pos_type) {
  1771. if (board_info->btdm_ant_pos ==
  1772. BTC_ANTENNA_AT_MAIN_PORT)
  1773. ant_pos_type =
  1774. BTC_ANT_WIFI_AT_MAIN;
  1775. else
  1776. ant_pos_type =
  1777. BTC_ANT_WIFI_AT_AUX;
  1778. }
  1779. break;
  1780. case BT_8723D_2ANT_PHASE_ANTENNA_DET:
  1781. /* Set Path control to WL */
  1782. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67,
  1783. 0x80, 0x1);
  1784. /* set Path control owner to WL */
  1785. halbtc8723d2ant_ltecoex_pathcontrol_owner(btcoexist,
  1786. BT_8723D_2ANT_PCO_WLSIDE);
  1787. /* Set Antenna Path, both GNT_WL/GNT_BT = 1, and control by SW */
  1788. /* set GNT_BT to SW high */
  1789. halbtc8723d2ant_ltecoex_set_gnt_bt(btcoexist,
  1790. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1791. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1792. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1793. /* Set GNT_WL to SW high */
  1794. halbtc8723d2ant_ltecoex_set_gnt_wl(btcoexist,
  1795. BT_8723D_2ANT_GNT_BLOCK_RFC_BB,
  1796. BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW,
  1797. BT_8723D_2ANT_SIG_STA_SET_TO_HIGH);
  1798. if (BTC_ANT_PATH_AUTO == ant_pos_type)
  1799. ant_pos_type = BTC_ANT_WIFI_AT_AUX;
  1800. coex_sta->run_time_state = false;
  1801. break;
  1802. }
  1803. is_hw_ant_div_on = board_info->ant_div_cfg;
  1804. if ((is_hw_ant_div_on) && (phase != BT_8723D_2ANT_PHASE_ANTENNA_DET))
  1805. btcoexist->btc_write_2byte(btcoexist, 0x948, 0x140);
  1806. else if ((is_hw_ant_div_on == false) &&
  1807. (phase != BT_8723D_2ANT_PHASE_WLAN_OFF)) {
  1808. switch (ant_pos_type) {
  1809. case BTC_ANT_WIFI_AT_MAIN:
  1810. btcoexist->btc_write_2byte(btcoexist,
  1811. 0x948, 0x0);
  1812. break;
  1813. case BTC_ANT_WIFI_AT_AUX:
  1814. btcoexist->btc_write_2byte(btcoexist,
  1815. 0x948, 0x280);
  1816. break;
  1817. }
  1818. }
  1819. #if BT_8723D_2ANT_COEX_DBG
  1820. u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  1821. u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  1822. u16tmp0 = btcoexist->btc_read_2byte(btcoexist, 0xaa);
  1823. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  1824. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  1825. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  1826. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1827. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(After Set Ant Pat)\n",
  1828. u8tmp0, u16tmp1, u8tmp1);
  1829. BTC_TRACE(trace_buf);
  1830. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1831. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x, 0xaa= 0x%x (After Set Ant Path)\n",
  1832. u32tmp1, u32tmp2, u16tmp0);
  1833. BTC_TRACE(trace_buf);
  1834. #endif
  1835. }
  1836. u8 halbtc8723d2ant_action_algorithm(IN struct btc_coexist *btcoexist)
  1837. {
  1838. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1839. boolean bt_hs_on = false;
  1840. u8 algorithm = BT_8723D_2ANT_COEX_ALGO_UNDEFINED;
  1841. u8 num_of_diff_profile = 0;
  1842. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  1843. if (!bt_link_info->bt_link_exist) {
  1844. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1845. "[BTCoex], No BT link exists!!!\n");
  1846. BTC_TRACE(trace_buf);
  1847. return algorithm;
  1848. }
  1849. if (bt_link_info->sco_exist)
  1850. num_of_diff_profile++;
  1851. if (bt_link_info->hid_exist)
  1852. num_of_diff_profile++;
  1853. if (bt_link_info->pan_exist)
  1854. num_of_diff_profile++;
  1855. if (bt_link_info->a2dp_exist)
  1856. num_of_diff_profile++;
  1857. if (num_of_diff_profile == 0) {
  1858. if (bt_link_info->acl_busy) {
  1859. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1860. "[BTCoex], No-Profile busy\n");
  1861. BTC_TRACE(trace_buf);
  1862. algorithm = BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY;
  1863. }
  1864. } else if (num_of_diff_profile == 1) {
  1865. if (bt_link_info->sco_exist) {
  1866. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1867. "[BTCoex], SCO only\n");
  1868. BTC_TRACE(trace_buf);
  1869. algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
  1870. } else {
  1871. if (bt_link_info->hid_exist) {
  1872. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1873. "[BTCoex], HID only\n");
  1874. BTC_TRACE(trace_buf);
  1875. algorithm = BT_8723D_2ANT_COEX_ALGO_HID;
  1876. } else if (bt_link_info->a2dp_exist) {
  1877. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1878. "[BTCoex], A2DP only\n");
  1879. BTC_TRACE(trace_buf);
  1880. algorithm = BT_8723D_2ANT_COEX_ALGO_A2DP;
  1881. } else if (bt_link_info->pan_exist) {
  1882. if (bt_hs_on) {
  1883. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1884. "[BTCoex], PAN(HS) only\n");
  1885. BTC_TRACE(trace_buf);
  1886. algorithm =
  1887. BT_8723D_2ANT_COEX_ALGO_PANHS;
  1888. } else {
  1889. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1890. "[BTCoex], PAN(EDR) only\n");
  1891. BTC_TRACE(trace_buf);
  1892. algorithm =
  1893. BT_8723D_2ANT_COEX_ALGO_PANEDR;
  1894. }
  1895. }
  1896. }
  1897. } else if (num_of_diff_profile == 2) {
  1898. if (bt_link_info->sco_exist) {
  1899. if (bt_link_info->hid_exist) {
  1900. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1901. "[BTCoex], SCO + HID\n");
  1902. BTC_TRACE(trace_buf);
  1903. algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
  1904. } else if (bt_link_info->a2dp_exist) {
  1905. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1906. "[BTCoex], SCO + A2DP ==> A2DP\n");
  1907. BTC_TRACE(trace_buf);
  1908. algorithm = BT_8723D_2ANT_COEX_ALGO_A2DP;
  1909. } else if (bt_link_info->pan_exist) {
  1910. if (bt_hs_on) {
  1911. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1912. "[BTCoex], SCO + PAN(HS)\n");
  1913. BTC_TRACE(trace_buf);
  1914. algorithm = BT_8723D_2ANT_COEX_ALGO_SCO;
  1915. } else {
  1916. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1917. "[BTCoex], SCO + PAN(EDR)\n");
  1918. BTC_TRACE(trace_buf);
  1919. algorithm =
  1920. BT_8723D_2ANT_COEX_ALGO_PANEDR;
  1921. }
  1922. }
  1923. } else {
  1924. if (bt_link_info->hid_exist &&
  1925. bt_link_info->a2dp_exist) {
  1926. {
  1927. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1928. "[BTCoex], HID + A2DP\n");
  1929. BTC_TRACE(trace_buf);
  1930. algorithm =
  1931. BT_8723D_2ANT_COEX_ALGO_HID_A2DP;
  1932. }
  1933. } else if (bt_link_info->hid_exist &&
  1934. bt_link_info->pan_exist) {
  1935. if (bt_hs_on) {
  1936. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1937. "[BTCoex], HID + PAN(HS)\n");
  1938. BTC_TRACE(trace_buf);
  1939. algorithm = BT_8723D_2ANT_COEX_ALGO_HID;
  1940. } else {
  1941. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1942. "[BTCoex], HID + PAN(EDR)\n");
  1943. BTC_TRACE(trace_buf);
  1944. algorithm =
  1945. BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
  1946. }
  1947. } else if (bt_link_info->pan_exist &&
  1948. bt_link_info->a2dp_exist) {
  1949. if (bt_hs_on) {
  1950. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1951. "[BTCoex], A2DP + PAN(HS)\n");
  1952. BTC_TRACE(trace_buf);
  1953. algorithm =
  1954. BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS;
  1955. } else {
  1956. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1957. "[BTCoex], A2DP + PAN(EDR)\n");
  1958. BTC_TRACE(trace_buf);
  1959. algorithm =
  1960. BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
  1961. }
  1962. }
  1963. }
  1964. } else if (num_of_diff_profile == 3) {
  1965. if (bt_link_info->sco_exist) {
  1966. if (bt_link_info->hid_exist &&
  1967. bt_link_info->a2dp_exist) {
  1968. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1969. "[BTCoex], SCO + HID + A2DP ==> HID + A2DP\n");
  1970. BTC_TRACE(trace_buf);
  1971. algorithm = BT_8723D_2ANT_COEX_ALGO_HID_A2DP;
  1972. } else if (bt_link_info->hid_exist &&
  1973. bt_link_info->pan_exist) {
  1974. if (bt_hs_on) {
  1975. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1976. "[BTCoex], SCO + HID + PAN(HS)\n");
  1977. BTC_TRACE(trace_buf);
  1978. algorithm =
  1979. BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
  1980. } else {
  1981. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1982. "[BTCoex], SCO + HID + PAN(EDR)\n");
  1983. BTC_TRACE(trace_buf);
  1984. algorithm =
  1985. BT_8723D_2ANT_COEX_ALGO_PANEDR_HID;
  1986. }
  1987. } else if (bt_link_info->pan_exist &&
  1988. bt_link_info->a2dp_exist) {
  1989. if (bt_hs_on) {
  1990. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1991. "[BTCoex], SCO + A2DP + PAN(HS)\n");
  1992. BTC_TRACE(trace_buf);
  1993. algorithm =
  1994. BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
  1995. } else {
  1996. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  1997. "[BTCoex], SCO + A2DP + PAN(EDR) ==> HID\n");
  1998. BTC_TRACE(trace_buf);
  1999. algorithm =
  2000. BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP;
  2001. }
  2002. }
  2003. } else {
  2004. if (bt_link_info->hid_exist &&
  2005. bt_link_info->pan_exist &&
  2006. bt_link_info->a2dp_exist) {
  2007. if (bt_hs_on) {
  2008. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2009. "[BTCoex], HID + A2DP + PAN(HS)\n");
  2010. BTC_TRACE(trace_buf);
  2011. algorithm =
  2012. BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  2013. } else {
  2014. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2015. "[BTCoex], HID + A2DP + PAN(EDR)\n");
  2016. BTC_TRACE(trace_buf);
  2017. algorithm =
  2018. BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  2019. }
  2020. }
  2021. }
  2022. } else if (num_of_diff_profile >= 3) {
  2023. if (bt_link_info->sco_exist) {
  2024. if (bt_link_info->hid_exist &&
  2025. bt_link_info->pan_exist &&
  2026. bt_link_info->a2dp_exist) {
  2027. if (bt_hs_on) {
  2028. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2029. "[BTCoex], Error!!! SCO + HID + A2DP + PAN(HS)\n");
  2030. BTC_TRACE(trace_buf);
  2031. algorithm =
  2032. BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  2033. } else {
  2034. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2035. "[BTCoex], SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
  2036. BTC_TRACE(trace_buf);
  2037. algorithm =
  2038. BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  2039. }
  2040. }
  2041. }
  2042. }
  2043. return algorithm;
  2044. }
  2045. void halbtc8723d2ant_action_coex_all_off(IN struct btc_coexist *btcoexist)
  2046. {
  2047. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2048. /* fw all off */
  2049. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2050. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2051. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2052. }
  2053. void halbtc8723d2ant_action_bt_whql_test(IN struct btc_coexist *btcoexist)
  2054. {
  2055. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2056. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2057. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2058. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2059. }
  2060. void halbtc8723d2ant_action_bt_hs(IN struct btc_coexist *btcoexist)
  2061. {
  2062. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2063. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2064. u8 wifi_rssi_state, bt_rssi_state;
  2065. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2066. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2067. u8 wifi_rssi_state2, bt_rssi_state2;
  2068. boolean wifi_busy = false, wifi_turbo = false;
  2069. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2070. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  2071. &coex_sta->scan_ap_num);
  2072. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2073. "############# [BTCoex], scan_ap_num = %d, wl_noisy = %d\n",
  2074. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2075. BTC_TRACE(trace_buf);
  2076. #if 1
  2077. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2078. wifi_turbo = true;
  2079. #endif
  2080. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2081. &prewifi_rssi_state, 2,
  2082. coex_sta->wifi_coex_thres , 0);
  2083. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2084. &prewifi_rssi_state2, 2,
  2085. coex_sta->wifi_coex_thres2 , 0);
  2086. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2087. coex_sta->bt_coex_thres , 0);
  2088. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2089. coex_sta->bt_coex_thres2 , 0);
  2090. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2091. BTC_RSSI_HIGH(bt_rssi_state)) {
  2092. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2093. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2094. coex_dm->is_switch_to_1dot5_ant = false;
  2095. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2096. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2097. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2098. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2099. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2100. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2101. coex_dm->is_switch_to_1dot5_ant = false;
  2102. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2103. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2104. } else {
  2105. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2106. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2107. coex_dm->is_switch_to_1dot5_ant = true;
  2108. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2109. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2110. }
  2111. }
  2112. void halbtc8723d2ant_action_bt_inquiry(IN struct btc_coexist *btcoexist)
  2113. {
  2114. boolean wifi_connected = false;
  2115. boolean wifi_scan = false, wifi_link = false, wifi_roam = false;
  2116. boolean wifi_busy = false;
  2117. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2118. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2119. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  2120. &wifi_connected);
  2121. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
  2122. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
  2123. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
  2124. if ((coex_sta->bt_create_connection) && ((wifi_link) || (wifi_roam)
  2125. || (wifi_scan) || (wifi_busy) || (coex_sta->wifi_is_high_pri_task))) {
  2126. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2127. "[BTCoex], Wifi link/roam/Scan/busy/hi-pri-task + BT Inq/Page!!\n");
  2128. BTC_TRACE(trace_buf);
  2129. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2130. 8);
  2131. if ((bt_link_info->a2dp_exist) && (!bt_link_info->pan_exist))
  2132. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2133. 15);
  2134. else
  2135. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2136. 11);
  2137. } else if ((!wifi_connected) && (!wifi_scan)) {
  2138. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2139. "[BTCoex], Wifi no-link + no-scan + BT Inq/Page!!\n");
  2140. BTC_TRACE(trace_buf);
  2141. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2142. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2143. } else if (bt_link_info->pan_exist) {
  2144. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  2145. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2146. } else if (bt_link_info->a2dp_exist) {
  2147. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
  2148. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2149. } else {
  2150. if ((wifi_link) || (wifi_roam) || (wifi_scan) || (wifi_busy)
  2151. || (coex_sta->wifi_is_high_pri_task))
  2152. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
  2153. else
  2154. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 23);
  2155. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2156. }
  2157. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
  2158. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2159. }
  2160. void halbtc8723d2ant_action_bt_relink(IN struct btc_coexist *btcoexist)
  2161. {
  2162. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
  2163. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2164. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
  2165. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2166. coex_sta->bt_relink_downcount = 2;
  2167. }
  2168. void halbtc8723d2ant_action_bt_idle(IN struct btc_coexist *btcoexist)
  2169. {
  2170. boolean wifi_busy = false;
  2171. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2172. if (!wifi_busy) {
  2173. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2174. NORMAL_EXEC, 8);
  2175. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  2176. } else { /* if wl busy */
  2177. if (BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  2178. coex_dm->bt_status) {
  2179. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2180. NORMAL_EXEC, 0);
  2181. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2182. } else {
  2183. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2184. NORMAL_EXEC, 8);
  2185. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2186. 12);
  2187. }
  2188. }
  2189. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
  2190. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2191. }
  2192. /* SCO only or SCO+PAN(HS) */
  2193. void halbtc8723d2ant_action_sco(IN struct btc_coexist *btcoexist)
  2194. {
  2195. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2196. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2197. u8 wifi_rssi_state, bt_rssi_state;
  2198. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2199. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2200. u8 wifi_rssi_state2, bt_rssi_state2;
  2201. boolean wifi_busy = false;
  2202. u32 wifi_bw = 1;
  2203. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
  2204. &wifi_bw);
  2205. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2206. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2207. &prewifi_rssi_state, 2,
  2208. coex_sta->wifi_coex_thres , 0);
  2209. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2210. &prewifi_rssi_state2, 2,
  2211. coex_sta->wifi_coex_thres2 , 0);
  2212. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2213. coex_sta->bt_coex_thres , 0);
  2214. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2215. coex_sta->bt_coex_thres2 , 0);
  2216. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2217. BTC_RSSI_HIGH(bt_rssi_state)) {
  2218. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2219. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2220. coex_dm->is_switch_to_1dot5_ant = false;
  2221. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2222. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2223. } else {
  2224. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2225. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2226. coex_dm->is_switch_to_1dot5_ant = false;
  2227. if (coex_sta->is_eSCO_mode)
  2228. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2229. else /* 2-Ant free run if eSCO mode */
  2230. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2231. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
  2232. }
  2233. }
  2234. void halbtc8723d2ant_action_hid(IN struct btc_coexist *btcoexist)
  2235. {
  2236. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2237. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2238. u8 wifi_rssi_state, bt_rssi_state;
  2239. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2240. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2241. u8 wifi_rssi_state2, bt_rssi_state2;
  2242. boolean wifi_busy = false;
  2243. u32 wifi_bw = 1;
  2244. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2245. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2246. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2247. &prewifi_rssi_state, 2,
  2248. coex_sta->wifi_coex_thres , 0);
  2249. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2250. &prewifi_rssi_state2, 2,
  2251. coex_sta->wifi_coex_thres2 , 0);
  2252. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2253. coex_sta->bt_coex_thres , 0);
  2254. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2255. coex_sta->bt_coex_thres2 , 0);
  2256. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2257. BTC_RSSI_HIGH(bt_rssi_state)) {
  2258. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2259. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2260. coex_dm->is_switch_to_1dot5_ant = false;
  2261. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2262. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2263. } else {
  2264. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2265. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2266. coex_dm->is_switch_to_1dot5_ant = false;
  2267. /*for 4/18 hid */
  2268. if (coex_sta->hid_busy_num >= 2) {
  2269. if (wifi_bw == 0) { /* if 11bg mode */
  2270. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2271. NORMAL_EXEC, 8);
  2272. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2273. NORMAL_EXEC,
  2274. 0x1, 0xaa,
  2275. 0x5a, 0xaa,
  2276. 0xaa);
  2277. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2278. 111);
  2279. } else {
  2280. if (wifi_busy) {
  2281. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2282. NORMAL_EXEC, 8);
  2283. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2284. NORMAL_EXEC,
  2285. 0x2, 0xaa,
  2286. 0x5a, 0xaa,
  2287. 0xaa);
  2288. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2289. 111);
  2290. } else {
  2291. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2292. 3);
  2293. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  2294. }
  2295. }
  2296. } else {
  2297. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2298. 3);
  2299. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  2300. }
  2301. }
  2302. }
  2303. /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
  2304. void halbtc8723d2ant_action_a2dp(IN struct btc_coexist *btcoexist)
  2305. {
  2306. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2307. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2308. u8 wifi_rssi_state, bt_rssi_state;
  2309. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2310. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2311. u8 wifi_rssi_state2, bt_rssi_state2;
  2312. boolean wifi_busy = false, wifi_turbo = false;
  2313. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2314. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  2315. &coex_sta->scan_ap_num);
  2316. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2317. "############# [BTCoex], scan_ap_num = %d, wl_noisy = %d\n",
  2318. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2319. BTC_TRACE(trace_buf);
  2320. #if 1
  2321. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2322. wifi_turbo = true;
  2323. #endif
  2324. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2325. &prewifi_rssi_state, 2,
  2326. coex_sta->wifi_coex_thres , 0);
  2327. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2328. &prewifi_rssi_state2, 2,
  2329. coex_sta->wifi_coex_thres2 , 0);
  2330. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2331. coex_sta->bt_coex_thres , 0);
  2332. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2333. coex_sta->bt_coex_thres2 , 0);
  2334. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2335. BTC_RSSI_HIGH(bt_rssi_state)) {
  2336. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2337. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2338. coex_dm->is_switch_to_1dot5_ant = false;
  2339. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2340. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2341. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2342. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2343. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2344. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2345. coex_dm->is_switch_to_1dot5_ant = false;
  2346. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2347. if (wifi_busy)
  2348. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2349. true, 1);
  2350. else
  2351. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2352. 16);
  2353. } else {
  2354. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2355. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2356. coex_dm->is_switch_to_1dot5_ant = true;
  2357. if ((coex_sta->bt_relink_downcount != 0)
  2358. && (wifi_busy)) {
  2359. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2360. "############# [BTCoex], BT Re-Link + A2DP + WL busy\n");
  2361. BTC_TRACE(trace_buf);
  2362. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2363. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  2364. } else {
  2365. if (wifi_turbo)
  2366. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2367. NORMAL_EXEC, 6);
  2368. else
  2369. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2370. 7);
  2371. if (wifi_busy)
  2372. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2373. true, 101);
  2374. else
  2375. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2376. 16);
  2377. /*halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2378. 102);*/
  2379. }
  2380. }
  2381. }
  2382. void halbtc8723d2ant_action_pan_edr(IN struct btc_coexist *btcoexist)
  2383. {
  2384. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2385. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2386. u8 wifi_rssi_state, bt_rssi_state;
  2387. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2388. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2389. u8 wifi_rssi_state2, bt_rssi_state2;
  2390. boolean wifi_busy = false, wifi_turbo = false;
  2391. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2392. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  2393. &coex_sta->scan_ap_num);
  2394. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2395. "############# [BTCoex], scan_ap_num = %d, wl_noisy = %d\n",
  2396. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2397. BTC_TRACE(trace_buf);
  2398. #if 1
  2399. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2400. wifi_turbo = true;
  2401. #endif
  2402. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2403. &prewifi_rssi_state, 2,
  2404. coex_sta->wifi_coex_thres , 0);
  2405. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2406. &prewifi_rssi_state2, 2,
  2407. coex_sta->wifi_coex_thres2 , 0);
  2408. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2409. coex_sta->bt_coex_thres , 0);
  2410. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2411. coex_sta->bt_coex_thres2 , 0);
  2412. #if 0
  2413. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2414. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2415. coex_dm->is_switch_to_1dot5_ant = false;
  2416. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2417. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2418. #endif
  2419. #if 1
  2420. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2421. BTC_RSSI_HIGH(bt_rssi_state)) {
  2422. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2423. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2424. coex_dm->is_switch_to_1dot5_ant = false;
  2425. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2426. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2427. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2428. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2429. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2430. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2431. coex_dm->is_switch_to_1dot5_ant = false;
  2432. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2433. if (wifi_busy)
  2434. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2435. 3);
  2436. else
  2437. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2438. 4);
  2439. } else {
  2440. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2441. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2442. coex_dm->is_switch_to_1dot5_ant = true;
  2443. if (wifi_turbo)
  2444. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2445. NORMAL_EXEC, 6);
  2446. else
  2447. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2448. 7);
  2449. if (wifi_busy)
  2450. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2451. 103);
  2452. else
  2453. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2454. 104);
  2455. }
  2456. #endif
  2457. }
  2458. void halbtc8723d2ant_action_hid_a2dp(IN struct btc_coexist *btcoexist)
  2459. {
  2460. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2461. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2462. u8 wifi_rssi_state, bt_rssi_state;
  2463. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2464. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2465. u8 wifi_rssi_state2, bt_rssi_state2;
  2466. boolean wifi_busy = false;
  2467. u32 wifi_bw = 1;
  2468. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
  2469. &wifi_bw);
  2470. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2471. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2472. &prewifi_rssi_state, 2,
  2473. coex_sta->wifi_coex_thres , 0);
  2474. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2475. &prewifi_rssi_state2, 2,
  2476. coex_sta->wifi_coex_thres2 , 0);
  2477. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2478. coex_sta->bt_coex_thres , 0);
  2479. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2480. coex_sta->bt_coex_thres2 , 0);
  2481. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2482. BTC_RSSI_HIGH(bt_rssi_state)) {
  2483. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2484. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2485. coex_dm->is_switch_to_1dot5_ant = false;
  2486. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2487. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2488. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2489. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2490. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2491. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2492. coex_dm->is_switch_to_1dot5_ant = false;
  2493. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2494. if (wifi_busy)
  2495. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2496. true, 1);
  2497. else
  2498. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2499. 16);
  2500. } else {
  2501. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2502. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2503. coex_dm->is_switch_to_1dot5_ant = true;
  2504. if ((coex_sta->bt_relink_downcount != 0)
  2505. && (wifi_busy)) {
  2506. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2507. "############# [BTCoex], BT Re-Link + A2DP + WL busy\n");
  2508. BTC_TRACE(trace_buf);
  2509. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2510. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
  2511. } else if (wifi_busy) {
  2512. if (coex_sta->hid_busy_num >= 2) {
  2513. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2514. NORMAL_EXEC, 8);
  2515. if (wifi_bw == 0) /*11bg mode */
  2516. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2517. NORMAL_EXEC,
  2518. 0x1, 0xaa,
  2519. 0x5a, 0xaa,
  2520. 0xaa);
  2521. else
  2522. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2523. NORMAL_EXEC,
  2524. 0x2, 0xaa,
  2525. 0x5a, 0xaa,
  2526. 0xaa);
  2527. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2528. 109);
  2529. } else {
  2530. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2531. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2532. true, 101);
  2533. }
  2534. } else {
  2535. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2536. 1);
  2537. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2538. 16);
  2539. }
  2540. }
  2541. }
  2542. void halbtc8723d2ant_action_a2dp_pan_hs(IN struct btc_coexist *btcoexist)
  2543. {
  2544. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2545. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2546. u8 wifi_rssi_state, bt_rssi_state;
  2547. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2548. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2549. u8 wifi_rssi_state2, bt_rssi_state2;
  2550. boolean wifi_busy = false, wifi_turbo = false;
  2551. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2552. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  2553. &coex_sta->scan_ap_num);
  2554. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2555. "############# [BTCoex], scan_ap_num = %d, wl_noisy = %d\n",
  2556. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2557. BTC_TRACE(trace_buf);
  2558. #if 1
  2559. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2560. wifi_turbo = true;
  2561. #endif
  2562. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2563. &prewifi_rssi_state, 2,
  2564. coex_sta->wifi_coex_thres , 0);
  2565. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2566. &prewifi_rssi_state2, 2,
  2567. coex_sta->wifi_coex_thres2 , 0);
  2568. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2569. coex_sta->bt_coex_thres , 0);
  2570. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2571. coex_sta->bt_coex_thres2 , 0);
  2572. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2573. BTC_RSSI_HIGH(bt_rssi_state)) {
  2574. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2575. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2576. coex_dm->is_switch_to_1dot5_ant = false;
  2577. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2578. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2579. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2580. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2581. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2582. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2583. coex_dm->is_switch_to_1dot5_ant = false;
  2584. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2585. if (wifi_busy) {
  2586. if ((coex_sta->a2dp_bit_pool > 40) &&
  2587. (coex_sta->a2dp_bit_pool < 255))
  2588. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2589. true, 7);
  2590. else
  2591. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2592. true, 5);
  2593. } else
  2594. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2595. 6);
  2596. } else {
  2597. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2598. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2599. coex_dm->is_switch_to_1dot5_ant = true;
  2600. if (wifi_turbo)
  2601. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2602. NORMAL_EXEC, 6);
  2603. else
  2604. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2605. 7);
  2606. if (wifi_busy) {
  2607. if ((coex_sta->a2dp_bit_pool > 40) &&
  2608. (coex_sta->a2dp_bit_pool < 255))
  2609. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2610. true, 107);
  2611. else
  2612. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2613. true, 105);
  2614. } else
  2615. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2616. 106);
  2617. }
  2618. }
  2619. /* PAN(EDR)+A2DP */
  2620. void halbtc8723d2ant_action_pan_edr_a2dp(IN struct btc_coexist *btcoexist)
  2621. {
  2622. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2623. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2624. u8 wifi_rssi_state, bt_rssi_state;
  2625. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2626. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2627. u8 wifi_rssi_state2, bt_rssi_state2;
  2628. boolean wifi_busy = false, wifi_turbo = false;
  2629. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2630. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  2631. &coex_sta->scan_ap_num);
  2632. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2633. "############# [BTCoex], scan_ap_num = %d, wl_noisy = %d\n",
  2634. coex_sta->scan_ap_num, coex_sta->wl_noisy_level);
  2635. BTC_TRACE(trace_buf);
  2636. #if 1
  2637. if ((wifi_busy) && (coex_sta->wl_noisy_level == 0))
  2638. wifi_turbo = true;
  2639. #endif
  2640. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2641. &prewifi_rssi_state, 2,
  2642. coex_sta->wifi_coex_thres , 0);
  2643. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2644. &prewifi_rssi_state2, 2,
  2645. coex_sta->wifi_coex_thres2 , 0);
  2646. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2647. coex_sta->bt_coex_thres , 0);
  2648. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2649. coex_sta->bt_coex_thres2 , 0);
  2650. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2651. BTC_RSSI_HIGH(bt_rssi_state)) {
  2652. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2653. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2654. coex_dm->is_switch_to_1dot5_ant = false;
  2655. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2656. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2657. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2658. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2659. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2660. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2661. coex_dm->is_switch_to_1dot5_ant = false;
  2662. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2663. if (wifi_busy) {
  2664. if (((coex_sta->a2dp_bit_pool > 40) &&
  2665. (coex_sta->a2dp_bit_pool < 255)) ||
  2666. (!coex_sta->is_A2DP_3M))
  2667. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2668. true, 7);
  2669. else
  2670. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2671. true, 5);
  2672. } else
  2673. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2674. 6);
  2675. } else {
  2676. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2677. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2678. coex_dm->is_switch_to_1dot5_ant = true;
  2679. if (wifi_turbo)
  2680. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2681. NORMAL_EXEC, 6);
  2682. else
  2683. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC,
  2684. 7);
  2685. if (wifi_busy) {
  2686. if ((coex_sta->a2dp_bit_pool > 40) &&
  2687. (coex_sta->a2dp_bit_pool < 255))
  2688. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2689. true, 107);
  2690. else if (wifi_turbo)
  2691. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2692. true, 108);
  2693. else
  2694. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2695. true, 105);
  2696. } else
  2697. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2698. 106);
  2699. }
  2700. }
  2701. void halbtc8723d2ant_action_pan_edr_hid(IN struct btc_coexist *btcoexist)
  2702. {
  2703. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2704. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2705. u8 wifi_rssi_state, bt_rssi_state;
  2706. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2707. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2708. u8 wifi_rssi_state2, bt_rssi_state2;
  2709. boolean wifi_busy = false;
  2710. u32 wifi_bw = 1;
  2711. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
  2712. &wifi_bw);
  2713. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2714. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2715. &prewifi_rssi_state, 2,
  2716. coex_sta->wifi_coex_thres , 0);
  2717. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2718. &prewifi_rssi_state2, 2,
  2719. coex_sta->wifi_coex_thres2 , 0);
  2720. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2721. coex_sta->bt_coex_thres , 0);
  2722. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2723. coex_sta->bt_coex_thres2 , 0);
  2724. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2725. BTC_RSSI_HIGH(bt_rssi_state)) {
  2726. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2727. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2728. coex_dm->is_switch_to_1dot5_ant = false;
  2729. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2730. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2731. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2732. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2733. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2734. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2735. coex_dm->is_switch_to_1dot5_ant = false;
  2736. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2737. if (wifi_busy)
  2738. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2739. 3);
  2740. else
  2741. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2742. 4);
  2743. } else {
  2744. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2745. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2746. coex_dm->is_switch_to_1dot5_ant = true;
  2747. if (coex_sta->hid_busy_num >= 2) {
  2748. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2749. NORMAL_EXEC, 8);
  2750. if (wifi_bw == 0) /*11bg mode */
  2751. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2752. NORMAL_EXEC,
  2753. 0x1, 0xaa,
  2754. 0x5a, 0xaa,
  2755. 0xaa);
  2756. else
  2757. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2758. NORMAL_EXEC,
  2759. 0x2, 0xaa,
  2760. 0x5a, 0xaa,
  2761. 0xaa);
  2762. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2763. 110);
  2764. } else {
  2765. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2766. if (wifi_busy)
  2767. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2768. 103);
  2769. else
  2770. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2771. 104);
  2772. }
  2773. }
  2774. }
  2775. /* HID+A2DP+PAN(EDR) */
  2776. void halbtc8723d2ant_action_hid_a2dp_pan_edr(IN struct btc_coexist *btcoexist)
  2777. {
  2778. static u8 prewifi_rssi_state = BTC_RSSI_STATE_LOW;
  2779. static u8 pre_bt_rssi_state = BTC_RSSI_STATE_LOW;
  2780. u8 wifi_rssi_state, bt_rssi_state;
  2781. static u8 prewifi_rssi_state2 = BTC_RSSI_STATE_LOW;
  2782. static u8 pre_bt_rssi_state2 = BTC_RSSI_STATE_LOW;
  2783. u8 wifi_rssi_state2, bt_rssi_state2;
  2784. boolean wifi_busy = false;
  2785. u32 wifi_bw = 1;
  2786. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW,
  2787. &wifi_bw);
  2788. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  2789. wifi_rssi_state = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2790. &prewifi_rssi_state, 2,
  2791. coex_sta->wifi_coex_thres , 0);
  2792. wifi_rssi_state2 = halbtc8723d2ant_wifi_rssi_state(btcoexist,
  2793. &prewifi_rssi_state2, 2,
  2794. coex_sta->wifi_coex_thres2 , 0);
  2795. bt_rssi_state = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state, 2,
  2796. coex_sta->bt_coex_thres , 0);
  2797. bt_rssi_state2 = halbtc8723d2ant_bt_rssi_state(&pre_bt_rssi_state2, 2,
  2798. coex_sta->bt_coex_thres2 , 0);
  2799. if (BTC_RSSI_HIGH(wifi_rssi_state) &&
  2800. BTC_RSSI_HIGH(bt_rssi_state)) {
  2801. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2802. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2803. coex_dm->is_switch_to_1dot5_ant = false;
  2804. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2805. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2806. } else if (BTC_RSSI_HIGH(wifi_rssi_state2) &&
  2807. BTC_RSSI_HIGH(bt_rssi_state2)) {
  2808. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
  2809. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
  2810. coex_dm->is_switch_to_1dot5_ant = false;
  2811. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
  2812. if (wifi_busy) {
  2813. if (((coex_sta->a2dp_bit_pool > 40) &&
  2814. (coex_sta->a2dp_bit_pool < 255)) ||
  2815. (!coex_sta->is_A2DP_3M))
  2816. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2817. true, 7);
  2818. else
  2819. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2820. true, 5);
  2821. } else
  2822. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2823. 6);
  2824. } else {
  2825. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2826. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2827. coex_dm->is_switch_to_1dot5_ant = true;
  2828. if (coex_sta->hid_busy_num >= 2) {
  2829. halbtc8723d2ant_coex_table_with_type(btcoexist,
  2830. NORMAL_EXEC, 8);
  2831. if (wifi_bw == 0) /*11bg mode */
  2832. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2833. NORMAL_EXEC,
  2834. 0x1, 0xaa,
  2835. 0x5a, 0xaa,
  2836. 0xaa);
  2837. else
  2838. halbtc8723d2ant_set_wltoggle_coex_table(btcoexist,
  2839. NORMAL_EXEC,
  2840. 0x2, 0xaa,
  2841. 0x5a, 0xaa,
  2842. 0xaa);
  2843. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2844. 110);
  2845. } else {
  2846. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
  2847. if (wifi_busy) {
  2848. if ((coex_sta->a2dp_bit_pool > 40) &&
  2849. (coex_sta->a2dp_bit_pool < 255))
  2850. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2851. true, 107);
  2852. else
  2853. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2854. true, 105);
  2855. } else
  2856. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
  2857. 106);
  2858. }
  2859. }
  2860. }
  2861. void halbtc8723d2ant_action_wifi_multi_port(IN struct btc_coexist *btcoexist)
  2862. {
  2863. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2864. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2865. /* hw all off */
  2866. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2867. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2868. }
  2869. void halbtc8723d2ant_action_wifi_linkscan_process(IN struct btc_coexist *btcoexist)
  2870. {
  2871. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2872. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 0x18);
  2873. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2874. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2875. if (bt_link_info->pan_exist) {
  2876. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
  2877. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2878. } else if (bt_link_info->a2dp_exist) {
  2879. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
  2880. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2881. } else {
  2882. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 21);
  2883. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
  2884. }
  2885. }
  2886. void halbtc8723d2ant_action_wifi_not_connected(IN struct btc_coexist *btcoexist)
  2887. {
  2888. halbtc8723d2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
  2889. /* fw all off */
  2890. halbtc8723d2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
  2891. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  2892. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  2893. }
  2894. void halbtc8723d2ant_action_wifi_connected(IN struct btc_coexist *btcoexist)
  2895. {
  2896. switch (coex_dm->cur_algorithm) {
  2897. case BT_8723D_2ANT_COEX_ALGO_SCO:
  2898. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2899. "[BTCoex], Action 2-Ant, algorithm = SCO.\n");
  2900. BTC_TRACE(trace_buf);
  2901. halbtc8723d2ant_action_sco(btcoexist);
  2902. break;
  2903. case BT_8723D_2ANT_COEX_ALGO_HID:
  2904. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2905. "[BTCoex], Action 2-Ant, algorithm = HID.\n");
  2906. BTC_TRACE(trace_buf);
  2907. halbtc8723d2ant_action_hid(btcoexist);
  2908. break;
  2909. case BT_8723D_2ANT_COEX_ALGO_A2DP:
  2910. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2911. "[BTCoex], Action 2-Ant, algorithm = A2DP.\n");
  2912. BTC_TRACE(trace_buf);
  2913. halbtc8723d2ant_action_a2dp(btcoexist);
  2914. break;
  2915. case BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS:
  2916. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2917. "[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
  2918. BTC_TRACE(trace_buf);
  2919. halbtc8723d2ant_action_a2dp_pan_hs(btcoexist);
  2920. break;
  2921. case BT_8723D_2ANT_COEX_ALGO_PANEDR:
  2922. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2923. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR).\n");
  2924. BTC_TRACE(trace_buf);
  2925. halbtc8723d2ant_action_pan_edr(btcoexist);
  2926. break;
  2927. case BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP:
  2928. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2929. "[BTCoex], Action 2-Ant, algorithm = PAN+A2DP.\n");
  2930. BTC_TRACE(trace_buf);
  2931. halbtc8723d2ant_action_pan_edr_a2dp(btcoexist);
  2932. break;
  2933. case BT_8723D_2ANT_COEX_ALGO_PANEDR_HID:
  2934. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2935. "[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
  2936. BTC_TRACE(trace_buf);
  2937. halbtc8723d2ant_action_pan_edr_hid(btcoexist);
  2938. break;
  2939. case BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
  2940. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2941. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
  2942. BTC_TRACE(trace_buf);
  2943. halbtc8723d2ant_action_hid_a2dp_pan_edr(
  2944. btcoexist);
  2945. break;
  2946. case BT_8723D_2ANT_COEX_ALGO_HID_A2DP:
  2947. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2948. "[BTCoex], Action 2-Ant, algorithm = HID+A2DP.\n");
  2949. BTC_TRACE(trace_buf);
  2950. halbtc8723d2ant_action_hid_a2dp(btcoexist);
  2951. break;
  2952. case BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY:
  2953. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2954. "[BTCoex], Action 2-Ant, algorithm = No-Profile busy.\n");
  2955. BTC_TRACE(trace_buf);
  2956. halbtc8723d2ant_action_bt_idle(btcoexist);
  2957. break;
  2958. default:
  2959. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2960. "[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
  2961. BTC_TRACE(trace_buf);
  2962. halbtc8723d2ant_action_coex_all_off(btcoexist);
  2963. break;
  2964. }
  2965. coex_dm->pre_algorithm = coex_dm->cur_algorithm;
  2966. }
  2967. void halbtc8723d2ant_run_coexist_mechanism(IN struct btc_coexist *btcoexist)
  2968. {
  2969. u8 algorithm = 0;
  2970. u32 num_of_wifi_link = 0;
  2971. u32 wifi_link_status = 0;
  2972. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  2973. boolean miracast_plus_bt = false;
  2974. boolean scan = false, link = false, roam = false,
  2975. under_4way = false,
  2976. wifi_connected = false, wifi_under_5g = false,
  2977. bt_hs_on = false;
  2978. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2979. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2980. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2981. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  2982. &under_4way);
  2983. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2984. "[BTCoex], RunCoexistMechanism()===>\n");
  2985. BTC_TRACE(trace_buf);
  2986. if (btcoexist->manual_control) {
  2987. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2988. "[BTCoex], RunCoexistMechanism(), return for Manual CTRL <===\n");
  2989. BTC_TRACE(trace_buf);
  2990. return;
  2991. }
  2992. if (btcoexist->stop_coex_dm) {
  2993. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  2994. "[BTCoex], RunCoexistMechanism(), return for Stop Coex DM <===\n");
  2995. BTC_TRACE(trace_buf);
  2996. return;
  2997. }
  2998. if (coex_sta->under_ips) {
  2999. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3000. "[BTCoex], wifi is under IPS !!!\n");
  3001. BTC_TRACE(trace_buf);
  3002. return;
  3003. }
  3004. if (!coex_sta->run_time_state) {
  3005. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3006. "[BTCoex], return for run_time_state = false !!!\n");
  3007. BTC_TRACE(trace_buf);
  3008. return;
  3009. }
  3010. if (coex_sta->freeze_coexrun_by_btinfo) {
  3011. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3012. "[BTCoex], BtInfoNotify(), return for freeze_coexrun_by_btinfo\n");
  3013. BTC_TRACE(trace_buf);
  3014. return;
  3015. }
  3016. if (coex_sta->bt_whck_test) {
  3017. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3018. "[BTCoex], BT is under WHCK TEST!!!\n");
  3019. BTC_TRACE(trace_buf);
  3020. halbtc8723d2ant_action_bt_whql_test(btcoexist);
  3021. return;
  3022. }
  3023. if (coex_sta->bt_disabled) {
  3024. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3025. "[BTCoex], BT is disabled!!!\n");
  3026. BTC_TRACE(trace_buf);
  3027. halbtc8723d2ant_action_coex_all_off(btcoexist);
  3028. return;
  3029. }
  3030. if (coex_sta->c2h_bt_inquiry_page) {
  3031. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3032. "[BTCoex], BT is under inquiry/page scan !!\n");
  3033. BTC_TRACE(trace_buf);
  3034. halbtc8723d2ant_action_bt_inquiry(btcoexist);
  3035. return;
  3036. }
  3037. if (coex_sta->is_setupLink) {
  3038. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3039. "[BTCoex], BT is re-link !!!\n");
  3040. halbtc8723d2ant_action_bt_relink(btcoexist);
  3041. return;
  3042. }
  3043. /* for P2P */
  3044. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_LINK_STATUS,
  3045. &wifi_link_status);
  3046. num_of_wifi_link = wifi_link_status >> 16;
  3047. if ((num_of_wifi_link >= 2) ||
  3048. (wifi_link_status & WIFI_P2P_GO_CONNECTED)) {
  3049. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3050. "############# [BTCoex], Multi-Port num_of_wifi_link = %d, wifi_link_status = 0x%x\n",
  3051. num_of_wifi_link, wifi_link_status);
  3052. BTC_TRACE(trace_buf);
  3053. if (bt_link_info->bt_link_exist)
  3054. miracast_plus_bt = true;
  3055. else
  3056. miracast_plus_bt = false;
  3057. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  3058. &miracast_plus_bt);
  3059. if (scan || link || roam || under_4way) {
  3060. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3061. "[BTCoex], scan = %d, link = %d, roam = %d 4way = %d!!!\n",
  3062. scan, link, roam, under_4way);
  3063. BTC_TRACE(trace_buf);
  3064. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3065. "[BTCoex], wifi is under linkscan process + Multi-Port !!\n");
  3066. BTC_TRACE(trace_buf);
  3067. halbtc8723d2ant_action_wifi_linkscan_process(btcoexist);
  3068. } else
  3069. halbtc8723d2ant_action_wifi_multi_port(btcoexist);
  3070. return;
  3071. } else {
  3072. miracast_plus_bt = false;
  3073. btcoexist->btc_set(btcoexist, BTC_SET_BL_MIRACAST_PLUS_BT,
  3074. &miracast_plus_bt);
  3075. }
  3076. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
  3077. if (bt_hs_on) {
  3078. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3079. "############# [BTCoex], BT Is hs\n");
  3080. BTC_TRACE(trace_buf);
  3081. halbtc8723d2ant_action_bt_hs(btcoexist);
  3082. return;
  3083. }
  3084. if ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  3085. coex_dm->bt_status) ||
  3086. (BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE ==
  3087. coex_dm->bt_status)) {
  3088. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3089. "[BTCoex], Action 2-Ant, bt idle!!.\n");
  3090. BTC_TRACE(trace_buf);
  3091. halbtc8723d2ant_action_bt_idle(btcoexist);
  3092. return;
  3093. }
  3094. algorithm = halbtc8723d2ant_action_algorithm(btcoexist);
  3095. coex_dm->cur_algorithm = algorithm;
  3096. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Algorithm = %d\n",
  3097. coex_dm->cur_algorithm);
  3098. BTC_TRACE(trace_buf);
  3099. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  3100. &wifi_connected);
  3101. if (scan || link || roam || under_4way) {
  3102. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3103. "[BTCoex], WiFi is under Link Process !!\n");
  3104. BTC_TRACE(trace_buf);
  3105. halbtc8723d2ant_action_wifi_linkscan_process(btcoexist);
  3106. } else if (wifi_connected) {
  3107. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3108. "[BTCoex], Action 2-Ant, wifi connected!!.\n");
  3109. BTC_TRACE(trace_buf);
  3110. halbtc8723d2ant_action_wifi_connected(btcoexist);
  3111. } else {
  3112. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3113. "[BTCoex], Action 2-Ant, wifi not-connected!!.\n");
  3114. BTC_TRACE(trace_buf);
  3115. halbtc8723d2ant_action_wifi_not_connected(btcoexist);
  3116. }
  3117. }
  3118. void halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  3119. {
  3120. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3121. "[BTCoex], Coex Mechanism Init!!\n");
  3122. BTC_TRACE(trace_buf);
  3123. halbtc8723d2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x18);
  3124. halbtc8723d2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
  3125. /* sw all off */
  3126. halbtc8723d2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, false);
  3127. coex_sta->pop_event_cnt = 0;
  3128. coex_sta->cnt_RemoteNameReq = 0;
  3129. coex_sta->cnt_ReInit = 0;
  3130. coex_sta->cnt_setupLink = 0;
  3131. coex_sta->cnt_IgnWlanAct = 0;
  3132. coex_sta->cnt_Page = 0;
  3133. halbtc8723d2ant_query_bt_info(btcoexist);
  3134. }
  3135. void halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  3136. IN boolean wifi_only)
  3137. {
  3138. u8 u8tmp0 = 0, u8tmp1 = 0;
  3139. u32 vendor;
  3140. u32 u32tmp0 = 0, u32tmp1 = 0, u32tmp2 = 0;
  3141. u16 u16tmp1 = 0;
  3142. u8 i = 0;
  3143. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3144. "[BTCoex], 2Ant Init HW Config!!\n");
  3145. BTC_TRACE(trace_buf);
  3146. #if BT_8723D_2ANT_COEX_DBG
  3147. u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  3148. 0x38);
  3149. u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  3150. 0x54);
  3151. u16tmp1 = btcoexist->btc_read_2byte(btcoexist, 0x948);
  3152. u8tmp1 = btcoexist->btc_read_1byte(btcoexist, 0x73);
  3153. u8tmp0 = btcoexist->btc_read_1byte(btcoexist, 0x67);
  3154. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3155. "[BTCoex], ********** 0x67 = 0x%x, 0x948 = 0x%x, 0x73 = 0x%x(Before init_hw_config)\n",
  3156. u8tmp0, u16tmp1, u8tmp1);
  3157. BTC_TRACE(trace_buf);
  3158. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3159. "[BTCoex], **********0x38= 0x%x, 0x54= 0x%x (Before init_hw_config)\n",
  3160. u32tmp1, u32tmp2);
  3161. BTC_TRACE(trace_buf);
  3162. #endif
  3163. coex_sta->bt_coex_supported_feature = 0;
  3164. coex_sta->bt_coex_supported_version = 0;
  3165. coex_sta->bt_ble_scan_type = 0;
  3166. coex_sta->bt_ble_scan_para[0] = 0;
  3167. coex_sta->bt_ble_scan_para[1] = 0;
  3168. coex_sta->bt_ble_scan_para[2] = 0;
  3169. coex_sta->bt_reg_vendor_ac = 0xffff;
  3170. coex_sta->bt_reg_vendor_ae = 0xffff;
  3171. coex_sta->gnt_error_cnt = 0;
  3172. coex_sta->bt_relink_downcount = 0;
  3173. for (i = 0; i <= 9; i++)
  3174. coex_sta->bt_afh_map[i] = 0;
  3175. #if 0
  3176. btcoexist->btc_get(btcoexist, BTC_GET_U4_VENDOR, &vendor);
  3177. if (vendor == BTC_VENDOR_LENOVO)
  3178. coex_dm->switch_thres_offset = 0;
  3179. else
  3180. coex_dm->switch_thres_offset = 20;
  3181. #endif
  3182. /* 0xf0[15:12] --> Chip Cut information */
  3183. coex_sta->cut_version = (btcoexist->btc_read_1byte(btcoexist,
  3184. 0xf1) & 0xf0) >> 4;
  3185. coex_sta->dis_ver_info_cnt = 0;
  3186. /* default isolation = 15dB */
  3187. coex_sta->isolation_btween_wb = BT_8723D_2ANT_DEFAULT_ISOLATION;
  3188. halbtc8723d2ant_coex_switch_threshold(btcoexist,
  3189. coex_sta->isolation_btween_wb);
  3190. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x550, 0x8,
  3191. 0x1); /* enable TBTT nterrupt */
  3192. /* BT report packet sample rate */
  3193. btcoexist->btc_write_1byte(btcoexist, 0x790, 0x5);
  3194. /* Init 0x778 = 0x1 for 2-Ant */
  3195. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1);
  3196. /* Enable PTA (3-wire function form BT side) */
  3197. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
  3198. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x41, 0x02, 0x1);
  3199. /* Enable PTA (tx/rx signal form WiFi side) */
  3200. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x4c6, 0x10, 0x1);
  3201. halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, true);
  3202. #if 0
  3203. /* check if WL firmware download ok */
  3204. if (btcoexist->btc_read_1byte(btcoexist, 0x80) == 0xc6)
  3205. halbtc8723d2ant_post_state_to_bt(btcoexist,
  3206. BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
  3207. #endif
  3208. /* Enable counter statistics */
  3209. btcoexist->btc_write_1byte(btcoexist, 0x76e,
  3210. 0x4); /* 0x76e[3] =1, WLAN_Act control by PTA */
  3211. /* WLAN_Tx by GNT_WL 0x950[29] = 0 */
  3212. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x20, 0x0);
  3213. halbtc8723d2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
  3214. halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  3215. psd_scan->ant_det_is_ant_det_available = true;
  3216. if (wifi_only) {
  3217. coex_sta->concurrent_rx_mode_on = false;
  3218. /* Path config */
  3219. /* Set Antenna Path */
  3220. halbtc8723d2ant_set_ant_path(btcoexist,
  3221. BTC_ANT_PATH_AUTO,
  3222. FORCE_EXEC,
  3223. BT_8723D_2ANT_PHASE_WLANONLY_INIT);
  3224. btcoexist->stop_coex_dm = true;
  3225. } else {
  3226. /*Set BT polluted packet on for Tx rate adaptive not including Tx retry break by PTA, 0x45c[19] =1 */
  3227. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x45e, 0x8, 0x1);
  3228. coex_sta->concurrent_rx_mode_on = true;
  3229. /* btcoexist->btc_write_1byte_bitmask(btcoexist, 0x953, 0x2, 0x1); */
  3230. /* RF 0x1[0] = 0->Set GNT_WL_RF_Rx always = 1 for con-current Rx */
  3231. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0x1, 0x0);
  3232. /* Path config */
  3233. halbtc8723d2ant_set_ant_path(btcoexist,
  3234. BTC_ANT_PATH_AUTO,
  3235. FORCE_EXEC,
  3236. BT_8723D_2ANT_PHASE_COEX_INIT);
  3237. btcoexist->stop_coex_dm = false;
  3238. }
  3239. }
  3240. u32 halbtc8723d2ant_psd_log2base(IN struct btc_coexist *btcoexist, IN u32 val)
  3241. {
  3242. u8 j;
  3243. u32 tmp, tmp2, val_integerd_b = 0, tindex, shiftcount = 0;
  3244. u32 result, val_fractiond_b = 0, table_fraction[21] = {0, 432, 332, 274, 232, 200,
  3245. 174, 151, 132, 115, 100, 86, 74, 62, 51, 42,
  3246. 32, 23, 15, 7, 0
  3247. };
  3248. if (val == 0)
  3249. return 0;
  3250. tmp = val;
  3251. while (1) {
  3252. if (tmp == 1)
  3253. break;
  3254. else {
  3255. tmp = (tmp >> 1);
  3256. shiftcount++;
  3257. }
  3258. }
  3259. val_integerd_b = shiftcount + 1;
  3260. tmp2 = 1;
  3261. for (j = 1; j <= val_integerd_b; j++)
  3262. tmp2 = tmp2 * 2;
  3263. tmp = (val * 100) / tmp2;
  3264. tindex = tmp / 5;
  3265. if (tindex > 20)
  3266. tindex = 20;
  3267. val_fractiond_b = table_fraction[tindex];
  3268. result = val_integerd_b * 100 - val_fractiond_b;
  3269. return result;
  3270. }
  3271. void halbtc8723d2ant_psd_show_antenna_detect_result(IN struct btc_coexist
  3272. *btcoexist)
  3273. {
  3274. u8 *cli_buf = btcoexist->cli_buf;
  3275. struct btc_board_info *board_info = &btcoexist->board_info;
  3276. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3277. "\r\n============[Antenna Detection info] ============\n");
  3278. CL_PRINTF(cli_buf);
  3279. if (psd_scan->ant_det_result == 12) { /* Get Ant Det from BT */
  3280. if (board_info->btdm_ant_num_by_ant_det == 1)
  3281. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3282. "\r\n %-35s = %s (%d~%d)",
  3283. "Ant Det Result", "1-Antenna",
  3284. BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT,
  3285. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION);
  3286. else {
  3287. if (psd_scan->ant_det_psd_scan_peak_val >
  3288. (BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
  3289. * 100)
  3290. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3291. "\r\n %-35s = %s (>%d)",
  3292. "Ant Det Result", "2-Antenna (Bad-Isolation)",
  3293. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  3294. else
  3295. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3296. "\r\n %-35s = %s (%d~%d)",
  3297. "Ant Det Result", "2-Antenna (Good-Isolation)",
  3298. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  3299. + psd_scan->ant_det_thres_offset,
  3300. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  3301. }
  3302. } else if (psd_scan->ant_det_result == 1)
  3303. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (>%d)",
  3304. "Ant Det Result", "2-Antenna (Bad-Isolation)",
  3305. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  3306. else if (psd_scan->ant_det_result == 2)
  3307. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  3308. "Ant Det Result", "2-Antenna (Good-Isolation)",
  3309. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  3310. + psd_scan->ant_det_thres_offset,
  3311. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION);
  3312. else
  3313. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (%d~%d)",
  3314. "Ant Det Result", "1-Antenna",
  3315. BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT,
  3316. BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  3317. + psd_scan->ant_det_thres_offset);
  3318. CL_PRINTF(cli_buf);
  3319. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s ",
  3320. "Antenna Detection Finish",
  3321. (board_info->btdm_ant_det_finish
  3322. ? "Yes" : "No"));
  3323. CL_PRINTF(cli_buf);
  3324. switch (psd_scan->ant_det_result) {
  3325. case 0:
  3326. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3327. "(BT is not available)");
  3328. break;
  3329. case 1: /* 2-Ant bad-isolation */
  3330. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3331. "(BT is available)");
  3332. break;
  3333. case 2: /* 2-Ant good-isolation */
  3334. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3335. "(BT is available)");
  3336. break;
  3337. case 3: /* 1-Ant */
  3338. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3339. "(BT is available)");
  3340. break;
  3341. case 4:
  3342. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3343. "(Uncertainty result)");
  3344. break;
  3345. case 5:
  3346. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "(Pre-Scan fai)");
  3347. break;
  3348. case 6:
  3349. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3350. "(WiFi is Scanning)");
  3351. break;
  3352. case 7:
  3353. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3354. "(BT is not idle)");
  3355. break;
  3356. case 8:
  3357. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3358. "(Abort by WiFi Scanning)");
  3359. break;
  3360. case 9:
  3361. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3362. "(Antenna Init is not ready)");
  3363. break;
  3364. case 10:
  3365. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3366. "(BT is Inquiry or page)");
  3367. break;
  3368. case 11:
  3369. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3370. "(BT is Disabled)");
  3371. case 12:
  3372. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3373. "(BT is available, result from BT");
  3374. break;
  3375. }
  3376. CL_PRINTF(cli_buf);
  3377. if (psd_scan->ant_det_result == 12) {
  3378. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
  3379. "PSD Scan Peak Value",
  3380. psd_scan->ant_det_psd_scan_peak_val / 100);
  3381. CL_PRINTF(cli_buf);
  3382. return;
  3383. }
  3384. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3385. "Ant Detect Total Count", psd_scan->ant_det_try_count);
  3386. CL_PRINTF(cli_buf);
  3387. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3388. "Ant Detect Fail Count", psd_scan->ant_det_fail_count);
  3389. CL_PRINTF(cli_buf);
  3390. if ((!board_info->btdm_ant_det_finish) &&
  3391. (psd_scan->ant_det_result != 5))
  3392. return;
  3393. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "BT Response",
  3394. (psd_scan->ant_det_result ? "ok" : "fail"));
  3395. CL_PRINTF(cli_buf);
  3396. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d ms", "BT Tx Time",
  3397. psd_scan->ant_det_bt_tx_time);
  3398. CL_PRINTF(cli_buf);
  3399. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d", "BT Tx Ch",
  3400. psd_scan->ant_det_bt_le_channel);
  3401. CL_PRINTF(cli_buf);
  3402. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d",
  3403. "WiFi PSD Cent-Ch/Offset/Span",
  3404. psd_scan->real_cent_freq, psd_scan->real_offset,
  3405. psd_scan->real_span);
  3406. CL_PRINTF(cli_buf);
  3407. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d dB",
  3408. "PSD Pre-Scan Peak Value",
  3409. psd_scan->ant_det_pre_psdscan_peak_val / 100);
  3410. CL_PRINTF(cli_buf);
  3411. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s (<= %d)",
  3412. "PSD Pre-Scan result",
  3413. (psd_scan->ant_det_result != 5 ? "ok" : "fail"),
  3414. BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
  3415. + psd_scan->ant_det_thres_offset);
  3416. CL_PRINTF(cli_buf);
  3417. if (psd_scan->ant_det_result == 5)
  3418. return;
  3419. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s dB",
  3420. "PSD Scan Peak Value", psd_scan->ant_det_peak_val);
  3421. CL_PRINTF(cli_buf);
  3422. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s MHz",
  3423. "PSD Scan Peak Freq", psd_scan->ant_det_peak_freq);
  3424. CL_PRINTF(cli_buf);
  3425. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s", "TFBGA Package",
  3426. (board_info->tfbga_package) ? "Yes" : "No");
  3427. CL_PRINTF(cli_buf);
  3428. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d",
  3429. "PSD Threshold Offset", psd_scan->ant_det_thres_offset);
  3430. CL_PRINTF(cli_buf);
  3431. }
  3432. void halbtc8723d2ant_psd_showdata(IN struct btc_coexist *btcoexist)
  3433. {
  3434. u8 *cli_buf = btcoexist->cli_buf;
  3435. u32 delta_freq_per_point;
  3436. u32 freq, freq1, freq2, n = 0, i = 0, j = 0, m = 0, psd_rep1, psd_rep2;
  3437. if (psd_scan->ant_det_result == 12)
  3438. return;
  3439. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3440. "\r\n\n============[PSD info] (%d)============\n",
  3441. psd_scan->psd_gen_count);
  3442. CL_PRINTF(cli_buf);
  3443. if (psd_scan->psd_gen_count == 0) {
  3444. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n No data !!\n");
  3445. CL_PRINTF(cli_buf);
  3446. return;
  3447. }
  3448. if (psd_scan->psd_point == 0)
  3449. delta_freq_per_point = 0;
  3450. else
  3451. delta_freq_per_point = psd_scan->psd_band_width /
  3452. psd_scan->psd_point;
  3453. /* if (psd_scan->is_psd_show_max_only) */
  3454. if (0) {
  3455. psd_rep1 = psd_scan->psd_max_value / 100;
  3456. psd_rep2 = psd_scan->psd_max_value - psd_rep1 * 100;
  3457. freq = ((psd_scan->real_cent_freq - 20) * 1000000 +
  3458. psd_scan->psd_max_value_point * delta_freq_per_point);
  3459. freq1 = freq / 1000000;
  3460. freq2 = freq / 1000 - freq1 * 1000;
  3461. if (freq2 < 100)
  3462. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3463. "\r\n Freq = %d.0%d MHz",
  3464. freq1, freq2);
  3465. else
  3466. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3467. "\r\n Freq = %d.%d MHz",
  3468. freq1, freq2);
  3469. if (psd_rep2 < 10)
  3470. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3471. ", Value = %d.0%d dB, (%d)\n",
  3472. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  3473. else
  3474. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  3475. ", Value = %d.%d dB, (%d)\n",
  3476. psd_rep1, psd_rep2, psd_scan->psd_max_value);
  3477. CL_PRINTF(cli_buf);
  3478. } else {
  3479. m = psd_scan->psd_start_point;
  3480. n = psd_scan->psd_start_point;
  3481. i = 1;
  3482. j = 1;
  3483. while (1) {
  3484. do {
  3485. freq = ((psd_scan->real_cent_freq - 20) *
  3486. 1000000 + m *
  3487. delta_freq_per_point);
  3488. freq1 = freq / 1000000;
  3489. freq2 = freq / 1000 - freq1 * 1000;
  3490. if (i == 1) {
  3491. if (freq2 == 0)
  3492. CL_SPRINTF(cli_buf,
  3493. BT_TMP_BUF_SIZE,
  3494. "\r\n Freq%6d.000",
  3495. freq1);
  3496. else if (freq2 < 100)
  3497. CL_SPRINTF(cli_buf,
  3498. BT_TMP_BUF_SIZE,
  3499. "\r\n Freq%6d.0%2d",
  3500. freq1,
  3501. freq2);
  3502. else
  3503. CL_SPRINTF(cli_buf,
  3504. BT_TMP_BUF_SIZE,
  3505. "\r\n Freq%6d.%3d",
  3506. freq1,
  3507. freq2);
  3508. } else if ((i % 8 == 0) ||
  3509. (m == psd_scan->psd_stop_point)) {
  3510. if (freq2 == 0)
  3511. CL_SPRINTF(cli_buf,
  3512. BT_TMP_BUF_SIZE,
  3513. "%6d.000\n", freq1);
  3514. else if (freq2 < 100)
  3515. CL_SPRINTF(cli_buf,
  3516. BT_TMP_BUF_SIZE,
  3517. "%6d.0%2d\n", freq1,
  3518. freq2);
  3519. else
  3520. CL_SPRINTF(cli_buf,
  3521. BT_TMP_BUF_SIZE,
  3522. "%6d.%3d\n", freq1,
  3523. freq2);
  3524. } else {
  3525. if (freq2 == 0)
  3526. CL_SPRINTF(cli_buf,
  3527. BT_TMP_BUF_SIZE,
  3528. "%6d.000", freq1);
  3529. else if (freq2 < 100)
  3530. CL_SPRINTF(cli_buf,
  3531. BT_TMP_BUF_SIZE,
  3532. "%6d.0%2d", freq1,
  3533. freq2);
  3534. else
  3535. CL_SPRINTF(cli_buf,
  3536. BT_TMP_BUF_SIZE,
  3537. "%6d.%3d", freq1,
  3538. freq2);
  3539. }
  3540. i++;
  3541. m++;
  3542. CL_PRINTF(cli_buf);
  3543. } while ((i <= 8) && (m <= psd_scan->psd_stop_point));
  3544. do {
  3545. psd_rep1 = psd_scan->psd_report_max_hold[n] /
  3546. 100;
  3547. psd_rep2 = psd_scan->psd_report_max_hold[n] -
  3548. psd_rep1 *
  3549. 100;
  3550. if (j == 1) {
  3551. if (psd_rep2 < 10)
  3552. CL_SPRINTF(cli_buf,
  3553. BT_TMP_BUF_SIZE,
  3554. "\r\n Val %7d.0%d",
  3555. psd_rep1,
  3556. psd_rep2);
  3557. else
  3558. CL_SPRINTF(cli_buf,
  3559. BT_TMP_BUF_SIZE,
  3560. "\r\n Val %7d.%d",
  3561. psd_rep1,
  3562. psd_rep2);
  3563. } else if ((j % 8 == 0) ||
  3564. (n == psd_scan->psd_stop_point)) {
  3565. if (psd_rep2 < 10)
  3566. CL_SPRINTF(cli_buf,
  3567. BT_TMP_BUF_SIZE,
  3568. "%7d.0%d\n", psd_rep1,
  3569. psd_rep2);
  3570. else
  3571. CL_SPRINTF(cli_buf,
  3572. BT_TMP_BUF_SIZE,
  3573. "%7d.%d\n", psd_rep1,
  3574. psd_rep2);
  3575. } else {
  3576. if (psd_rep2 < 10)
  3577. CL_SPRINTF(cli_buf,
  3578. BT_TMP_BUF_SIZE,
  3579. "%7d.0%d", psd_rep1,
  3580. psd_rep2);
  3581. else
  3582. CL_SPRINTF(cli_buf,
  3583. BT_TMP_BUF_SIZE,
  3584. "%7d.%d", psd_rep1,
  3585. psd_rep2);
  3586. }
  3587. j++;
  3588. n++;
  3589. CL_PRINTF(cli_buf);
  3590. } while ((j <= 8) && (n <= psd_scan->psd_stop_point));
  3591. if ((m > psd_scan->psd_stop_point) ||
  3592. (n > psd_scan->psd_stop_point))
  3593. break;
  3594. else {
  3595. i = 1;
  3596. j = 1;
  3597. }
  3598. }
  3599. }
  3600. }
  3601. #ifdef PLATFORM_WINDOWS
  3602. #pragma optimize("", off)
  3603. #endif
  3604. void halbtc8723d2ant_psd_maxholddata(IN struct btc_coexist *btcoexist,
  3605. IN u32 gen_count)
  3606. {
  3607. u32 i = 0;
  3608. u32 loop_i_max = 0, loop_val_max = 0;
  3609. if (gen_count == 1) {
  3610. memcpy(psd_scan->psd_report_max_hold,
  3611. psd_scan->psd_report,
  3612. BT_8723D_2ANT_ANTDET_PSD_POINTS * sizeof(u32));
  3613. }
  3614. for (i = psd_scan->psd_start_point;
  3615. i <= psd_scan->psd_stop_point; i++) {
  3616. /* update max-hold value at each freq point */
  3617. if (psd_scan->psd_report[i] > psd_scan->psd_report_max_hold[i])
  3618. psd_scan->psd_report_max_hold[i] =
  3619. psd_scan->psd_report[i];
  3620. /* search the max value in this seep */
  3621. if (psd_scan->psd_report[i] > loop_val_max) {
  3622. loop_val_max = psd_scan->psd_report[i];
  3623. loop_i_max = i;
  3624. }
  3625. }
  3626. if (gen_count <= BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT)
  3627. psd_scan->psd_loop_max_value[gen_count - 1] = loop_val_max;
  3628. }
  3629. #ifdef PLATFORM_WINDOWS
  3630. #pragma optimize("", off)
  3631. #endif
  3632. u32 halbtc8723d2ant_psd_getdata(IN struct btc_coexist *btcoexist, IN u32 point)
  3633. {
  3634. /* reg 0x808[9:0]: FFT data x */
  3635. /* reg 0x808[22]: 0-->1 to get 1 FFT data y */
  3636. /* reg 0x8b4[15:0]: FFT data y report */
  3637. u32 val = 0, psd_report = 0;
  3638. int k = 0;
  3639. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3640. val &= 0xffbffc00;
  3641. val |= point;
  3642. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3643. val |= 0x00400000;
  3644. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3645. while (1) {
  3646. if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
  3647. break;
  3648. }
  3649. val = btcoexist->btc_read_4byte(btcoexist, 0x8b4);
  3650. psd_report = val & 0x0000ffff;
  3651. return psd_report;
  3652. }
  3653. #ifdef PLATFORM_WINDOWS
  3654. #pragma optimize("", off)
  3655. #endif
  3656. boolean halbtc8723d2ant_psd_sweep_point(IN struct btc_coexist *btcoexist,
  3657. IN u32 cent_freq, IN s32 offset, IN u32 span, IN u32 points,
  3658. IN u32 avgnum, IN u32 loopcnt)
  3659. {
  3660. u32 i = 0, val = 0, n = 0, k = 0, j, point_index = 0;
  3661. u32 points1 = 0, psd_report = 0;
  3662. u32 start_p = 0, stop_p = 0, delta_freq_per_point = 156250;
  3663. u32 psd_center_freq = 20 * 10 ^ 6;
  3664. boolean outloop = false, scan , roam, is_sweep_ok = true;
  3665. u8 flag = 0;
  3666. u32 tmp = 0, u32tmp1 = 0;
  3667. u32 wifi_original_channel = 1;
  3668. u32 psd_sum = 0, avg_cnt = 0;
  3669. u32 i_max = 0, val_max = 0, val_max2 = 0;
  3670. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3671. "xxxxxxxxxxxxxxxx PSD Sweep Start!!\n");
  3672. BTC_TRACE(trace_buf);
  3673. do {
  3674. switch (flag) {
  3675. case 0: /* Get PSD parameters */
  3676. default:
  3677. psd_scan->psd_band_width = 40 * 1000000;
  3678. psd_scan->psd_point = points;
  3679. psd_scan->psd_start_base = points / 2;
  3680. psd_scan->psd_avg_num = avgnum;
  3681. psd_scan->real_cent_freq = cent_freq;
  3682. psd_scan->real_offset = offset;
  3683. psd_scan->real_span = span;
  3684. points1 = psd_scan->psd_point;
  3685. delta_freq_per_point = psd_scan->psd_band_width /
  3686. psd_scan->psd_point;
  3687. /* PSD point setup */
  3688. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3689. val &= 0xffff0fff;
  3690. switch (psd_scan->psd_point) {
  3691. case 128:
  3692. val |= 0x0;
  3693. break;
  3694. case 256:
  3695. default:
  3696. val |= 0x00004000;
  3697. break;
  3698. case 512:
  3699. val |= 0x00008000;
  3700. break;
  3701. case 1024:
  3702. val |= 0x0000c000;
  3703. break;
  3704. }
  3705. switch (psd_scan->psd_avg_num) {
  3706. case 1:
  3707. val |= 0x0;
  3708. break;
  3709. case 8:
  3710. val |= 0x00001000;
  3711. break;
  3712. case 16:
  3713. val |= 0x00002000;
  3714. break;
  3715. case 32:
  3716. default:
  3717. val |= 0x00003000;
  3718. break;
  3719. }
  3720. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3721. flag = 1;
  3722. break;
  3723. case 1: /* calculate the PSD point index from freq/offset/span */
  3724. psd_center_freq = psd_scan->psd_band_width / 2 +
  3725. offset * (1000000);
  3726. start_p = psd_scan->psd_start_base + (psd_center_freq -
  3727. span * (1000000) / 2) / delta_freq_per_point;
  3728. psd_scan->psd_start_point = start_p -
  3729. psd_scan->psd_start_base;
  3730. stop_p = psd_scan->psd_start_base + (psd_center_freq +
  3731. span * (1000000) / 2) / delta_freq_per_point;
  3732. psd_scan->psd_stop_point = stop_p -
  3733. psd_scan->psd_start_base - 1;
  3734. flag = 2;
  3735. break;
  3736. case 2: /* set RF channel/BW/Mode */
  3737. /* set 3-wire off */
  3738. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  3739. val |= 0x00300000;
  3740. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  3741. /* CCK off */
  3742. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  3743. val &= 0xfeffffff;
  3744. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  3745. /* Tx-pause on */
  3746. btcoexist->btc_write_1byte(btcoexist, 0x522, 0x6f);
  3747. /* store WiFi original channel */
  3748. wifi_original_channel = btcoexist->btc_get_rf_reg(
  3749. btcoexist, BTC_RF_A, 0x18, 0x3ff);
  3750. /* Set RF channel */
  3751. if (cent_freq == 2484)
  3752. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  3753. 0x18, 0x3ff, 0xe);
  3754. else
  3755. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
  3756. 0x18, 0x3ff, (cent_freq - 2412) / 5 +
  3757. 1); /* WiFi TRx Mask on */
  3758. /* save original RCK value */
  3759. u32tmp1 = btcoexist->btc_get_rf_reg(
  3760. btcoexist, BTC_RF_A, 0x1d, 0xfffff);
  3761. /* Enter debug mode */
  3762. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
  3763. 0x2, 0x1);
  3764. /* Set RF Rx filter corner */
  3765. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
  3766. 0xfffff, 0x2e);
  3767. /* Set RF mode = Rx, RF Gain = 0x320a0 */
  3768. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x0,
  3769. 0xfffff, 0x320a0);
  3770. while (1) {
  3771. if (k++ > BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY)
  3772. break;
  3773. }
  3774. flag = 3;
  3775. break;
  3776. case 3:
  3777. psd_scan->psd_gen_count = 0;
  3778. for (j = 1; j <= loopcnt; j++) {
  3779. btcoexist->btc_get(btcoexist,
  3780. BTC_GET_BL_WIFI_SCAN, &scan);
  3781. btcoexist->btc_get(btcoexist,
  3782. BTC_GET_BL_WIFI_ROAM, &roam);
  3783. if (scan || roam) {
  3784. is_sweep_ok = false;
  3785. break;
  3786. }
  3787. memset(psd_scan->psd_report, 0,
  3788. psd_scan->psd_point * sizeof(u32));
  3789. start_p = psd_scan->psd_start_point +
  3790. psd_scan->psd_start_base;
  3791. stop_p = psd_scan->psd_stop_point +
  3792. psd_scan->psd_start_base + 1;
  3793. i = start_p;
  3794. point_index = 0;
  3795. while (i < stop_p) {
  3796. if (i >= points1)
  3797. psd_report =
  3798. halbtc8723d2ant_psd_getdata(
  3799. btcoexist, i - points1);
  3800. else
  3801. psd_report =
  3802. halbtc8723d2ant_psd_getdata(
  3803. btcoexist, i);
  3804. if (psd_report == 0)
  3805. tmp = 0;
  3806. else
  3807. /* tmp = 20*log10((double)psd_report); */
  3808. /* 20*log2(x)/log2(10), log2Base return theresult of the psd_report*100 */
  3809. tmp = 6 * halbtc8723d2ant_psd_log2base(
  3810. btcoexist, psd_report);
  3811. n = i - psd_scan->psd_start_base;
  3812. psd_scan->psd_report[n] = tmp;
  3813. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3814. "Point=%d, psd_dB_data = %d\n",
  3815. i, psd_scan->psd_report[n]);
  3816. BTC_TRACE(trace_buf);
  3817. i++;
  3818. }
  3819. halbtc8723d2ant_psd_maxholddata(btcoexist, j);
  3820. psd_scan->psd_gen_count = j;
  3821. /*Accumulate Max PSD value in this loop if the value > threshold */
  3822. if (psd_scan->psd_loop_max_value[j - 1] >=
  3823. 4000) {
  3824. psd_sum = psd_sum +
  3825. psd_scan->psd_loop_max_value[j -
  3826. 1];
  3827. avg_cnt++;
  3828. }
  3829. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3830. "Loop=%d, Max_dB_data = %d\n",
  3831. j, psd_scan->psd_loop_max_value[j
  3832. - 1]);
  3833. BTC_TRACE(trace_buf);
  3834. }
  3835. if (loopcnt == BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT) {
  3836. /* search the Max Value between each-freq-point-max-hold value of all sweep*/
  3837. for (i = 1;
  3838. i <= BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT;
  3839. i++) {
  3840. if (i == 1) {
  3841. i_max = i;
  3842. val_max = psd_scan->psd_loop_max_value[i
  3843. - 1];
  3844. val_max2 =
  3845. psd_scan->psd_loop_max_value[i
  3846. - 1];
  3847. } else if (
  3848. psd_scan->psd_loop_max_value[i -
  3849. 1] > val_max) {
  3850. val_max2 = val_max;
  3851. i_max = i;
  3852. val_max = psd_scan->psd_loop_max_value[i
  3853. - 1];
  3854. } else if (
  3855. psd_scan->psd_loop_max_value[i -
  3856. 1] > val_max2)
  3857. val_max2 =
  3858. psd_scan->psd_loop_max_value[i
  3859. - 1];
  3860. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3861. "i = %d, val_hold= %d, val_max = %d, val_max2 = %d\n",
  3862. i, psd_scan->psd_loop_max_value[i
  3863. - 1],
  3864. val_max, val_max2);
  3865. BTC_TRACE(trace_buf);
  3866. }
  3867. psd_scan->psd_max_value_point = i_max;
  3868. psd_scan->psd_max_value = val_max;
  3869. psd_scan->psd_max_value2 = val_max2;
  3870. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3871. "val_max = %d, val_max2 = %d\n",
  3872. psd_scan->psd_max_value,
  3873. psd_scan->psd_max_value2);
  3874. BTC_TRACE(trace_buf);
  3875. }
  3876. if (avg_cnt != 0) {
  3877. psd_scan->psd_avg_value = (psd_sum / avg_cnt);
  3878. if ((psd_sum % avg_cnt) >= (avg_cnt / 2))
  3879. psd_scan->psd_avg_value++;
  3880. } else
  3881. psd_scan->psd_avg_value = 0;
  3882. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3883. "AvgLoop=%d, Avg_dB_data = %d\n",
  3884. avg_cnt, psd_scan->psd_avg_value);
  3885. BTC_TRACE(trace_buf);
  3886. flag = 100;
  3887. break;
  3888. case 99: /* error */
  3889. outloop = true;
  3890. break;
  3891. case 100: /* recovery */
  3892. /* set 3-wire on */
  3893. val = btcoexist->btc_read_4byte(btcoexist, 0x88c);
  3894. val &= 0xffcfffff;
  3895. btcoexist->btc_write_4byte(btcoexist, 0x88c, val);
  3896. /* CCK on */
  3897. val = btcoexist->btc_read_4byte(btcoexist, 0x800);
  3898. val |= 0x01000000;
  3899. btcoexist->btc_write_4byte(btcoexist, 0x800, val);
  3900. /* Tx-pause off */
  3901. btcoexist->btc_write_1byte(btcoexist, 0x522, 0x0);
  3902. /* PSD off */
  3903. val = btcoexist->btc_read_4byte(btcoexist, 0x808);
  3904. val &= 0xffbfffff;
  3905. btcoexist->btc_write_4byte(btcoexist, 0x808, val);
  3906. /* restore RF Rx filter corner */
  3907. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1d,
  3908. 0xfffff, u32tmp1);
  3909. /* Exit debug mode */
  3910. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xde,
  3911. 0x2, 0x0);
  3912. /* restore WiFi original channel */
  3913. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x18,
  3914. 0x3ff, wifi_original_channel);
  3915. outloop = true;
  3916. break;
  3917. }
  3918. } while (!outloop);
  3919. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3920. "xxxxxxxxxxxxxxxx PSD Sweep Stop!!\n");
  3921. BTC_TRACE(trace_buf);
  3922. return is_sweep_ok;
  3923. }
  3924. #ifdef PLATFORM_WINDOWS
  3925. #pragma optimize("", off)
  3926. #endif
  3927. boolean halbtc8723d2ant_psd_antenna_detection(IN struct btc_coexist
  3928. *btcoexist)
  3929. {
  3930. u32 i = 0;
  3931. u32 wlpsd_cent_freq = 2484, wlpsd_span = 2;
  3932. s32 wlpsd_offset = -4;
  3933. u32 bt_tx_time, bt_le_channel;
  3934. u8 bt_le_ch[13] = {3, 6, 8, 11, 13, 16, 18, 21, 23, 26, 28, 31, 33};
  3935. u8 h2c_parameter[3] = {0}, u8tmpa, u8tmpb;
  3936. u8 state = 0;
  3937. boolean outloop = false, bt_resp = false, ant_det_finish = false;
  3938. u32 freq, freq1, freq2, psd_rep1, psd_rep2, delta_freq_per_point,
  3939. u32tmp, u32tmp0, u32tmp1, u32tmp2 ;
  3940. struct btc_board_info *board_info = &btcoexist->board_info;
  3941. memset(psd_scan->ant_det_peak_val, 0, 16 * sizeof(u8));
  3942. memset(psd_scan->ant_det_peak_freq, 0, 16 * sizeof(u8));
  3943. psd_scan->ant_det_bt_tx_time =
  3944. BT_8723D_2ANT_ANTDET_BTTXTIME; /* 0.42ms*50 = 20ms (0.42ms = 1 PSD sweep) */
  3945. psd_scan->ant_det_bt_le_channel = BT_8723D_2ANT_ANTDET_BTTXCHANNEL;
  3946. bt_tx_time = psd_scan->ant_det_bt_tx_time;
  3947. bt_le_channel = psd_scan->ant_det_bt_le_channel;
  3948. if (board_info->tfbga_package) /* for TFBGA */
  3949. psd_scan->ant_det_thres_offset = 5;
  3950. else
  3951. psd_scan->ant_det_thres_offset = 0;
  3952. do {
  3953. switch (state) {
  3954. case 0:
  3955. if (bt_le_channel == 39)
  3956. wlpsd_cent_freq = 2484;
  3957. else {
  3958. for (i = 1; i <= 13; i++) {
  3959. if (bt_le_ch[i - 1] ==
  3960. bt_le_channel) {
  3961. wlpsd_cent_freq = 2412
  3962. + (i - 1) * 5;
  3963. break;
  3964. }
  3965. }
  3966. if (i == 14) {
  3967. BTC_SPRINTF(trace_buf,
  3968. BT_TMP_BUF_SIZE,
  3969. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort!!, Invalid LE channel = %d\n ",
  3970. bt_le_channel);
  3971. BTC_TRACE(trace_buf);
  3972. outloop = true;
  3973. break;
  3974. }
  3975. }
  3976. #if 0
  3977. wlpsd_sweep_count = bt_tx_time * 238 /
  3978. 100; /* bt_tx_time/0.42 */
  3979. wlpsd_sweep_count = wlpsd_sweep_count / 5;
  3980. if (wlpsd_sweep_count % 5 != 0)
  3981. wlpsd_sweep_count = (wlpsd_sweep_count /
  3982. 5 + 1) * 5;
  3983. #endif
  3984. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3985. "xxxxxxxxxxxxxxxx AntennaDetect(), BT_LETxTime=%d, BT_LECh = %d\n",
  3986. bt_tx_time, bt_le_channel);
  3987. BTC_TRACE(trace_buf);
  3988. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  3989. "xxxxxxxxxxxxxxxx AntennaDetect(), wlpsd_cent_freq=%d, wlpsd_offset = %d, wlpsd_span = %d, wlpsd_sweep_count = %d\n",
  3990. wlpsd_cent_freq,
  3991. wlpsd_offset,
  3992. wlpsd_span,
  3993. BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT);
  3994. BTC_TRACE(trace_buf);
  3995. state = 1;
  3996. break;
  3997. case 1: /* stop coex DM & set antenna path */
  3998. /* Stop Coex DM */
  3999. btcoexist->stop_coex_dm = true;
  4000. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4001. "xxxxxxxxxxxxxxxx AntennaDetect(), Stop Coex DM!!\n");
  4002. BTC_TRACE(trace_buf);
  4003. /* Set TDMA off, */
  4004. halbtc8723d2ant_ps_tdma(btcoexist, FORCE_EXEC,
  4005. false, 0);
  4006. /* Set coex table */
  4007. halbtc8723d2ant_coex_table_with_type(btcoexist,
  4008. FORCE_EXEC, 0);
  4009. if (board_info->btdm_ant_pos ==
  4010. BTC_ANTENNA_AT_MAIN_PORT) {
  4011. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4012. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Main Port\n");
  4013. BTC_TRACE(trace_buf);
  4014. } else {
  4015. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4016. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna at Aux Port\n");
  4017. BTC_TRACE(trace_buf);
  4018. }
  4019. /* Set Antenna path, switch WiFi to un-certain antenna port */
  4020. /* Set Antenna Path, both GNT_WL/GNT_BT = 1, and control by SW */
  4021. halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
  4022. FORCE_EXEC,
  4023. BT_8723D_2ANT_PHASE_ANTENNA_DET);
  4024. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4025. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to BT!!\n");
  4026. BTC_TRACE(trace_buf);
  4027. /* Set AFH mask on at WiFi channel 2472MHz +/- 10MHz */
  4028. h2c_parameter[0] = 0x1;
  4029. h2c_parameter[1] = 0xd;
  4030. h2c_parameter[2] = 0x14;
  4031. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4032. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  4033. h2c_parameter[1],
  4034. h2c_parameter[2]);
  4035. BTC_TRACE(trace_buf);
  4036. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  4037. h2c_parameter);
  4038. u32tmp = btcoexist->btc_read_2byte(btcoexist, 0x948);
  4039. u32tmp0 = btcoexist->btc_read_4byte(btcoexist, 0x70);
  4040. u32tmp1 = halbtc8723d2ant_ltecoex_indirect_read_reg(
  4041. btcoexist, 0x38);
  4042. u32tmp2 = halbtc8723d2ant_ltecoex_indirect_read_reg(
  4043. btcoexist, 0x54);
  4044. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4045. "[BTCoex], ********** 0x948 = 0x%x, 0x70 = 0x%x, 0x38= 0x%x, 0x54= 0x%x (Before Ant Det)\n",
  4046. u32tmp, u32tmp0, u32tmp1, u32tmp2);
  4047. BTC_TRACE(trace_buf);
  4048. state = 2;
  4049. break;
  4050. case 2: /* Pre-sweep background psd */
  4051. if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
  4052. wlpsd_cent_freq, wlpsd_offset, wlpsd_span,
  4053. BT_8723D_2ANT_ANTDET_PSD_POINTS,
  4054. BT_8723D_2ANT_ANTDET_PSD_AVGNUM, 3)) {
  4055. ant_det_finish = false;
  4056. board_info->btdm_ant_num_by_ant_det = 1;
  4057. psd_scan->ant_det_result = 8;
  4058. state = 99;
  4059. break;
  4060. }
  4061. psd_scan->ant_det_pre_psdscan_peak_val =
  4062. psd_scan->psd_max_value;
  4063. if (psd_scan->ant_det_pre_psdscan_peak_val >
  4064. (BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
  4065. + psd_scan->ant_det_thres_offset) * 100) {
  4066. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4067. "xxxxxxxxxxxxxxxx AntennaDetect(), Abort Antenna Detection!! becaus background = %d > thres (%d)\n",
  4068. psd_scan->ant_det_pre_psdscan_peak_val /
  4069. 100,
  4070. BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
  4071. + psd_scan->ant_det_thres_offset);
  4072. BTC_TRACE(trace_buf);
  4073. ant_det_finish = false;
  4074. board_info->btdm_ant_num_by_ant_det = 1;
  4075. psd_scan->ant_det_result = 5;
  4076. state = 99;
  4077. } else {
  4078. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4079. "xxxxxxxxxxxxxxxx AntennaDetect(), Start Antenna Detection!! becaus background = %d <= thres (%d)\n",
  4080. psd_scan->ant_det_pre_psdscan_peak_val /
  4081. 100,
  4082. BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND
  4083. + psd_scan->ant_det_thres_offset);
  4084. BTC_TRACE(trace_buf);
  4085. state = 3;
  4086. }
  4087. break;
  4088. case 3:
  4089. bt_resp = btcoexist->btc_set_bt_ant_detection(
  4090. btcoexist, (u8)(bt_tx_time & 0xff),
  4091. (u8)(bt_le_channel & 0xff));
  4092. /* Sync WL Rx PSD with BT Tx time because H2C->Mailbox delay */
  4093. delay_ms(20);
  4094. if (!halbtc8723d2ant_psd_sweep_point(btcoexist,
  4095. wlpsd_cent_freq, wlpsd_offset,
  4096. wlpsd_span,
  4097. BT_8723D_2ANT_ANTDET_PSD_POINTS,
  4098. BT_8723D_2ANT_ANTDET_PSD_AVGNUM,
  4099. BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT)) {
  4100. ant_det_finish = false;
  4101. board_info->btdm_ant_num_by_ant_det = 1;
  4102. psd_scan->ant_det_result = 8;
  4103. state = 99;
  4104. break;
  4105. }
  4106. #if 1
  4107. psd_scan->ant_det_psd_scan_peak_val =
  4108. psd_scan->psd_max_value;
  4109. #endif
  4110. #if 0
  4111. psd_scan->ant_det_psd_scan_peak_val =
  4112. ((psd_scan->psd_max_value - psd_scan->psd_avg_value) <
  4113. 800) ?
  4114. psd_scan->psd_max_value : ((
  4115. psd_scan->psd_max_value -
  4116. psd_scan->psd_max_value2 <= 300) ?
  4117. psd_scan->psd_avg_value :
  4118. psd_scan->psd_max_value2);
  4119. #endif
  4120. psd_scan->ant_det_psd_scan_peak_freq =
  4121. psd_scan->psd_max_value_point;
  4122. state = 4;
  4123. break;
  4124. case 4:
  4125. if (psd_scan->psd_point == 0)
  4126. delta_freq_per_point = 0;
  4127. else
  4128. delta_freq_per_point =
  4129. psd_scan->psd_band_width /
  4130. psd_scan->psd_point;
  4131. psd_rep1 = psd_scan->ant_det_psd_scan_peak_val / 100;
  4132. psd_rep2 = psd_scan->ant_det_psd_scan_peak_val -
  4133. psd_rep1 *
  4134. 100;
  4135. freq = ((psd_scan->real_cent_freq - 20) *
  4136. 1000000 + psd_scan->psd_max_value_point
  4137. * delta_freq_per_point);
  4138. freq1 = freq / 1000000;
  4139. freq2 = freq / 1000 - freq1 * 1000;
  4140. if (freq2 < 100) {
  4141. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4142. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.0%d MHz",
  4143. freq1, freq2);
  4144. BTC_TRACE(trace_buf);
  4145. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  4146. BT_8723D_2ANT_ANTDET_BUF_LEN,
  4147. "%d.0%d", freq1, freq2);
  4148. } else {
  4149. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4150. "xxxxxxxxxxxxxxxx AntennaDetect(), Max Value: Freq = %d.%d MHz",
  4151. freq1, freq2);
  4152. BTC_TRACE(trace_buf);
  4153. CL_SPRINTF(psd_scan->ant_det_peak_freq,
  4154. BT_8723D_2ANT_ANTDET_BUF_LEN,
  4155. "%d.%d", freq1, freq2);
  4156. }
  4157. if (psd_rep2 < 10) {
  4158. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4159. ", Value = %d.0%d dB\n",
  4160. psd_rep1, psd_rep2);
  4161. BTC_TRACE(trace_buf);
  4162. CL_SPRINTF(psd_scan->ant_det_peak_val,
  4163. BT_8723D_2ANT_ANTDET_BUF_LEN,
  4164. "%d.0%d", psd_rep1, psd_rep2);
  4165. } else {
  4166. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4167. ", Value = %d.%d dB\n",
  4168. psd_rep1, psd_rep2);
  4169. BTC_TRACE(trace_buf);
  4170. CL_SPRINTF(psd_scan->ant_det_peak_val,
  4171. BT_8723D_2ANT_ANTDET_BUF_LEN,
  4172. "%d.%d", psd_rep1, psd_rep2);
  4173. }
  4174. psd_scan->ant_det_is_btreply_available = true;
  4175. if (bt_resp == false) {
  4176. psd_scan->ant_det_is_btreply_available =
  4177. false;
  4178. psd_scan->ant_det_result = 0;
  4179. ant_det_finish = false;
  4180. board_info->btdm_ant_num_by_ant_det = 1;
  4181. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4182. "xxxxxxxxxxxxxxxx AntennaDetect(), BT Response = Fail\n ");
  4183. BTC_TRACE(trace_buf);
  4184. } else if (psd_scan->ant_det_psd_scan_peak_val >
  4185. (BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION)
  4186. * 100) {
  4187. psd_scan->ant_det_result = 1;
  4188. ant_det_finish = true;
  4189. board_info->btdm_ant_num_by_ant_det = 2;
  4190. coex_sta->isolation_btween_wb = (u8)(85 -
  4191. psd_scan->ant_det_psd_scan_peak_val /
  4192. 100) & 0xff;
  4193. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4194. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Bad-Isolation!!\n");
  4195. BTC_TRACE(trace_buf);
  4196. } else if (psd_scan->ant_det_psd_scan_peak_val >
  4197. (BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION
  4198. + psd_scan->ant_det_thres_offset) * 100) {
  4199. psd_scan->ant_det_result = 2;
  4200. ant_det_finish = true;
  4201. board_info->btdm_ant_num_by_ant_det = 2;
  4202. coex_sta->isolation_btween_wb = (u8)(85 -
  4203. psd_scan->ant_det_psd_scan_peak_val /
  4204. 100) & 0xff;
  4205. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4206. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 2-Ant, Good-Isolation!!\n");
  4207. BTC_TRACE(trace_buf);
  4208. } else if (psd_scan->ant_det_psd_scan_peak_val >
  4209. (BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT) *
  4210. 100) {
  4211. psd_scan->ant_det_result = 3;
  4212. ant_det_finish = true;
  4213. board_info->btdm_ant_num_by_ant_det = 1;
  4214. coex_sta->isolation_btween_wb = (u8)(85 -
  4215. psd_scan->ant_det_psd_scan_peak_val /
  4216. 100) & 0xff;
  4217. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4218. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant!!\n");
  4219. BTC_TRACE(trace_buf);
  4220. } else {
  4221. psd_scan->ant_det_result = 4;
  4222. ant_det_finish = false;
  4223. board_info->btdm_ant_num_by_ant_det = 1;
  4224. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4225. "xxxxxxxxxxxxxxxx AntennaDetect(), Detect Result = 1-Ant, un-certainity!!\n");
  4226. BTC_TRACE(trace_buf);
  4227. }
  4228. state = 99;
  4229. break;
  4230. case 99: /* restore setup */
  4231. /* Set AFH mask off at WiFi channel 2472MHz +/- 10MHz */
  4232. h2c_parameter[0] = 0x0;
  4233. h2c_parameter[1] = 0x0;
  4234. h2c_parameter[2] = 0x0;
  4235. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4236. "xxxxxxxxxxxxxxxx AntennaDetect(), Set AFH on, Cent-Ch= %d, Mask=%d\n",
  4237. h2c_parameter[1], h2c_parameter[2]);
  4238. BTC_TRACE(trace_buf);
  4239. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3,
  4240. h2c_parameter);
  4241. /* Set Antenna Path, GNT_WL/GNT_BT control by PTA */
  4242. /* Set Antenna path, switch WiFi to certain antenna port */
  4243. halbtc8723d2ant_set_ant_path(btcoexist,
  4244. BTC_ANT_PATH_AUTO, FORCE_EXEC,
  4245. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  4246. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4247. "xxxxxxxxxxxxxxxx AntennaDetect(), Set Antenna to PTA\n!!");
  4248. BTC_TRACE(trace_buf);
  4249. btcoexist->stop_coex_dm = false;
  4250. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4251. "xxxxxxxxxxxxxxxx AntennaDetect(), Resume Coex DM\n!!");
  4252. BTC_TRACE(trace_buf);
  4253. outloop = true;
  4254. break;
  4255. }
  4256. } while (!outloop);
  4257. return ant_det_finish;
  4258. }
  4259. #ifdef PLATFORM_WINDOWS
  4260. #pragma optimize("", off)
  4261. #endif
  4262. boolean halbtc8723d2ant_psd_antenna_detection_check(IN struct btc_coexist
  4263. *btcoexist)
  4264. {
  4265. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  4266. struct btc_board_info *board_info = &btcoexist->board_info;
  4267. boolean scan, roam, ant_det_finish = false;
  4268. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  4269. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  4270. ant_det_count++;
  4271. psd_scan->ant_det_try_count = ant_det_count;
  4272. if (scan || roam) {
  4273. ant_det_finish = false;
  4274. psd_scan->ant_det_result = 6;
  4275. } else if (coex_sta->bt_disabled) {
  4276. ant_det_finish = false;
  4277. psd_scan->ant_det_result = 11;
  4278. } else if (coex_sta->num_of_profile >= 1) {
  4279. ant_det_finish = false;
  4280. psd_scan->ant_det_result = 7;
  4281. } else if (
  4282. !psd_scan->ant_det_is_ant_det_available) { /* Antenna initial setup is not ready */
  4283. ant_det_finish = false;
  4284. psd_scan->ant_det_result = 9;
  4285. } else if (coex_sta->c2h_bt_inquiry_page) {
  4286. ant_det_finish = false;
  4287. psd_scan->ant_det_result = 10;
  4288. } else {
  4289. ant_det_finish = halbtc8723d2ant_psd_antenna_detection(
  4290. btcoexist);
  4291. delay_ms(psd_scan->ant_det_bt_tx_time);
  4292. }
  4293. if (!ant_det_finish)
  4294. ant_det_fail_count++;
  4295. psd_scan->ant_det_fail_count = ant_det_fail_count;
  4296. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4297. "xxxxxxxxxxxxxxxx AntennaDetect(), result = %d, fail_count = %d, finish = %s\n",
  4298. psd_scan->ant_det_result,
  4299. psd_scan->ant_det_fail_count,
  4300. ant_det_finish == true ? "Yes" : "No");
  4301. BTC_TRACE(trace_buf);
  4302. return ant_det_finish;
  4303. }
  4304. /* ************************************************************
  4305. * work around function start with wa_halbtc8723d2ant_
  4306. * ************************************************************
  4307. * ************************************************************
  4308. * extern function start with ex_halbtc8723d2ant_
  4309. * ************************************************************ */
  4310. void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist)
  4311. {
  4312. struct btc_board_info *board_info = &btcoexist->board_info;
  4313. u8 u8tmp = 0x0;
  4314. u16 u16tmp = 0x0;
  4315. u32 value = 0;
  4316. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4317. "xxxxxxxxxxxxxxxx Execute 8723d 2-Ant PowerOn Setting xxxxxxxxxxxxxxxx!!\n");
  4318. BTC_TRACE(trace_buf);
  4319. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4320. "Ant Det Finish = %s, Ant Det Number = %d\n",
  4321. (board_info->btdm_ant_det_finish ? "Yes" : "No"),
  4322. board_info->btdm_ant_num_by_ant_det);
  4323. BTC_TRACE(trace_buf);
  4324. btcoexist->stop_coex_dm = true;
  4325. psd_scan->ant_det_is_ant_det_available = false;
  4326. /* enable BB, REG_SYS_FUNC_EN such that we can write BB Register correctly. */
  4327. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x2);
  4328. btcoexist->btc_write_2byte(btcoexist, 0x2, u16tmp | BIT(0) | BIT(1));
  4329. /* Local setting bit define */
  4330. /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
  4331. /* BIT1: "0" for internal switch; "1" for external switch */
  4332. /* BIT2: "0" for one antenna; "1" for two antenna */
  4333. /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
  4334. /* Set path control to WL */
  4335. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x80, 0x1);
  4336. btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
  4337. /* Check efuse 0xc3[6] for Single Antenna Path */
  4338. if (board_info->single_ant_path == 0) {
  4339. /* set to S1 */
  4340. board_info->btdm_ant_pos = BTC_ANTENNA_AT_MAIN_PORT;
  4341. u8tmp = 4;
  4342. value = 1;
  4343. } else if (board_info->single_ant_path == 1) {
  4344. /* set to S0 */
  4345. board_info->btdm_ant_pos = BTC_ANTENNA_AT_AUX_PORT;
  4346. u8tmp = 5;
  4347. value = 0;
  4348. }
  4349. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4350. "[BTCoex], ********** (Power On) single_ant_path = %d, btdm_ant_pos = %d **********\n",
  4351. board_info->single_ant_path , board_info->btdm_ant_pos);
  4352. BTC_TRACE(trace_buf);
  4353. /* Set Antenna Path to BT side */
  4354. halbtc8723d2ant_set_ant_path(btcoexist,
  4355. BTC_ANT_PATH_AUTO,
  4356. FORCE_EXEC,
  4357. BT_8723D_1ANT_PHASE_COEX_POWERON);
  4358. /* Write Single Antenna Position to Registry to tell BT for 872db. This line can be removed
  4359. since BT EFuse also add "single antenna position" in EFuse for 8723d*/
  4360. btcoexist->btc_set(btcoexist, BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
  4361. &value);
  4362. /* Save"single antenna position" info in Local register setting for FW reading, because FW may not ready at power on */
  4363. if (btcoexist->chip_interface == BTC_INTF_PCI)
  4364. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0, u8tmp);
  4365. else if (btcoexist->chip_interface == BTC_INTF_USB)
  4366. btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
  4367. else if (btcoexist->chip_interface == BTC_INTF_SDIO)
  4368. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60, u8tmp);
  4369. /* enable GNT_WL/GNT_BT debug signal to GPIO14/15 */
  4370. halbtc8723d2ant_enable_gnt_to_gpio(btcoexist, true);
  4371. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4372. "[BTCoex], ********** LTE coex Reg 0x38 (Power-On) = 0x%x**********\n",
  4373. halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38));
  4374. BTC_TRACE(trace_buf);
  4375. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4376. "[BTCoex], ********** MAC Reg 0x70/ BB Reg 0x948 (Power-On) = 0x%x / 0x%x**********\n",
  4377. btcoexist->btc_read_4byte(btcoexist, 0x70),
  4378. btcoexist->btc_read_2byte(btcoexist, 0x948));
  4379. BTC_TRACE(trace_buf);
  4380. }
  4381. void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist)
  4382. {
  4383. struct btc_board_info *board_info = &btcoexist->board_info;
  4384. u8 u8tmp = 0x4; /* Set BIT2 by default since it's 2ant case */
  4385. /* */
  4386. /* S0 or S1 setting and Local register setting(By the setting fw can get ant number, S0/S1, ... info) */
  4387. /* Local setting bit define */
  4388. /* BIT0: "0" for no antenna inverse; "1" for antenna inverse */
  4389. /* BIT1: "0" for internal switch; "1" for external switch */
  4390. /* BIT2: "0" for one antenna; "1" for two antenna */
  4391. /* NOTE: here default all internal switch and 1-antenna ==> BIT1=0 and BIT2=0 */
  4392. if (btcoexist->chip_interface == BTC_INTF_USB) {
  4393. /* fixed at S0 for USB interface */
  4394. u8tmp |= 0x1; /* antenna inverse */
  4395. btcoexist->btc_write_local_reg_1byte(btcoexist, 0xfe08, u8tmp);
  4396. } else {
  4397. /* for PCIE and SDIO interface, we check efuse 0xc3[6] */
  4398. if (board_info->single_ant_path == 0) {
  4399. } else if (board_info->single_ant_path == 1) {
  4400. /* set to S0 */
  4401. u8tmp |= 0x1; /* antenna inverse */
  4402. }
  4403. if (btcoexist->chip_interface == BTC_INTF_PCI)
  4404. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x3e0,
  4405. u8tmp);
  4406. else if (btcoexist->chip_interface == BTC_INTF_SDIO)
  4407. btcoexist->btc_write_local_reg_1byte(btcoexist, 0x60,
  4408. u8tmp);
  4409. }
  4410. }
  4411. void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
  4412. IN boolean wifi_only)
  4413. {
  4414. halbtc8723d2ant_init_hw_config(btcoexist, wifi_only);
  4415. }
  4416. void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist)
  4417. {
  4418. halbtc8723d2ant_init_coex_dm(btcoexist);
  4419. }
  4420. void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist)
  4421. {
  4422. struct btc_board_info *board_info = &btcoexist->board_info;
  4423. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  4424. u8 *cli_buf = btcoexist->cli_buf;
  4425. u8 u8tmp[4], i, ps_tdma_case = 0;
  4426. u32 u32tmp[4];
  4427. u16 u16tmp[4];
  4428. u32 fa_ofdm, fa_cck, cca_ofdm, cca_cck, bt_coex_ver = 0;
  4429. u32 fw_ver = 0, bt_patch_ver = 0;
  4430. static u8 pop_report_in_10s = 0, cnt = 0;
  4431. u32 phyver = 0;
  4432. boolean lte_coex_on = false;
  4433. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4434. "\r\n ============[BT Coexist info]============");
  4435. CL_PRINTF(cli_buf);
  4436. if (btcoexist->manual_control) {
  4437. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4438. "\r\n ============[Under Manual Control]============");
  4439. CL_PRINTF(cli_buf);
  4440. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4441. "\r\n ==========================================");
  4442. CL_PRINTF(cli_buf);
  4443. }
  4444. if (!coex_sta->bt_disabled) {
  4445. if (coex_sta->bt_coex_supported_feature == 0)
  4446. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_FEATURE,
  4447. &coex_sta->bt_coex_supported_feature);
  4448. if ((coex_sta->bt_coex_supported_version == 0) ||
  4449. (coex_sta->bt_coex_supported_version == 0xffff))
  4450. btcoexist->btc_get(btcoexist, BTC_GET_U4_SUPPORTED_VERSION,
  4451. &coex_sta->bt_coex_supported_version);
  4452. if (coex_sta->bt_reg_vendor_ac == 0xffff)
  4453. coex_sta->bt_reg_vendor_ac = (u16)(
  4454. btcoexist->btc_get_bt_reg(btcoexist, 3,
  4455. 0xac) & 0xffff);
  4456. if (coex_sta->bt_reg_vendor_ae == 0xffff)
  4457. coex_sta->bt_reg_vendor_ae = (u16)(
  4458. btcoexist->btc_get_bt_reg(btcoexist, 3,
  4459. 0xae) & 0xffff);
  4460. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
  4461. &bt_patch_ver);
  4462. btcoexist->bt_info.bt_get_fw_ver = bt_patch_ver;
  4463. if (coex_sta->num_of_profile > 0) {
  4464. cnt++;
  4465. if (cnt >= 3) {
  4466. btcoexist->btc_get_bt_afh_map_from_bt(btcoexist, 0,
  4467. &coex_sta->bt_afh_map[0]);
  4468. cnt = 0;
  4469. }
  4470. }
  4471. }
  4472. if (psd_scan->ant_det_try_count == 0) {
  4473. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %s",
  4474. "Ant PG Num/ Mech/ Pos",
  4475. board_info->pg_ant_num, board_info->btdm_ant_num,
  4476. (board_info->btdm_ant_pos == 1 ? "S1" : "S0"));
  4477. CL_PRINTF(cli_buf);
  4478. } else {
  4479. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4480. "\r\n %-35s = %d/ %d/ %s (retry=%d/fail=%d/result=%d)",
  4481. "Ant PG Num/ Mech(Ant_Det)/ Pos",
  4482. board_info->pg_ant_num,
  4483. board_info->btdm_ant_num_by_ant_det,
  4484. (board_info->btdm_ant_pos == 1 ? "S1" : "S0"),
  4485. psd_scan->ant_det_try_count,
  4486. psd_scan->ant_det_fail_count,
  4487. psd_scan->ant_det_result);
  4488. CL_PRINTF(cli_buf);
  4489. if (board_info->btdm_ant_det_finish) {
  4490. if (psd_scan->ant_det_result != 12)
  4491. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4492. "\r\n %-35s = %s",
  4493. "Ant Det PSD Value",
  4494. psd_scan->ant_det_peak_val);
  4495. else
  4496. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4497. "\r\n %-35s = %d",
  4498. "Ant Det PSD Value",
  4499. psd_scan->ant_det_psd_scan_peak_val
  4500. / 100);
  4501. CL_PRINTF(cli_buf);
  4502. }
  4503. }
  4504. if (board_info->ant_det_result_five_complete) {
  4505. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4506. "\r\n %-35s = %d/ %d",
  4507. "AntDet(Registry) Num/PSD Value",
  4508. board_info->btdm_ant_num_by_ant_det,
  4509. (board_info->antdetval & 0x7f));
  4510. CL_PRINTF(cli_buf);
  4511. }
  4512. bt_patch_ver = btcoexist->bt_info.bt_get_fw_ver;
  4513. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  4514. phyver = btcoexist->btc_get_bt_phydm_version(btcoexist);
  4515. bt_coex_ver = coex_sta->bt_coex_supported_version & 0xff;
  4516. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4517. "\r\n %-35s = %d_%02x/ 0x%02x/ 0x%02x (%s)",
  4518. "CoexVer WL/ BT_Desired/ BT_Report",
  4519. glcoex_ver_date_8723d_2ant, glcoex_ver_8723d_2ant,
  4520. glcoex_ver_btdesired_8723d_2ant,
  4521. bt_coex_ver,
  4522. (bt_coex_ver == 0xff ? "Unknown" :
  4523. (coex_sta->bt_disabled ? "BT-disable" :
  4524. (bt_coex_ver >= glcoex_ver_btdesired_8723d_2ant ?
  4525. "Match" : "Mis-Match"))));
  4526. CL_PRINTF(cli_buf);
  4527. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4528. "\r\n %-35s = 0x%x/ 0x%x/ v%d/ %c",
  4529. "W_FW/ B_FW/ Phy/ Kt",
  4530. fw_ver, bt_patch_ver, phyver,
  4531. coex_sta->cut_version + 65);
  4532. CL_PRINTF(cli_buf);
  4533. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %02x %02x %02x ",
  4534. "Wifi channel informed to BT",
  4535. coex_dm->wifi_chnl_info[0], coex_dm->wifi_chnl_info[1],
  4536. coex_dm->wifi_chnl_info[2]);
  4537. CL_PRINTF(cli_buf);
  4538. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d / %d / %d ",
  4539. "Isolation/WL_Thres/BT_Thres",
  4540. coex_sta->isolation_btween_wb,
  4541. coex_sta->wifi_coex_thres,
  4542. coex_sta->bt_coex_thres);
  4543. CL_PRINTF(cli_buf);
  4544. /* wifi status */
  4545. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4546. "============[Wifi Status]============");
  4547. CL_PRINTF(cli_buf);
  4548. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_WIFI_STATUS);
  4549. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4550. "============[BT Status]============");
  4551. CL_PRINTF(cli_buf);
  4552. pop_report_in_10s++;
  4553. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4554. "\r\n %-35s = [%s/ %d dBm/ %d/ %d] ",
  4555. "BT [status/ rssi/ retryCnt/ popCnt]",
  4556. ((coex_sta->bt_disabled) ? ("disabled") : ((
  4557. coex_sta->c2h_bt_inquiry_page) ? ("inquiry/page")
  4558. : ((BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  4559. coex_dm->bt_status) ? "non-connected idle" :
  4560. ((BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status)
  4561. ? "connected-idle" : "busy")))),
  4562. coex_sta->bt_rssi - 100, coex_sta->bt_retry_cnt,
  4563. coex_sta->pop_event_cnt);
  4564. CL_PRINTF(cli_buf);
  4565. if (pop_report_in_10s >= 5) {
  4566. coex_sta->pop_event_cnt = 0;
  4567. pop_report_in_10s = 0;
  4568. }
  4569. if (coex_sta->num_of_profile != 0)
  4570. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4571. "\r\n %-35s = %s%s%s%s%s",
  4572. "Profiles",
  4573. ((bt_link_info->a2dp_exist) ? "A2DP," : ""),
  4574. ((bt_link_info->sco_exist) ? "SCO," : ""),
  4575. ((bt_link_info->hid_exist) ?
  4576. ((coex_sta->hid_busy_num >= 2) ? "HID(4/18)," :
  4577. "HID(2/18),") : ""),
  4578. ((bt_link_info->pan_exist) ? "PAN," : ""),
  4579. ((coex_sta->voice_over_HOGP) ? "Voice" : ""));
  4580. else
  4581. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4582. "\r\n %-35s = None",
  4583. "Profiles");
  4584. CL_PRINTF(cli_buf);
  4585. if (bt_link_info->a2dp_exist) {
  4586. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %d/ %s",
  4587. "A2DP Rate/Bitpool/Auto_Slot",
  4588. ((coex_sta->is_A2DP_3M) ? "3M" : "No_3M"),
  4589. coex_sta->a2dp_bit_pool,
  4590. ((coex_sta->is_autoslot) ? "On" : "Off")
  4591. );
  4592. CL_PRINTF(cli_buf);
  4593. }
  4594. if (bt_link_info->hid_exist) {
  4595. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4596. "HID PairNum/Forbid_Slot",
  4597. coex_sta->hid_pair_cnt,
  4598. coex_sta->forbidden_slot
  4599. );
  4600. CL_PRINTF(cli_buf);
  4601. }
  4602. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s / %s/ 0x%x/ 0x%x",
  4603. "Role/IgnWlanAct/Feature/BLEScan",
  4604. ((bt_link_info->slave_role) ? "Slave" : "Master"),
  4605. ((coex_dm->cur_ignore_wlan_act) ? "Yes" : "No"),
  4606. coex_sta->bt_coex_supported_feature,
  4607. coex_sta->bt_ble_scan_type);
  4608. CL_PRINTF(cli_buf);
  4609. if ((coex_sta->bt_ble_scan_type & 0x7) != 0x0) {
  4610. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4611. "\r\n %-35s = 0x%08x/ 0x%08x/ 0x%08x",
  4612. "BLEScan Intv-Win TV/Init/Ble",
  4613. (coex_sta->bt_ble_scan_type & 0x1 ?
  4614. coex_sta->bt_ble_scan_para[0] : 0x0),
  4615. (coex_sta->bt_ble_scan_type & 0x2 ?
  4616. coex_sta->bt_ble_scan_para[1] : 0x0),
  4617. (coex_sta->bt_ble_scan_type & 0x4 ?
  4618. coex_sta->bt_ble_scan_para[2] : 0x0));
  4619. CL_PRINTF(cli_buf);
  4620. }
  4621. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d/ %d",
  4622. "ReInit/ReLink/IgnWlact/Page/NameReq",
  4623. coex_sta->cnt_ReInit,
  4624. coex_sta->cnt_setupLink,
  4625. coex_sta->cnt_IgnWlanAct,
  4626. coex_sta->cnt_Page,
  4627. coex_sta->cnt_RemoteNameReq
  4628. );
  4629. CL_PRINTF(cli_buf);
  4630. halbtc8723d2ant_read_score_board(btcoexist, &u16tmp[0]);
  4631. if ((coex_sta->bt_reg_vendor_ae == 0xffff) ||
  4632. (coex_sta->bt_reg_vendor_ac == 0xffff))
  4633. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = x/ x/ %04x",
  4634. "0xae[4]/0xac[1:0]/Scoreboard", u16tmp[0]);
  4635. else
  4636. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4637. "\r\n %-35s = 0x%x/ 0x%x/ %04x",
  4638. "0xae[4]/0xac[1:0]/Scoreboard",
  4639. ((coex_sta->bt_reg_vendor_ae & BIT(4)) >> 4),
  4640. coex_sta->bt_reg_vendor_ac & 0x3, u16tmp[0]);
  4641. CL_PRINTF(cli_buf);
  4642. if (coex_sta->num_of_profile > 0) {
  4643. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4644. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
  4645. "AFH MAP",
  4646. coex_sta->bt_afh_map[0],
  4647. coex_sta->bt_afh_map[1],
  4648. coex_sta->bt_afh_map[2],
  4649. coex_sta->bt_afh_map[3],
  4650. coex_sta->bt_afh_map[4],
  4651. coex_sta->bt_afh_map[5],
  4652. coex_sta->bt_afh_map[6],
  4653. coex_sta->bt_afh_map[7],
  4654. coex_sta->bt_afh_map[8],
  4655. coex_sta->bt_afh_map[9]
  4656. );
  4657. CL_PRINTF(cli_buf);
  4658. }
  4659. for (i = 0; i < BT_INFO_SRC_8723D_2ANT_MAX; i++) {
  4660. if (coex_sta->bt_info_c2h_cnt[i]) {
  4661. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4662. "\r\n %-35s = %02x %02x %02x %02x %02x %02x %02x (%d)",
  4663. glbt_info_src_8723d_2ant[i],
  4664. coex_sta->bt_info_c2h[i][0],
  4665. coex_sta->bt_info_c2h[i][1],
  4666. coex_sta->bt_info_c2h[i][2],
  4667. coex_sta->bt_info_c2h[i][3],
  4668. coex_sta->bt_info_c2h[i][4],
  4669. coex_sta->bt_info_c2h[i][5],
  4670. coex_sta->bt_info_c2h[i][6],
  4671. coex_sta->bt_info_c2h_cnt[i]);
  4672. CL_PRINTF(cli_buf);
  4673. }
  4674. }
  4675. /* Sw mechanism */
  4676. if (btcoexist->manual_control)
  4677. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4678. "============[mechanism] (before Manual)============");
  4679. else
  4680. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4681. "============[Mechanism]============");
  4682. CL_PRINTF(cli_buf);
  4683. ps_tdma_case = coex_dm->cur_ps_tdma;
  4684. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4685. "\r\n %-35s = %02x %02x %02x %02x %02x (case-%d, %s, %s)",
  4686. "TDMA",
  4687. coex_dm->ps_tdma_para[0], coex_dm->ps_tdma_para[1],
  4688. coex_dm->ps_tdma_para[2], coex_dm->ps_tdma_para[3],
  4689. coex_dm->ps_tdma_para[4], ps_tdma_case,
  4690. (coex_dm->cur_ps_tdma_on ? "TDMA On" : "TDMA Off"),
  4691. (coex_dm->is_switch_to_1dot5_ant ? "1.5Ant" : "2Ant"));
  4692. CL_PRINTF(cli_buf);
  4693. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  4694. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  4695. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  4696. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4697. "\r\n %-35s = %d/ 0x%x/ 0x%x/ 0x%x",
  4698. "Table/0x6c0/0x6c4/0x6c8",
  4699. coex_sta->coex_table_type, u32tmp[0], u32tmp[1], u32tmp[2]);
  4700. CL_PRINTF(cli_buf);
  4701. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  4702. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6cc);
  4703. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4704. "\r\n %-35s = 0x%x/ 0x%x",
  4705. "0x778/0x6cc",
  4706. u8tmp[0], u32tmp[0]);
  4707. CL_PRINTF(cli_buf);
  4708. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
  4709. "AntDiv/ ForceLPS",
  4710. ((board_info->ant_div_cfg) ? "On" : "Off"),
  4711. ((coex_sta->force_lps_on) ? "On" : "Off"));
  4712. CL_PRINTF(cli_buf);
  4713. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  4714. "WL_DACSwing/ BT_Dec_Pwr", coex_dm->cur_fw_dac_swing_lvl,
  4715. coex_dm->cur_bt_dec_pwr_lvl);
  4716. CL_PRINTF(cli_buf);
  4717. u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  4718. lte_coex_on = ((u32tmp[0] & BIT(7)) >> 7) ? true : false;
  4719. if (lte_coex_on) {
  4720. u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4721. 0xa0);
  4722. u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4723. 0xa4);
  4724. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  4725. "LTE Coex Table W_L/B_L",
  4726. u32tmp[0] & 0xffff, u32tmp[1] & 0xffff);
  4727. CL_PRINTF(cli_buf);
  4728. u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4729. 0xa8);
  4730. u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4731. 0xac);
  4732. u32tmp[2] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4733. 0xb0);
  4734. u32tmp[3] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist,
  4735. 0xb4);
  4736. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4737. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4738. "LTE Break Table W_L/B_L/L_W/L_B",
  4739. u32tmp[0] & 0xffff, u32tmp[1] & 0xffff,
  4740. u32tmp[2] & 0xffff, u32tmp[3] & 0xffff);
  4741. CL_PRINTF(cli_buf);
  4742. }
  4743. /* Hw setting */
  4744. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s",
  4745. "============[Hw setting]============");
  4746. CL_PRINTF(cli_buf);
  4747. /*
  4748. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
  4749. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
  4750. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
  4751. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
  4752. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  4753. "0x430/0x434/0x42a/0x456",
  4754. u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
  4755. CL_PRINTF(cli_buf);
  4756. */
  4757. u32tmp[0] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x38);
  4758. u32tmp[1] = halbtc8723d2ant_ltecoex_indirect_read_reg(btcoexist, 0x54);
  4759. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x73);
  4760. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s",
  4761. "LTE Coex/Path Owner",
  4762. ((lte_coex_on) ? "On" : "Off") ,
  4763. ((u8tmp[0] & BIT(2)) ? "WL" : "BT"));
  4764. CL_PRINTF(cli_buf);
  4765. if (lte_coex_on) {
  4766. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4767. "\r\n %-35s = %d/ %d/ %d/ %d",
  4768. "LTE 3Wire/OPMode/UART/UARTMode",
  4769. (int)((u32tmp[0] & BIT(6)) >> 6),
  4770. (int)((u32tmp[0] & (BIT(5) | BIT(4))) >> 4),
  4771. (int)((u32tmp[0] & BIT(3)) >> 3),
  4772. (int)(u32tmp[0] & (BIT(2) | BIT(1) | BIT(0))));
  4773. CL_PRINTF(cli_buf);
  4774. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4775. "LTE_Busy/UART_Busy",
  4776. (int)((u32tmp[1] & BIT(1)) >> 1), (int)(u32tmp[1] & BIT(0)));
  4777. CL_PRINTF(cli_buf);
  4778. }
  4779. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4780. "\r\n %-35s = %s (BB:%s)/ %s (BB:%s)/ %s %d",
  4781. "GNT_WL_Ctrl/GNT_BT_Ctrl/Dbg",
  4782. ((u32tmp[0] & BIT(12)) ? "SW" : "HW"),
  4783. ((u32tmp[0] & BIT(8)) ? "SW" : "HW"),
  4784. ((u32tmp[0] & BIT(14)) ? "SW" : "HW"),
  4785. ((u32tmp[0] & BIT(10)) ? "SW" : "HW"),
  4786. ((u8tmp[0] & BIT(3)) ? "On" : "Off"),
  4787. coex_sta->gnt_error_cnt);
  4788. CL_PRINTF(cli_buf);
  4789. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d",
  4790. "GNT_WL/GNT_BT",
  4791. (int)((u32tmp[1] & BIT(2)) >> 2),
  4792. (int)((u32tmp[1] & BIT(3)) >> 3));
  4793. CL_PRINTF(cli_buf);
  4794. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x948);
  4795. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x67);
  4796. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x",
  4797. "0x948/0x67[7]",
  4798. u16tmp[0], (int)((u8tmp[0] & BIT(7)) >> 7));
  4799. CL_PRINTF(cli_buf);
  4800. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x964);
  4801. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x864);
  4802. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0xab7);
  4803. u8tmp[3] = btcoexist->btc_read_1byte(btcoexist, 0xa01);
  4804. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4805. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4806. "0x964[1]/0x864[0]/0xab7[5]/0xa01[7]",
  4807. (int)((u8tmp[0] & BIT(1)) >> 1), (int)((u8tmp[1] & BIT(0))),
  4808. (int)((u8tmp[2] & BIT(3)) >> 3),
  4809. (int)((u8tmp[3] & BIT(7)) >> 7));
  4810. CL_PRINTF(cli_buf);
  4811. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x4c6);
  4812. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  4813. u8tmp[2] = btcoexist->btc_read_1byte(btcoexist, 0x45e);
  4814. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  4815. "0x4c6[4]/0x40[5]/0x45e[3](TxRetry)",
  4816. (int)((u8tmp[0] & BIT(4)) >> 4),
  4817. (int)((u8tmp[1] & BIT(5)) >> 5),
  4818. (int)((u8tmp[2] & BIT(3)) >> 3));
  4819. CL_PRINTF(cli_buf);
  4820. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  4821. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  4822. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x953);
  4823. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = 0x%x/ 0x%x/ %s",
  4824. "0x550/0x522/4-RxAGC",
  4825. u32tmp[0], u8tmp[0], (u8tmp[1] & 0x2) ? "On" : "Off");
  4826. CL_PRINTF(cli_buf);
  4827. fa_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_OFDM);
  4828. fa_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_FA_CCK);
  4829. cca_ofdm = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_OFDM);
  4830. cca_cck = btcoexist->btc_phydm_query_PHY_counter(btcoexist, PHYDM_INFO_CCA_CCK);
  4831. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE,
  4832. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  4833. "CCK-CCA/CCK-FA/OFDM-CCA/OFDM-FA",
  4834. cca_cck, fa_cck, cca_ofdm, fa_ofdm);
  4835. CL_PRINTF(cli_buf);
  4836. #if 1
  4837. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  4838. "CRC_OK CCK/11g/11n/11n-agg",
  4839. coex_sta->crc_ok_cck, coex_sta->crc_ok_11g,
  4840. coex_sta->crc_ok_11n, coex_sta->crc_ok_11n_vht);
  4841. CL_PRINTF(cli_buf);
  4842. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d/ %d/ %d",
  4843. "CRC_Err CCK/11g/11n/11n-agg",
  4844. coex_sta->crc_err_cck, coex_sta->crc_err_11g,
  4845. coex_sta->crc_err_11n, coex_sta->crc_err_11n_vht);
  4846. CL_PRINTF(cli_buf);
  4847. #endif
  4848. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %s/ %s/ %s/ %d",
  4849. "WlHiPri/ Locking/ Locked/ Noisy",
  4850. (coex_sta->wifi_is_high_pri_task ? "Yes" : "No"),
  4851. (coex_sta->cck_lock ? "Yes" : "No"),
  4852. (coex_sta->cck_ever_lock ? "Yes" : "No"),
  4853. coex_sta->wl_noisy_level);
  4854. CL_PRINTF(cli_buf);
  4855. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
  4856. "0x770(Hi-pri rx/tx)",
  4857. coex_sta->high_priority_rx, coex_sta->high_priority_tx,
  4858. (coex_sta->is_hiPri_rx_overhead ? "(scan overhead!!)" : ""));
  4859. CL_PRINTF(cli_buf);
  4860. CL_SPRINTF(cli_buf, BT_TMP_BUF_SIZE, "\r\n %-35s = %d/ %d %s",
  4861. "0x774(Lo-pri rx/tx)",
  4862. coex_sta->low_priority_rx, coex_sta->low_priority_tx,
  4863. (bt_link_info->slave_role ? "(Slave!!)" : (
  4864. coex_sta->is_tdma_btautoslot_hang ? "(auto-slot hang!!)" : "")));
  4865. CL_PRINTF(cli_buf);
  4866. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  4867. }
  4868. void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4869. {
  4870. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  4871. return;
  4872. if (BTC_IPS_ENTER == type) {
  4873. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4874. "[BTCoex], IPS ENTER notify\n");
  4875. BTC_TRACE(trace_buf);
  4876. coex_sta->under_ips = true;
  4877. coex_sta->under_lps = false;
  4878. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4879. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  4880. BT_8723D_2ANT_SCOREBOARD_ONOFF |
  4881. BT_8723D_2ANT_SCOREBOARD_SCAN |
  4882. BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
  4883. false);
  4884. halbtc8723d2ant_set_ant_path(btcoexist,
  4885. BTC_ANT_PATH_AUTO,
  4886. FORCE_EXEC,
  4887. BT_8723D_2ANT_PHASE_WLAN_OFF);
  4888. halbtc8723d2ant_action_coex_all_off(btcoexist);
  4889. } else if (BTC_IPS_LEAVE == type) {
  4890. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4891. "[BTCoex], IPS LEAVE notify\n");
  4892. BTC_TRACE(trace_buf);
  4893. coex_sta->under_ips = false;
  4894. #if 0
  4895. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4896. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  4897. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4898. BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
  4899. #endif
  4900. halbtc8723d2ant_init_hw_config(btcoexist, false);
  4901. halbtc8723d2ant_init_coex_dm(btcoexist);
  4902. halbtc8723d2ant_query_bt_info(btcoexist);
  4903. }
  4904. }
  4905. void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist, IN u8 type)
  4906. {
  4907. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  4908. return;
  4909. if (BTC_LPS_ENABLE == type) {
  4910. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4911. "[BTCoex], LPS ENABLE notify\n");
  4912. BTC_TRACE(trace_buf);
  4913. coex_sta->under_lps = true;
  4914. coex_sta->under_ips = false;
  4915. if (coex_sta->force_lps_on == true) { /* LPS No-32K */
  4916. /* Write WL "Active" in Score-board for PS-TDMA */
  4917. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4918. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  4919. } else { /* LPS-32K, need check if this h2c 0x71 can work?? (2015/08/28) */
  4920. /* Write WL "Non-Active" in Score-board for Native-PS */
  4921. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4922. BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
  4923. }
  4924. } else if (BTC_LPS_DISABLE == type) {
  4925. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4926. "[BTCoex], LPS DISABLE notify\n");
  4927. BTC_TRACE(trace_buf);
  4928. coex_sta->under_lps = false;
  4929. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4930. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  4931. }
  4932. }
  4933. void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
  4934. IN u8 type)
  4935. {
  4936. u32 u32tmp;
  4937. u8 u8tmpa, u8tmpb;
  4938. boolean wifi_connected = false;
  4939. if (btcoexist->manual_control ||
  4940. btcoexist->stop_coex_dm)
  4941. return;
  4942. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  4943. &wifi_connected);
  4944. /* this can't be removed for RF off_on event, or BT would dis-connect */
  4945. halbtc8723d2ant_query_bt_info(btcoexist);
  4946. if (BTC_SCAN_START == type) {
  4947. if (!wifi_connected)
  4948. coex_sta->wifi_is_high_pri_task = true;
  4949. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4950. "[BTCoex], SCAN START notify\n");
  4951. BTC_TRACE(trace_buf);
  4952. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4953. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  4954. BT_8723D_2ANT_SCOREBOARD_SCAN |
  4955. BT_8723D_2ANT_SCOREBOARD_ONOFF,
  4956. true);
  4957. halbtc8723d2ant_set_ant_path(btcoexist,
  4958. BTC_ANT_PATH_AUTO,
  4959. FORCE_EXEC,
  4960. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  4961. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  4962. } else if (BTC_SCAN_FINISH == type) {
  4963. coex_sta->wifi_is_high_pri_task = false;
  4964. btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
  4965. &coex_sta->scan_ap_num);
  4966. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4967. "[BTCoex], SCAN FINISH notify (Scan-AP = %d)\n",
  4968. coex_sta->scan_ap_num);
  4969. BTC_TRACE(trace_buf);
  4970. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4971. BT_8723D_2ANT_SCOREBOARD_SCAN, false);
  4972. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  4973. }
  4974. }
  4975. void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
  4976. IN u8 type)
  4977. {
  4978. if (btcoexist->manual_control ||
  4979. btcoexist->stop_coex_dm)
  4980. return;
  4981. if (BTC_ASSOCIATE_START == type) {
  4982. coex_sta->wifi_is_high_pri_task = true;
  4983. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  4984. "[BTCoex], CONNECT START notify\n");
  4985. BTC_TRACE(trace_buf);
  4986. halbtc8723d2ant_post_state_to_bt(btcoexist,
  4987. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  4988. BT_8723D_2ANT_SCOREBOARD_SCAN |
  4989. BT_8723D_2ANT_SCOREBOARD_ONOFF,
  4990. true);
  4991. halbtc8723d2ant_set_ant_path(btcoexist,
  4992. BTC_ANT_PATH_AUTO,
  4993. FORCE_EXEC,
  4994. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  4995. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  4996. /* To keep TDMA case during connect process,
  4997. to avoid changed by Btinfo and runcoexmechanism */
  4998. coex_sta->freeze_coexrun_by_btinfo = true;
  4999. coex_dm->arp_cnt = 0;
  5000. } else if (BTC_ASSOCIATE_FINISH == type) {
  5001. coex_sta->wifi_is_high_pri_task = false;
  5002. coex_sta->freeze_coexrun_by_btinfo = false;
  5003. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5004. "[BTCoex], CONNECT FINISH notify\n");
  5005. BTC_TRACE(trace_buf);
  5006. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  5007. }
  5008. }
  5009. void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
  5010. IN u8 type)
  5011. {
  5012. u8 h2c_parameter[3] = {0};
  5013. u32 wifi_bw;
  5014. u8 wifi_central_chnl;
  5015. u8 ap_num = 0;
  5016. boolean wifi_under_b_mode = false;
  5017. if (btcoexist->manual_control ||
  5018. btcoexist->stop_coex_dm)
  5019. return;
  5020. if (BTC_MEDIA_CONNECT == type) {
  5021. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5022. "[BTCoex], MEDIA connect notify\n");
  5023. BTC_TRACE(trace_buf);
  5024. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5025. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  5026. BT_8723D_2ANT_SCOREBOARD_ONOFF,
  5027. true);
  5028. halbtc8723d2ant_set_ant_path(btcoexist,
  5029. BTC_ANT_PATH_AUTO,
  5030. FORCE_EXEC,
  5031. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  5032. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_B_MODE,
  5033. &wifi_under_b_mode);
  5034. /* Set CCK Tx/Rx high Pri except 11b mode */
  5035. if (wifi_under_b_mode) {
  5036. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  5037. 0x00); /* CCK Tx */
  5038. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  5039. 0x00); /* CCK Rx */
  5040. } else {
  5041. btcoexist->btc_write_1byte(btcoexist, 0x6cd,
  5042. 0x00); /* CCK Tx */
  5043. btcoexist->btc_write_1byte(btcoexist, 0x6cf,
  5044. 0x10); /* CCK Rx */
  5045. }
  5046. } else {
  5047. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5048. "[BTCoex], MEDIA disconnect notify\n");
  5049. BTC_TRACE(trace_buf);
  5050. btcoexist->btc_write_1byte(btcoexist, 0x6cd, 0x0); /* CCK Tx */
  5051. btcoexist->btc_write_1byte(btcoexist, 0x6cf, 0x0); /* CCK Rx */
  5052. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5053. BT_8723D_2ANT_SCOREBOARD_ACTIVE, false);
  5054. }
  5055. halbtc8723d2ant_update_wifi_channel_info(btcoexist, type);
  5056. }
  5057. void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
  5058. IN u8 type)
  5059. {
  5060. boolean under_4way = false;
  5061. if (btcoexist->manual_control ||
  5062. btcoexist->stop_coex_dm)
  5063. return;
  5064. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
  5065. &under_4way);
  5066. if (under_4way) {
  5067. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5068. "[BTCoex], specific Packet ---- under_4way!!\n");
  5069. BTC_TRACE(trace_buf);
  5070. coex_sta->wifi_is_high_pri_task = true;
  5071. coex_sta->specific_pkt_period_cnt = 2;
  5072. } else if (BTC_PACKET_ARP == type) {
  5073. coex_dm->arp_cnt++;
  5074. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5075. "[BTCoex], specific Packet ARP notify -cnt = %d\n",
  5076. coex_dm->arp_cnt);
  5077. BTC_TRACE(trace_buf);
  5078. } else {
  5079. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5080. "[BTCoex], specific Packet DHCP or EAPOL notify [Type = %d]\n",
  5081. type);
  5082. BTC_TRACE(trace_buf);
  5083. coex_sta->wifi_is_high_pri_task = true;
  5084. coex_sta->specific_pkt_period_cnt = 2;
  5085. }
  5086. if (coex_sta->wifi_is_high_pri_task) {
  5087. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5088. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  5089. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  5090. }
  5091. }
  5092. void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
  5093. IN u8 *tmp_buf, IN u8 length)
  5094. {
  5095. u8 i, rsp_source = 0;
  5096. boolean wifi_connected = false;
  5097. boolean wifi_scan = false, wifi_link = false, wifi_roam = false,
  5098. wifi_busy = false;
  5099. static boolean is_scoreboard_scan = false;
  5100. if (psd_scan->is_AntDet_running == true) {
  5101. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5102. "[BTCoex], bt_info_notify return for AntDet is running\n");
  5103. BTC_TRACE(trace_buf);
  5104. return;
  5105. }
  5106. rsp_source = tmp_buf[0] & 0xf;
  5107. if (rsp_source >= BT_INFO_SRC_8723D_2ANT_MAX)
  5108. rsp_source = BT_INFO_SRC_8723D_2ANT_WIFI_FW;
  5109. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  5110. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5111. "[BTCoex], Bt_info[%d], len=%d, data=[", rsp_source,
  5112. length);
  5113. BTC_TRACE(trace_buf);
  5114. for (i = 0; i < length; i++) {
  5115. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  5116. if (i == length - 1) {
  5117. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x]\n",
  5118. tmp_buf[i]);
  5119. BTC_TRACE(trace_buf);
  5120. } else {
  5121. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "0x%02x, ",
  5122. tmp_buf[i]);
  5123. BTC_TRACE(trace_buf);
  5124. }
  5125. }
  5126. coex_sta->bt_info = coex_sta->bt_info_c2h[rsp_source][1];
  5127. coex_sta->bt_info_ext = coex_sta->bt_info_c2h[rsp_source][4];
  5128. coex_sta->bt_info_ext2 = coex_sta->bt_info_c2h[rsp_source][5];
  5129. if (BT_INFO_SRC_8723D_2ANT_WIFI_FW != rsp_source) {
  5130. /* if 0xff, it means BT is under WHCK test */
  5131. coex_sta->bt_whck_test = ((coex_sta->bt_info == 0xff) ? true :
  5132. false);
  5133. coex_sta->bt_create_connection = ((
  5134. coex_sta->bt_info_c2h[rsp_source][2] & 0x80) ? true :
  5135. false);
  5136. /* unit: %, value-100 to translate to unit: dBm */
  5137. coex_sta->bt_rssi = coex_sta->bt_info_c2h[rsp_source][3] * 2 +
  5138. 10;
  5139. coex_sta->c2h_bt_remote_name_req = ((
  5140. coex_sta->bt_info_c2h[rsp_source][2] & 0x20) ? true :
  5141. false);
  5142. coex_sta->is_A2DP_3M = ((coex_sta->bt_info_c2h[rsp_source][2] &
  5143. 0x10) ? true : false);
  5144. coex_sta->acl_busy = ((coex_sta->bt_info_c2h[rsp_source][1] &
  5145. 0x9) ? true : false);
  5146. coex_sta->voice_over_HOGP = ((coex_sta->bt_info_ext & 0x10) ?
  5147. true : false);
  5148. coex_sta->c2h_bt_inquiry_page = ((coex_sta->bt_info &
  5149. BT_INFO_8723D_2ANT_B_INQ_PAGE) ? true : false);
  5150. coex_sta->a2dp_bit_pool = (((
  5151. coex_sta->bt_info_c2h[rsp_source][1] & 0x49) == 0x49) ?
  5152. coex_sta->bt_info_c2h[rsp_source][6] : 0);
  5153. coex_sta->bt_retry_cnt = coex_sta->bt_info_c2h[rsp_source][2] &
  5154. 0xf;
  5155. coex_sta->is_autoslot = coex_sta->bt_info_ext2 & 0x8;
  5156. coex_sta->forbidden_slot = coex_sta->bt_info_ext2 & 0x7;
  5157. coex_sta->hid_busy_num = (coex_sta->bt_info_ext2 & 0x30) >> 4;
  5158. coex_sta->hid_pair_cnt = (coex_sta->bt_info_ext2 & 0xc0) >> 6;
  5159. if (coex_sta->bt_retry_cnt >= 1)
  5160. coex_sta->pop_event_cnt++;
  5161. if (coex_sta->c2h_bt_remote_name_req)
  5162. coex_sta->cnt_RemoteNameReq++;
  5163. if (coex_sta->bt_info_ext & BIT(1))
  5164. coex_sta->cnt_ReInit++;
  5165. if (coex_sta->bt_info_ext & BIT(2)) {
  5166. coex_sta->cnt_setupLink++;
  5167. coex_sta->is_setupLink = true;
  5168. } else
  5169. coex_sta->is_setupLink = false;
  5170. if (coex_sta->bt_info_ext & BIT(3))
  5171. coex_sta->cnt_IgnWlanAct++;
  5172. if (coex_sta->bt_create_connection) {
  5173. coex_sta->cnt_Page++;
  5174. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY,
  5175. &wifi_busy);
  5176. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &wifi_scan);
  5177. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &wifi_link);
  5178. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &wifi_roam);
  5179. if ((wifi_link) || (wifi_roam) || (wifi_scan) ||
  5180. (coex_sta->wifi_is_high_pri_task) || (wifi_busy)) {
  5181. is_scoreboard_scan = true;
  5182. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5183. BT_8723D_2ANT_SCOREBOARD_SCAN, true);
  5184. } else
  5185. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5186. BT_8723D_2ANT_SCOREBOARD_SCAN, false);
  5187. } else {
  5188. if (is_scoreboard_scan) {
  5189. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5190. BT_8723D_2ANT_SCOREBOARD_SCAN, false);
  5191. is_scoreboard_scan = false;
  5192. }
  5193. }
  5194. /* Here we need to resend some wifi info to BT */
  5195. /* because bt is reset and loss of the info. */
  5196. if ((!btcoexist->manual_control) &&
  5197. (!btcoexist->stop_coex_dm)) {
  5198. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  5199. &wifi_connected);
  5200. /* Re-Init */
  5201. if ((coex_sta->bt_info_ext & BIT(1))) {
  5202. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5203. "[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
  5204. BTC_TRACE(trace_buf);
  5205. if (wifi_connected)
  5206. halbtc8723d2ant_update_wifi_channel_info(
  5207. btcoexist, BTC_MEDIA_CONNECT);
  5208. else
  5209. halbtc8723d2ant_update_wifi_channel_info(
  5210. btcoexist,
  5211. BTC_MEDIA_DISCONNECT);
  5212. }
  5213. /* If Ignore_WLanAct && not SetUp_Link or Role_Switch */
  5214. if ((coex_sta->bt_info_ext & BIT(3)) &&
  5215. (!(coex_sta->bt_info_ext & BIT(2))) &&
  5216. (!(coex_sta->bt_info_ext & BIT(6)))) {
  5217. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5218. "[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
  5219. BTC_TRACE(trace_buf);
  5220. halbtc8723d2ant_ignore_wlan_act(btcoexist,
  5221. FORCE_EXEC, false);
  5222. } else {
  5223. if (coex_sta->bt_info_ext & BIT(2)) {
  5224. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5225. "[BTCoex], BT ignore Wlan active because Re-link!!\n");
  5226. BTC_TRACE(trace_buf);
  5227. } else if (coex_sta->bt_info_ext & BIT(6)) {
  5228. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5229. "[BTCoex], BT ignore Wlan active because Role-Switch!!\n");
  5230. BTC_TRACE(trace_buf);
  5231. }
  5232. }
  5233. }
  5234. }
  5235. if ((coex_sta->bt_info_ext & BIT(5))) {
  5236. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5237. "[BTCoex], BT ext info bit4 check, query BLE Scan type!!\n");
  5238. BTC_TRACE(trace_buf);
  5239. coex_sta->bt_ble_scan_type = btcoexist->btc_get_ble_scan_type_from_bt(btcoexist);
  5240. if ((coex_sta->bt_ble_scan_type & 0x1) == 0x1)
  5241. coex_sta->bt_ble_scan_para[0] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x1);
  5242. if ((coex_sta->bt_ble_scan_type & 0x2) == 0x2)
  5243. coex_sta->bt_ble_scan_para[1] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x2);
  5244. if ((coex_sta->bt_ble_scan_type & 0x4) == 0x4)
  5245. coex_sta->bt_ble_scan_para[2] = btcoexist->btc_get_ble_scan_para_from_bt(btcoexist, 0x4);
  5246. }
  5247. halbtc8723d2ant_update_bt_link_info(btcoexist);
  5248. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  5249. }
  5250. void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
  5251. IN u8 type)
  5252. {
  5253. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], RF Status notify\n");
  5254. BTC_TRACE(trace_buf);
  5255. if (BTC_RF_ON == type) {
  5256. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5257. "[BTCoex], RF is turned ON!!\n");
  5258. BTC_TRACE(trace_buf);
  5259. btcoexist->stop_coex_dm = false;
  5260. #if 0
  5261. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5262. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  5263. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5264. BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
  5265. #endif
  5266. } else if (BTC_RF_OFF == type) {
  5267. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5268. "[BTCoex], RF is turned OFF!!\n");
  5269. BTC_TRACE(trace_buf);
  5270. halbtc8723d2ant_set_ant_path(btcoexist,
  5271. BTC_ANT_PATH_AUTO,
  5272. FORCE_EXEC,
  5273. BT_8723D_2ANT_PHASE_WLAN_OFF);
  5274. halbtc8723d2ant_action_coex_all_off(btcoexist);
  5275. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5276. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  5277. BT_8723D_2ANT_SCOREBOARD_ONOFF |
  5278. BT_8723D_2ANT_SCOREBOARD_SCAN |
  5279. BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
  5280. false);
  5281. btcoexist->stop_coex_dm = true;
  5282. }
  5283. }
  5284. void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist)
  5285. {
  5286. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Halt notify\n");
  5287. BTC_TRACE(trace_buf);
  5288. halbtc8723d2ant_set_ant_path(btcoexist,
  5289. BTC_ANT_PATH_AUTO,
  5290. FORCE_EXEC,
  5291. BT_8723D_2ANT_PHASE_WLAN_OFF);
  5292. ex_halbtc8723d2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  5293. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5294. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  5295. BT_8723D_2ANT_SCOREBOARD_ONOFF |
  5296. BT_8723D_2ANT_SCOREBOARD_SCAN |
  5297. BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
  5298. false);
  5299. }
  5300. void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
  5301. IN u8 pnp_state)
  5302. {
  5303. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE, "[BTCoex], Pnp notify\n");
  5304. BTC_TRACE(trace_buf);
  5305. if ((BTC_WIFI_PNP_SLEEP == pnp_state) ||
  5306. (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state)) {
  5307. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5308. "[BTCoex], Pnp notify to SLEEP\n");
  5309. BTC_TRACE(trace_buf);
  5310. /* Sinda 20150819, workaround for driver skip leave IPS/LPS to speed up sleep time. */
  5311. /* Driver do not leave IPS/LPS when driver is going to sleep, so BTCoexistence think wifi is still under IPS/LPS */
  5312. /* BT should clear UnderIPS/UnderLPS state to avoid mismatch state after wakeup. */
  5313. coex_sta->under_ips = false;
  5314. coex_sta->under_lps = false;
  5315. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5316. BT_8723D_2ANT_SCOREBOARD_ACTIVE |
  5317. BT_8723D_2ANT_SCOREBOARD_ONOFF |
  5318. BT_8723D_2ANT_SCOREBOARD_SCAN |
  5319. BT_8723D_2ANT_SCOREBOARD_UNDERTEST,
  5320. false);
  5321. if (BTC_WIFI_PNP_SLEEP_KEEP_ANT == pnp_state) {
  5322. halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  5323. FORCE_EXEC,
  5324. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  5325. } else {
  5326. halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  5327. FORCE_EXEC,
  5328. BT_8723D_2ANT_PHASE_WLAN_OFF);
  5329. }
  5330. } else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
  5331. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5332. "[BTCoex], Pnp notify to WAKE UP\n");
  5333. BTC_TRACE(trace_buf);
  5334. #if 0
  5335. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5336. BT_8723D_2ANT_SCOREBOARD_ACTIVE, true);
  5337. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5338. BT_8723D_2ANT_SCOREBOARD_ONOFF, true);
  5339. #endif
  5340. }
  5341. }
  5342. void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist)
  5343. {
  5344. struct btc_board_info *board_info = &btcoexist->board_info;
  5345. boolean wifi_busy = false;
  5346. u32 bt_patch_ver;
  5347. static u8 cnt = 0;
  5348. boolean bt_relink_finish = false;
  5349. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5350. "[BTCoex], ************* Periodical *************\n");
  5351. BTC_TRACE(trace_buf);
  5352. #if (BT_AUTO_REPORT_ONLY_8723D_2ANT == 0)
  5353. halbtc8723d2ant_query_bt_info(btcoexist);
  5354. #endif
  5355. halbtc8723d2ant_monitor_bt_ctr(btcoexist);
  5356. halbtc8723d2ant_monitor_wifi_ctr(btcoexist);
  5357. halbtc8723d2ant_monitor_bt_enable_disable(btcoexist);
  5358. #if 0
  5359. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  5360. /* halbtc8723d2ant_read_score_board(btcoexist, &bt_scoreboard_val); */
  5361. if (wifi_busy) {
  5362. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5363. BT_8723D_2ANT_SCOREBOARD_UNDERTEST, true);
  5364. /*
  5365. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5366. BT_8723D_2ANT_SCOREBOARD_WLBUSY, true);
  5367. if (bt_scoreboard_val & BIT(6))
  5368. halbtc8723d2ant_query_bt_info(btcoexist); */
  5369. } else {
  5370. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5371. BT_8723D_2ANT_SCOREBOARD_UNDERTEST, false);
  5372. /*
  5373. halbtc8723d2ant_post_state_to_bt(btcoexist,
  5374. BT_8723D_2ANT_SCOREBOARD_WLBUSY,
  5375. false); */
  5376. }
  5377. #endif
  5378. if (coex_sta->bt_relink_downcount != 0) {
  5379. coex_sta->bt_relink_downcount--;
  5380. if (coex_sta->bt_relink_downcount == 0)
  5381. bt_relink_finish = true;
  5382. }
  5383. /* for 4-way, DHCP, EAPOL packet */
  5384. if (coex_sta->specific_pkt_period_cnt > 0) {
  5385. coex_sta->specific_pkt_period_cnt--;
  5386. if ((coex_sta->specific_pkt_period_cnt == 0) &&
  5387. (coex_sta->wifi_is_high_pri_task))
  5388. coex_sta->wifi_is_high_pri_task = false;
  5389. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5390. "[BTCoex], ***************** Hi-Pri Task = %s*****************\n",
  5391. (coex_sta->wifi_is_high_pri_task ? "Yes" :
  5392. "No"));
  5393. BTC_TRACE(trace_buf);
  5394. }
  5395. if (!coex_sta->bt_disabled) {
  5396. #if BT_8723D_2ANT_ANTDET_ENABLE
  5397. if (board_info->btdm_ant_det_finish) {
  5398. if ((psd_scan->ant_det_result == 12) &&
  5399. (psd_scan->ant_det_psd_scan_peak_val == 0)
  5400. && (!psd_scan->is_AntDet_running))
  5401. psd_scan->ant_det_psd_scan_peak_val =
  5402. btcoexist->btc_get_ant_det_val_from_bt(
  5403. btcoexist) * 100;
  5404. }
  5405. #endif
  5406. }
  5407. if (halbtc8723d2ant_is_wifibt_status_changed(btcoexist))
  5408. halbtc8723d2ant_run_coexist_mechanism(btcoexist);
  5409. }
  5410. void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
  5411. IN u8 type)
  5412. {
  5413. struct btc_board_info *board_info = &btcoexist->board_info;
  5414. if (btcoexist->manual_control || btcoexist->stop_coex_dm)
  5415. return;
  5416. if (type == 2) { /* two antenna */
  5417. board_info->ant_div_cfg = true;
  5418. halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
  5419. FORCE_EXEC,
  5420. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  5421. } else { /* one antenna */
  5422. halbtc8723d2ant_set_ant_path(btcoexist, BTC_ANT_PATH_AUTO,
  5423. FORCE_EXEC,
  5424. BT_8723D_2ANT_PHASE_2G_RUNTIME);
  5425. }
  5426. }
  5427. #ifdef PLATFORM_WINDOWS
  5428. #pragma optimize("", off)
  5429. #endif
  5430. void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
  5431. IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds)
  5432. {
  5433. static u32 ant_det_count = 0, ant_det_fail_count = 0;
  5434. struct btc_board_info *board_info = &btcoexist->board_info;
  5435. u16 u16tmp;
  5436. u8 AntDetval = 0;
  5437. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5438. "xxxxxxxxxxxxxxxx Ext Call AntennaDetect()!!\n");
  5439. BTC_TRACE(trace_buf);
  5440. #if BT_8723D_2ANT_ANTDET_ENABLE
  5441. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5442. "xxxxxxxxxxxxxxxx Call AntennaDetect()!!\n");
  5443. BTC_TRACE(trace_buf);
  5444. if (seconds == 0) {
  5445. psd_scan->ant_det_try_count = 0;
  5446. psd_scan->ant_det_fail_count = 0;
  5447. ant_det_count = 0;
  5448. ant_det_fail_count = 0;
  5449. board_info->btdm_ant_det_finish = false;
  5450. board_info->btdm_ant_num_by_ant_det = 1;
  5451. return;
  5452. }
  5453. if (!board_info->btdm_ant_det_finish) {
  5454. psd_scan->ant_det_inteval_count =
  5455. psd_scan->ant_det_inteval_count + 2;
  5456. if (psd_scan->ant_det_inteval_count >=
  5457. BT_8723D_2ANT_ANTDET_RETRY_INTERVAL) {
  5458. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5459. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is up, Try Detect!!\n");
  5460. BTC_TRACE(trace_buf);
  5461. psd_scan->is_AntDet_running = true;
  5462. halbtc8723d2ant_read_score_board(btcoexist, &u16tmp);
  5463. if (u16tmp & BIT(
  5464. 2)) { /* Antenna detection is already done before last WL power on */
  5465. board_info->btdm_ant_det_finish = true;
  5466. psd_scan->ant_det_try_count = 1;
  5467. psd_scan->ant_det_fail_count = 0;
  5468. board_info->btdm_ant_num_by_ant_det = (u16tmp &
  5469. BIT(3)) ? 1 : 2;
  5470. psd_scan->ant_det_result = 12;
  5471. psd_scan->ant_det_psd_scan_peak_val =
  5472. btcoexist->btc_get_ant_det_val_from_bt(
  5473. btcoexist) * 100;
  5474. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5475. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Result from BT (%d-Ant)\n",
  5476. board_info->btdm_ant_num_by_ant_det);
  5477. BTC_TRACE(trace_buf);
  5478. } else
  5479. board_info->btdm_ant_det_finish =
  5480. halbtc8723d2ant_psd_antenna_detection_check(
  5481. btcoexist);
  5482. btcoexist->bdontenterLPS = false;
  5483. if (board_info->btdm_ant_det_finish) {
  5484. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5485. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Success!!\n");
  5486. BTC_TRACE(trace_buf);
  5487. /*for 8723d, btc_set_bt_trx_mask is just used to
  5488. notify BT stop le tx and Ant Det Result , not set BT RF TRx Mask */
  5489. if (psd_scan->ant_det_result != 12) {
  5490. AntDetval = (u8)(
  5491. psd_scan->ant_det_psd_scan_peak_val
  5492. / 100) & 0x7f;
  5493. AntDetval =
  5494. (board_info->btdm_ant_num_by_ant_det
  5495. == 1) ? (AntDetval | 0x80) :
  5496. AntDetval;
  5497. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5498. "xxxxxx AntennaDetect(), Ant Count = %d, PSD Val = %d\n",
  5499. ((AntDetval &
  5500. 0x80) ? 1
  5501. : 2), AntDetval
  5502. & 0x7f);
  5503. BTC_TRACE(trace_buf);
  5504. if (btcoexist->btc_set_bt_trx_mask(
  5505. btcoexist, AntDetval))
  5506. BTC_SPRINTF(trace_buf,
  5507. BT_TMP_BUF_SIZE,
  5508. "xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask ok!\n");
  5509. else
  5510. BTC_SPRINTF(trace_buf,
  5511. BT_TMP_BUF_SIZE,
  5512. "xxxxxx AntennaDetect(), Notify BT stop le tx by set_bt_trx_mask fail!\n");
  5513. BTC_TRACE(trace_buf);
  5514. } else
  5515. board_info->antdetval =
  5516. psd_scan->ant_det_psd_scan_peak_val/100;
  5517. board_info->btdm_ant_det_complete_fail = false;
  5518. } else {
  5519. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5520. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Fail!!\n");
  5521. BTC_TRACE(trace_buf);
  5522. }
  5523. psd_scan->ant_det_inteval_count = 0;
  5524. psd_scan->is_AntDet_running = false;
  5525. /* stimulate coex running */
  5526. halbtc8723d2ant_run_coexist_mechanism(
  5527. btcoexist);
  5528. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5529. "xxxxxxxxxxxxxxxx AntennaDetect(), Stimulate Coex running\n!!");
  5530. BTC_TRACE(trace_buf);
  5531. } else {
  5532. BTC_SPRINTF(trace_buf, BT_TMP_BUF_SIZE,
  5533. "xxxxxxxxxxxxxxxx AntennaDetect(), Antenna Det Timer is not up! (%d)\n",
  5534. psd_scan->ant_det_inteval_count);
  5535. BTC_TRACE(trace_buf);
  5536. if (psd_scan->ant_det_inteval_count == 8)
  5537. btcoexist->bdontenterLPS = true;
  5538. else
  5539. btcoexist->bdontenterLPS = false;
  5540. }
  5541. }
  5542. #endif
  5543. }
  5544. void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist)
  5545. {
  5546. #if BT_8723D_2ANT_ANTDET_ENABLE
  5547. struct btc_board_info *board_info = &btcoexist->board_info;
  5548. if (psd_scan->ant_det_try_count != 0) {
  5549. halbtc8723d2ant_psd_show_antenna_detect_result(btcoexist);
  5550. if (board_info->btdm_ant_det_finish)
  5551. halbtc8723d2ant_psd_showdata(btcoexist);
  5552. }
  5553. #endif
  5554. }
  5555. #endif
  5556. #endif /* #if (RTL8723D_SUPPORT == 1) */