phydm_lna_sat.c 38 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2007 - 2017 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. /*************************************************************
  26. * include files
  27. * *************************************************************/
  28. #include "mp_precomp.h"
  29. #include "phydm_precomp.h"
  30. #ifdef PHYDM_LNA_SAT_CHK_SUPPORT
  31. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  32. void phydm_lna_sat_chk_init(
  33. void *dm_void)
  34. {
  35. struct dm_struct *dm = (struct dm_struct *)dm_void;
  36. struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
  37. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  38. lna_info->check_time = 0;
  39. lna_info->sat_cnt_acc_patha = 0;
  40. lna_info->sat_cnt_acc_pathb = 0;
  41. #ifdef PHYDM_IC_ABOVE_3SS
  42. lna_info->sat_cnt_acc_pathc = 0;
  43. #endif
  44. #ifdef PHYDM_IC_ABOVE_4SS
  45. lna_info->sat_cnt_acc_pathd = 0;
  46. #endif
  47. lna_info->cur_sat_status = 0;
  48. lna_info->pre_sat_status = 0;
  49. lna_info->cur_timer_check_cnt = 0;
  50. lna_info->pre_timer_check_cnt = 0;
  51. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  52. if (dm->support_ic_type &
  53. (ODM_RTL8198F | ODM_RTL8814B))
  54. phydm_lna_sat_chk_bb_init(dm);
  55. #endif
  56. }
  57. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  58. void phydm_lna_sat_chk_bb_init(void *dm_void)
  59. {
  60. struct dm_struct *dm = (struct dm_struct *)dm_void;
  61. struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
  62. boolean disable_bb_switch_tab = false;
  63. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  64. /*@set table switch mux r_6table_sel_anten*/
  65. odm_set_bb_reg(dm, 0x18ac, BIT(8), 0);
  66. /*@tab decision when idle*/
  67. odm_set_bb_reg(dm, 0x18ac, BIT(16), disable_bb_switch_tab);
  68. odm_set_bb_reg(dm, 0x41ac, BIT(16), disable_bb_switch_tab);
  69. odm_set_bb_reg(dm, 0x52ac, BIT(16), disable_bb_switch_tab);
  70. odm_set_bb_reg(dm, 0x53ac, BIT(16), disable_bb_switch_tab);
  71. /*@tab decision when ofdmcca*/
  72. odm_set_bb_reg(dm, 0x18ac, BIT(17), disable_bb_switch_tab);
  73. odm_set_bb_reg(dm, 0x41ac, BIT(17), disable_bb_switch_tab);
  74. odm_set_bb_reg(dm, 0x52ac, BIT(17), disable_bb_switch_tab);
  75. odm_set_bb_reg(dm, 0x53ac, BIT(17), disable_bb_switch_tab);
  76. }
  77. void phydm_set_ofdm_agc_tab_path(
  78. void *dm_void,
  79. u8 tab_sel,
  80. enum rf_path path)
  81. {
  82. struct dm_struct *dm = (struct dm_struct *)dm_void;
  83. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  84. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B)) {
  85. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "set AGC Tab%d\n", tab_sel);
  86. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "r_6table_sel_anten = 0x%x\n",
  87. odm_get_bb_reg(dm, 0x18ac, BIT(8)));
  88. }
  89. if (dm->support_ic_type & ODM_RTL8198F) {
  90. /*@table sel:0/2, mapping 2 to 1 */
  91. if (tab_sel == OFDM_AGC_TAB_0) {
  92. odm_set_bb_reg(dm, 0x18ac, BIT(4), 0);
  93. odm_set_bb_reg(dm, 0x41ac, BIT(4), 0);
  94. odm_set_bb_reg(dm, 0x52ac, BIT(4), 0);
  95. odm_set_bb_reg(dm, 0x53ac, BIT(4), 0);
  96. } else if (tab_sel == OFDM_AGC_TAB_2) {
  97. odm_set_bb_reg(dm, 0x18ac, BIT(4), 1);
  98. odm_set_bb_reg(dm, 0x41ac, BIT(4), 1);
  99. odm_set_bb_reg(dm, 0x52ac, BIT(4), 1);
  100. odm_set_bb_reg(dm, 0x53ac, BIT(4), 1);
  101. } else {
  102. odm_set_bb_reg(dm, 0x18ac, BIT(4), 0);
  103. odm_set_bb_reg(dm, 0x41ac, BIT(4), 0);
  104. odm_set_bb_reg(dm, 0x52ac, BIT(4), 0);
  105. odm_set_bb_reg(dm, 0x53ac, BIT(4), 0);
  106. }
  107. } else if (dm->support_ic_type & ODM_RTL8814B) {
  108. if (tab_sel == OFDM_AGC_TAB_0) {
  109. odm_set_bb_reg(dm, 0x18ac, 0xf0, 0);
  110. odm_set_bb_reg(dm, 0x41ac, 0xf0, 0);
  111. odm_set_bb_reg(dm, 0x52ac, 0xf0, 0);
  112. odm_set_bb_reg(dm, 0x53ac, 0xf0, 0);
  113. } else if (tab_sel == OFDM_AGC_TAB_2) {
  114. odm_set_bb_reg(dm, 0x18ac, 0xf0, 2);
  115. odm_set_bb_reg(dm, 0x41ac, 0xf0, 2);
  116. odm_set_bb_reg(dm, 0x52ac, 0xf0, 2);
  117. odm_set_bb_reg(dm, 0x53ac, 0xf0, 2);
  118. } else {
  119. odm_set_bb_reg(dm, 0x18ac, 0xf0, 0);
  120. odm_set_bb_reg(dm, 0x41ac, 0xf0, 0);
  121. odm_set_bb_reg(dm, 0x52ac, 0xf0, 0);
  122. odm_set_bb_reg(dm, 0x53ac, 0xf0, 0);
  123. }
  124. }
  125. }
  126. u8 phydm_get_ofdm_agc_tab_path(
  127. void *dm_void,
  128. enum rf_path path)
  129. {
  130. struct dm_struct *dm = (struct dm_struct *)dm_void;
  131. u8 tab_sel = 0;
  132. if (dm->support_ic_type & ODM_RTL8198F) {
  133. tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, BIT(4));
  134. if (tab_sel == 0)
  135. tab_sel = OFDM_AGC_TAB_0;
  136. else if (tab_sel == 1)
  137. tab_sel = OFDM_AGC_TAB_2;
  138. } else if (dm->support_ic_type & ODM_RTL8814B) {
  139. tab_sel = (u8)odm_get_bb_reg(dm, R_0x18ac, 0xf0);
  140. if (tab_sel == 0)
  141. tab_sel = OFDM_AGC_TAB_0;
  142. else if (tab_sel == 2)
  143. tab_sel = OFDM_AGC_TAB_2;
  144. }
  145. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "get path %d AGC Tab %d\n",
  146. path, tab_sel);
  147. return tab_sel;
  148. }
  149. #endif /*@#if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)*/
  150. void phydm_set_ofdm_agc_tab(
  151. void *dm_void,
  152. u8 tab_sel)
  153. {
  154. struct dm_struct *dm = (struct dm_struct *)dm_void;
  155. /*@table sel:0/2, 1 is used for CCK */
  156. if (tab_sel == OFDM_AGC_TAB_0)
  157. odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0);
  158. else if (tab_sel == OFDM_AGC_TAB_2)
  159. odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_2);
  160. else
  161. odm_set_bb_reg(dm, R_0xc70, 0x1e00, OFDM_AGC_TAB_0);
  162. }
  163. u8 phydm_get_ofdm_agc_tab(
  164. void *dm_void)
  165. {
  166. struct dm_struct *dm = (struct dm_struct *)dm_void;
  167. return (u8)odm_get_bb_reg(dm, R_0xc70, 0x1e00);
  168. }
  169. void phydm_lna_sat_chk(
  170. void *dm_void)
  171. {
  172. struct dm_struct *dm = (struct dm_struct *)dm_void;
  173. struct phydm_dig_struct *dig_t = &dm->dm_dig_table;
  174. struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
  175. u8 igi_rssi_min;
  176. u8 rssi_min = dm->rssi_min;
  177. u32 sat_status_a, sat_status_b;
  178. #ifdef PHYDM_IC_ABOVE_3SS
  179. u32 sat_status_c;
  180. #endif
  181. #ifdef PHYDM_IC_ABOVE_4SS
  182. u32 sat_status_d;
  183. #endif
  184. u8 igi_restore = dig_t->cur_ig_value;
  185. u8 i, chk_cnt = lna_info->chk_cnt;
  186. u32 lna_sat_cnt_thd = 0;
  187. u8 agc_tab;
  188. u32 max_check_time = 0;
  189. /*@use rssi_max if rssi_min is not stable;*/
  190. /*@rssi_min = dm->rssi_max;*/
  191. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
  192. if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
  193. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Func disable\n");
  194. return;
  195. }
  196. if (lna_info->is_disable_lna_sat_chk) {
  197. phydm_lna_sat_chk_init(dm);
  198. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "disable_lna_sat_chk\n");
  199. return;
  200. }
  201. /*@move igi to target pin of rssi_min */
  202. if (rssi_min == 0 || rssi_min == 0xff) {
  203. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  204. "rssi_min=%d, set AGC Tab0\n", rssi_min);
  205. /*@adapt agc table 0*/
  206. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
  207. phydm_lna_sat_chk_init(dm);
  208. return;
  209. } else if (rssi_min % 2 != 0) {
  210. igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI - 1;
  211. } else {
  212. igi_rssi_min = rssi_min + DIFF_RSSI_TO_IGI;
  213. }
  214. if ((lna_info->chk_period > 0) && (lna_info->chk_period <= ONE_SEC_MS))
  215. max_check_time = chk_cnt * (ONE_SEC_MS / (lna_info->chk_period)) * 5;
  216. else
  217. max_check_time = chk_cnt * 5;
  218. lna_sat_cnt_thd = (max_check_time * lna_info->chk_duty_cycle) / 100;
  219. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  220. "check_time=%d, rssi_min=%d, igi_rssi_min=0x%x\nchk_cnt=%d, chk_period=%d, max_check_time=%d, lna_sat_cnt_thd=%d\n",
  221. lna_info->check_time,
  222. rssi_min,
  223. igi_rssi_min,
  224. chk_cnt,
  225. lna_info->chk_period,
  226. max_check_time,
  227. lna_sat_cnt_thd);
  228. odm_write_dig(dm, igi_rssi_min);
  229. /*@adapt agc table 0 check saturation status*/
  230. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  231. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  232. phydm_set_ofdm_agc_tab_path(dm, OFDM_AGC_TAB_0, RF_PATH_A);
  233. else
  234. #endif
  235. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
  236. /*@open rf power detection ckt & set detection range */
  237. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  238. if (dm->support_ic_type & ODM_RTL8198F) {
  239. /*@set rf detection range (threshold)*/
  240. config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x85,
  241. 0x3f, 0x3f);
  242. config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x85,
  243. 0x3f, 0x3f);
  244. config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x85,
  245. 0x3f, 0x3f);
  246. config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x85,
  247. 0x3f, 0x3f);
  248. /*@open rf power detection ckt*/
  249. config_phydm_write_rf_reg_8198f(dm, RF_PATH_A, 0x86, 0x10, 1);
  250. config_phydm_write_rf_reg_8198f(dm, RF_PATH_B, 0x86, 0x10, 1);
  251. config_phydm_write_rf_reg_8198f(dm, RF_PATH_C, 0x86, 0x10, 1);
  252. config_phydm_write_rf_reg_8198f(dm, RF_PATH_D, 0x86, 0x10, 1);
  253. } else if (dm->support_ic_type & ODM_RTL8814B) {
  254. /*@set rf detection range (threshold)*/
  255. #if 0
  256. config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x85,
  257. 0x3f, 0x3f);
  258. config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x85,
  259. 0x3f, 0x3f);
  260. config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x85,
  261. 0x3f, 0x3f);
  262. config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x85,
  263. 0x3f, 0x3f);
  264. #endif
  265. /*@open rf power detection ckt*/
  266. #if 0
  267. config_phydm_write_rf_reg_8814b(dm, RF_PATH_A, 0x86, 0x10, 1);
  268. config_phydm_write_rf_reg_8814b(dm, RF_PATH_B, 0x86, 0x10, 1);
  269. config_phydm_write_rf_reg_8814b(dm, RF_PATH_C, 0x86, 0x10, 1);
  270. config_phydm_write_rf_reg_8814b(dm, RF_PATH_D, 0x86, 0x10, 1);
  271. #endif
  272. } else
  273. #endif
  274. {
  275. odm_set_rf_reg(dm, RF_PATH_A, RF_0x86, 0x1f, 0x10);
  276. odm_set_rf_reg(dm, RF_PATH_B, RF_0x86, 0x1f, 0x10);
  277. #ifdef PHYDM_IC_ABOVE_3SS
  278. odm_set_rf_reg(dm, RF_PATH_C, RF_0x86, 0x1f, 0x10);
  279. #endif
  280. #ifdef PHYDM_IC_ABOVE_4SS
  281. odm_set_rf_reg(dm, RF_PATH_D, RF_0x86, 0x1f, 0x10);
  282. #endif
  283. }
  284. /*@check saturation status*/
  285. for (i = 0; i < chk_cnt; i++) {
  286. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  287. if (dm->support_ic_type & ODM_RTL8198F) {
  288. sat_status_a = config_phydm_read_rf_reg_8198f(dm, RF_PATH_A,
  289. RF_0xae,
  290. 0xe0000);
  291. sat_status_b = config_phydm_read_rf_reg_8198f(dm, RF_PATH_B,
  292. RF_0xae,
  293. 0xe0000);
  294. sat_status_c = config_phydm_read_rf_reg_8198f(dm, RF_PATH_C,
  295. RF_0xae,
  296. 0xe0000);
  297. sat_status_d = config_phydm_read_rf_reg_8198f(dm, RF_PATH_D,
  298. RF_0xae,
  299. 0xe0000);
  300. } else if (dm->support_ic_type & ODM_RTL8814B) {
  301. /*@read peak detector info from 8814B rf reg*/
  302. #if 0
  303. sat_status_a = config_phydm_read_rf_reg_8814b(dm, RF_PATH_A,
  304. RF_0xae,
  305. 0xe0000);
  306. sat_status_b = config_phydm_read_rf_reg_8814b(dm, RF_PATH_B,
  307. RF_0xae,
  308. 0xe0000);
  309. sat_status_c = config_phydm_read_rf_reg_8814b(dm, RF_PATH_C,
  310. RF_0xae,
  311. 0xe0000);
  312. sat_status_d = config_phydm_read_rf_reg_8814b(dm, RF_PATH_D,
  313. RF_0xae,
  314. 0xe0000);
  315. #endif
  316. } else
  317. #endif
  318. {
  319. sat_status_a = odm_get_rf_reg(dm, RF_PATH_A, RF_0xae, 0xc0000);
  320. sat_status_b = odm_get_rf_reg(dm, RF_PATH_B, RF_0xae, 0xc0000);
  321. #ifdef PHYDM_IC_ABOVE_3SS
  322. sat_status_c = odm_get_rf_reg(dm, RF_PATH_C, RF_0xae, 0xc0000);
  323. #endif
  324. #ifdef PHYDM_IC_ABOVE_4SS
  325. sat_status_d = odm_get_rf_reg(dm, RF_PATH_D, RF_0xae, 0xc0000);
  326. #endif
  327. }
  328. if (sat_status_a != 0)
  329. lna_info->sat_cnt_acc_patha++;
  330. if (sat_status_b != 0)
  331. lna_info->sat_cnt_acc_pathb++;
  332. #ifdef PHYDM_IC_ABOVE_3SS
  333. if (sat_status_c != 0)
  334. lna_info->sat_cnt_acc_pathc++;
  335. #endif
  336. #ifdef PHYDM_IC_ABOVE_4SS
  337. if (sat_status_d != 0)
  338. lna_info->sat_cnt_acc_pathd++;
  339. #endif
  340. if (lna_info->sat_cnt_acc_patha >= lna_sat_cnt_thd ||
  341. lna_info->sat_cnt_acc_pathb >= lna_sat_cnt_thd ||
  342. #ifdef PHYDM_IC_ABOVE_3SS
  343. lna_info->sat_cnt_acc_pathc >= lna_sat_cnt_thd ||
  344. #endif
  345. #ifdef PHYDM_IC_ABOVE_4SS
  346. lna_info->sat_cnt_acc_pathd >= lna_sat_cnt_thd ||
  347. #endif
  348. 0) {
  349. lna_info->cur_sat_status = 1;
  350. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  351. "cur_sat_status=%d, check_time=%d\n",
  352. lna_info->cur_sat_status,
  353. lna_info->check_time);
  354. break;
  355. }
  356. lna_info->cur_sat_status = 0;
  357. }
  358. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  359. "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_patha=%d, sat_cnt_acc_pathb=%d\n",
  360. lna_info->cur_sat_status,
  361. lna_info->pre_sat_status,
  362. lna_info->sat_cnt_acc_patha,
  363. lna_info->sat_cnt_acc_pathb);
  364. #ifdef PHYDM_IC_ABOVE_4SS
  365. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  366. "cur_sat_status=%d, pre_sat_status=%d, sat_cnt_acc_pathc=%d, sat_cnt_acc_pathd=%d\n",
  367. lna_info->cur_sat_status,
  368. lna_info->pre_sat_status,
  369. lna_info->sat_cnt_acc_pathc,
  370. lna_info->sat_cnt_acc_pathd);
  371. #endif
  372. /*@agc table decision*/
  373. if (lna_info->cur_sat_status) {
  374. if (!lna_info->dis_agc_table_swh)
  375. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  376. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  377. phydm_set_ofdm_agc_tab_path(dm,
  378. OFDM_AGC_TAB_2,
  379. RF_PATH_A);
  380. else
  381. #endif
  382. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2);
  383. else
  384. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  385. "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2);
  386. lna_info->check_time = 0;
  387. lna_info->sat_cnt_acc_patha = 0;
  388. lna_info->sat_cnt_acc_pathb = 0;
  389. #ifdef PHYDM_IC_ABOVE_3SS
  390. lna_info->sat_cnt_acc_pathc = 0;
  391. #endif
  392. #ifdef PHYDM_IC_ABOVE_4SS
  393. lna_info->sat_cnt_acc_pathd = 0;
  394. #endif
  395. lna_info->pre_sat_status = lna_info->cur_sat_status;
  396. } else if (lna_info->check_time <= (max_check_time - 1)) {
  397. if (lna_info->pre_sat_status && !lna_info->dis_agc_table_swh)
  398. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  399. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  400. phydm_set_ofdm_agc_tab_path(dm,
  401. OFDM_AGC_TAB_2,
  402. RF_PATH_A);
  403. else
  404. #endif
  405. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_2);
  406. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time not reached\n");
  407. if (lna_info->dis_agc_table_swh)
  408. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  409. "disable set to AGC Tab%d\n", OFDM_AGC_TAB_2);
  410. lna_info->check_time++;
  411. } else if (lna_info->check_time >= max_check_time) {
  412. if (!lna_info->dis_agc_table_swh)
  413. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  414. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  415. phydm_set_ofdm_agc_tab_path(dm,
  416. OFDM_AGC_TAB_0,
  417. RF_PATH_A);
  418. else
  419. #endif
  420. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
  421. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ckeck time reached\n");
  422. if (lna_info->dis_agc_table_swh)
  423. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  424. "disable set to AGC Tab%d\n", OFDM_AGC_TAB_0);
  425. lna_info->check_time = 0;
  426. lna_info->sat_cnt_acc_patha = 0;
  427. lna_info->sat_cnt_acc_pathb = 0;
  428. #ifdef PHYDM_IC_ABOVE_3SS
  429. lna_info->sat_cnt_acc_pathc = 0;
  430. #endif
  431. #ifdef PHYDM_IC_ABOVE_4SS
  432. lna_info->sat_cnt_acc_pathd = 0;
  433. #endif
  434. lna_info->pre_sat_status = lna_info->cur_sat_status;
  435. }
  436. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  437. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  438. agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A);
  439. else
  440. #endif
  441. agc_tab = phydm_get_ofdm_agc_tab(dm);
  442. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "use AGC tab %d\n", agc_tab);
  443. /*@restore previous igi*/
  444. odm_write_dig(dm, igi_restore);
  445. lna_info->cur_timer_check_cnt++;
  446. odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer,
  447. lna_info->chk_period);
  448. }
  449. void phydm_lna_sat_chk_callback(
  450. void *dm_void
  451. )
  452. {
  453. struct dm_struct *dm = (struct dm_struct *)dm_void;
  454. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
  455. phydm_lna_sat_chk(dm);
  456. }
  457. void phydm_lna_sat_chk_timers(
  458. void *dm_void,
  459. u8 state)
  460. {
  461. struct dm_struct *dm = (struct dm_struct *)dm_void;
  462. struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
  463. if (state == INIT_LNA_SAT_CHK_TIMMER) {
  464. odm_initialize_timer(dm,
  465. &lna_info->phydm_lna_sat_chk_timer,
  466. (void *)phydm_lna_sat_chk_callback, NULL,
  467. "phydm_lna_sat_chk_timer");
  468. } else if (state == CANCEL_LNA_SAT_CHK_TIMMER) {
  469. odm_cancel_timer(dm, &lna_info->phydm_lna_sat_chk_timer);
  470. } else if (state == RELEASE_LNA_SAT_CHK_TIMMER) {
  471. odm_release_timer(dm, &lna_info->phydm_lna_sat_chk_timer);
  472. }
  473. }
  474. void phydm_lna_sat_chk_watchdog_type1(
  475. void *dm_void)
  476. {
  477. struct dm_struct *dm = (struct dm_struct *)dm_void;
  478. struct phydm_lna_sat_t *lna_info = &dm->dm_lna_sat_info;
  479. u8 rssi_min = dm->rssi_min;
  480. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n%s ==>\n", __func__);
  481. if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK)) {
  482. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  483. "func disable\n");
  484. return;
  485. }
  486. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  487. "pre_timer_check_cnt=%d, cur_timer_check_cnt=%d\n",
  488. lna_info->pre_timer_check_cnt,
  489. lna_info->cur_timer_check_cnt);
  490. if (lna_info->is_disable_lna_sat_chk) {
  491. phydm_lna_sat_chk_init(dm);
  492. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  493. "is_disable_lna_sat_chk=%d, return\n",
  494. lna_info->is_disable_lna_sat_chk);
  495. return;
  496. }
  497. if (!(dm->support_ic_type &
  498. (ODM_RTL8197F | ODM_RTL8198F | ODM_RTL8814B))) {
  499. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  500. "support_ic_type not 97F/98F/14B, return\n");
  501. return;
  502. }
  503. if (rssi_min == 0 || rssi_min == 0xff) {
  504. /*@adapt agc table 0 */
  505. phydm_set_ofdm_agc_tab(dm, OFDM_AGC_TAB_0);
  506. phydm_lna_sat_chk_init(dm);
  507. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  508. "rssi_min=%d, return\n", rssi_min);
  509. return;
  510. }
  511. if (lna_info->cur_timer_check_cnt == lna_info->pre_timer_check_cnt) {
  512. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "fail, restart timer\n");
  513. odm_set_timer(dm, &lna_info->phydm_lna_sat_chk_timer,
  514. lna_info->chk_period);
  515. } else {
  516. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "Timer check pass\n");
  517. }
  518. lna_info->pre_timer_check_cnt = lna_info->cur_timer_check_cnt;
  519. }
  520. #endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE1*/
  521. #ifdef PHYDM_LNA_SAT_CHK_TYPE2
  522. void phydm_bubble_sort(
  523. void *dm_void,
  524. u8 *array,
  525. u16 array_length)
  526. {
  527. struct dm_struct *dm = (struct dm_struct *)dm_void;
  528. u16 i, j;
  529. u8 temp;
  530. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  531. for (i = 0; i < (array_length - 1); i++) {
  532. for (j = (i + 1); j < (array_length); j++) {
  533. if (array[i] > array[j]) {
  534. temp = array[i];
  535. array[i] = array[j];
  536. array[j] = temp;
  537. }
  538. }
  539. }
  540. }
  541. void phydm_lna_sat_chk_type2_init(
  542. void *dm_void)
  543. {
  544. struct dm_struct *dm = (struct dm_struct *)dm_void;
  545. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  546. u8 real_shift = pinfo->total_bit_shift;
  547. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  548. pinfo->total_cnt_snr = 1 << real_shift;
  549. pinfo->is_sm_done = TRUE;
  550. pinfo->is_snr_done = FALSE;
  551. pinfo->cur_snr_mean = 0;
  552. pinfo->cur_snr_var = 0;
  553. pinfo->cur_lower_snr_mean = 0;
  554. pinfo->pre_snr_mean = 0;
  555. pinfo->pre_snr_var = 0;
  556. pinfo->pre_lower_snr_mean = 0;
  557. pinfo->nxt_state = ORI_TABLE_MONITOR;
  558. pinfo->pre_state = ORI_TABLE_MONITOR;
  559. }
  560. void phydm_snr_collect(
  561. void *dm_void,
  562. u8 rx_snr)
  563. {
  564. struct dm_struct *dm = (struct dm_struct *)dm_void;
  565. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  566. if (pinfo->is_sm_done) {
  567. #if 0
  568. /*PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);*/
  569. #endif
  570. /* @adapt only path-A for calculation */
  571. pinfo->snr_statistic[pinfo->cnt_snr_statistic] = rx_snr;
  572. if (pinfo->cnt_snr_statistic == (pinfo->total_cnt_snr - 1)) {
  573. pinfo->is_snr_done = TRUE;
  574. pinfo->cnt_snr_statistic = 0;
  575. } else {
  576. pinfo->cnt_snr_statistic++;
  577. }
  578. } else {
  579. return;
  580. }
  581. }
  582. void phydm_parsing_snr(void *dm_void, void *pktinfo_void, s8 *rx_snr)
  583. {
  584. struct dm_struct *dm = (struct dm_struct *)dm_void;
  585. struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info;
  586. struct phydm_perpkt_info_struct *pktinfo = NULL;
  587. u8 target_macid = dm->rssi_min_macid;
  588. if (!(dm->support_ability & ODM_BB_LNA_SAT_CHK))
  589. return;
  590. pktinfo = (struct phydm_perpkt_info_struct *)pktinfo_void;
  591. if (!pktinfo->is_packet_match_bssid)
  592. return;
  593. if (lna_t->force_traget_macid != 0)
  594. target_macid = lna_t->force_traget_macid;
  595. if (target_macid != pktinfo->station_id)
  596. return;
  597. phydm_snr_collect(dm, rx_snr[0]); /*path-A B C D???*/
  598. }
  599. void phydm_snr_data_processing(
  600. void *dm_void)
  601. {
  602. struct dm_struct *dm = (struct dm_struct *)dm_void;
  603. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  604. u8 real_shift = pinfo->total_bit_shift;
  605. u16 total_snr_cnt = pinfo->total_cnt_snr;
  606. u16 total_loop_cnt = (total_snr_cnt - 1), i;
  607. u32 temp;
  608. u32 sum_snr_statistic = 0;
  609. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  610. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  611. "total_loop_cnt=%d\n", total_loop_cnt);
  612. for (i = 0; (i <= total_loop_cnt); i++) {
  613. if (pinfo->is_snr_detail_en) {
  614. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  615. "snr[%d]=%d\n", i, pinfo->snr_statistic[i]);
  616. }
  617. sum_snr_statistic += (u32)(pinfo->snr_statistic[i]);
  618. pinfo->snr_statistic_sqr[i] = (u16)(pinfo->snr_statistic[i] * pinfo->snr_statistic[i]);
  619. }
  620. phydm_bubble_sort(dm, pinfo->snr_statistic, pinfo->total_cnt_snr);
  621. /*update SNR's cur mean*/
  622. pinfo->cur_snr_mean = (sum_snr_statistic >> real_shift);
  623. for (i = 0; (i <= total_loop_cnt); i++) {
  624. if (pinfo->snr_statistic[i] >= pinfo->cur_snr_mean)
  625. temp = pinfo->snr_statistic[i] - pinfo->cur_snr_mean;
  626. else
  627. temp = pinfo->cur_snr_mean - pinfo->snr_statistic[i];
  628. pinfo->cur_snr_var += (temp * temp);
  629. }
  630. /*update SNR's VAR*/
  631. pinfo->cur_snr_var = (pinfo->cur_snr_var >> real_shift);
  632. /*@acquire lower SNR's statistics*/
  633. temp = 0;
  634. pinfo->cnt_lower_snr_statistic = (total_snr_cnt >> pinfo->lwr_snr_ratio_bit_shift);
  635. pinfo->cnt_lower_snr_statistic = MAX_2(pinfo->cnt_lower_snr_statistic, SNR_RPT_MAX);
  636. for (i = 0; i < pinfo->cnt_lower_snr_statistic; i++)
  637. temp += pinfo->snr_statistic[i];
  638. pinfo->cur_lower_snr_mean = temp >> (real_shift - pinfo->lwr_snr_ratio_bit_shift);
  639. }
  640. boolean phydm_is_snr_improve(
  641. void *dm_void)
  642. {
  643. struct dm_struct *dm = (struct dm_struct *)dm_void;
  644. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  645. boolean is_snr_improve;
  646. u8 cur_state = pinfo->nxt_state;
  647. u32 cur_mean = pinfo->cur_snr_mean;
  648. u32 pre_mean = pinfo->pre_snr_mean;
  649. u32 cur_lower_mean = pinfo->cur_lower_snr_mean;
  650. u32 pre_lower_mean = pinfo->pre_lower_snr_mean;
  651. u32 cur_var = pinfo->cur_snr_var;
  652. /*special case, zero VAR, interference is gone*/
  653. /*@make sure pre_var is larger enough*/
  654. if (cur_state == SAT_TABLE_MONITOR ||
  655. cur_state == ORI_TABLE_TRAINING) {
  656. if (cur_mean >= pre_mean) {
  657. if (cur_var == 0)
  658. return true;
  659. }
  660. }
  661. #if 0
  662. /*special case, mean degrade less than VAR improvement*/
  663. /*@make sure pre_var is larger enough*/
  664. if (cur_state == ORI_TABLE_MONITOR &&
  665. cur_mean < pre_mean &&
  666. cur_var < pre_var) {
  667. diff_mean = pre_mean - cur_mean;
  668. diff_var = pre_var - cur_var;
  669. return (diff_var > (2 * diff_mean * diff_mean)) ? true : false;
  670. }
  671. #endif
  672. if (cur_lower_mean >= (pre_lower_mean + pinfo->delta_snr_mean))
  673. is_snr_improve = true;
  674. else
  675. is_snr_improve = false;
  676. #if 0
  677. /* @condition refine, mean is bigger enough or VAR is smaller enough*/
  678. /* @1. from mean's view, mean improve delta_snr_mean(2), VAR not degrade lot*/
  679. if (cur_mean > (pre_mean + pinfo->delta_snr_mean)) {
  680. is_mean_improve = TRUE;
  681. is_var_improve = (cur_var <= pre_var + dm->delta_snr_var)
  682. ? TRUE : FALSE;
  683. } else if (cur_var + dm->delta_snr_var <= pre_var) {
  684. is_var_improve = TRUE;
  685. is_mean_improve = ((cur_mean + 1) >= pre_mean) ? TRUE : FALSE;
  686. } else {
  687. return false;
  688. }
  689. #endif
  690. return is_snr_improve;
  691. }
  692. boolean phydm_is_snr_degrade(
  693. void *dm_void)
  694. {
  695. struct dm_struct *dm = (struct dm_struct *)dm_void;
  696. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  697. u32 cur_lower_mean = pinfo->cur_lower_snr_mean;
  698. u32 pre_lower_mean = pinfo->pre_lower_snr_mean;
  699. boolean is_degrade;
  700. if (cur_lower_mean <= (pre_lower_mean - pinfo->delta_snr_mean))
  701. is_degrade = TRUE;
  702. else
  703. is_degrade = FALSE;
  704. #if 0
  705. is_mean_dgrade = (pinfo->cur_snr_mean + pinfo->delta_snr_mean <= pinfo->pre_snr_mean) ? TRUE : FALSE;
  706. is_var_degrade = (pinfo->cur_snr_var > (pinfo->pre_snr_var + pinfo->delta_snr_mean)) ? TRUE : FALSE;
  707. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d\n",
  708. __func__,
  709. pinfo->cur_snr_mean,
  710. pinfo->pre_snr_mean,
  711. pinfo->cur_snr_var,
  712. pinfo->pre_snr_var);
  713. return (is_mean_dgrade & is_var_degrade);
  714. #endif
  715. return is_degrade;
  716. }
  717. boolean phydm_is_large_var(
  718. void *dm_void)
  719. {
  720. struct dm_struct *dm = (struct dm_struct *)dm_void;
  721. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  722. boolean is_large_var = (pinfo->cur_snr_var >= pinfo->snr_var_thd) ? TRUE : FALSE;
  723. return is_large_var;
  724. }
  725. void phydm_update_pre_status(
  726. void *dm_void)
  727. {
  728. struct dm_struct *dm = (struct dm_struct *)dm_void;
  729. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  730. pinfo->pre_lower_snr_mean = pinfo->cur_lower_snr_mean;
  731. pinfo->pre_snr_mean = pinfo->cur_snr_mean;
  732. pinfo->pre_snr_var = pinfo->cur_snr_var;
  733. }
  734. void phydm_ori_table_monitor(
  735. void *dm_void)
  736. {
  737. struct dm_struct *dm = (struct dm_struct *)dm_void;
  738. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  739. if (phydm_is_large_var(dm)) {
  740. pinfo->nxt_state = SAT_TABLE_TRAINING;
  741. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  742. } else {
  743. pinfo->nxt_state = ORI_TABLE_MONITOR;
  744. /*switch to anti-sat table*/
  745. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  746. }
  747. phydm_update_pre_status(dm);
  748. pinfo->pre_state = ORI_TABLE_MONITOR;
  749. }
  750. void phydm_sat_table_training(
  751. void *dm_void)
  752. {
  753. struct dm_struct *dm = (struct dm_struct *)dm_void;
  754. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  755. #if 0
  756. if pre_state = ORI_TABLE_MONITOR || SAT_TABLE_TRY_FAIL,
  757. /*@"pre" adapt ori-table, "cur" adapt sat-table*/
  758. /*@adapt ori table*/
  759. if (pinfo->pre_state == ORI_TABLE_MONITOR) {
  760. pinfo->nxt_state = SAT_TABLE_TRAINING;
  761. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  762. } else {
  763. #endif
  764. if (phydm_is_snr_improve(dm)) {
  765. pinfo->nxt_state = SAT_TABLE_MONITOR;
  766. } else {
  767. pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
  768. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  769. }
  770. /*@}*/
  771. phydm_update_pre_status(dm);
  772. pinfo->pre_state = SAT_TABLE_TRAINING;
  773. }
  774. void phydm_sat_table_try_fail(
  775. void *dm_void)
  776. {
  777. struct dm_struct *dm = (struct dm_struct *)dm_void;
  778. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  779. /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt ori-table */
  780. /* @if pre_state = SAT_TABLE_TRY_FAIL, "pre" adapt ori-table, "cur" adapt ori-table */
  781. if (phydm_is_large_var(dm)) {
  782. if (phydm_is_snr_degrade(dm)) {
  783. pinfo->nxt_state = SAT_TABLE_TRAINING;
  784. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  785. } else {
  786. pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
  787. }
  788. } else {
  789. pinfo->nxt_state = ORI_TABLE_MONITOR;
  790. }
  791. phydm_update_pre_status(dm);
  792. pinfo->pre_state = SAT_TABLE_TRY_FAIL;
  793. }
  794. void phydm_sat_table_monitor(
  795. void *dm_void)
  796. {
  797. struct dm_struct *dm = (struct dm_struct *)dm_void;
  798. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  799. if (phydm_is_snr_improve(dm)) {
  800. pinfo->sat_table_monitor_times = 0;
  801. /* @if pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt sat-table */
  802. if (pinfo->pre_state == SAT_TABLE_MONITOR) {
  803. pinfo->nxt_state = ORI_TABLE_TRAINING;
  804. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  805. //phydm_update_pre_status(dm);
  806. } else {
  807. pinfo->nxt_state = SAT_TABLE_MONITOR;
  808. }
  809. /* @if pre_state = SAT_TABLE_TRAINING, "pre" adapt sat-table, "cur" adapt sat-table */
  810. /* @if pre_state = ORI_TABLE_TRAINING, "pre" adapt ori-table, "cur" adapt sat-table */
  811. /*pre_state above is no need to update*/
  812. } else {
  813. if (pinfo->sat_table_monitor_times == pinfo->force_change_period) {
  814. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s: sat_table_monitor_times=%d\n",
  815. __func__, pinfo->sat_table_monitor_times);
  816. pinfo->nxt_state = ORI_TABLE_TRAINING;
  817. pinfo->sat_table_monitor_times = 0;
  818. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  819. } else {
  820. pinfo->nxt_state = SAT_TABLE_MONITOR;
  821. pinfo->sat_table_monitor_times++;
  822. }
  823. }
  824. phydm_update_pre_status(dm);
  825. pinfo->pre_state = SAT_TABLE_MONITOR;
  826. }
  827. void phydm_ori_table_training(
  828. void *dm_void)
  829. {
  830. struct dm_struct *dm = (struct dm_struct *)dm_void;
  831. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  832. /* pre_state = SAT_TABLE_MONITOR, "pre" adapt sat-table, "cur" adapt ori-table */
  833. if (phydm_is_snr_degrade(dm) == FALSE) {
  834. pinfo->nxt_state = ORI_TABLE_MONITOR;
  835. } else {
  836. if (pinfo->pre_snr_var == 0)
  837. pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
  838. else
  839. pinfo->nxt_state = SAT_TABLE_MONITOR;
  840. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  841. }
  842. phydm_update_pre_status(dm);
  843. pinfo->pre_state = ORI_TABLE_TRAINING;
  844. }
  845. void phydm_ori_table_try_fail(
  846. void *dm_void)
  847. {
  848. struct dm_struct *dm = (struct dm_struct *)dm_void;
  849. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  850. if (pinfo->pre_state == ORI_TABLE_TRY_FAIL) {
  851. if (phydm_is_snr_improve(dm)) {
  852. pinfo->nxt_state = ORI_TABLE_TRAINING;
  853. pinfo->ori_table_try_fail_times = 0;
  854. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  855. } else {
  856. if (pinfo->ori_table_try_fail_times == pinfo->force_change_period) {
  857. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  858. "%s: ori_table_try_fail_times=%d\n", __func__, pinfo->ori_table_try_fail_times);
  859. pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
  860. pinfo->ori_table_try_fail_times = 0;
  861. phydm_update_pre_status(dm);
  862. } else {
  863. pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
  864. pinfo->ori_table_try_fail_times++;
  865. phydm_update_pre_status(dm);
  866. //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  867. }
  868. }
  869. } else {
  870. pinfo->nxt_state = ORI_TABLE_TRY_FAIL;
  871. pinfo->ori_table_try_fail_times = 0;
  872. phydm_update_pre_status(dm);
  873. //config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  874. }
  875. #if 0
  876. if (phydm_is_large_var(dm)) {
  877. if (phydm_is_snr_degrade(dm)) {
  878. pinfo->nxt_state = SAT_TABLE_TRAINING;
  879. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  880. } else {
  881. pinfo->nxt_state = SAT_TABLE_TRY_FAIL;
  882. }
  883. } else {
  884. pinfo->nxt_state = ORI_TABLE_MONITOR;
  885. }
  886. phydm_update_pre_status(dm);
  887. #endif
  888. pinfo->pre_state = ORI_TABLE_TRY_FAIL;
  889. }
  890. char *phydm_lna_sat_state_msg(
  891. void *dm_void,
  892. IN u8 state)
  893. {
  894. char *dbg_message;
  895. switch (state) {
  896. case ORI_TABLE_MONITOR:
  897. dbg_message = "ORI_TABLE_MONITOR";
  898. break;
  899. case SAT_TABLE_TRAINING:
  900. dbg_message = "SAT_TABLE_TRAINING";
  901. break;
  902. case SAT_TABLE_TRY_FAIL:
  903. dbg_message = "SAT_TABLE_TRY_FAIL";
  904. break;
  905. case SAT_TABLE_MONITOR:
  906. dbg_message = "SAT_TABLE_MONITOR";
  907. break;
  908. case ORI_TABLE_TRAINING:
  909. dbg_message = "ORI_TABLE_TRAINING";
  910. break;
  911. case ORI_TABLE_TRY_FAIL:
  912. dbg_message = "ORI_TABLE_TRY_FAIL";
  913. break;
  914. default:
  915. dbg_message = "ORI_TABLE_MONITOR";
  916. break;
  917. }
  918. return dbg_message;
  919. }
  920. void phydm_lna_sat_type2_sm(
  921. void *dm_void)
  922. {
  923. struct dm_struct *dm = (struct dm_struct *)dm_void;
  924. struct phydm_lna_sat_t *pinfo = &dm->dm_lna_sat_info;
  925. u8 state = pinfo->nxt_state;
  926. u8 agc_tab = (u8)odm_get_bb_reg(dm, 0x958, 0x1f);
  927. char *dbg_message, *nxt_dbg_message;
  928. u8 real_shift = pinfo->total_bit_shift;
  929. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "\n\n%s ==>\n", __func__);
  930. if ((dm->support_ic_type & ODM_RTL8822B) == FALSE) {
  931. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 only support 22B.\n");
  932. return;
  933. }
  934. if ((dm->support_ability & ODM_BB_LNA_SAT_CHK) == FALSE) {
  935. phydm_lna_sat_chk_type2_init(dm);
  936. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "ODM_BB_LNA_SAT_CHK_TYPE2 is NOT supported, cur table=%d\n", agc_tab);
  937. return;
  938. }
  939. if (pinfo->is_snr_done)
  940. phydm_snr_data_processing(dm);
  941. else
  942. return;
  943. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "cur agc table %d\n", agc_tab);
  944. if (pinfo->is_force_lna_sat_table != AUTO_AGC_TABLE) {
  945. /*reset state machine*/
  946. pinfo->nxt_state = ORI_TABLE_MONITOR;
  947. if (pinfo->is_snr_done) {
  948. if (pinfo->is_force_lna_sat_table == DEFAULT_AGC_TABLE)
  949. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  950. else if (pinfo->is_force_lna_sat_table == LNA_SAT_AGC_TABLE)
  951. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, LNA_SAT_AGC_TABLE);
  952. else
  953. config_phydm_switch_agc_tab_8822b(dm, *dm->channel, DEFAULT_AGC_TABLE);
  954. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  955. "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n",
  956. __func__,
  957. pinfo->cur_snr_mean,
  958. pinfo->pre_snr_mean,
  959. pinfo->cur_snr_var,
  960. pinfo->pre_snr_var,
  961. pinfo->cur_lower_snr_mean,
  962. pinfo->pre_lower_snr_mean,
  963. pinfo->cnt_lower_snr_statistic);
  964. pinfo->is_snr_done = FALSE;
  965. pinfo->is_sm_done = TRUE;
  966. phydm_update_pre_status(dm);
  967. } else {
  968. return;
  969. }
  970. } else if (pinfo->is_snr_done) {
  971. PHYDM_DBG(dm, DBG_LNA_SAT_CHK,
  972. "%s: cur_mean=%d, pre_mean=%d, cur_var=%d, pre_var=%d,cur_lower_mean=%d, pre_lower_mean=%d, cnt_lower_snr=%d\n",
  973. __func__,
  974. pinfo->cur_snr_mean,
  975. pinfo->pre_snr_mean,
  976. pinfo->cur_snr_var,
  977. pinfo->pre_snr_var,
  978. pinfo->cur_lower_snr_mean,
  979. pinfo->pre_lower_snr_mean,
  980. pinfo->cnt_lower_snr_statistic);
  981. switch (state) {
  982. case ORI_TABLE_MONITOR:
  983. dbg_message = "ORI_TABLE_MONITOR";
  984. phydm_ori_table_monitor(dm);
  985. break;
  986. case SAT_TABLE_TRAINING:
  987. dbg_message = "SAT_TABLE_TRAINING";
  988. phydm_sat_table_training(dm);
  989. break;
  990. case SAT_TABLE_TRY_FAIL:
  991. dbg_message = "SAT_TABLE_TRY_FAIL";
  992. phydm_sat_table_try_fail(dm);
  993. break;
  994. case SAT_TABLE_MONITOR:
  995. dbg_message = "SAT_TABLE_MONITOR";
  996. phydm_sat_table_monitor(dm);
  997. break;
  998. case ORI_TABLE_TRAINING:
  999. dbg_message = "ORI_TABLE_TRAINING";
  1000. phydm_ori_table_training(dm);
  1001. break;
  1002. case ORI_TABLE_TRY_FAIL:
  1003. dbg_message = "ORI_TABLE_TRAINING";
  1004. phydm_ori_table_try_fail(dm);
  1005. break;
  1006. default:
  1007. dbg_message = "ORI_TABLE_MONITOR";
  1008. phydm_ori_table_monitor(dm);
  1009. break;
  1010. }
  1011. dbg_message = phydm_lna_sat_state_msg(dm, state);
  1012. nxt_dbg_message = phydm_lna_sat_state_msg(dm, pinfo->nxt_state);
  1013. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "state: [%s]->[%s]\n",
  1014. dbg_message, nxt_dbg_message);
  1015. pinfo->is_snr_done = FALSE;
  1016. pinfo->is_sm_done = TRUE;
  1017. pinfo->total_cnt_snr = 1 << real_shift;
  1018. } else {
  1019. return;
  1020. }
  1021. }
  1022. #endif /*@#ifdef PHYDM_LNA_SAT_CHK_TYPE2*/
  1023. void phydm_lna_sat_debug(
  1024. void *dm_void,
  1025. char input[][16],
  1026. u32 *_used,
  1027. char *output,
  1028. u32 *_out_len)
  1029. {
  1030. struct dm_struct *dm = (struct dm_struct *)dm_void;
  1031. struct phydm_lna_sat_t *lna_t = &dm->dm_lna_sat_info;
  1032. char help[] = "-h";
  1033. char monitor[] = "-m";
  1034. u32 var1[10] = {0};
  1035. u32 used = *_used;
  1036. u32 out_len = *_out_len;
  1037. u8 i;
  1038. u8 agc_tab = 0;
  1039. if ((strcmp(input[1], help) == 0)) {
  1040. PDM_SNPF(out_len, used, output + used, out_len - used,
  1041. "help content:\n");
  1042. PDM_SNPF(out_len, used, output + used, out_len - used,
  1043. "monitor: -m\n");
  1044. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1045. PDM_SNPF(out_len, used, output + used, out_len - used,
  1046. "{0} {lna_sat_chk_en}\n");
  1047. PDM_SNPF(out_len, used, output + used, out_len - used,
  1048. "{1} {agc_table_switch_en}\n");
  1049. PDM_SNPF(out_len, used, output + used, out_len - used,
  1050. "{2} {chk_cnt per callback}\n");
  1051. PDM_SNPF(out_len, used, output + used, out_len - used,
  1052. "{3} {chk_period(ms)}\n");
  1053. PDM_SNPF(out_len, used, output + used, out_len - used,
  1054. "{4} {chk_duty_cycle(percentage)}\n");
  1055. #endif
  1056. } else if ((strcmp(input[1], monitor) == 0)) {
  1057. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1058. #if (RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  1059. if (dm->support_ic_type & (ODM_RTL8198F | ODM_RTL8814B))
  1060. agc_tab = phydm_get_ofdm_agc_tab_path(dm, RF_PATH_A);
  1061. else
  1062. #endif
  1063. agc_tab = phydm_get_ofdm_agc_tab(dm);
  1064. PDM_SNPF(out_len, used, output + used, out_len - used,
  1065. "%s%d, %s%d, %s%d, %s%d\n",
  1066. "check_time = ", lna_t->check_time,
  1067. "pre_sat_status = ", lna_t->pre_sat_status,
  1068. "cur_sat_status = ", lna_t->cur_sat_status,
  1069. "current AGC tab = ", agc_tab);
  1070. #endif
  1071. } else {
  1072. PHYDM_SSCANF(input[1], DCMD_DECIMAL, &var1[0]);
  1073. for (i = 1; i < 10; i++) {
  1074. if (input[i + 1])
  1075. PHYDM_SSCANF(input[i + 1], DCMD_DECIMAL,
  1076. &var1[i]);
  1077. }
  1078. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1079. if (var1[0] == 0) {
  1080. if (var1[1] == 1) {
  1081. lna_t->is_disable_lna_sat_chk = false;
  1082. PDM_SNPF(out_len, used, output + used,
  1083. out_len - used,
  1084. "enable lna_sat_chk\n");
  1085. } else if (var1[1] == 0) {
  1086. lna_t->is_disable_lna_sat_chk = true;
  1087. PDM_SNPF(out_len, used, output + used,
  1088. out_len - used,
  1089. "disable lna_sat_chk\n");
  1090. }
  1091. } else if (var1[0] == 1) {
  1092. if (var1[1] == 1) {
  1093. lna_t->dis_agc_table_swh = false;
  1094. PDM_SNPF(out_len, used, output + used,
  1095. out_len - used,
  1096. "enable agc_table_switch\n");
  1097. } else if (var1[1] == 0) {
  1098. lna_t->dis_agc_table_swh = true;
  1099. PDM_SNPF(out_len, used, output + used,
  1100. out_len - used,
  1101. "disable agc_table_switch\n");
  1102. }
  1103. } else if (var1[0] == 2) {
  1104. lna_t->chk_cnt = (u8)var1[1];
  1105. PDM_SNPF(out_len, used, output + used, out_len - used,
  1106. "set chk_cnt to %d\n", lna_t->chk_cnt);
  1107. } else if (var1[0] == 3) {
  1108. lna_t->chk_period = var1[1];
  1109. PDM_SNPF(out_len, used, output + used, out_len - used,
  1110. "set chk_period to %d\n", lna_t->chk_period);
  1111. } else if (var1[0] == 4) {
  1112. lna_t->chk_duty_cycle = (u8)var1[1];
  1113. PDM_SNPF(out_len, used, output + used, out_len - used,
  1114. "set chk_duty_cycle to %d\n",
  1115. lna_t->chk_duty_cycle);
  1116. }
  1117. #endif
  1118. #ifdef PHYDM_LNA_SAT_CHK_TYPE2
  1119. if (var1[0] == 1)
  1120. lna_t->force_traget_macid = var1[1];
  1121. #endif
  1122. }
  1123. *_used = used;
  1124. *_out_len = out_len;
  1125. }
  1126. void phydm_lna_sat_chk_watchdog(
  1127. void *dm_void)
  1128. {
  1129. struct dm_struct *dm = (struct dm_struct *)dm_void;
  1130. struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info;
  1131. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "%s ==>\n", __func__);
  1132. if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) {
  1133. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1134. phydm_lna_sat_chk_watchdog_type1(dm);
  1135. #endif
  1136. } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) {
  1137. #ifdef PHYDM_LNA_SAT_CHK_TYPE2
  1138. #endif
  1139. }
  1140. }
  1141. void phydm_lna_sat_config(
  1142. void *dm_void)
  1143. {
  1144. struct dm_struct *dm = (struct dm_struct *)dm_void;
  1145. struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info;
  1146. #if (RTL8822B_SUPPORT == 1)
  1147. if (dm->support_ic_type & (ODM_RTL8822B))
  1148. lna_sat->lna_sat_type = LNA_SAT_WITH_TRAIN;
  1149. #endif
  1150. #if (RTL8197F_SUPPORT || RTL8192F_SUPPORT ||\
  1151. RTL8198F_SUPPORT || RTL8814B_SUPPORT)
  1152. if (dm->support_ic_type &
  1153. (ODM_RTL8197F | ODM_RTL8192F | ODM_RTL8198F | ODM_RTL8814B))
  1154. lna_sat->lna_sat_type = LNA_SAT_WITH_PEAK_DET;
  1155. #endif
  1156. PHYDM_DBG(dm, DBG_LNA_SAT_CHK, "[%s] lna_sat_type=%d\n",
  1157. __func__, lna_sat->lna_sat_type);
  1158. }
  1159. void phydm_lna_sat_check_init(
  1160. void *dm_void)
  1161. {
  1162. struct dm_struct *dm = (struct dm_struct *)dm_void;
  1163. struct phydm_lna_sat_t *lna_sat = &dm->dm_lna_sat_info;
  1164. if ((dm->support_ability & ODM_BB_LNA_SAT_CHK))
  1165. return;
  1166. /*@2018.04.17 Johnson*/
  1167. phydm_lna_sat_config(dm);
  1168. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1169. lna_sat->chk_period = LNA_CHK_PERIOD;
  1170. lna_sat->chk_cnt = LNA_CHK_CNT;
  1171. lna_sat->chk_duty_cycle = LNA_CHK_DUTY_CYCLE;
  1172. lna_sat->dis_agc_table_swh = false;
  1173. #endif
  1174. /*@2018.04.17 Johnson end*/
  1175. if (lna_sat->lna_sat_type == LNA_SAT_WITH_PEAK_DET) {
  1176. #ifdef PHYDM_LNA_SAT_CHK_TYPE1
  1177. phydm_lna_sat_chk_init(dm);
  1178. #endif
  1179. } else if (lna_sat->lna_sat_type == LNA_SAT_WITH_TRAIN) {
  1180. #ifdef PHYDM_LNA_SAT_CHK_TYPE2
  1181. phydm_lna_sat_chk_type2_init(dm);
  1182. #endif
  1183. }
  1184. }
  1185. #endif /*@#ifdef PHYDM_LNA_SAT_CHK_SUPPORT*/